1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-v -verify-machineinstrs -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
3; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-v -verify-machineinstrs -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
4; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v -verify-machineinstrs -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
5; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v -verify-machineinstrs -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
6
7define <vscale x 8 x i32> @insert_nxv8i32_v2i32_0(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
8; CHECK-LABEL: insert_nxv8i32_v2i32_0:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vsetivli a1, 2, e32,m1,ta,mu
11; CHECK-NEXT:    vle32.v v28, (a0)
12; CHECK-NEXT:    vsetivli a0, 2, e32,m4,tu,mu
13; CHECK-NEXT:    vslideup.vi v8, v28, 0
14; CHECK-NEXT:    ret
15  %sv = load <2 x i32>, <2 x i32>* %svp
16  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 0)
17  ret <vscale x 8 x i32> %v
18}
19
20define <vscale x 8 x i32> @insert_nxv8i32_v2i32_2(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
21; CHECK-LABEL: insert_nxv8i32_v2i32_2:
22; CHECK:       # %bb.0:
23; CHECK-NEXT:    vsetivli a1, 2, e32,m1,ta,mu
24; CHECK-NEXT:    vle32.v v28, (a0)
25; CHECK-NEXT:    vsetivli a0, 4, e32,m4,tu,mu
26; CHECK-NEXT:    vslideup.vi v8, v28, 2
27; CHECK-NEXT:    ret
28  %sv = load <2 x i32>, <2 x i32>* %svp
29  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 2)
30  ret <vscale x 8 x i32> %v
31}
32
33define <vscale x 8 x i32> @insert_nxv8i32_v2i32_6(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
34; CHECK-LABEL: insert_nxv8i32_v2i32_6:
35; CHECK:       # %bb.0:
36; CHECK-NEXT:    vsetivli a1, 2, e32,m1,ta,mu
37; CHECK-NEXT:    vle32.v v28, (a0)
38; CHECK-NEXT:    vsetivli a0, 8, e32,m4,tu,mu
39; CHECK-NEXT:    vslideup.vi v8, v28, 6
40; CHECK-NEXT:    ret
41  %sv = load <2 x i32>, <2 x i32>* %svp
42  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 6)
43  ret <vscale x 8 x i32> %v
44}
45
46define <vscale x 8 x i32> @insert_nxv8i32_v8i32_0(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
47; LMULMAX2-LABEL: insert_nxv8i32_v8i32_0:
48; LMULMAX2:       # %bb.0:
49; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
50; LMULMAX2-NEXT:    vle32.v v28, (a0)
51; LMULMAX2-NEXT:    vsetivli a0, 8, e32,m4,tu,mu
52; LMULMAX2-NEXT:    vslideup.vi v8, v28, 0
53; LMULMAX2-NEXT:    ret
54;
55; LMULMAX1-LABEL: insert_nxv8i32_v8i32_0:
56; LMULMAX1:       # %bb.0:
57; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
58; LMULMAX1-NEXT:    vle32.v v28, (a0)
59; LMULMAX1-NEXT:    addi a0, a0, 16
60; LMULMAX1-NEXT:    vle32.v v12, (a0)
61; LMULMAX1-NEXT:    vsetivli a0, 4, e32,m4,tu,mu
62; LMULMAX1-NEXT:    vslideup.vi v8, v28, 0
63; LMULMAX1-NEXT:    vsetivli a0, 8, e32,m4,tu,mu
64; LMULMAX1-NEXT:    vslideup.vi v8, v12, 4
65; LMULMAX1-NEXT:    ret
66  %sv = load <8 x i32>, <8 x i32>* %svp
67  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 0)
68  ret <vscale x 8 x i32> %v
69}
70
71define <vscale x 8 x i32> @insert_nxv8i32_v8i32_4(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
72; LMULMAX2-LABEL: insert_nxv8i32_v8i32_4:
73; LMULMAX2:       # %bb.0:
74; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
75; LMULMAX2-NEXT:    vle32.v v28, (a0)
76; LMULMAX2-NEXT:    vsetivli a0, 12, e32,m4,tu,mu
77; LMULMAX2-NEXT:    vslideup.vi v8, v28, 4
78; LMULMAX2-NEXT:    ret
79;
80; LMULMAX1-LABEL: insert_nxv8i32_v8i32_4:
81; LMULMAX1:       # %bb.0:
82; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
83; LMULMAX1-NEXT:    vle32.v v28, (a0)
84; LMULMAX1-NEXT:    addi a0, a0, 16
85; LMULMAX1-NEXT:    vle32.v v12, (a0)
86; LMULMAX1-NEXT:    vsetivli a0, 8, e32,m4,tu,mu
87; LMULMAX1-NEXT:    vslideup.vi v8, v28, 4
88; LMULMAX1-NEXT:    vsetivli a0, 12, e32,m4,tu,mu
89; LMULMAX1-NEXT:    vslideup.vi v8, v12, 8
90; LMULMAX1-NEXT:    ret
91  %sv = load <8 x i32>, <8 x i32>* %svp
92  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 4)
93  ret <vscale x 8 x i32> %v
94}
95
96define <vscale x 8 x i32> @insert_nxv8i32_v8i32_8(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
97; LMULMAX2-LABEL: insert_nxv8i32_v8i32_8:
98; LMULMAX2:       # %bb.0:
99; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
100; LMULMAX2-NEXT:    vle32.v v28, (a0)
101; LMULMAX2-NEXT:    vsetivli a0, 16, e32,m4,tu,mu
102; LMULMAX2-NEXT:    vslideup.vi v8, v28, 8
103; LMULMAX2-NEXT:    ret
104;
105; LMULMAX1-LABEL: insert_nxv8i32_v8i32_8:
106; LMULMAX1:       # %bb.0:
107; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
108; LMULMAX1-NEXT:    vle32.v v28, (a0)
109; LMULMAX1-NEXT:    addi a0, a0, 16
110; LMULMAX1-NEXT:    vle32.v v12, (a0)
111; LMULMAX1-NEXT:    vsetivli a0, 12, e32,m4,tu,mu
112; LMULMAX1-NEXT:    vslideup.vi v8, v28, 8
113; LMULMAX1-NEXT:    vsetivli a0, 16, e32,m4,tu,mu
114; LMULMAX1-NEXT:    vslideup.vi v8, v12, 12
115; LMULMAX1-NEXT:    ret
116  %sv = load <8 x i32>, <8 x i32>* %svp
117  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 8)
118  ret <vscale x 8 x i32> %v
119}
120
121define <vscale x 8 x i32> @insert_nxv8i32_undef_v2i32_0(<2 x i32>* %svp) {
122; CHECK-LABEL: insert_nxv8i32_undef_v2i32_0:
123; CHECK:       # %bb.0:
124; CHECK-NEXT:    vsetivli a1, 2, e32,m1,ta,mu
125; CHECK-NEXT:    vle32.v v8, (a0)
126; CHECK-NEXT:    ret
127  %sv = load <2 x i32>, <2 x i32>* %svp
128  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> undef, <2 x i32> %sv, i64 0)
129  ret <vscale x 8 x i32> %v
130}
131
132define void @insert_v4i32_v2i32_0(<4 x i32>* %vp, <2 x i32>* %svp) {
133; CHECK-LABEL: insert_v4i32_v2i32_0:
134; CHECK:       # %bb.0:
135; CHECK-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
136; CHECK-NEXT:    vle32.v v25, (a1)
137; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
138; CHECK-NEXT:    vle32.v v26, (a0)
139; CHECK-NEXT:    vsetivli a1, 2, e32,m1,tu,mu
140; CHECK-NEXT:    vslideup.vi v26, v25, 0
141; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
142; CHECK-NEXT:    vse32.v v26, (a0)
143; CHECK-NEXT:    ret
144  %sv = load <2 x i32>, <2 x i32>* %svp
145  %vec = load <4 x i32>, <4 x i32>* %vp
146  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> %vec, <2 x i32> %sv, i64 0)
147  store <4 x i32> %v, <4 x i32>* %vp
148  ret void
149}
150
151define void @insert_v4i32_v2i32_2(<4 x i32>* %vp, <2 x i32>* %svp) {
152; CHECK-LABEL: insert_v4i32_v2i32_2:
153; CHECK:       # %bb.0:
154; CHECK-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
155; CHECK-NEXT:    vle32.v v25, (a1)
156; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
157; CHECK-NEXT:    vle32.v v26, (a0)
158; CHECK-NEXT:    vsetivli a1, 4, e32,m1,tu,mu
159; CHECK-NEXT:    vslideup.vi v26, v25, 2
160; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
161; CHECK-NEXT:    vse32.v v26, (a0)
162; CHECK-NEXT:    ret
163  %sv = load <2 x i32>, <2 x i32>* %svp
164  %vec = load <4 x i32>, <4 x i32>* %vp
165  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> %vec, <2 x i32> %sv, i64 2)
166  store <4 x i32> %v, <4 x i32>* %vp
167  ret void
168}
169
170define void @insert_v4i32_undef_v2i32_0(<4 x i32>* %vp, <2 x i32>* %svp) {
171; CHECK-LABEL: insert_v4i32_undef_v2i32_0:
172; CHECK:       # %bb.0:
173; CHECK-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
174; CHECK-NEXT:    vle32.v v25, (a1)
175; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
176; CHECK-NEXT:    vmv.v.i v26, 0
177; CHECK-NEXT:    vsetivli a1, 2, e32,m1,tu,mu
178; CHECK-NEXT:    vslideup.vi v26, v25, 0
179; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
180; CHECK-NEXT:    vse32.v v26, (a0)
181; CHECK-NEXT:    ret
182  %sv = load <2 x i32>, <2 x i32>* %svp
183  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> undef, <2 x i32> %sv, i64 0)
184  store <4 x i32> %v, <4 x i32>* %vp
185  ret void
186}
187
188define void @insert_v8i32_v2i32_0(<8 x i32>* %vp, <2 x i32>* %svp) {
189; LMULMAX2-LABEL: insert_v8i32_v2i32_0:
190; LMULMAX2:       # %bb.0:
191; LMULMAX2-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
192; LMULMAX2-NEXT:    vle32.v v26, (a1)
193; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
194; LMULMAX2-NEXT:    vle32.v v28, (a0)
195; LMULMAX2-NEXT:    vsetivli a1, 2, e32,m2,tu,mu
196; LMULMAX2-NEXT:    vslideup.vi v28, v26, 0
197; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
198; LMULMAX2-NEXT:    vse32.v v28, (a0)
199; LMULMAX2-NEXT:    ret
200;
201; LMULMAX1-LABEL: insert_v8i32_v2i32_0:
202; LMULMAX1:       # %bb.0:
203; LMULMAX1-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
204; LMULMAX1-NEXT:    vle32.v v25, (a1)
205; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
206; LMULMAX1-NEXT:    vle32.v v26, (a0)
207; LMULMAX1-NEXT:    vsetivli a1, 2, e32,m1,tu,mu
208; LMULMAX1-NEXT:    vslideup.vi v26, v25, 0
209; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
210; LMULMAX1-NEXT:    vse32.v v26, (a0)
211; LMULMAX1-NEXT:    ret
212  %sv = load <2 x i32>, <2 x i32>* %svp
213  %vec = load <8 x i32>, <8 x i32>* %vp
214  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 0)
215  store <8 x i32> %v, <8 x i32>* %vp
216  ret void
217}
218
219define void @insert_v8i32_v2i32_2(<8 x i32>* %vp, <2 x i32>* %svp) {
220; LMULMAX2-LABEL: insert_v8i32_v2i32_2:
221; LMULMAX2:       # %bb.0:
222; LMULMAX2-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
223; LMULMAX2-NEXT:    vle32.v v26, (a1)
224; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
225; LMULMAX2-NEXT:    vle32.v v28, (a0)
226; LMULMAX2-NEXT:    vsetivli a1, 4, e32,m2,tu,mu
227; LMULMAX2-NEXT:    vslideup.vi v28, v26, 2
228; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
229; LMULMAX2-NEXT:    vse32.v v28, (a0)
230; LMULMAX2-NEXT:    ret
231;
232; LMULMAX1-LABEL: insert_v8i32_v2i32_2:
233; LMULMAX1:       # %bb.0:
234; LMULMAX1-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
235; LMULMAX1-NEXT:    vle32.v v25, (a1)
236; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
237; LMULMAX1-NEXT:    vle32.v v26, (a0)
238; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,tu,mu
239; LMULMAX1-NEXT:    vslideup.vi v26, v25, 2
240; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
241; LMULMAX1-NEXT:    vse32.v v26, (a0)
242; LMULMAX1-NEXT:    ret
243  %sv = load <2 x i32>, <2 x i32>* %svp
244  %vec = load <8 x i32>, <8 x i32>* %vp
245  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 2)
246  store <8 x i32> %v, <8 x i32>* %vp
247  ret void
248}
249
250define void @insert_v8i32_v2i32_6(<8 x i32>* %vp, <2 x i32>* %svp) {
251; LMULMAX2-LABEL: insert_v8i32_v2i32_6:
252; LMULMAX2:       # %bb.0:
253; LMULMAX2-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
254; LMULMAX2-NEXT:    vle32.v v26, (a1)
255; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
256; LMULMAX2-NEXT:    vle32.v v28, (a0)
257; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,tu,mu
258; LMULMAX2-NEXT:    vslideup.vi v28, v26, 6
259; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
260; LMULMAX2-NEXT:    vse32.v v28, (a0)
261; LMULMAX2-NEXT:    ret
262;
263; LMULMAX1-LABEL: insert_v8i32_v2i32_6:
264; LMULMAX1:       # %bb.0:
265; LMULMAX1-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
266; LMULMAX1-NEXT:    vle32.v v25, (a1)
267; LMULMAX1-NEXT:    addi a0, a0, 16
268; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
269; LMULMAX1-NEXT:    vle32.v v26, (a0)
270; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,tu,mu
271; LMULMAX1-NEXT:    vslideup.vi v26, v25, 2
272; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
273; LMULMAX1-NEXT:    vse32.v v26, (a0)
274; LMULMAX1-NEXT:    ret
275  %sv = load <2 x i32>, <2 x i32>* %svp
276  %vec = load <8 x i32>, <8 x i32>* %vp
277  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 6)
278  store <8 x i32> %v, <8 x i32>* %vp
279  ret void
280}
281
282define void @insert_v8i32_undef_v2i32_6(<8 x i32>* %vp, <2 x i32>* %svp) {
283; LMULMAX2-LABEL: insert_v8i32_undef_v2i32_6:
284; LMULMAX2:       # %bb.0:
285; LMULMAX2-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
286; LMULMAX2-NEXT:    vle32.v v26, (a1)
287; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
288; LMULMAX2-NEXT:    vslideup.vi v28, v26, 6
289; LMULMAX2-NEXT:    vse32.v v28, (a0)
290; LMULMAX2-NEXT:    ret
291;
292; LMULMAX1-LABEL: insert_v8i32_undef_v2i32_6:
293; LMULMAX1:       # %bb.0:
294; LMULMAX1-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
295; LMULMAX1-NEXT:    vle32.v v25, (a1)
296; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
297; LMULMAX1-NEXT:    vslideup.vi v26, v25, 2
298; LMULMAX1-NEXT:    addi a0, a0, 16
299; LMULMAX1-NEXT:    vse32.v v26, (a0)
300; LMULMAX1-NEXT:    ret
301  %sv = load <2 x i32>, <2 x i32>* %svp
302  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> undef, <2 x i32> %sv, i64 6)
303  store <8 x i32> %v, <8 x i32>* %vp
304  ret void
305}
306
307define void @insert_v4i16_v2i16_0(<4 x i16>* %vp, <2 x i16>* %svp) {
308; CHECK-LABEL: insert_v4i16_v2i16_0:
309; CHECK:       # %bb.0:
310; CHECK-NEXT:    vsetivli a2, 4, e16,m1,ta,mu
311; CHECK-NEXT:    vle16.v v25, (a0)
312; CHECK-NEXT:    vsetivli a2, 2, e16,m1,ta,mu
313; CHECK-NEXT:    vle16.v v26, (a1)
314; CHECK-NEXT:    vsetivli a1, 2, e16,m1,tu,mu
315; CHECK-NEXT:    vslideup.vi v25, v26, 0
316; CHECK-NEXT:    vsetivli a1, 4, e16,m1,ta,mu
317; CHECK-NEXT:    vse16.v v25, (a0)
318; CHECK-NEXT:    ret
319  %v = load <4 x i16>, <4 x i16>* %vp
320  %sv = load <2 x i16>, <2 x i16>* %svp
321  %c = call <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16> %v, <2 x i16> %sv, i64 0)
322  store <4 x i16> %c, <4 x i16>* %vp
323  ret void
324}
325
326define void @insert_v4i16_v2i16_2(<4 x i16>* %vp, <2 x i16>* %svp) {
327; CHECK-LABEL: insert_v4i16_v2i16_2:
328; CHECK:       # %bb.0:
329; CHECK-NEXT:    vsetivli a2, 4, e16,m1,ta,mu
330; CHECK-NEXT:    vle16.v v25, (a0)
331; CHECK-NEXT:    vsetivli a2, 2, e16,m1,ta,mu
332; CHECK-NEXT:    vle16.v v26, (a1)
333; CHECK-NEXT:    vsetivli a1, 4, e16,m1,tu,mu
334; CHECK-NEXT:    vslideup.vi v25, v26, 2
335; CHECK-NEXT:    vsetivli a1, 4, e16,m1,ta,mu
336; CHECK-NEXT:    vse16.v v25, (a0)
337; CHECK-NEXT:    ret
338  %v = load <4 x i16>, <4 x i16>* %vp
339  %sv = load <2 x i16>, <2 x i16>* %svp
340  %c = call <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16> %v, <2 x i16> %sv, i64 2)
341  store <4 x i16> %c, <4 x i16>* %vp
342  ret void
343}
344
345define void @insert_v32i1_v8i1_0(<32 x i1>* %vp, <8 x i1>* %svp) {
346; LMULMAX2-LABEL: insert_v32i1_v8i1_0:
347; LMULMAX2:       # %bb.0:
348; LMULMAX2-NEXT:    addi a2, zero, 32
349; LMULMAX2-NEXT:    vsetvli a3, a2, e8,m2,ta,mu
350; LMULMAX2-NEXT:    vle1.v v25, (a0)
351; LMULMAX2-NEXT:    vsetivli a3, 8, e8,m1,ta,mu
352; LMULMAX2-NEXT:    vle1.v v26, (a1)
353; LMULMAX2-NEXT:    vsetivli a1, 1, e8,m1,tu,mu
354; LMULMAX2-NEXT:    vslideup.vi v25, v26, 0
355; LMULMAX2-NEXT:    vsetvli a1, a2, e8,m2,ta,mu
356; LMULMAX2-NEXT:    vse1.v v25, (a0)
357; LMULMAX2-NEXT:    ret
358;
359; LMULMAX1-LABEL: insert_v32i1_v8i1_0:
360; LMULMAX1:       # %bb.0:
361; LMULMAX1-NEXT:    vsetivli a2, 16, e8,m1,ta,mu
362; LMULMAX1-NEXT:    vle1.v v25, (a0)
363; LMULMAX1-NEXT:    vsetivli a2, 8, e8,m1,ta,mu
364; LMULMAX1-NEXT:    vle1.v v26, (a1)
365; LMULMAX1-NEXT:    vsetivli a1, 1, e8,m1,tu,mu
366; LMULMAX1-NEXT:    vslideup.vi v25, v26, 0
367; LMULMAX1-NEXT:    vsetivli a1, 16, e8,m1,ta,mu
368; LMULMAX1-NEXT:    vse1.v v25, (a0)
369; LMULMAX1-NEXT:    ret
370  %v = load <32 x i1>, <32 x i1>* %vp
371  %sv = load <8 x i1>, <8 x i1>* %svp
372  %c = call <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1> %v, <8 x i1> %sv, i64 0)
373  store <32 x i1> %c, <32 x i1>* %vp
374  ret void
375}
376
377define void @insert_v32i1_v8i1_16(<32 x i1>* %vp, <8 x i1>* %svp) {
378; LMULMAX2-LABEL: insert_v32i1_v8i1_16:
379; LMULMAX2:       # %bb.0:
380; LMULMAX2-NEXT:    addi a2, zero, 32
381; LMULMAX2-NEXT:    vsetvli a3, a2, e8,m2,ta,mu
382; LMULMAX2-NEXT:    vle1.v v25, (a0)
383; LMULMAX2-NEXT:    vsetivli a3, 8, e8,m1,ta,mu
384; LMULMAX2-NEXT:    vle1.v v26, (a1)
385; LMULMAX2-NEXT:    vsetivli a1, 3, e8,m1,tu,mu
386; LMULMAX2-NEXT:    vslideup.vi v25, v26, 2
387; LMULMAX2-NEXT:    vsetvli a1, a2, e8,m2,ta,mu
388; LMULMAX2-NEXT:    vse1.v v25, (a0)
389; LMULMAX2-NEXT:    ret
390;
391; LMULMAX1-LABEL: insert_v32i1_v8i1_16:
392; LMULMAX1:       # %bb.0:
393; LMULMAX1-NEXT:    addi a0, a0, 2
394; LMULMAX1-NEXT:    vsetivli a2, 16, e8,m1,ta,mu
395; LMULMAX1-NEXT:    vle1.v v25, (a0)
396; LMULMAX1-NEXT:    vsetivli a2, 8, e8,m1,ta,mu
397; LMULMAX1-NEXT:    vle1.v v26, (a1)
398; LMULMAX1-NEXT:    vsetivli a1, 1, e8,m1,tu,mu
399; LMULMAX1-NEXT:    vslideup.vi v25, v26, 0
400; LMULMAX1-NEXT:    vsetivli a1, 16, e8,m1,ta,mu
401; LMULMAX1-NEXT:    vse1.v v25, (a0)
402; LMULMAX1-NEXT:    ret
403  %v = load <32 x i1>, <32 x i1>* %vp
404  %sv = load <8 x i1>, <8 x i1>* %svp
405  %c = call <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1> %v, <8 x i1> %sv, i64 16)
406  store <32 x i1> %c, <32 x i1>* %vp
407  ret void
408}
409
410define void @insert_v8i1_v4i1_0(<8 x i1>* %vp, <4 x i1>* %svp) {
411; CHECK-LABEL: insert_v8i1_v4i1_0:
412; CHECK:       # %bb.0:
413; CHECK-NEXT:    vsetivli a2, 8, e8,m1,ta,mu
414; CHECK-NEXT:    vle1.v v27, (a0)
415; CHECK-NEXT:    vsetivli a2, 4, e8,m1,ta,mu
416; CHECK-NEXT:    vle1.v v0, (a1)
417; CHECK-NEXT:    vmv.v.i v25, 0
418; CHECK-NEXT:    vmerge.vim v25, v25, 1, v0
419; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
420; CHECK-NEXT:    vmv.v.i v26, 0
421; CHECK-NEXT:    vmv1r.v v0, v27
422; CHECK-NEXT:    vmerge.vim v26, v26, 1, v0
423; CHECK-NEXT:    vsetivli a1, 4, e8,m1,tu,mu
424; CHECK-NEXT:    vslideup.vi v26, v25, 0
425; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
426; CHECK-NEXT:    vmsne.vi v25, v26, 0
427; CHECK-NEXT:    vse1.v v25, (a0)
428; CHECK-NEXT:    ret
429  %v = load <8 x i1>, <8 x i1>* %vp
430  %sv = load <4 x i1>, <4 x i1>* %svp
431  %c = call <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1> %v, <4 x i1> %sv, i64 0)
432  store <8 x i1> %c, <8 x i1>* %vp
433  ret void
434}
435
436define void @insert_v8i1_v4i1_4(<8 x i1>* %vp, <4 x i1>* %svp) {
437; CHECK-LABEL: insert_v8i1_v4i1_4:
438; CHECK:       # %bb.0:
439; CHECK-NEXT:    vsetivli a2, 8, e8,m1,ta,mu
440; CHECK-NEXT:    vle1.v v27, (a0)
441; CHECK-NEXT:    vsetivli a2, 4, e8,m1,ta,mu
442; CHECK-NEXT:    vle1.v v0, (a1)
443; CHECK-NEXT:    vmv.v.i v25, 0
444; CHECK-NEXT:    vmerge.vim v25, v25, 1, v0
445; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
446; CHECK-NEXT:    vmv.v.i v26, 0
447; CHECK-NEXT:    vmv1r.v v0, v27
448; CHECK-NEXT:    vmerge.vim v26, v26, 1, v0
449; CHECK-NEXT:    vsetivli a1, 8, e8,m1,tu,mu
450; CHECK-NEXT:    vslideup.vi v26, v25, 4
451; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
452; CHECK-NEXT:    vmsne.vi v25, v26, 0
453; CHECK-NEXT:    vse1.v v25, (a0)
454; CHECK-NEXT:    ret
455  %v = load <8 x i1>, <8 x i1>* %vp
456  %sv = load <4 x i1>, <4 x i1>* %svp
457  %c = call <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1> %v, <4 x i1> %sv, i64 4)
458  store <8 x i1> %c, <8 x i1>* %vp
459  ret void
460}
461
462define <vscale x 2 x i16> @insert_nxv2i16_v2i16_0(<vscale x 2 x i16> %v, <2 x i16>* %svp) {
463; CHECK-LABEL: insert_nxv2i16_v2i16_0:
464; CHECK:       # %bb.0:
465; CHECK-NEXT:    vsetivli a1, 2, e16,m1,ta,mu
466; CHECK-NEXT:    vle16.v v25, (a0)
467; CHECK-NEXT:    vsetivli a0, 2, e16,mf2,tu,mu
468; CHECK-NEXT:    vslideup.vi v8, v25, 0
469; CHECK-NEXT:    ret
470  %sv = load <2 x i16>, <2 x i16>* %svp
471  %c = call <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16> %v, <2 x i16> %sv, i64 0)
472  ret <vscale x 2 x i16> %c
473}
474
475define <vscale x 2 x i16> @insert_nxv2i16_v2i16_2(<vscale x 2 x i16> %v, <2 x i16>* %svp) {
476; CHECK-LABEL: insert_nxv2i16_v2i16_2:
477; CHECK:       # %bb.0:
478; CHECK-NEXT:    vsetivli a1, 2, e16,m1,ta,mu
479; CHECK-NEXT:    vle16.v v25, (a0)
480; CHECK-NEXT:    vsetivli a0, 6, e16,mf2,tu,mu
481; CHECK-NEXT:    vslideup.vi v8, v25, 4
482; CHECK-NEXT:    ret
483  %sv = load <2 x i16>, <2 x i16>* %svp
484  %c = call <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16> %v, <2 x i16> %sv, i64 4)
485  ret <vscale x 2 x i16> %c
486}
487
488define <vscale x 2 x i1> @insert_nxv2i1_v4i1_0(<vscale x 2 x i1> %v, <4 x i1>* %svp) {
489; CHECK-LABEL: insert_nxv2i1_v4i1_0:
490; CHECK:       # %bb.0:
491; CHECK-NEXT:    vsetivli a1, 4, e8,m1,ta,mu
492; CHECK-NEXT:    vle1.v v27, (a0)
493; CHECK-NEXT:    vsetvli a0, zero, e8,mf4,ta,mu
494; CHECK-NEXT:    vmv.v.i v25, 0
495; CHECK-NEXT:    vmerge.vim v25, v25, 1, v0
496; CHECK-NEXT:    vsetivli a0, 4, e8,m1,ta,mu
497; CHECK-NEXT:    vmv.v.i v26, 0
498; CHECK-NEXT:    vmv1r.v v0, v27
499; CHECK-NEXT:    vmerge.vim v26, v26, 1, v0
500; CHECK-NEXT:    vsetivli a0, 4, e8,mf4,tu,mu
501; CHECK-NEXT:    vslideup.vi v25, v26, 0
502; CHECK-NEXT:    vsetvli a0, zero, e8,mf4,ta,mu
503; CHECK-NEXT:    vmsne.vi v0, v25, 0
504; CHECK-NEXT:    ret
505  %sv = load <4 x i1>, <4 x i1>* %svp
506  %c = call <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1> %v, <4 x i1> %sv, i64 0)
507  ret <vscale x 2 x i1> %c
508}
509
510define <vscale x 2 x i1> @insert_nxv2i1_v4i1_6(<vscale x 2 x i1> %v, <4 x i1>* %svp) {
511; CHECK-LABEL: insert_nxv2i1_v4i1_6:
512; CHECK:       # %bb.0:
513; CHECK-NEXT:    vsetivli a1, 4, e8,m1,ta,mu
514; CHECK-NEXT:    vle1.v v27, (a0)
515; CHECK-NEXT:    vsetvli a0, zero, e8,mf4,ta,mu
516; CHECK-NEXT:    vmv.v.i v25, 0
517; CHECK-NEXT:    vmerge.vim v25, v25, 1, v0
518; CHECK-NEXT:    vsetivli a0, 4, e8,m1,ta,mu
519; CHECK-NEXT:    vmv.v.i v26, 0
520; CHECK-NEXT:    vmv1r.v v0, v27
521; CHECK-NEXT:    vmerge.vim v26, v26, 1, v0
522; CHECK-NEXT:    vsetivli a0, 10, e8,mf4,tu,mu
523; CHECK-NEXT:    vslideup.vi v25, v26, 6
524; CHECK-NEXT:    vsetvli a0, zero, e8,mf4,ta,mu
525; CHECK-NEXT:    vmsne.vi v0, v25, 0
526; CHECK-NEXT:    ret
527  %sv = load <4 x i1>, <4 x i1>* %svp
528  %c = call <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1> %v, <4 x i1> %sv, i64 6)
529  ret <vscale x 2 x i1> %c
530}
531
532define <vscale x 8 x i1> @insert_nxv8i1_v4i1_0(<vscale x 8 x i1> %v, <8 x i1>* %svp) {
533; CHECK-LABEL: insert_nxv8i1_v4i1_0:
534; CHECK:       # %bb.0:
535; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
536; CHECK-NEXT:    vle1.v v25, (a0)
537; CHECK-NEXT:    vsetivli a0, 1, e8,mf8,tu,mu
538; CHECK-NEXT:    vslideup.vi v0, v25, 0
539; CHECK-NEXT:    ret
540  %sv = load <8 x i1>, <8 x i1>* %svp
541  %c = call <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1> %v, <8 x i1> %sv, i64 0)
542  ret <vscale x 8 x i1> %c
543}
544
545define <vscale x 8 x i1> @insert_nxv8i1_v8i1_16(<vscale x 8 x i1> %v, <8 x i1>* %svp) {
546; CHECK-LABEL: insert_nxv8i1_v8i1_16:
547; CHECK:       # %bb.0:
548; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
549; CHECK-NEXT:    vle1.v v25, (a0)
550; CHECK-NEXT:    vsetivli a0, 3, e8,mf8,tu,mu
551; CHECK-NEXT:    vslideup.vi v0, v25, 2
552; CHECK-NEXT:    ret
553  %sv = load <8 x i1>, <8 x i1>* %svp
554  %c = call <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1> %v, <8 x i1> %sv, i64 16)
555  ret <vscale x 8 x i1> %c
556}
557
558declare <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64>, <2 x i64>, i64)
559
560define void @insert_v2i64_nxv16i64(<2 x i64>* %psv0, <2 x i64>* %psv1, <vscale x 16 x i64>* %out) {
561; CHECK-LABEL: insert_v2i64_nxv16i64:
562; CHECK:       # %bb.0:
563; CHECK-NEXT:    vsetivli a3, 2, e64,m1,ta,mu
564; CHECK-NEXT:    vle64.v v8, (a0)
565; CHECK-NEXT:    vle64.v v16, (a1)
566; CHECK-NEXT:    vsetivli a0, 6, e64,m8,tu,mu
567; CHECK-NEXT:    vslideup.vi v8, v16, 4
568; CHECK-NEXT:    vs8r.v v8, (a2)
569; CHECK-NEXT:    ret
570  %sv0 = load <2 x i64>, <2 x i64>* %psv0
571  %sv1 = load <2 x i64>, <2 x i64>* %psv1
572  %v0 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv0, i64 0)
573  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> %v0, <2 x i64> %sv1, i64 4)
574  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
575  ret void
576}
577
578define void @insert_v2i64_nxv16i64_lo0(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
579; CHECK-LABEL: insert_v2i64_nxv16i64_lo0:
580; CHECK:       # %bb.0:
581; CHECK-NEXT:    vsetivli a2, 2, e64,m1,ta,mu
582; CHECK-NEXT:    vle64.v v8, (a0)
583; CHECK-NEXT:    vs8r.v v8, (a1)
584; CHECK-NEXT:    ret
585  %sv = load <2 x i64>, <2 x i64>* %psv
586  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 0)
587  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
588  ret void
589}
590
591define void @insert_v2i64_nxv16i64_lo2(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
592; CHECK-LABEL: insert_v2i64_nxv16i64_lo2:
593; CHECK:       # %bb.0:
594; CHECK-NEXT:    vsetivli a2, 2, e64,m1,ta,mu
595; CHECK-NEXT:    vle64.v v8, (a0)
596; CHECK-NEXT:    vsetivli a0, 4, e64,m8,ta,mu
597; CHECK-NEXT:    vslideup.vi v16, v8, 2
598; CHECK-NEXT:    vs8r.v v16, (a1)
599; CHECK-NEXT:    ret
600  %sv = load <2 x i64>, <2 x i64>* %psv
601  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 2)
602  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
603  ret void
604}
605
606; Check we don't mistakenly optimize this: we don't know whether this is
607; inserted into the low or high split vector.
608define void @insert_v2i64_nxv16i64_hi(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
609; CHECK-LABEL: insert_v2i64_nxv16i64_hi:
610; CHECK:       # %bb.0:
611; CHECK-NEXT:    addi sp, sp, -16
612; CHECK-NEXT:    .cfi_def_cfa_offset 16
613; CHECK-NEXT:    csrr a2, vlenb
614; CHECK-NEXT:    slli a2, a2, 4
615; CHECK-NEXT:    sub sp, sp, a2
616; CHECK-NEXT:    vsetivli a2, 2, e64,m1,ta,mu
617; CHECK-NEXT:    vle64.v v25, (a0)
618; CHECK-NEXT:    addi a0, sp, 80
619; CHECK-NEXT:    vse64.v v25, (a0)
620; CHECK-NEXT:    csrr a0, vlenb
621; CHECK-NEXT:    slli a0, a0, 3
622; CHECK-NEXT:    addi a2, sp, 16
623; CHECK-NEXT:    add a2, a2, a0
624; CHECK-NEXT:    vl8re64.v v8, (a2)
625; CHECK-NEXT:    addi a2, sp, 16
626; CHECK-NEXT:    vl8re64.v v16, (a2)
627; CHECK-NEXT:    add a0, a1, a0
628; CHECK-NEXT:    vs8r.v v8, (a0)
629; CHECK-NEXT:    vs8r.v v16, (a1)
630; CHECK-NEXT:    csrr a0, vlenb
631; CHECK-NEXT:    slli a0, a0, 4
632; CHECK-NEXT:    add sp, sp, a0
633; CHECK-NEXT:    addi sp, sp, 16
634; CHECK-NEXT:    ret
635  %sv = load <2 x i64>, <2 x i64>* %psv
636  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 8)
637  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
638  ret void
639}
640
641declare <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1>, <4 x i1>, i64)
642declare <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1>, <8 x i1>, i64)
643
644declare <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16>, <2 x i16>, i64)
645
646declare <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32>, <2 x i32>, i64)
647declare <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32>, <2 x i32>, i64)
648
649declare <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1>, <4 x i1>, i64)
650declare <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1>, <8 x i1>, i64)
651
652declare <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16>, <2 x i16>, i64)
653
654declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32>, <2 x i32>, i64)
655declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v4i32.nxv8i32(<vscale x 8 x i32>, <4 x i32>, i64)
656declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32>, <8 x i32>, i64)
657