1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=riscv64 | FileCheck %s
3
4
5; Make sure we don't emit a pair of shift for the zext in the preheader. We
6; can tell that bit 31 is 0 in the preheader and rely on %n already being
7; sign extended without adding zeros explicitly.
8define void @test1(ptr nocapture noundef %a, i32 noundef signext %n) {
9; CHECK-LABEL: test1:
10; CHECK:       # %bb.0: # %entry
11; CHECK-NEXT:    blez a1, .LBB0_2
12; CHECK-NEXT:  .LBB0_1: # %for.body
13; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
14; CHECK-NEXT:    lw a2, 0(a0)
15; CHECK-NEXT:    addiw a2, a2, 4
16; CHECK-NEXT:    sw a2, 0(a0)
17; CHECK-NEXT:    addi a1, a1, -1
18; CHECK-NEXT:    addi a0, a0, 4
19; CHECK-NEXT:    bnez a1, .LBB0_1
20; CHECK-NEXT:  .LBB0_2: # %for.cond.cleanup
21; CHECK-NEXT:    ret
22entry:
23  %cmp3 = icmp sgt i32 %n, 0
24  br i1 %cmp3, label %for.body.preheader, label %for.cond.cleanup
25
26for.body.preheader:                               ; preds = %entry
27  %wide.trip.count = zext i32 %n to i64
28  br label %for.body
29
30for.cond.cleanup:                                 ; preds = %for.body, %entry
31  ret void
32
33for.body:                                         ; preds = %for.body.preheader, %for.body
34  %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
35  %arrayidx = getelementptr inbounds i32, ptr %a, i64 %indvars.iv
36  %0 = load i32, ptr %arrayidx, align 4
37  %add = add nsw i32 %0, 4
38  store i32 %add, ptr %arrayidx, align 4
39  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
40  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
41  br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
42}
43