1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32I %s
4; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
5; RUN:   | FileCheck -check-prefix=RV64I %s
6
7@gi = external global i32
8
9define i32 @constraint_r(i32 %a) nounwind {
10; RV32I-LABEL: constraint_r:
11; RV32I:       # %bb.0:
12; RV32I-NEXT:    lui a1, %hi(gi)
13; RV32I-NEXT:    lw a1, %lo(gi)(a1)
14; RV32I-NEXT:    #APP
15; RV32I-NEXT:    add a0, a0, a1
16; RV32I-NEXT:    #NO_APP
17; RV32I-NEXT:    ret
18;
19; RV64I-LABEL: constraint_r:
20; RV64I:       # %bb.0:
21; RV64I-NEXT:    lui a1, %hi(gi)
22; RV64I-NEXT:    lwu a1, %lo(gi)(a1)
23; RV64I-NEXT:    #APP
24; RV64I-NEXT:    add a0, a0, a1
25; RV64I-NEXT:    #NO_APP
26; RV64I-NEXT:    ret
27  %1 = load i32, i32* @gi
28  %2 = tail call i32 asm "add $0, $1, $2", "=r,r,r"(i32 %a, i32 %1)
29  ret i32 %2
30}
31
32define i32 @constraint_i(i32 %a) nounwind {
33; RV32I-LABEL: constraint_i:
34; RV32I:       # %bb.0:
35; RV32I-NEXT:    #APP
36; RV32I-NEXT:    addi a0, a0, 113
37; RV32I-NEXT:    #NO_APP
38; RV32I-NEXT:    ret
39;
40; RV64I-LABEL: constraint_i:
41; RV64I:       # %bb.0:
42; RV64I-NEXT:    #APP
43; RV64I-NEXT:    addi a0, a0, 113
44; RV64I-NEXT:    #NO_APP
45; RV64I-NEXT:    ret
46  %1 = load i32, i32* @gi
47  %2 = tail call i32 asm "addi $0, $1, $2", "=r,r,i"(i32 %a, i32 113)
48  ret i32 %2
49}
50
51define void @constraint_m(i32* %a) nounwind {
52; RV32I-LABEL: constraint_m:
53; RV32I:       # %bb.0:
54; RV32I-NEXT:    #APP
55; RV32I-NEXT:    #NO_APP
56; RV32I-NEXT:    ret
57;
58; RV64I-LABEL: constraint_m:
59; RV64I:       # %bb.0:
60; RV64I-NEXT:    #APP
61; RV64I-NEXT:    #NO_APP
62; RV64I-NEXT:    ret
63  call void asm sideeffect "", "=*m"(i32* %a)
64  ret void
65}
66
67define i32 @constraint_m2(i32* %a) nounwind {
68; RV32I-LABEL: constraint_m2:
69; RV32I:       # %bb.0:
70; RV32I-NEXT:    #APP
71; RV32I-NEXT:    lw a0, 0(a0)
72; RV32I-NEXT:    #NO_APP
73; RV32I-NEXT:    ret
74;
75; RV64I-LABEL: constraint_m2:
76; RV64I:       # %bb.0:
77; RV64I-NEXT:    #APP
78; RV64I-NEXT:    lw a0, 0(a0)
79; RV64I-NEXT:    #NO_APP
80; RV64I-NEXT:    ret
81  %1 = tail call i32 asm "lw $0, $1", "=r,*m"(i32* %a) nounwind
82  ret i32 %1
83}
84
85; TODO: expend tests for more complex constraints, out of range immediates etc
86