1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \
3; RUN:   -target-abi=ilp32f | FileCheck -check-prefix=RV32IF %s
4; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \
5; RUN:   -target-abi=lp64f | FileCheck -check-prefix=RV64IF %s
6
7; TODO: constant pool shouldn't be necessary for RV64IF.
8define float @float_imm() nounwind {
9; RV32IF-LABEL: float_imm:
10; RV32IF:       # %bb.0:
11; RV32IF-NEXT:    lui a0, %hi(.LCPI0_0)
12; RV32IF-NEXT:    flw fa0, %lo(.LCPI0_0)(a0)
13; RV32IF-NEXT:    ret
14;
15; RV64IF-LABEL: float_imm:
16; RV64IF:       # %bb.0:
17; RV64IF-NEXT:    lui a0, %hi(.LCPI0_0)
18; RV64IF-NEXT:    flw fa0, %lo(.LCPI0_0)(a0)
19; RV64IF-NEXT:    ret
20  ret float 3.14159274101257324218750
21}
22
23define float @float_imm_op(float %a) nounwind {
24; RV32IF-LABEL: float_imm_op:
25; RV32IF:       # %bb.0:
26; RV32IF-NEXT:    lui a0, %hi(.LCPI1_0)
27; RV32IF-NEXT:    flw ft0, %lo(.LCPI1_0)(a0)
28; RV32IF-NEXT:    fadd.s fa0, fa0, ft0
29; RV32IF-NEXT:    ret
30;
31; RV64IF-LABEL: float_imm_op:
32; RV64IF:       # %bb.0:
33; RV64IF-NEXT:    lui a0, %hi(.LCPI1_0)
34; RV64IF-NEXT:    flw ft0, %lo(.LCPI1_0)(a0)
35; RV64IF-NEXT:    fadd.s fa0, fa0, ft0
36; RV64IF-NEXT:    ret
37  %1 = fadd float %a, 1.0
38  ret float %1
39}
40