1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32IF %s
4; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \
5; RUN:   | FileCheck -check-prefix=RV64IF %s
6
7; TODO: constant pool shouldn't be necessary for RV64IF.
8define float @float_imm() nounwind {
9; RV32IF-LABEL: float_imm:
10; RV32IF:       # %bb.0:
11; RV32IF-NEXT:    lui a0, 263313
12; RV32IF-NEXT:    addi a0, a0, -37
13; RV32IF-NEXT:    ret
14;
15; RV64IF-LABEL: float_imm:
16; RV64IF:       # %bb.0:
17; RV64IF-NEXT:    lui a0, %hi(.LCPI0_0)
18; RV64IF-NEXT:    addi a0, a0, %lo(.LCPI0_0)
19; RV64IF-NEXT:    flw ft0, 0(a0)
20; RV64IF-NEXT:    fmv.x.w a0, ft0
21; RV64IF-NEXT:    ret
22  ret float 3.14159274101257324218750
23}
24
25define float @float_imm_op(float %a) nounwind {
26; TODO: addi should be folded in to the flw
27; RV32IF-LABEL: float_imm_op:
28; RV32IF:       # %bb.0:
29; RV32IF-NEXT:    lui a1, %hi(.LCPI1_0)
30; RV32IF-NEXT:    addi a1, a1, %lo(.LCPI1_0)
31; RV32IF-NEXT:    flw ft0, 0(a1)
32; RV32IF-NEXT:    fmv.w.x ft1, a0
33; RV32IF-NEXT:    fadd.s ft0, ft1, ft0
34; RV32IF-NEXT:    fmv.x.w a0, ft0
35; RV32IF-NEXT:    ret
36;
37; RV64IF-LABEL: float_imm_op:
38; RV64IF:       # %bb.0:
39; RV64IF-NEXT:    lui a1, %hi(.LCPI1_0)
40; RV64IF-NEXT:    addi a1, a1, %lo(.LCPI1_0)
41; RV64IF-NEXT:    flw ft0, 0(a1)
42; RV64IF-NEXT:    fmv.w.x ft1, a0
43; RV64IF-NEXT:    fadd.s ft0, ft1, ft0
44; RV64IF-NEXT:    fmv.x.w a0, ft0
45; RV64IF-NEXT:    ret
46  %1 = fadd float %a, 1.0
47  ret float %1
48}
49