1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32IFD %s
4; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi=lp64 -verify-machineinstrs < %s \
5; RUN:   | FileCheck -check-prefix=RV64IFD %s
6
7define double @func(double %d, i32 %n) nounwind {
8; RV32IFD-LABEL: func:
9; RV32IFD:       # %bb.0: # %entry
10; RV32IFD-NEXT:    addi sp, sp, -32
11; RV32IFD-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
12; RV32IFD-NEXT:    sw a0, 16(sp)
13; RV32IFD-NEXT:    sw a1, 20(sp)
14; RV32IFD-NEXT:    fld ft0, 16(sp)
15; RV32IFD-NEXT:    beqz a2, .LBB0_2
16; RV32IFD-NEXT:  # %bb.1: # %if.else
17; RV32IFD-NEXT:    addi a2, a2, -1
18; RV32IFD-NEXT:    fsd ft0, 16(sp)
19; RV32IFD-NEXT:    lw a0, 16(sp)
20; RV32IFD-NEXT:    lw a1, 20(sp)
21; RV32IFD-NEXT:    fsd ft0, 8(sp) # 8-byte Folded Spill
22; RV32IFD-NEXT:    call func@plt
23; RV32IFD-NEXT:    sw a0, 16(sp)
24; RV32IFD-NEXT:    sw a1, 20(sp)
25; RV32IFD-NEXT:    fld ft0, 16(sp)
26; RV32IFD-NEXT:    fld ft1, 8(sp) # 8-byte Folded Reload
27; RV32IFD-NEXT:    fadd.d ft0, ft0, ft1
28; RV32IFD-NEXT:  .LBB0_2: # %return
29; RV32IFD-NEXT:    fsd ft0, 16(sp)
30; RV32IFD-NEXT:    lw a0, 16(sp)
31; RV32IFD-NEXT:    lw a1, 20(sp)
32; RV32IFD-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
33; RV32IFD-NEXT:    addi sp, sp, 32
34; RV32IFD-NEXT:    ret
35;
36; RV64IFD-LABEL: func:
37; RV64IFD:       # %bb.0: # %entry
38; RV64IFD-NEXT:    sext.w a2, a1
39; RV64IFD-NEXT:    fmv.d.x ft0, a0
40; RV64IFD-NEXT:    beqz a2, .LBB0_2
41; RV64IFD-NEXT:  # %bb.1: # %if.else
42; RV64IFD-NEXT:    addi sp, sp, -16
43; RV64IFD-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
44; RV64IFD-NEXT:    addiw a1, a1, -1
45; RV64IFD-NEXT:    fmv.x.d a0, ft0
46; RV64IFD-NEXT:    fsd ft0, 0(sp) # 8-byte Folded Spill
47; RV64IFD-NEXT:    call func@plt
48; RV64IFD-NEXT:    fmv.d.x ft0, a0
49; RV64IFD-NEXT:    fld ft1, 0(sp) # 8-byte Folded Reload
50; RV64IFD-NEXT:    fadd.d ft0, ft0, ft1
51; RV64IFD-NEXT:    fmv.x.d a0, ft0
52; RV64IFD-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
53; RV64IFD-NEXT:    addi sp, sp, 16
54; RV64IFD-NEXT:    ret
55; RV64IFD-NEXT:  .LBB0_2: # %return
56; RV64IFD-NEXT:    fmv.x.d a0, ft0
57; RV64IFD-NEXT:    ret
58entry:
59  %cmp = icmp eq i32 %n, 0
60  br i1 %cmp, label %return, label %if.else
61
62if.else:
63  %sub = add i32 %n, -1
64  %call = tail call double @func(double %d, i32 %sub)
65  %add = fadd double %call, %d
66  ret double %add
67
68return:
69  ret double %d
70}
71