1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \
3; RUN:   -target-abi=ilp32d | FileCheck -check-prefix=RV32IFD %s
4; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs < %s \
5; RUN:   -target-abi=lp64d | FileCheck -check-prefix=RV64IFD %s
6; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
7; RUN:   | FileCheck -check-prefix=RV32I %s
8; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
9; RUN:   | FileCheck -check-prefix=RV64I %s
10
11define float @fcvt_s_d(double %a) nounwind {
12; RV32IFD-LABEL: fcvt_s_d:
13; RV32IFD:       # %bb.0:
14; RV32IFD-NEXT:    fcvt.s.d fa0, fa0
15; RV32IFD-NEXT:    ret
16;
17; RV64IFD-LABEL: fcvt_s_d:
18; RV64IFD:       # %bb.0:
19; RV64IFD-NEXT:    fcvt.s.d fa0, fa0
20; RV64IFD-NEXT:    ret
21;
22; RV32I-LABEL: fcvt_s_d:
23; RV32I:       # %bb.0:
24; RV32I-NEXT:    addi sp, sp, -16
25; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
26; RV32I-NEXT:    call __truncdfsf2@plt
27; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
28; RV32I-NEXT:    addi sp, sp, 16
29; RV32I-NEXT:    ret
30;
31; RV64I-LABEL: fcvt_s_d:
32; RV64I:       # %bb.0:
33; RV64I-NEXT:    addi sp, sp, -16
34; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
35; RV64I-NEXT:    call __truncdfsf2@plt
36; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
37; RV64I-NEXT:    addi sp, sp, 16
38; RV64I-NEXT:    ret
39  %1 = fptrunc double %a to float
40  ret float %1
41}
42
43define double @fcvt_d_s(float %a) nounwind {
44; RV32IFD-LABEL: fcvt_d_s:
45; RV32IFD:       # %bb.0:
46; RV32IFD-NEXT:    fcvt.d.s fa0, fa0
47; RV32IFD-NEXT:    ret
48;
49; RV64IFD-LABEL: fcvt_d_s:
50; RV64IFD:       # %bb.0:
51; RV64IFD-NEXT:    fcvt.d.s fa0, fa0
52; RV64IFD-NEXT:    ret
53;
54; RV32I-LABEL: fcvt_d_s:
55; RV32I:       # %bb.0:
56; RV32I-NEXT:    addi sp, sp, -16
57; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
58; RV32I-NEXT:    call __extendsfdf2@plt
59; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
60; RV32I-NEXT:    addi sp, sp, 16
61; RV32I-NEXT:    ret
62;
63; RV64I-LABEL: fcvt_d_s:
64; RV64I:       # %bb.0:
65; RV64I-NEXT:    addi sp, sp, -16
66; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
67; RV64I-NEXT:    call __extendsfdf2@plt
68; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
69; RV64I-NEXT:    addi sp, sp, 16
70; RV64I-NEXT:    ret
71  %1 = fpext float %a to double
72  ret double %1
73}
74
75define i32 @fcvt_w_d(double %a) nounwind {
76; RV32IFD-LABEL: fcvt_w_d:
77; RV32IFD:       # %bb.0:
78; RV32IFD-NEXT:    fcvt.w.d a0, fa0, rtz
79; RV32IFD-NEXT:    ret
80;
81; RV64IFD-LABEL: fcvt_w_d:
82; RV64IFD:       # %bb.0:
83; RV64IFD-NEXT:    fcvt.w.d a0, fa0, rtz
84; RV64IFD-NEXT:    ret
85;
86; RV32I-LABEL: fcvt_w_d:
87; RV32I:       # %bb.0:
88; RV32I-NEXT:    addi sp, sp, -16
89; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
90; RV32I-NEXT:    call __fixdfsi@plt
91; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
92; RV32I-NEXT:    addi sp, sp, 16
93; RV32I-NEXT:    ret
94;
95; RV64I-LABEL: fcvt_w_d:
96; RV64I:       # %bb.0:
97; RV64I-NEXT:    addi sp, sp, -16
98; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
99; RV64I-NEXT:    call __fixdfsi@plt
100; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
101; RV64I-NEXT:    addi sp, sp, 16
102; RV64I-NEXT:    ret
103  %1 = fptosi double %a to i32
104  ret i32 %1
105}
106
107define i32 @fcvt_w_d_sat(double %a) nounwind {
108; RV32IFD-LABEL: fcvt_w_d_sat:
109; RV32IFD:       # %bb.0: # %start
110; RV32IFD-NEXT:    feq.d a0, fa0, fa0
111; RV32IFD-NEXT:    beqz a0, .LBB3_2
112; RV32IFD-NEXT:  # %bb.1:
113; RV32IFD-NEXT:    fcvt.w.d a0, fa0, rtz
114; RV32IFD-NEXT:  .LBB3_2: # %start
115; RV32IFD-NEXT:    ret
116;
117; RV64IFD-LABEL: fcvt_w_d_sat:
118; RV64IFD:       # %bb.0: # %start
119; RV64IFD-NEXT:    feq.d a0, fa0, fa0
120; RV64IFD-NEXT:    beqz a0, .LBB3_2
121; RV64IFD-NEXT:  # %bb.1:
122; RV64IFD-NEXT:    fcvt.w.d a0, fa0, rtz
123; RV64IFD-NEXT:  .LBB3_2: # %start
124; RV64IFD-NEXT:    ret
125;
126; RV32I-LABEL: fcvt_w_d_sat:
127; RV32I:       # %bb.0: # %start
128; RV32I-NEXT:    addi sp, sp, -32
129; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
130; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
131; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
132; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
133; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
134; RV32I-NEXT:    sw s4, 8(sp) # 4-byte Folded Spill
135; RV32I-NEXT:    sw s5, 4(sp) # 4-byte Folded Spill
136; RV32I-NEXT:    mv s1, a1
137; RV32I-NEXT:    mv s2, a0
138; RV32I-NEXT:    lui a3, 794112
139; RV32I-NEXT:    li s0, 0
140; RV32I-NEXT:    li a2, 0
141; RV32I-NEXT:    call __gedf2@plt
142; RV32I-NEXT:    mv s3, a0
143; RV32I-NEXT:    mv a0, s2
144; RV32I-NEXT:    mv a1, s1
145; RV32I-NEXT:    call __fixdfsi@plt
146; RV32I-NEXT:    lui s5, 524288
147; RV32I-NEXT:    lui s4, 524288
148; RV32I-NEXT:    blt s3, s0, .LBB3_2
149; RV32I-NEXT:  # %bb.1: # %start
150; RV32I-NEXT:    mv s4, a0
151; RV32I-NEXT:  .LBB3_2: # %start
152; RV32I-NEXT:    lui a0, 269824
153; RV32I-NEXT:    addi a3, a0, -1
154; RV32I-NEXT:    lui a2, 1047552
155; RV32I-NEXT:    mv a0, s2
156; RV32I-NEXT:    mv a1, s1
157; RV32I-NEXT:    call __gtdf2@plt
158; RV32I-NEXT:    bge s0, a0, .LBB3_4
159; RV32I-NEXT:  # %bb.3:
160; RV32I-NEXT:    addi s4, s5, -1
161; RV32I-NEXT:  .LBB3_4: # %start
162; RV32I-NEXT:    mv a0, s2
163; RV32I-NEXT:    mv a1, s1
164; RV32I-NEXT:    mv a2, s2
165; RV32I-NEXT:    mv a3, s1
166; RV32I-NEXT:    call __unorddf2@plt
167; RV32I-NEXT:    bne a0, s0, .LBB3_6
168; RV32I-NEXT:  # %bb.5: # %start
169; RV32I-NEXT:    mv s0, s4
170; RV32I-NEXT:  .LBB3_6: # %start
171; RV32I-NEXT:    mv a0, s0
172; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
173; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
174; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
175; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
176; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
177; RV32I-NEXT:    lw s4, 8(sp) # 4-byte Folded Reload
178; RV32I-NEXT:    lw s5, 4(sp) # 4-byte Folded Reload
179; RV32I-NEXT:    addi sp, sp, 32
180; RV32I-NEXT:    ret
181;
182; RV64I-LABEL: fcvt_w_d_sat:
183; RV64I:       # %bb.0: # %start
184; RV64I-NEXT:    addi sp, sp, -48
185; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
186; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
187; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
188; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
189; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
190; RV64I-NEXT:    sd s4, 0(sp) # 8-byte Folded Spill
191; RV64I-NEXT:    mv s0, a0
192; RV64I-NEXT:    li a0, -497
193; RV64I-NEXT:    slli a1, a0, 53
194; RV64I-NEXT:    mv a0, s0
195; RV64I-NEXT:    call __gedf2@plt
196; RV64I-NEXT:    mv s2, a0
197; RV64I-NEXT:    mv a0, s0
198; RV64I-NEXT:    call __fixdfdi@plt
199; RV64I-NEXT:    li s1, 0
200; RV64I-NEXT:    lui s4, 524288
201; RV64I-NEXT:    lui s3, 524288
202; RV64I-NEXT:    bltz s2, .LBB3_2
203; RV64I-NEXT:  # %bb.1: # %start
204; RV64I-NEXT:    mv s3, a0
205; RV64I-NEXT:  .LBB3_2: # %start
206; RV64I-NEXT:    li a0, 527
207; RV64I-NEXT:    slli a0, a0, 31
208; RV64I-NEXT:    addi a0, a0, -1
209; RV64I-NEXT:    slli a1, a0, 22
210; RV64I-NEXT:    mv a0, s0
211; RV64I-NEXT:    call __gtdf2@plt
212; RV64I-NEXT:    bge s1, a0, .LBB3_4
213; RV64I-NEXT:  # %bb.3:
214; RV64I-NEXT:    addiw s3, s4, -1
215; RV64I-NEXT:  .LBB3_4: # %start
216; RV64I-NEXT:    mv a0, s0
217; RV64I-NEXT:    mv a1, s0
218; RV64I-NEXT:    call __unorddf2@plt
219; RV64I-NEXT:    bne a0, s1, .LBB3_6
220; RV64I-NEXT:  # %bb.5: # %start
221; RV64I-NEXT:    mv s1, s3
222; RV64I-NEXT:  .LBB3_6: # %start
223; RV64I-NEXT:    mv a0, s1
224; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
225; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
226; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
227; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
228; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
229; RV64I-NEXT:    ld s4, 0(sp) # 8-byte Folded Reload
230; RV64I-NEXT:    addi sp, sp, 48
231; RV64I-NEXT:    ret
232start:
233  %0 = tail call i32 @llvm.fptosi.sat.i32.f64(double %a)
234  ret i32 %0
235}
236declare i32 @llvm.fptosi.sat.i32.f64(double)
237
238; For RV64D, fcvt.lu.d is semantically equivalent to fcvt.wu.d in this case
239; because fptosi will produce poison if the result doesn't fit into an i32.
240define i32 @fcvt_wu_d(double %a) nounwind {
241; RV32IFD-LABEL: fcvt_wu_d:
242; RV32IFD:       # %bb.0:
243; RV32IFD-NEXT:    fcvt.wu.d a0, fa0, rtz
244; RV32IFD-NEXT:    ret
245;
246; RV64IFD-LABEL: fcvt_wu_d:
247; RV64IFD:       # %bb.0:
248; RV64IFD-NEXT:    fcvt.wu.d a0, fa0, rtz
249; RV64IFD-NEXT:    ret
250;
251; RV32I-LABEL: fcvt_wu_d:
252; RV32I:       # %bb.0:
253; RV32I-NEXT:    addi sp, sp, -16
254; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
255; RV32I-NEXT:    call __fixunsdfsi@plt
256; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
257; RV32I-NEXT:    addi sp, sp, 16
258; RV32I-NEXT:    ret
259;
260; RV64I-LABEL: fcvt_wu_d:
261; RV64I:       # %bb.0:
262; RV64I-NEXT:    addi sp, sp, -16
263; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
264; RV64I-NEXT:    call __fixunsdfsi@plt
265; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
266; RV64I-NEXT:    addi sp, sp, 16
267; RV64I-NEXT:    ret
268  %1 = fptoui double %a to i32
269  ret i32 %1
270}
271
272; Test where the fptoui has multiple uses, one of which causes a sext to be
273; inserted on RV64.
274define i32 @fcvt_wu_d_multiple_use(double %x, i32* %y) nounwind {
275; RV32IFD-LABEL: fcvt_wu_d_multiple_use:
276; RV32IFD:       # %bb.0:
277; RV32IFD-NEXT:    fcvt.wu.d a1, fa0, rtz
278; RV32IFD-NEXT:    li a0, 1
279; RV32IFD-NEXT:    beqz a1, .LBB5_2
280; RV32IFD-NEXT:  # %bb.1:
281; RV32IFD-NEXT:    mv a0, a1
282; RV32IFD-NEXT:  .LBB5_2:
283; RV32IFD-NEXT:    ret
284;
285; RV64IFD-LABEL: fcvt_wu_d_multiple_use:
286; RV64IFD:       # %bb.0:
287; RV64IFD-NEXT:    fcvt.wu.d a1, fa0, rtz
288; RV64IFD-NEXT:    li a0, 1
289; RV64IFD-NEXT:    beqz a1, .LBB5_2
290; RV64IFD-NEXT:  # %bb.1:
291; RV64IFD-NEXT:    mv a0, a1
292; RV64IFD-NEXT:  .LBB5_2:
293; RV64IFD-NEXT:    ret
294;
295; RV32I-LABEL: fcvt_wu_d_multiple_use:
296; RV32I:       # %bb.0:
297; RV32I-NEXT:    addi sp, sp, -16
298; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
299; RV32I-NEXT:    call __fixunsdfsi@plt
300; RV32I-NEXT:    mv a1, a0
301; RV32I-NEXT:    li a0, 1
302; RV32I-NEXT:    beqz a1, .LBB5_2
303; RV32I-NEXT:  # %bb.1:
304; RV32I-NEXT:    mv a0, a1
305; RV32I-NEXT:  .LBB5_2:
306; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
307; RV32I-NEXT:    addi sp, sp, 16
308; RV32I-NEXT:    ret
309;
310; RV64I-LABEL: fcvt_wu_d_multiple_use:
311; RV64I:       # %bb.0:
312; RV64I-NEXT:    addi sp, sp, -16
313; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
314; RV64I-NEXT:    call __fixunsdfsi@plt
315; RV64I-NEXT:    mv a1, a0
316; RV64I-NEXT:    li a0, 1
317; RV64I-NEXT:    beqz a1, .LBB5_2
318; RV64I-NEXT:  # %bb.1:
319; RV64I-NEXT:    mv a0, a1
320; RV64I-NEXT:  .LBB5_2:
321; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
322; RV64I-NEXT:    addi sp, sp, 16
323; RV64I-NEXT:    ret
324  %a = fptoui double %x to i32
325  %b = icmp eq i32 %a, 0
326  %c = select i1 %b, i32 1, i32 %a
327  ret i32 %c
328}
329
330define i32 @fcvt_wu_d_sat(double %a) nounwind {
331; RV32IFD-LABEL: fcvt_wu_d_sat:
332; RV32IFD:       # %bb.0: # %start
333; RV32IFD-NEXT:    feq.d a0, fa0, fa0
334; RV32IFD-NEXT:    beqz a0, .LBB6_2
335; RV32IFD-NEXT:  # %bb.1:
336; RV32IFD-NEXT:    fcvt.wu.d a0, fa0, rtz
337; RV32IFD-NEXT:  .LBB6_2: # %start
338; RV32IFD-NEXT:    ret
339;
340; RV64IFD-LABEL: fcvt_wu_d_sat:
341; RV64IFD:       # %bb.0: # %start
342; RV64IFD-NEXT:    feq.d a0, fa0, fa0
343; RV64IFD-NEXT:    beqz a0, .LBB6_2
344; RV64IFD-NEXT:  # %bb.1:
345; RV64IFD-NEXT:    fcvt.wu.d a0, fa0, rtz
346; RV64IFD-NEXT:  .LBB6_2: # %start
347; RV64IFD-NEXT:    ret
348;
349; RV32I-LABEL: fcvt_wu_d_sat:
350; RV32I:       # %bb.0: # %start
351; RV32I-NEXT:    addi sp, sp, -32
352; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
353; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
354; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
355; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
356; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
357; RV32I-NEXT:    mv s1, a1
358; RV32I-NEXT:    mv s2, a0
359; RV32I-NEXT:    lui a0, 270080
360; RV32I-NEXT:    addi a3, a0, -1
361; RV32I-NEXT:    lui a2, 1048064
362; RV32I-NEXT:    mv a0, s2
363; RV32I-NEXT:    call __gtdf2@plt
364; RV32I-NEXT:    mv s0, a0
365; RV32I-NEXT:    mv a0, s2
366; RV32I-NEXT:    mv a1, s1
367; RV32I-NEXT:    li a2, 0
368; RV32I-NEXT:    li a3, 0
369; RV32I-NEXT:    call __gedf2@plt
370; RV32I-NEXT:    mv s3, a0
371; RV32I-NEXT:    mv a0, s2
372; RV32I-NEXT:    mv a1, s1
373; RV32I-NEXT:    call __fixunsdfsi@plt
374; RV32I-NEXT:    li a1, 0
375; RV32I-NEXT:    bltz s3, .LBB6_2
376; RV32I-NEXT:  # %bb.1: # %start
377; RV32I-NEXT:    mv a1, a0
378; RV32I-NEXT:  .LBB6_2: # %start
379; RV32I-NEXT:    li a0, -1
380; RV32I-NEXT:    bgtz s0, .LBB6_4
381; RV32I-NEXT:  # %bb.3: # %start
382; RV32I-NEXT:    mv a0, a1
383; RV32I-NEXT:  .LBB6_4: # %start
384; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
385; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
386; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
387; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
388; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
389; RV32I-NEXT:    addi sp, sp, 32
390; RV32I-NEXT:    ret
391;
392; RV64I-LABEL: fcvt_wu_d_sat:
393; RV64I:       # %bb.0: # %start
394; RV64I-NEXT:    addi sp, sp, -32
395; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
396; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
397; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
398; RV64I-NEXT:    sd s2, 0(sp) # 8-byte Folded Spill
399; RV64I-NEXT:    mv s0, a0
400; RV64I-NEXT:    li a1, 0
401; RV64I-NEXT:    call __gedf2@plt
402; RV64I-NEXT:    mv s2, a0
403; RV64I-NEXT:    mv a0, s0
404; RV64I-NEXT:    call __fixunsdfdi@plt
405; RV64I-NEXT:    li s1, 0
406; RV64I-NEXT:    bltz s2, .LBB6_2
407; RV64I-NEXT:  # %bb.1: # %start
408; RV64I-NEXT:    mv s1, a0
409; RV64I-NEXT:  .LBB6_2: # %start
410; RV64I-NEXT:    li a0, 1055
411; RV64I-NEXT:    slli a0, a0, 31
412; RV64I-NEXT:    addi a0, a0, -1
413; RV64I-NEXT:    slli a1, a0, 21
414; RV64I-NEXT:    mv a0, s0
415; RV64I-NEXT:    call __gtdf2@plt
416; RV64I-NEXT:    blez a0, .LBB6_4
417; RV64I-NEXT:  # %bb.3:
418; RV64I-NEXT:    li a0, -1
419; RV64I-NEXT:    srli s1, a0, 32
420; RV64I-NEXT:  .LBB6_4: # %start
421; RV64I-NEXT:    mv a0, s1
422; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
423; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
424; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
425; RV64I-NEXT:    ld s2, 0(sp) # 8-byte Folded Reload
426; RV64I-NEXT:    addi sp, sp, 32
427; RV64I-NEXT:    ret
428start:
429  %0 = tail call i32 @llvm.fptoui.sat.i32.f64(double %a)
430  ret i32 %0
431}
432declare i32 @llvm.fptoui.sat.i32.f64(double)
433
434define double @fcvt_d_w(i32 %a) nounwind {
435; RV32IFD-LABEL: fcvt_d_w:
436; RV32IFD:       # %bb.0:
437; RV32IFD-NEXT:    fcvt.d.w fa0, a0
438; RV32IFD-NEXT:    ret
439;
440; RV64IFD-LABEL: fcvt_d_w:
441; RV64IFD:       # %bb.0:
442; RV64IFD-NEXT:    fcvt.d.w fa0, a0
443; RV64IFD-NEXT:    ret
444;
445; RV32I-LABEL: fcvt_d_w:
446; RV32I:       # %bb.0:
447; RV32I-NEXT:    addi sp, sp, -16
448; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
449; RV32I-NEXT:    call __floatsidf@plt
450; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
451; RV32I-NEXT:    addi sp, sp, 16
452; RV32I-NEXT:    ret
453;
454; RV64I-LABEL: fcvt_d_w:
455; RV64I:       # %bb.0:
456; RV64I-NEXT:    addi sp, sp, -16
457; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
458; RV64I-NEXT:    sext.w a0, a0
459; RV64I-NEXT:    call __floatsidf@plt
460; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
461; RV64I-NEXT:    addi sp, sp, 16
462; RV64I-NEXT:    ret
463  %1 = sitofp i32 %a to double
464  ret double %1
465}
466
467define double @fcvt_d_w_load(i32* %p) nounwind {
468; RV32IFD-LABEL: fcvt_d_w_load:
469; RV32IFD:       # %bb.0:
470; RV32IFD-NEXT:    lw a0, 0(a0)
471; RV32IFD-NEXT:    fcvt.d.w fa0, a0
472; RV32IFD-NEXT:    ret
473;
474; RV64IFD-LABEL: fcvt_d_w_load:
475; RV64IFD:       # %bb.0:
476; RV64IFD-NEXT:    lw a0, 0(a0)
477; RV64IFD-NEXT:    fcvt.d.w fa0, a0
478; RV64IFD-NEXT:    ret
479;
480; RV32I-LABEL: fcvt_d_w_load:
481; RV32I:       # %bb.0:
482; RV32I-NEXT:    addi sp, sp, -16
483; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
484; RV32I-NEXT:    lw a0, 0(a0)
485; RV32I-NEXT:    call __floatsidf@plt
486; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
487; RV32I-NEXT:    addi sp, sp, 16
488; RV32I-NEXT:    ret
489;
490; RV64I-LABEL: fcvt_d_w_load:
491; RV64I:       # %bb.0:
492; RV64I-NEXT:    addi sp, sp, -16
493; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
494; RV64I-NEXT:    lw a0, 0(a0)
495; RV64I-NEXT:    call __floatsidf@plt
496; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
497; RV64I-NEXT:    addi sp, sp, 16
498; RV64I-NEXT:    ret
499  %a = load i32, i32* %p
500  %1 = sitofp i32 %a to double
501  ret double %1
502}
503
504define double @fcvt_d_wu(i32 %a) nounwind {
505; RV32IFD-LABEL: fcvt_d_wu:
506; RV32IFD:       # %bb.0:
507; RV32IFD-NEXT:    fcvt.d.wu fa0, a0
508; RV32IFD-NEXT:    ret
509;
510; RV64IFD-LABEL: fcvt_d_wu:
511; RV64IFD:       # %bb.0:
512; RV64IFD-NEXT:    fcvt.d.wu fa0, a0
513; RV64IFD-NEXT:    ret
514;
515; RV32I-LABEL: fcvt_d_wu:
516; RV32I:       # %bb.0:
517; RV32I-NEXT:    addi sp, sp, -16
518; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
519; RV32I-NEXT:    call __floatunsidf@plt
520; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
521; RV32I-NEXT:    addi sp, sp, 16
522; RV32I-NEXT:    ret
523;
524; RV64I-LABEL: fcvt_d_wu:
525; RV64I:       # %bb.0:
526; RV64I-NEXT:    addi sp, sp, -16
527; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
528; RV64I-NEXT:    sext.w a0, a0
529; RV64I-NEXT:    call __floatunsidf@plt
530; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
531; RV64I-NEXT:    addi sp, sp, 16
532; RV64I-NEXT:    ret
533  %1 = uitofp i32 %a to double
534  ret double %1
535}
536
537define double @fcvt_d_wu_load(i32* %p) nounwind {
538; RV32IFD-LABEL: fcvt_d_wu_load:
539; RV32IFD:       # %bb.0:
540; RV32IFD-NEXT:    lw a0, 0(a0)
541; RV32IFD-NEXT:    fcvt.d.wu fa0, a0
542; RV32IFD-NEXT:    ret
543;
544; RV64IFD-LABEL: fcvt_d_wu_load:
545; RV64IFD:       # %bb.0:
546; RV64IFD-NEXT:    lwu a0, 0(a0)
547; RV64IFD-NEXT:    fcvt.d.wu fa0, a0
548; RV64IFD-NEXT:    ret
549;
550; RV32I-LABEL: fcvt_d_wu_load:
551; RV32I:       # %bb.0:
552; RV32I-NEXT:    addi sp, sp, -16
553; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
554; RV32I-NEXT:    lw a0, 0(a0)
555; RV32I-NEXT:    call __floatunsidf@plt
556; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
557; RV32I-NEXT:    addi sp, sp, 16
558; RV32I-NEXT:    ret
559;
560; RV64I-LABEL: fcvt_d_wu_load:
561; RV64I:       # %bb.0:
562; RV64I-NEXT:    addi sp, sp, -16
563; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
564; RV64I-NEXT:    lw a0, 0(a0)
565; RV64I-NEXT:    call __floatunsidf@plt
566; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
567; RV64I-NEXT:    addi sp, sp, 16
568; RV64I-NEXT:    ret
569  %a = load i32, i32* %p
570  %1 = uitofp i32 %a to double
571  ret double %1
572}
573
574define i64 @fcvt_l_d(double %a) nounwind {
575; RV32IFD-LABEL: fcvt_l_d:
576; RV32IFD:       # %bb.0:
577; RV32IFD-NEXT:    addi sp, sp, -16
578; RV32IFD-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
579; RV32IFD-NEXT:    call __fixdfdi@plt
580; RV32IFD-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
581; RV32IFD-NEXT:    addi sp, sp, 16
582; RV32IFD-NEXT:    ret
583;
584; RV64IFD-LABEL: fcvt_l_d:
585; RV64IFD:       # %bb.0:
586; RV64IFD-NEXT:    fcvt.l.d a0, fa0, rtz
587; RV64IFD-NEXT:    ret
588;
589; RV32I-LABEL: fcvt_l_d:
590; RV32I:       # %bb.0:
591; RV32I-NEXT:    addi sp, sp, -16
592; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
593; RV32I-NEXT:    call __fixdfdi@plt
594; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
595; RV32I-NEXT:    addi sp, sp, 16
596; RV32I-NEXT:    ret
597;
598; RV64I-LABEL: fcvt_l_d:
599; RV64I:       # %bb.0:
600; RV64I-NEXT:    addi sp, sp, -16
601; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
602; RV64I-NEXT:    call __fixdfdi@plt
603; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
604; RV64I-NEXT:    addi sp, sp, 16
605; RV64I-NEXT:    ret
606  %1 = fptosi double %a to i64
607  ret i64 %1
608}
609
610define i64 @fcvt_l_d_sat(double %a) nounwind {
611; RV32IFD-LABEL: fcvt_l_d_sat:
612; RV32IFD:       # %bb.0: # %start
613; RV32IFD-NEXT:    addi sp, sp, -16
614; RV32IFD-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
615; RV32IFD-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
616; RV32IFD-NEXT:    fsd fs0, 0(sp) # 8-byte Folded Spill
617; RV32IFD-NEXT:    lui a0, %hi(.LCPI12_0)
618; RV32IFD-NEXT:    fld ft0, %lo(.LCPI12_0)(a0)
619; RV32IFD-NEXT:    fmv.d fs0, fa0
620; RV32IFD-NEXT:    fle.d s0, ft0, fa0
621; RV32IFD-NEXT:    call __fixdfdi@plt
622; RV32IFD-NEXT:    mv a2, a0
623; RV32IFD-NEXT:    bnez s0, .LBB12_2
624; RV32IFD-NEXT:  # %bb.1: # %start
625; RV32IFD-NEXT:    li a2, 0
626; RV32IFD-NEXT:  .LBB12_2: # %start
627; RV32IFD-NEXT:    lui a0, %hi(.LCPI12_1)
628; RV32IFD-NEXT:    fld ft0, %lo(.LCPI12_1)(a0)
629; RV32IFD-NEXT:    flt.d a3, ft0, fs0
630; RV32IFD-NEXT:    li a0, -1
631; RV32IFD-NEXT:    beqz a3, .LBB12_9
632; RV32IFD-NEXT:  # %bb.3: # %start
633; RV32IFD-NEXT:    feq.d a2, fs0, fs0
634; RV32IFD-NEXT:    beqz a2, .LBB12_10
635; RV32IFD-NEXT:  .LBB12_4: # %start
636; RV32IFD-NEXT:    lui a4, 524288
637; RV32IFD-NEXT:    beqz s0, .LBB12_11
638; RV32IFD-NEXT:  .LBB12_5: # %start
639; RV32IFD-NEXT:    bnez a3, .LBB12_12
640; RV32IFD-NEXT:  .LBB12_6: # %start
641; RV32IFD-NEXT:    bnez a2, .LBB12_8
642; RV32IFD-NEXT:  .LBB12_7: # %start
643; RV32IFD-NEXT:    li a1, 0
644; RV32IFD-NEXT:  .LBB12_8: # %start
645; RV32IFD-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
646; RV32IFD-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
647; RV32IFD-NEXT:    fld fs0, 0(sp) # 8-byte Folded Reload
648; RV32IFD-NEXT:    addi sp, sp, 16
649; RV32IFD-NEXT:    ret
650; RV32IFD-NEXT:  .LBB12_9: # %start
651; RV32IFD-NEXT:    mv a0, a2
652; RV32IFD-NEXT:    feq.d a2, fs0, fs0
653; RV32IFD-NEXT:    bnez a2, .LBB12_4
654; RV32IFD-NEXT:  .LBB12_10: # %start
655; RV32IFD-NEXT:    li a0, 0
656; RV32IFD-NEXT:    lui a4, 524288
657; RV32IFD-NEXT:    bnez s0, .LBB12_5
658; RV32IFD-NEXT:  .LBB12_11: # %start
659; RV32IFD-NEXT:    lui a1, 524288
660; RV32IFD-NEXT:    beqz a3, .LBB12_6
661; RV32IFD-NEXT:  .LBB12_12:
662; RV32IFD-NEXT:    addi a1, a4, -1
663; RV32IFD-NEXT:    beqz a2, .LBB12_7
664; RV32IFD-NEXT:    j .LBB12_8
665;
666; RV64IFD-LABEL: fcvt_l_d_sat:
667; RV64IFD:       # %bb.0: # %start
668; RV64IFD-NEXT:    feq.d a0, fa0, fa0
669; RV64IFD-NEXT:    beqz a0, .LBB12_2
670; RV64IFD-NEXT:  # %bb.1:
671; RV64IFD-NEXT:    fcvt.l.d a0, fa0, rtz
672; RV64IFD-NEXT:  .LBB12_2: # %start
673; RV64IFD-NEXT:    ret
674;
675; RV32I-LABEL: fcvt_l_d_sat:
676; RV32I:       # %bb.0: # %start
677; RV32I-NEXT:    addi sp, sp, -48
678; RV32I-NEXT:    sw ra, 44(sp) # 4-byte Folded Spill
679; RV32I-NEXT:    sw s0, 40(sp) # 4-byte Folded Spill
680; RV32I-NEXT:    sw s1, 36(sp) # 4-byte Folded Spill
681; RV32I-NEXT:    sw s2, 32(sp) # 4-byte Folded Spill
682; RV32I-NEXT:    sw s3, 28(sp) # 4-byte Folded Spill
683; RV32I-NEXT:    sw s4, 24(sp) # 4-byte Folded Spill
684; RV32I-NEXT:    sw s5, 20(sp) # 4-byte Folded Spill
685; RV32I-NEXT:    sw s6, 16(sp) # 4-byte Folded Spill
686; RV32I-NEXT:    sw s7, 12(sp) # 4-byte Folded Spill
687; RV32I-NEXT:    mv s0, a1
688; RV32I-NEXT:    mv s1, a0
689; RV32I-NEXT:    lui a0, 278016
690; RV32I-NEXT:    addi s3, a0, -1
691; RV32I-NEXT:    li a2, -1
692; RV32I-NEXT:    mv a0, s1
693; RV32I-NEXT:    mv a3, s3
694; RV32I-NEXT:    call __gtdf2@plt
695; RV32I-NEXT:    mv s4, a0
696; RV32I-NEXT:    lui a3, 802304
697; RV32I-NEXT:    li s2, 0
698; RV32I-NEXT:    mv a0, s1
699; RV32I-NEXT:    mv a1, s0
700; RV32I-NEXT:    li a2, 0
701; RV32I-NEXT:    call __gedf2@plt
702; RV32I-NEXT:    mv s6, a0
703; RV32I-NEXT:    mv a0, s1
704; RV32I-NEXT:    mv a1, s0
705; RV32I-NEXT:    call __fixdfdi@plt
706; RV32I-NEXT:    mv s5, a1
707; RV32I-NEXT:    mv a1, s2
708; RV32I-NEXT:    blt s6, s2, .LBB12_2
709; RV32I-NEXT:  # %bb.1: # %start
710; RV32I-NEXT:    mv a1, a0
711; RV32I-NEXT:  .LBB12_2: # %start
712; RV32I-NEXT:    li s6, -1
713; RV32I-NEXT:    blt s2, s4, .LBB12_4
714; RV32I-NEXT:  # %bb.3: # %start
715; RV32I-NEXT:    mv s6, a1
716; RV32I-NEXT:  .LBB12_4: # %start
717; RV32I-NEXT:    mv a0, s1
718; RV32I-NEXT:    mv a1, s0
719; RV32I-NEXT:    mv a2, s1
720; RV32I-NEXT:    mv a3, s0
721; RV32I-NEXT:    call __unorddf2@plt
722; RV32I-NEXT:    mv s4, s2
723; RV32I-NEXT:    bne a0, s2, .LBB12_6
724; RV32I-NEXT:  # %bb.5: # %start
725; RV32I-NEXT:    mv s4, s6
726; RV32I-NEXT:  .LBB12_6: # %start
727; RV32I-NEXT:    lui a3, 802304
728; RV32I-NEXT:    mv a0, s1
729; RV32I-NEXT:    mv a1, s0
730; RV32I-NEXT:    mv a2, s2
731; RV32I-NEXT:    call __gedf2@plt
732; RV32I-NEXT:    lui s7, 524288
733; RV32I-NEXT:    lui s6, 524288
734; RV32I-NEXT:    blt a0, s2, .LBB12_8
735; RV32I-NEXT:  # %bb.7: # %start
736; RV32I-NEXT:    mv s6, s5
737; RV32I-NEXT:  .LBB12_8: # %start
738; RV32I-NEXT:    li a2, -1
739; RV32I-NEXT:    mv a0, s1
740; RV32I-NEXT:    mv a1, s0
741; RV32I-NEXT:    mv a3, s3
742; RV32I-NEXT:    call __gtdf2@plt
743; RV32I-NEXT:    bge s2, a0, .LBB12_10
744; RV32I-NEXT:  # %bb.9:
745; RV32I-NEXT:    addi s6, s7, -1
746; RV32I-NEXT:  .LBB12_10: # %start
747; RV32I-NEXT:    mv a0, s1
748; RV32I-NEXT:    mv a1, s0
749; RV32I-NEXT:    mv a2, s1
750; RV32I-NEXT:    mv a3, s0
751; RV32I-NEXT:    call __unorddf2@plt
752; RV32I-NEXT:    bne a0, s2, .LBB12_12
753; RV32I-NEXT:  # %bb.11: # %start
754; RV32I-NEXT:    mv s2, s6
755; RV32I-NEXT:  .LBB12_12: # %start
756; RV32I-NEXT:    mv a0, s4
757; RV32I-NEXT:    mv a1, s2
758; RV32I-NEXT:    lw ra, 44(sp) # 4-byte Folded Reload
759; RV32I-NEXT:    lw s0, 40(sp) # 4-byte Folded Reload
760; RV32I-NEXT:    lw s1, 36(sp) # 4-byte Folded Reload
761; RV32I-NEXT:    lw s2, 32(sp) # 4-byte Folded Reload
762; RV32I-NEXT:    lw s3, 28(sp) # 4-byte Folded Reload
763; RV32I-NEXT:    lw s4, 24(sp) # 4-byte Folded Reload
764; RV32I-NEXT:    lw s5, 20(sp) # 4-byte Folded Reload
765; RV32I-NEXT:    lw s6, 16(sp) # 4-byte Folded Reload
766; RV32I-NEXT:    lw s7, 12(sp) # 4-byte Folded Reload
767; RV32I-NEXT:    addi sp, sp, 48
768; RV32I-NEXT:    ret
769;
770; RV64I-LABEL: fcvt_l_d_sat:
771; RV64I:       # %bb.0: # %start
772; RV64I-NEXT:    addi sp, sp, -48
773; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
774; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
775; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
776; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
777; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
778; RV64I-NEXT:    sd s4, 0(sp) # 8-byte Folded Spill
779; RV64I-NEXT:    mv s0, a0
780; RV64I-NEXT:    li a0, -481
781; RV64I-NEXT:    slli a1, a0, 53
782; RV64I-NEXT:    mv a0, s0
783; RV64I-NEXT:    call __gedf2@plt
784; RV64I-NEXT:    mv s3, a0
785; RV64I-NEXT:    mv a0, s0
786; RV64I-NEXT:    call __fixdfdi@plt
787; RV64I-NEXT:    li s1, 0
788; RV64I-NEXT:    li s4, -1
789; RV64I-NEXT:    bltz s3, .LBB12_2
790; RV64I-NEXT:  # %bb.1: # %start
791; RV64I-NEXT:    mv s2, a0
792; RV64I-NEXT:    j .LBB12_3
793; RV64I-NEXT:  .LBB12_2:
794; RV64I-NEXT:    slli s2, s4, 63
795; RV64I-NEXT:  .LBB12_3: # %start
796; RV64I-NEXT:    li a0, 543
797; RV64I-NEXT:    slli a0, a0, 53
798; RV64I-NEXT:    addi a1, a0, -1
799; RV64I-NEXT:    mv a0, s0
800; RV64I-NEXT:    call __gtdf2@plt
801; RV64I-NEXT:    bge s1, a0, .LBB12_5
802; RV64I-NEXT:  # %bb.4:
803; RV64I-NEXT:    srli s2, s4, 1
804; RV64I-NEXT:  .LBB12_5: # %start
805; RV64I-NEXT:    mv a0, s0
806; RV64I-NEXT:    mv a1, s0
807; RV64I-NEXT:    call __unorddf2@plt
808; RV64I-NEXT:    bne a0, s1, .LBB12_7
809; RV64I-NEXT:  # %bb.6: # %start
810; RV64I-NEXT:    mv s1, s2
811; RV64I-NEXT:  .LBB12_7: # %start
812; RV64I-NEXT:    mv a0, s1
813; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
814; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
815; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
816; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
817; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
818; RV64I-NEXT:    ld s4, 0(sp) # 8-byte Folded Reload
819; RV64I-NEXT:    addi sp, sp, 48
820; RV64I-NEXT:    ret
821start:
822  %0 = tail call i64 @llvm.fptosi.sat.i64.f64(double %a)
823  ret i64 %0
824}
825declare i64 @llvm.fptosi.sat.i64.f64(double)
826
827define i64 @fcvt_lu_d(double %a) nounwind {
828; RV32IFD-LABEL: fcvt_lu_d:
829; RV32IFD:       # %bb.0:
830; RV32IFD-NEXT:    addi sp, sp, -16
831; RV32IFD-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
832; RV32IFD-NEXT:    call __fixunsdfdi@plt
833; RV32IFD-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
834; RV32IFD-NEXT:    addi sp, sp, 16
835; RV32IFD-NEXT:    ret
836;
837; RV64IFD-LABEL: fcvt_lu_d:
838; RV64IFD:       # %bb.0:
839; RV64IFD-NEXT:    fcvt.lu.d a0, fa0, rtz
840; RV64IFD-NEXT:    ret
841;
842; RV32I-LABEL: fcvt_lu_d:
843; RV32I:       # %bb.0:
844; RV32I-NEXT:    addi sp, sp, -16
845; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
846; RV32I-NEXT:    call __fixunsdfdi@plt
847; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
848; RV32I-NEXT:    addi sp, sp, 16
849; RV32I-NEXT:    ret
850;
851; RV64I-LABEL: fcvt_lu_d:
852; RV64I:       # %bb.0:
853; RV64I-NEXT:    addi sp, sp, -16
854; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
855; RV64I-NEXT:    call __fixunsdfdi@plt
856; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
857; RV64I-NEXT:    addi sp, sp, 16
858; RV64I-NEXT:    ret
859  %1 = fptoui double %a to i64
860  ret i64 %1
861}
862
863define i64 @fcvt_lu_d_sat(double %a) nounwind {
864; RV32IFD-LABEL: fcvt_lu_d_sat:
865; RV32IFD:       # %bb.0: # %start
866; RV32IFD-NEXT:    addi sp, sp, -16
867; RV32IFD-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
868; RV32IFD-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
869; RV32IFD-NEXT:    fsd fs0, 0(sp) # 8-byte Folded Spill
870; RV32IFD-NEXT:    fmv.d fs0, fa0
871; RV32IFD-NEXT:    fcvt.d.w ft0, zero
872; RV32IFD-NEXT:    fle.d s0, ft0, fa0
873; RV32IFD-NEXT:    call __fixunsdfdi@plt
874; RV32IFD-NEXT:    mv a3, a0
875; RV32IFD-NEXT:    bnez s0, .LBB14_2
876; RV32IFD-NEXT:  # %bb.1: # %start
877; RV32IFD-NEXT:    li a3, 0
878; RV32IFD-NEXT:  .LBB14_2: # %start
879; RV32IFD-NEXT:    lui a0, %hi(.LCPI14_0)
880; RV32IFD-NEXT:    fld ft0, %lo(.LCPI14_0)(a0)
881; RV32IFD-NEXT:    flt.d a4, ft0, fs0
882; RV32IFD-NEXT:    li a2, -1
883; RV32IFD-NEXT:    li a0, -1
884; RV32IFD-NEXT:    beqz a4, .LBB14_7
885; RV32IFD-NEXT:  # %bb.3: # %start
886; RV32IFD-NEXT:    beqz s0, .LBB14_8
887; RV32IFD-NEXT:  .LBB14_4: # %start
888; RV32IFD-NEXT:    bnez a4, .LBB14_6
889; RV32IFD-NEXT:  .LBB14_5: # %start
890; RV32IFD-NEXT:    mv a2, a1
891; RV32IFD-NEXT:  .LBB14_6: # %start
892; RV32IFD-NEXT:    mv a1, a2
893; RV32IFD-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
894; RV32IFD-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
895; RV32IFD-NEXT:    fld fs0, 0(sp) # 8-byte Folded Reload
896; RV32IFD-NEXT:    addi sp, sp, 16
897; RV32IFD-NEXT:    ret
898; RV32IFD-NEXT:  .LBB14_7: # %start
899; RV32IFD-NEXT:    mv a0, a3
900; RV32IFD-NEXT:    bnez s0, .LBB14_4
901; RV32IFD-NEXT:  .LBB14_8: # %start
902; RV32IFD-NEXT:    li a1, 0
903; RV32IFD-NEXT:    beqz a4, .LBB14_5
904; RV32IFD-NEXT:    j .LBB14_6
905;
906; RV64IFD-LABEL: fcvt_lu_d_sat:
907; RV64IFD:       # %bb.0: # %start
908; RV64IFD-NEXT:    feq.d a0, fa0, fa0
909; RV64IFD-NEXT:    beqz a0, .LBB14_2
910; RV64IFD-NEXT:  # %bb.1:
911; RV64IFD-NEXT:    fcvt.lu.d a0, fa0, rtz
912; RV64IFD-NEXT:  .LBB14_2: # %start
913; RV64IFD-NEXT:    ret
914;
915; RV32I-LABEL: fcvt_lu_d_sat:
916; RV32I:       # %bb.0: # %start
917; RV32I-NEXT:    addi sp, sp, -32
918; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
919; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
920; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
921; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
922; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
923; RV32I-NEXT:    sw s4, 8(sp) # 4-byte Folded Spill
924; RV32I-NEXT:    sw s5, 4(sp) # 4-byte Folded Spill
925; RV32I-NEXT:    sw s6, 0(sp) # 4-byte Folded Spill
926; RV32I-NEXT:    mv s1, a1
927; RV32I-NEXT:    mv s2, a0
928; RV32I-NEXT:    lui a0, 278272
929; RV32I-NEXT:    addi s3, a0, -1
930; RV32I-NEXT:    li a2, -1
931; RV32I-NEXT:    li s0, -1
932; RV32I-NEXT:    mv a0, s2
933; RV32I-NEXT:    mv a3, s3
934; RV32I-NEXT:    call __gtdf2@plt
935; RV32I-NEXT:    mv s6, a0
936; RV32I-NEXT:    mv a0, s2
937; RV32I-NEXT:    mv a1, s1
938; RV32I-NEXT:    li a2, 0
939; RV32I-NEXT:    li a3, 0
940; RV32I-NEXT:    call __gedf2@plt
941; RV32I-NEXT:    mv s4, a0
942; RV32I-NEXT:    mv a0, s2
943; RV32I-NEXT:    mv a1, s1
944; RV32I-NEXT:    call __fixunsdfdi@plt
945; RV32I-NEXT:    mv s5, a1
946; RV32I-NEXT:    li a1, 0
947; RV32I-NEXT:    bltz s4, .LBB14_2
948; RV32I-NEXT:  # %bb.1: # %start
949; RV32I-NEXT:    mv a1, a0
950; RV32I-NEXT:  .LBB14_2: # %start
951; RV32I-NEXT:    li s4, -1
952; RV32I-NEXT:    bgtz s6, .LBB14_4
953; RV32I-NEXT:  # %bb.3: # %start
954; RV32I-NEXT:    mv s4, a1
955; RV32I-NEXT:  .LBB14_4: # %start
956; RV32I-NEXT:    li a2, -1
957; RV32I-NEXT:    mv a0, s2
958; RV32I-NEXT:    mv a1, s1
959; RV32I-NEXT:    mv a3, s3
960; RV32I-NEXT:    call __gtdf2@plt
961; RV32I-NEXT:    mv s3, a0
962; RV32I-NEXT:    mv a0, s2
963; RV32I-NEXT:    mv a1, s1
964; RV32I-NEXT:    li a2, 0
965; RV32I-NEXT:    li a3, 0
966; RV32I-NEXT:    call __gedf2@plt
967; RV32I-NEXT:    li a1, 0
968; RV32I-NEXT:    bltz a0, .LBB14_6
969; RV32I-NEXT:  # %bb.5: # %start
970; RV32I-NEXT:    mv a1, s5
971; RV32I-NEXT:  .LBB14_6: # %start
972; RV32I-NEXT:    bgtz s3, .LBB14_8
973; RV32I-NEXT:  # %bb.7: # %start
974; RV32I-NEXT:    mv s0, a1
975; RV32I-NEXT:  .LBB14_8: # %start
976; RV32I-NEXT:    mv a0, s4
977; RV32I-NEXT:    mv a1, s0
978; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
979; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
980; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
981; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
982; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
983; RV32I-NEXT:    lw s4, 8(sp) # 4-byte Folded Reload
984; RV32I-NEXT:    lw s5, 4(sp) # 4-byte Folded Reload
985; RV32I-NEXT:    lw s6, 0(sp) # 4-byte Folded Reload
986; RV32I-NEXT:    addi sp, sp, 32
987; RV32I-NEXT:    ret
988;
989; RV64I-LABEL: fcvt_lu_d_sat:
990; RV64I:       # %bb.0: # %start
991; RV64I-NEXT:    addi sp, sp, -32
992; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
993; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
994; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
995; RV64I-NEXT:    sd s2, 0(sp) # 8-byte Folded Spill
996; RV64I-NEXT:    mv s0, a0
997; RV64I-NEXT:    li a1, 0
998; RV64I-NEXT:    call __gedf2@plt
999; RV64I-NEXT:    mv s1, a0
1000; RV64I-NEXT:    mv a0, s0
1001; RV64I-NEXT:    call __fixunsdfdi@plt
1002; RV64I-NEXT:    li s2, 0
1003; RV64I-NEXT:    bltz s1, .LBB14_2
1004; RV64I-NEXT:  # %bb.1: # %start
1005; RV64I-NEXT:    mv s2, a0
1006; RV64I-NEXT:  .LBB14_2: # %start
1007; RV64I-NEXT:    li a0, 1087
1008; RV64I-NEXT:    slli a0, a0, 52
1009; RV64I-NEXT:    addi a1, a0, -1
1010; RV64I-NEXT:    mv a0, s0
1011; RV64I-NEXT:    call __gtdf2@plt
1012; RV64I-NEXT:    mv a1, a0
1013; RV64I-NEXT:    li a0, -1
1014; RV64I-NEXT:    bgtz a1, .LBB14_4
1015; RV64I-NEXT:  # %bb.3: # %start
1016; RV64I-NEXT:    mv a0, s2
1017; RV64I-NEXT:  .LBB14_4: # %start
1018; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
1019; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
1020; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
1021; RV64I-NEXT:    ld s2, 0(sp) # 8-byte Folded Reload
1022; RV64I-NEXT:    addi sp, sp, 32
1023; RV64I-NEXT:    ret
1024start:
1025  %0 = tail call i64 @llvm.fptoui.sat.i64.f64(double %a)
1026  ret i64 %0
1027}
1028declare i64 @llvm.fptoui.sat.i64.f64(double)
1029
1030define i64 @fmv_x_d(double %a, double %b) nounwind {
1031; RV32IFD-LABEL: fmv_x_d:
1032; RV32IFD:       # %bb.0:
1033; RV32IFD-NEXT:    addi sp, sp, -16
1034; RV32IFD-NEXT:    fadd.d ft0, fa0, fa1
1035; RV32IFD-NEXT:    fsd ft0, 8(sp)
1036; RV32IFD-NEXT:    lw a0, 8(sp)
1037; RV32IFD-NEXT:    lw a1, 12(sp)
1038; RV32IFD-NEXT:    addi sp, sp, 16
1039; RV32IFD-NEXT:    ret
1040;
1041; RV64IFD-LABEL: fmv_x_d:
1042; RV64IFD:       # %bb.0:
1043; RV64IFD-NEXT:    fadd.d ft0, fa0, fa1
1044; RV64IFD-NEXT:    fmv.x.d a0, ft0
1045; RV64IFD-NEXT:    ret
1046;
1047; RV32I-LABEL: fmv_x_d:
1048; RV32I:       # %bb.0:
1049; RV32I-NEXT:    addi sp, sp, -16
1050; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1051; RV32I-NEXT:    call __adddf3@plt
1052; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1053; RV32I-NEXT:    addi sp, sp, 16
1054; RV32I-NEXT:    ret
1055;
1056; RV64I-LABEL: fmv_x_d:
1057; RV64I:       # %bb.0:
1058; RV64I-NEXT:    addi sp, sp, -16
1059; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1060; RV64I-NEXT:    call __adddf3@plt
1061; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1062; RV64I-NEXT:    addi sp, sp, 16
1063; RV64I-NEXT:    ret
1064  %1 = fadd double %a, %b
1065  %2 = bitcast double %1 to i64
1066  ret i64 %2
1067}
1068
1069define double @fcvt_d_l(i64 %a) nounwind {
1070; RV32IFD-LABEL: fcvt_d_l:
1071; RV32IFD:       # %bb.0:
1072; RV32IFD-NEXT:    addi sp, sp, -16
1073; RV32IFD-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1074; RV32IFD-NEXT:    call __floatdidf@plt
1075; RV32IFD-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1076; RV32IFD-NEXT:    addi sp, sp, 16
1077; RV32IFD-NEXT:    ret
1078;
1079; RV64IFD-LABEL: fcvt_d_l:
1080; RV64IFD:       # %bb.0:
1081; RV64IFD-NEXT:    fcvt.d.l fa0, a0
1082; RV64IFD-NEXT:    ret
1083;
1084; RV32I-LABEL: fcvt_d_l:
1085; RV32I:       # %bb.0:
1086; RV32I-NEXT:    addi sp, sp, -16
1087; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1088; RV32I-NEXT:    call __floatdidf@plt
1089; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1090; RV32I-NEXT:    addi sp, sp, 16
1091; RV32I-NEXT:    ret
1092;
1093; RV64I-LABEL: fcvt_d_l:
1094; RV64I:       # %bb.0:
1095; RV64I-NEXT:    addi sp, sp, -16
1096; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1097; RV64I-NEXT:    call __floatdidf@plt
1098; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1099; RV64I-NEXT:    addi sp, sp, 16
1100; RV64I-NEXT:    ret
1101  %1 = sitofp i64 %a to double
1102  ret double %1
1103}
1104
1105define double @fcvt_d_lu(i64 %a) nounwind {
1106; RV32IFD-LABEL: fcvt_d_lu:
1107; RV32IFD:       # %bb.0:
1108; RV32IFD-NEXT:    addi sp, sp, -16
1109; RV32IFD-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1110; RV32IFD-NEXT:    call __floatundidf@plt
1111; RV32IFD-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1112; RV32IFD-NEXT:    addi sp, sp, 16
1113; RV32IFD-NEXT:    ret
1114;
1115; RV64IFD-LABEL: fcvt_d_lu:
1116; RV64IFD:       # %bb.0:
1117; RV64IFD-NEXT:    fcvt.d.lu fa0, a0
1118; RV64IFD-NEXT:    ret
1119;
1120; RV32I-LABEL: fcvt_d_lu:
1121; RV32I:       # %bb.0:
1122; RV32I-NEXT:    addi sp, sp, -16
1123; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1124; RV32I-NEXT:    call __floatundidf@plt
1125; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1126; RV32I-NEXT:    addi sp, sp, 16
1127; RV32I-NEXT:    ret
1128;
1129; RV64I-LABEL: fcvt_d_lu:
1130; RV64I:       # %bb.0:
1131; RV64I-NEXT:    addi sp, sp, -16
1132; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1133; RV64I-NEXT:    call __floatundidf@plt
1134; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1135; RV64I-NEXT:    addi sp, sp, 16
1136; RV64I-NEXT:    ret
1137  %1 = uitofp i64 %a to double
1138  ret double %1
1139}
1140
1141define double @fmv_d_x(i64 %a, i64 %b) nounwind {
1142; Ensure fmv.w.x is generated even for a soft double calling convention
1143; RV32IFD-LABEL: fmv_d_x:
1144; RV32IFD:       # %bb.0:
1145; RV32IFD-NEXT:    addi sp, sp, -16
1146; RV32IFD-NEXT:    sw a3, 4(sp)
1147; RV32IFD-NEXT:    sw a2, 0(sp)
1148; RV32IFD-NEXT:    sw a1, 12(sp)
1149; RV32IFD-NEXT:    sw a0, 8(sp)
1150; RV32IFD-NEXT:    fld ft0, 0(sp)
1151; RV32IFD-NEXT:    fld ft1, 8(sp)
1152; RV32IFD-NEXT:    fadd.d fa0, ft1, ft0
1153; RV32IFD-NEXT:    addi sp, sp, 16
1154; RV32IFD-NEXT:    ret
1155;
1156; RV64IFD-LABEL: fmv_d_x:
1157; RV64IFD:       # %bb.0:
1158; RV64IFD-NEXT:    fmv.d.x ft0, a0
1159; RV64IFD-NEXT:    fmv.d.x ft1, a1
1160; RV64IFD-NEXT:    fadd.d fa0, ft0, ft1
1161; RV64IFD-NEXT:    ret
1162;
1163; RV32I-LABEL: fmv_d_x:
1164; RV32I:       # %bb.0:
1165; RV32I-NEXT:    addi sp, sp, -16
1166; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1167; RV32I-NEXT:    call __adddf3@plt
1168; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1169; RV32I-NEXT:    addi sp, sp, 16
1170; RV32I-NEXT:    ret
1171;
1172; RV64I-LABEL: fmv_d_x:
1173; RV64I:       # %bb.0:
1174; RV64I-NEXT:    addi sp, sp, -16
1175; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1176; RV64I-NEXT:    call __adddf3@plt
1177; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1178; RV64I-NEXT:    addi sp, sp, 16
1179; RV64I-NEXT:    ret
1180  %1 = bitcast i64 %a to double
1181  %2 = bitcast i64 %b to double
1182  %3 = fadd double %1, %2
1183  ret double %3
1184}
1185
1186define double @fcvt_d_w_i8(i8 signext %a) nounwind {
1187; RV32IFD-LABEL: fcvt_d_w_i8:
1188; RV32IFD:       # %bb.0:
1189; RV32IFD-NEXT:    fcvt.d.w fa0, a0
1190; RV32IFD-NEXT:    ret
1191;
1192; RV64IFD-LABEL: fcvt_d_w_i8:
1193; RV64IFD:       # %bb.0:
1194; RV64IFD-NEXT:    fcvt.d.w fa0, a0
1195; RV64IFD-NEXT:    ret
1196;
1197; RV32I-LABEL: fcvt_d_w_i8:
1198; RV32I:       # %bb.0:
1199; RV32I-NEXT:    addi sp, sp, -16
1200; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1201; RV32I-NEXT:    call __floatsidf@plt
1202; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1203; RV32I-NEXT:    addi sp, sp, 16
1204; RV32I-NEXT:    ret
1205;
1206; RV64I-LABEL: fcvt_d_w_i8:
1207; RV64I:       # %bb.0:
1208; RV64I-NEXT:    addi sp, sp, -16
1209; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1210; RV64I-NEXT:    call __floatsidf@plt
1211; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1212; RV64I-NEXT:    addi sp, sp, 16
1213; RV64I-NEXT:    ret
1214  %1 = sitofp i8 %a to double
1215  ret double %1
1216}
1217
1218define double @fcvt_d_wu_i8(i8 zeroext %a) nounwind {
1219; RV32IFD-LABEL: fcvt_d_wu_i8:
1220; RV32IFD:       # %bb.0:
1221; RV32IFD-NEXT:    fcvt.d.wu fa0, a0
1222; RV32IFD-NEXT:    ret
1223;
1224; RV64IFD-LABEL: fcvt_d_wu_i8:
1225; RV64IFD:       # %bb.0:
1226; RV64IFD-NEXT:    fcvt.d.wu fa0, a0
1227; RV64IFD-NEXT:    ret
1228;
1229; RV32I-LABEL: fcvt_d_wu_i8:
1230; RV32I:       # %bb.0:
1231; RV32I-NEXT:    addi sp, sp, -16
1232; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1233; RV32I-NEXT:    call __floatunsidf@plt
1234; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1235; RV32I-NEXT:    addi sp, sp, 16
1236; RV32I-NEXT:    ret
1237;
1238; RV64I-LABEL: fcvt_d_wu_i8:
1239; RV64I:       # %bb.0:
1240; RV64I-NEXT:    addi sp, sp, -16
1241; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1242; RV64I-NEXT:    call __floatunsidf@plt
1243; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1244; RV64I-NEXT:    addi sp, sp, 16
1245; RV64I-NEXT:    ret
1246  %1 = uitofp i8 %a to double
1247  ret double %1
1248}
1249
1250define double @fcvt_d_w_i16(i16 signext %a) nounwind {
1251; RV32IFD-LABEL: fcvt_d_w_i16:
1252; RV32IFD:       # %bb.0:
1253; RV32IFD-NEXT:    fcvt.d.w fa0, a0
1254; RV32IFD-NEXT:    ret
1255;
1256; RV64IFD-LABEL: fcvt_d_w_i16:
1257; RV64IFD:       # %bb.0:
1258; RV64IFD-NEXT:    fcvt.d.w fa0, a0
1259; RV64IFD-NEXT:    ret
1260;
1261; RV32I-LABEL: fcvt_d_w_i16:
1262; RV32I:       # %bb.0:
1263; RV32I-NEXT:    addi sp, sp, -16
1264; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1265; RV32I-NEXT:    call __floatsidf@plt
1266; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1267; RV32I-NEXT:    addi sp, sp, 16
1268; RV32I-NEXT:    ret
1269;
1270; RV64I-LABEL: fcvt_d_w_i16:
1271; RV64I:       # %bb.0:
1272; RV64I-NEXT:    addi sp, sp, -16
1273; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1274; RV64I-NEXT:    call __floatsidf@plt
1275; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1276; RV64I-NEXT:    addi sp, sp, 16
1277; RV64I-NEXT:    ret
1278  %1 = sitofp i16 %a to double
1279  ret double %1
1280}
1281
1282define double @fcvt_d_wu_i16(i16 zeroext %a) nounwind {
1283; RV32IFD-LABEL: fcvt_d_wu_i16:
1284; RV32IFD:       # %bb.0:
1285; RV32IFD-NEXT:    fcvt.d.wu fa0, a0
1286; RV32IFD-NEXT:    ret
1287;
1288; RV64IFD-LABEL: fcvt_d_wu_i16:
1289; RV64IFD:       # %bb.0:
1290; RV64IFD-NEXT:    fcvt.d.wu fa0, a0
1291; RV64IFD-NEXT:    ret
1292;
1293; RV32I-LABEL: fcvt_d_wu_i16:
1294; RV32I:       # %bb.0:
1295; RV32I-NEXT:    addi sp, sp, -16
1296; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1297; RV32I-NEXT:    call __floatunsidf@plt
1298; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1299; RV32I-NEXT:    addi sp, sp, 16
1300; RV32I-NEXT:    ret
1301;
1302; RV64I-LABEL: fcvt_d_wu_i16:
1303; RV64I:       # %bb.0:
1304; RV64I-NEXT:    addi sp, sp, -16
1305; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1306; RV64I-NEXT:    call __floatunsidf@plt
1307; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1308; RV64I-NEXT:    addi sp, sp, 16
1309; RV64I-NEXT:    ret
1310  %1 = uitofp i16 %a to double
1311  ret double %1
1312}
1313
1314; Make sure we select W version of addi on RV64.
1315define signext i32 @fcvt_d_w_demanded_bits(i32 signext %0, double* %1) nounwind {
1316; RV32IFD-LABEL: fcvt_d_w_demanded_bits:
1317; RV32IFD:       # %bb.0:
1318; RV32IFD-NEXT:    addi a0, a0, 1
1319; RV32IFD-NEXT:    fcvt.d.w ft0, a0
1320; RV32IFD-NEXT:    fsd ft0, 0(a1)
1321; RV32IFD-NEXT:    ret
1322;
1323; RV64IFD-LABEL: fcvt_d_w_demanded_bits:
1324; RV64IFD:       # %bb.0:
1325; RV64IFD-NEXT:    addiw a0, a0, 1
1326; RV64IFD-NEXT:    fcvt.d.w ft0, a0
1327; RV64IFD-NEXT:    fsd ft0, 0(a1)
1328; RV64IFD-NEXT:    ret
1329;
1330; RV32I-LABEL: fcvt_d_w_demanded_bits:
1331; RV32I:       # %bb.0:
1332; RV32I-NEXT:    addi sp, sp, -16
1333; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1334; RV32I-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
1335; RV32I-NEXT:    sw s1, 4(sp) # 4-byte Folded Spill
1336; RV32I-NEXT:    mv s0, a1
1337; RV32I-NEXT:    addi s1, a0, 1
1338; RV32I-NEXT:    mv a0, s1
1339; RV32I-NEXT:    call __floatsidf@plt
1340; RV32I-NEXT:    sw a1, 4(s0)
1341; RV32I-NEXT:    sw a0, 0(s0)
1342; RV32I-NEXT:    mv a0, s1
1343; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1344; RV32I-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
1345; RV32I-NEXT:    lw s1, 4(sp) # 4-byte Folded Reload
1346; RV32I-NEXT:    addi sp, sp, 16
1347; RV32I-NEXT:    ret
1348;
1349; RV64I-LABEL: fcvt_d_w_demanded_bits:
1350; RV64I:       # %bb.0:
1351; RV64I-NEXT:    addi sp, sp, -32
1352; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
1353; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
1354; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
1355; RV64I-NEXT:    mv s0, a1
1356; RV64I-NEXT:    addiw s1, a0, 1
1357; RV64I-NEXT:    mv a0, s1
1358; RV64I-NEXT:    call __floatsidf@plt
1359; RV64I-NEXT:    sd a0, 0(s0)
1360; RV64I-NEXT:    mv a0, s1
1361; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
1362; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
1363; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
1364; RV64I-NEXT:    addi sp, sp, 32
1365; RV64I-NEXT:    ret
1366  %3 = add i32 %0, 1
1367  %4 = sitofp i32 %3 to double
1368  store double %4, double* %1, align 8
1369  ret i32 %3
1370}
1371
1372; Make sure we select W version of addi on RV64.
1373define signext i32 @fcvt_d_wu_demanded_bits(i32 signext %0, double* %1) nounwind {
1374; RV32IFD-LABEL: fcvt_d_wu_demanded_bits:
1375; RV32IFD:       # %bb.0:
1376; RV32IFD-NEXT:    addi a0, a0, 1
1377; RV32IFD-NEXT:    fcvt.d.wu ft0, a0
1378; RV32IFD-NEXT:    fsd ft0, 0(a1)
1379; RV32IFD-NEXT:    ret
1380;
1381; RV64IFD-LABEL: fcvt_d_wu_demanded_bits:
1382; RV64IFD:       # %bb.0:
1383; RV64IFD-NEXT:    addiw a0, a0, 1
1384; RV64IFD-NEXT:    fcvt.d.wu ft0, a0
1385; RV64IFD-NEXT:    fsd ft0, 0(a1)
1386; RV64IFD-NEXT:    ret
1387;
1388; RV32I-LABEL: fcvt_d_wu_demanded_bits:
1389; RV32I:       # %bb.0:
1390; RV32I-NEXT:    addi sp, sp, -16
1391; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1392; RV32I-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
1393; RV32I-NEXT:    sw s1, 4(sp) # 4-byte Folded Spill
1394; RV32I-NEXT:    mv s0, a1
1395; RV32I-NEXT:    addi s1, a0, 1
1396; RV32I-NEXT:    mv a0, s1
1397; RV32I-NEXT:    call __floatunsidf@plt
1398; RV32I-NEXT:    sw a1, 4(s0)
1399; RV32I-NEXT:    sw a0, 0(s0)
1400; RV32I-NEXT:    mv a0, s1
1401; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1402; RV32I-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
1403; RV32I-NEXT:    lw s1, 4(sp) # 4-byte Folded Reload
1404; RV32I-NEXT:    addi sp, sp, 16
1405; RV32I-NEXT:    ret
1406;
1407; RV64I-LABEL: fcvt_d_wu_demanded_bits:
1408; RV64I:       # %bb.0:
1409; RV64I-NEXT:    addi sp, sp, -32
1410; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
1411; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
1412; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
1413; RV64I-NEXT:    mv s0, a1
1414; RV64I-NEXT:    addiw s1, a0, 1
1415; RV64I-NEXT:    mv a0, s1
1416; RV64I-NEXT:    call __floatunsidf@plt
1417; RV64I-NEXT:    sd a0, 0(s0)
1418; RV64I-NEXT:    mv a0, s1
1419; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
1420; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
1421; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
1422; RV64I-NEXT:    addi sp, sp, 32
1423; RV64I-NEXT:    ret
1424  %3 = add i32 %0, 1
1425  %4 = uitofp i32 %3 to double
1426  store double %4, double* %1, align 8
1427  ret i32 %3
1428}
1429
1430define signext i16 @fcvt_w_s_i16(double %a) nounwind {
1431; RV32IFD-LABEL: fcvt_w_s_i16:
1432; RV32IFD:       # %bb.0:
1433; RV32IFD-NEXT:    fcvt.w.d a0, fa0, rtz
1434; RV32IFD-NEXT:    ret
1435;
1436; RV64IFD-LABEL: fcvt_w_s_i16:
1437; RV64IFD:       # %bb.0:
1438; RV64IFD-NEXT:    fcvt.l.d a0, fa0, rtz
1439; RV64IFD-NEXT:    ret
1440;
1441; RV32I-LABEL: fcvt_w_s_i16:
1442; RV32I:       # %bb.0:
1443; RV32I-NEXT:    addi sp, sp, -16
1444; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1445; RV32I-NEXT:    call __fixdfsi@plt
1446; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1447; RV32I-NEXT:    addi sp, sp, 16
1448; RV32I-NEXT:    ret
1449;
1450; RV64I-LABEL: fcvt_w_s_i16:
1451; RV64I:       # %bb.0:
1452; RV64I-NEXT:    addi sp, sp, -16
1453; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1454; RV64I-NEXT:    call __fixdfdi@plt
1455; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1456; RV64I-NEXT:    addi sp, sp, 16
1457; RV64I-NEXT:    ret
1458  %1 = fptosi double %a to i16
1459  ret i16 %1
1460}
1461
1462define signext i16 @fcvt_w_s_sat_i16(double %a) nounwind {
1463; RV32IFD-LABEL: fcvt_w_s_sat_i16:
1464; RV32IFD:       # %bb.0: # %start
1465; RV32IFD-NEXT:    feq.d a0, fa0, fa0
1466; RV32IFD-NEXT:    beqz a0, .LBB26_2
1467; RV32IFD-NEXT:  # %bb.1:
1468; RV32IFD-NEXT:    lui a0, %hi(.LCPI26_0)
1469; RV32IFD-NEXT:    fld ft0, %lo(.LCPI26_0)(a0)
1470; RV32IFD-NEXT:    lui a0, %hi(.LCPI26_1)
1471; RV32IFD-NEXT:    fld ft1, %lo(.LCPI26_1)(a0)
1472; RV32IFD-NEXT:    fmax.d ft0, fa0, ft0
1473; RV32IFD-NEXT:    fmin.d ft0, ft0, ft1
1474; RV32IFD-NEXT:    fcvt.w.d a0, ft0, rtz
1475; RV32IFD-NEXT:  .LBB26_2: # %start
1476; RV32IFD-NEXT:    ret
1477;
1478; RV64IFD-LABEL: fcvt_w_s_sat_i16:
1479; RV64IFD:       # %bb.0: # %start
1480; RV64IFD-NEXT:    feq.d a0, fa0, fa0
1481; RV64IFD-NEXT:    beqz a0, .LBB26_2
1482; RV64IFD-NEXT:  # %bb.1:
1483; RV64IFD-NEXT:    lui a0, %hi(.LCPI26_0)
1484; RV64IFD-NEXT:    fld ft0, %lo(.LCPI26_0)(a0)
1485; RV64IFD-NEXT:    lui a0, %hi(.LCPI26_1)
1486; RV64IFD-NEXT:    fld ft1, %lo(.LCPI26_1)(a0)
1487; RV64IFD-NEXT:    fmax.d ft0, fa0, ft0
1488; RV64IFD-NEXT:    fmin.d ft0, ft0, ft1
1489; RV64IFD-NEXT:    fcvt.l.d a0, ft0, rtz
1490; RV64IFD-NEXT:  .LBB26_2: # %start
1491; RV64IFD-NEXT:    ret
1492;
1493; RV32I-LABEL: fcvt_w_s_sat_i16:
1494; RV32I:       # %bb.0: # %start
1495; RV32I-NEXT:    addi sp, sp, -32
1496; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
1497; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
1498; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
1499; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
1500; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
1501; RV32I-NEXT:    sw s4, 8(sp) # 4-byte Folded Spill
1502; RV32I-NEXT:    mv s1, a1
1503; RV32I-NEXT:    mv s2, a0
1504; RV32I-NEXT:    lui a3, 790016
1505; RV32I-NEXT:    li s0, 0
1506; RV32I-NEXT:    li a2, 0
1507; RV32I-NEXT:    call __gedf2@plt
1508; RV32I-NEXT:    mv s3, a0
1509; RV32I-NEXT:    mv a0, s2
1510; RV32I-NEXT:    mv a1, s1
1511; RV32I-NEXT:    call __fixdfsi@plt
1512; RV32I-NEXT:    lui s4, 1048568
1513; RV32I-NEXT:    blt s3, s0, .LBB26_2
1514; RV32I-NEXT:  # %bb.1: # %start
1515; RV32I-NEXT:    mv s4, a0
1516; RV32I-NEXT:  .LBB26_2: # %start
1517; RV32I-NEXT:    lui a0, 265728
1518; RV32I-NEXT:    addi a3, a0, -64
1519; RV32I-NEXT:    mv a0, s2
1520; RV32I-NEXT:    mv a1, s1
1521; RV32I-NEXT:    mv a2, s0
1522; RV32I-NEXT:    call __gtdf2@plt
1523; RV32I-NEXT:    bge s0, a0, .LBB26_4
1524; RV32I-NEXT:  # %bb.3:
1525; RV32I-NEXT:    lui a0, 8
1526; RV32I-NEXT:    addi s4, a0, -1
1527; RV32I-NEXT:  .LBB26_4: # %start
1528; RV32I-NEXT:    mv a0, s2
1529; RV32I-NEXT:    mv a1, s1
1530; RV32I-NEXT:    mv a2, s2
1531; RV32I-NEXT:    mv a3, s1
1532; RV32I-NEXT:    call __unorddf2@plt
1533; RV32I-NEXT:    bne a0, s0, .LBB26_6
1534; RV32I-NEXT:  # %bb.5: # %start
1535; RV32I-NEXT:    mv s0, s4
1536; RV32I-NEXT:  .LBB26_6: # %start
1537; RV32I-NEXT:    slli a0, s0, 16
1538; RV32I-NEXT:    srai a0, a0, 16
1539; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
1540; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
1541; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
1542; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
1543; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
1544; RV32I-NEXT:    lw s4, 8(sp) # 4-byte Folded Reload
1545; RV32I-NEXT:    addi sp, sp, 32
1546; RV32I-NEXT:    ret
1547;
1548; RV64I-LABEL: fcvt_w_s_sat_i16:
1549; RV64I:       # %bb.0: # %start
1550; RV64I-NEXT:    addi sp, sp, -48
1551; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
1552; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
1553; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
1554; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
1555; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
1556; RV64I-NEXT:    mv s0, a0
1557; RV64I-NEXT:    li a0, -505
1558; RV64I-NEXT:    slli a1, a0, 53
1559; RV64I-NEXT:    mv a0, s0
1560; RV64I-NEXT:    call __gedf2@plt
1561; RV64I-NEXT:    mv s1, a0
1562; RV64I-NEXT:    mv a0, s0
1563; RV64I-NEXT:    call __fixdfdi@plt
1564; RV64I-NEXT:    li s2, 0
1565; RV64I-NEXT:    lui s3, 1048568
1566; RV64I-NEXT:    bltz s1, .LBB26_2
1567; RV64I-NEXT:  # %bb.1: # %start
1568; RV64I-NEXT:    mv s3, a0
1569; RV64I-NEXT:  .LBB26_2: # %start
1570; RV64I-NEXT:    lui a0, 4152
1571; RV64I-NEXT:    addiw a0, a0, -1
1572; RV64I-NEXT:    slli a1, a0, 38
1573; RV64I-NEXT:    mv a0, s0
1574; RV64I-NEXT:    call __gtdf2@plt
1575; RV64I-NEXT:    bge s2, a0, .LBB26_4
1576; RV64I-NEXT:  # %bb.3:
1577; RV64I-NEXT:    lui a0, 8
1578; RV64I-NEXT:    addiw s3, a0, -1
1579; RV64I-NEXT:  .LBB26_4: # %start
1580; RV64I-NEXT:    mv a0, s0
1581; RV64I-NEXT:    mv a1, s0
1582; RV64I-NEXT:    call __unorddf2@plt
1583; RV64I-NEXT:    bne a0, s2, .LBB26_6
1584; RV64I-NEXT:  # %bb.5: # %start
1585; RV64I-NEXT:    mv s2, s3
1586; RV64I-NEXT:  .LBB26_6: # %start
1587; RV64I-NEXT:    slli a0, s2, 48
1588; RV64I-NEXT:    srai a0, a0, 48
1589; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
1590; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
1591; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
1592; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
1593; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
1594; RV64I-NEXT:    addi sp, sp, 48
1595; RV64I-NEXT:    ret
1596start:
1597  %0 = tail call i16 @llvm.fptosi.sat.i16.f64(double %a)
1598  ret i16 %0
1599}
1600declare i16 @llvm.fptosi.sat.i16.f64(double)
1601
1602define zeroext i16 @fcvt_wu_s_i16(double %a) nounwind {
1603; RV32IFD-LABEL: fcvt_wu_s_i16:
1604; RV32IFD:       # %bb.0:
1605; RV32IFD-NEXT:    fcvt.wu.d a0, fa0, rtz
1606; RV32IFD-NEXT:    ret
1607;
1608; RV64IFD-LABEL: fcvt_wu_s_i16:
1609; RV64IFD:       # %bb.0:
1610; RV64IFD-NEXT:    fcvt.lu.d a0, fa0, rtz
1611; RV64IFD-NEXT:    ret
1612;
1613; RV32I-LABEL: fcvt_wu_s_i16:
1614; RV32I:       # %bb.0:
1615; RV32I-NEXT:    addi sp, sp, -16
1616; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1617; RV32I-NEXT:    call __fixunsdfsi@plt
1618; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1619; RV32I-NEXT:    addi sp, sp, 16
1620; RV32I-NEXT:    ret
1621;
1622; RV64I-LABEL: fcvt_wu_s_i16:
1623; RV64I:       # %bb.0:
1624; RV64I-NEXT:    addi sp, sp, -16
1625; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1626; RV64I-NEXT:    call __fixunsdfdi@plt
1627; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1628; RV64I-NEXT:    addi sp, sp, 16
1629; RV64I-NEXT:    ret
1630  %1 = fptoui double %a to i16
1631  ret i16 %1
1632}
1633
1634define zeroext i16 @fcvt_wu_s_sat_i16(double %a) nounwind {
1635; RV32IFD-LABEL: fcvt_wu_s_sat_i16:
1636; RV32IFD:       # %bb.0: # %start
1637; RV32IFD-NEXT:    lui a0, %hi(.LCPI28_0)
1638; RV32IFD-NEXT:    fld ft0, %lo(.LCPI28_0)(a0)
1639; RV32IFD-NEXT:    fcvt.d.w ft1, zero
1640; RV32IFD-NEXT:    fmax.d ft1, fa0, ft1
1641; RV32IFD-NEXT:    fmin.d ft0, ft1, ft0
1642; RV32IFD-NEXT:    fcvt.wu.d a0, ft0, rtz
1643; RV32IFD-NEXT:    ret
1644;
1645; RV64IFD-LABEL: fcvt_wu_s_sat_i16:
1646; RV64IFD:       # %bb.0: # %start
1647; RV64IFD-NEXT:    lui a0, %hi(.LCPI28_0)
1648; RV64IFD-NEXT:    fld ft0, %lo(.LCPI28_0)(a0)
1649; RV64IFD-NEXT:    fmv.d.x ft1, zero
1650; RV64IFD-NEXT:    fmax.d ft1, fa0, ft1
1651; RV64IFD-NEXT:    fmin.d ft0, ft1, ft0
1652; RV64IFD-NEXT:    fcvt.lu.d a0, ft0, rtz
1653; RV64IFD-NEXT:    ret
1654;
1655; RV32I-LABEL: fcvt_wu_s_sat_i16:
1656; RV32I:       # %bb.0: # %start
1657; RV32I-NEXT:    addi sp, sp, -32
1658; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
1659; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
1660; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
1661; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
1662; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
1663; RV32I-NEXT:    mv s1, a1
1664; RV32I-NEXT:    mv s2, a0
1665; RV32I-NEXT:    lui a0, 265984
1666; RV32I-NEXT:    addi a3, a0, -32
1667; RV32I-NEXT:    mv a0, s2
1668; RV32I-NEXT:    li a2, 0
1669; RV32I-NEXT:    call __gtdf2@plt
1670; RV32I-NEXT:    mv s0, a0
1671; RV32I-NEXT:    mv a0, s2
1672; RV32I-NEXT:    mv a1, s1
1673; RV32I-NEXT:    li a2, 0
1674; RV32I-NEXT:    li a3, 0
1675; RV32I-NEXT:    call __gedf2@plt
1676; RV32I-NEXT:    mv s3, a0
1677; RV32I-NEXT:    mv a0, s2
1678; RV32I-NEXT:    mv a1, s1
1679; RV32I-NEXT:    call __fixunsdfsi@plt
1680; RV32I-NEXT:    li a1, 0
1681; RV32I-NEXT:    bltz s3, .LBB28_2
1682; RV32I-NEXT:  # %bb.1: # %start
1683; RV32I-NEXT:    mv a1, a0
1684; RV32I-NEXT:  .LBB28_2: # %start
1685; RV32I-NEXT:    lui a0, 16
1686; RV32I-NEXT:    addi a0, a0, -1
1687; RV32I-NEXT:    mv a2, a0
1688; RV32I-NEXT:    bgtz s0, .LBB28_4
1689; RV32I-NEXT:  # %bb.3: # %start
1690; RV32I-NEXT:    mv a2, a1
1691; RV32I-NEXT:  .LBB28_4: # %start
1692; RV32I-NEXT:    and a0, a2, a0
1693; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
1694; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
1695; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
1696; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
1697; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
1698; RV32I-NEXT:    addi sp, sp, 32
1699; RV32I-NEXT:    ret
1700;
1701; RV64I-LABEL: fcvt_wu_s_sat_i16:
1702; RV64I:       # %bb.0: # %start
1703; RV64I-NEXT:    addi sp, sp, -32
1704; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
1705; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
1706; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
1707; RV64I-NEXT:    sd s2, 0(sp) # 8-byte Folded Spill
1708; RV64I-NEXT:    mv s0, a0
1709; RV64I-NEXT:    li a1, 0
1710; RV64I-NEXT:    call __gedf2@plt
1711; RV64I-NEXT:    mv s1, a0
1712; RV64I-NEXT:    mv a0, s0
1713; RV64I-NEXT:    call __fixunsdfdi@plt
1714; RV64I-NEXT:    li s2, 0
1715; RV64I-NEXT:    bltz s1, .LBB28_2
1716; RV64I-NEXT:  # %bb.1: # %start
1717; RV64I-NEXT:    mv s2, a0
1718; RV64I-NEXT:  .LBB28_2: # %start
1719; RV64I-NEXT:    lui a0, 8312
1720; RV64I-NEXT:    addiw a0, a0, -1
1721; RV64I-NEXT:    slli a1, a0, 37
1722; RV64I-NEXT:    mv a0, s0
1723; RV64I-NEXT:    call __gtdf2@plt
1724; RV64I-NEXT:    lui a1, 16
1725; RV64I-NEXT:    addiw a1, a1, -1
1726; RV64I-NEXT:    mv a2, a1
1727; RV64I-NEXT:    bgtz a0, .LBB28_4
1728; RV64I-NEXT:  # %bb.3: # %start
1729; RV64I-NEXT:    mv a2, s2
1730; RV64I-NEXT:  .LBB28_4: # %start
1731; RV64I-NEXT:    and a0, a2, a1
1732; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
1733; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
1734; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
1735; RV64I-NEXT:    ld s2, 0(sp) # 8-byte Folded Reload
1736; RV64I-NEXT:    addi sp, sp, 32
1737; RV64I-NEXT:    ret
1738start:
1739  %0 = tail call i16 @llvm.fptoui.sat.i16.f64(double %a)
1740  ret i16 %0
1741}
1742declare i16 @llvm.fptoui.sat.i16.f64(double)
1743
1744define signext i8 @fcvt_w_s_i8(double %a) nounwind {
1745; RV32IFD-LABEL: fcvt_w_s_i8:
1746; RV32IFD:       # %bb.0:
1747; RV32IFD-NEXT:    fcvt.w.d a0, fa0, rtz
1748; RV32IFD-NEXT:    ret
1749;
1750; RV64IFD-LABEL: fcvt_w_s_i8:
1751; RV64IFD:       # %bb.0:
1752; RV64IFD-NEXT:    fcvt.l.d a0, fa0, rtz
1753; RV64IFD-NEXT:    ret
1754;
1755; RV32I-LABEL: fcvt_w_s_i8:
1756; RV32I:       # %bb.0:
1757; RV32I-NEXT:    addi sp, sp, -16
1758; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1759; RV32I-NEXT:    call __fixdfsi@plt
1760; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1761; RV32I-NEXT:    addi sp, sp, 16
1762; RV32I-NEXT:    ret
1763;
1764; RV64I-LABEL: fcvt_w_s_i8:
1765; RV64I:       # %bb.0:
1766; RV64I-NEXT:    addi sp, sp, -16
1767; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1768; RV64I-NEXT:    call __fixdfdi@plt
1769; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1770; RV64I-NEXT:    addi sp, sp, 16
1771; RV64I-NEXT:    ret
1772  %1 = fptosi double %a to i8
1773  ret i8 %1
1774}
1775
1776define signext i8 @fcvt_w_s_sat_i8(double %a) nounwind {
1777; RV32IFD-LABEL: fcvt_w_s_sat_i8:
1778; RV32IFD:       # %bb.0: # %start
1779; RV32IFD-NEXT:    feq.d a0, fa0, fa0
1780; RV32IFD-NEXT:    beqz a0, .LBB30_2
1781; RV32IFD-NEXT:  # %bb.1:
1782; RV32IFD-NEXT:    lui a0, %hi(.LCPI30_0)
1783; RV32IFD-NEXT:    fld ft0, %lo(.LCPI30_0)(a0)
1784; RV32IFD-NEXT:    lui a0, %hi(.LCPI30_1)
1785; RV32IFD-NEXT:    fld ft1, %lo(.LCPI30_1)(a0)
1786; RV32IFD-NEXT:    fmax.d ft0, fa0, ft0
1787; RV32IFD-NEXT:    fmin.d ft0, ft0, ft1
1788; RV32IFD-NEXT:    fcvt.w.d a0, ft0, rtz
1789; RV32IFD-NEXT:  .LBB30_2: # %start
1790; RV32IFD-NEXT:    ret
1791;
1792; RV64IFD-LABEL: fcvt_w_s_sat_i8:
1793; RV64IFD:       # %bb.0: # %start
1794; RV64IFD-NEXT:    feq.d a0, fa0, fa0
1795; RV64IFD-NEXT:    beqz a0, .LBB30_2
1796; RV64IFD-NEXT:  # %bb.1:
1797; RV64IFD-NEXT:    lui a0, %hi(.LCPI30_0)
1798; RV64IFD-NEXT:    fld ft0, %lo(.LCPI30_0)(a0)
1799; RV64IFD-NEXT:    lui a0, %hi(.LCPI30_1)
1800; RV64IFD-NEXT:    fld ft1, %lo(.LCPI30_1)(a0)
1801; RV64IFD-NEXT:    fmax.d ft0, fa0, ft0
1802; RV64IFD-NEXT:    fmin.d ft0, ft0, ft1
1803; RV64IFD-NEXT:    fcvt.l.d a0, ft0, rtz
1804; RV64IFD-NEXT:  .LBB30_2: # %start
1805; RV64IFD-NEXT:    ret
1806;
1807; RV32I-LABEL: fcvt_w_s_sat_i8:
1808; RV32I:       # %bb.0: # %start
1809; RV32I-NEXT:    addi sp, sp, -32
1810; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
1811; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
1812; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
1813; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
1814; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
1815; RV32I-NEXT:    sw s4, 8(sp) # 4-byte Folded Spill
1816; RV32I-NEXT:    mv s1, a1
1817; RV32I-NEXT:    mv s2, a0
1818; RV32I-NEXT:    lui a3, 787968
1819; RV32I-NEXT:    li s0, 0
1820; RV32I-NEXT:    li a2, 0
1821; RV32I-NEXT:    call __gedf2@plt
1822; RV32I-NEXT:    mv s3, a0
1823; RV32I-NEXT:    mv a0, s2
1824; RV32I-NEXT:    mv a1, s1
1825; RV32I-NEXT:    call __fixdfsi@plt
1826; RV32I-NEXT:    li s4, -128
1827; RV32I-NEXT:    blt s3, s0, .LBB30_2
1828; RV32I-NEXT:  # %bb.1: # %start
1829; RV32I-NEXT:    mv s4, a0
1830; RV32I-NEXT:  .LBB30_2: # %start
1831; RV32I-NEXT:    lui a3, 263676
1832; RV32I-NEXT:    mv a0, s2
1833; RV32I-NEXT:    mv a1, s1
1834; RV32I-NEXT:    mv a2, s0
1835; RV32I-NEXT:    call __gtdf2@plt
1836; RV32I-NEXT:    li s3, 127
1837; RV32I-NEXT:    blt s0, a0, .LBB30_4
1838; RV32I-NEXT:  # %bb.3: # %start
1839; RV32I-NEXT:    mv s3, s4
1840; RV32I-NEXT:  .LBB30_4: # %start
1841; RV32I-NEXT:    mv a0, s2
1842; RV32I-NEXT:    mv a1, s1
1843; RV32I-NEXT:    mv a2, s2
1844; RV32I-NEXT:    mv a3, s1
1845; RV32I-NEXT:    call __unorddf2@plt
1846; RV32I-NEXT:    bne a0, s0, .LBB30_6
1847; RV32I-NEXT:  # %bb.5: # %start
1848; RV32I-NEXT:    mv s0, s3
1849; RV32I-NEXT:  .LBB30_6: # %start
1850; RV32I-NEXT:    slli a0, s0, 24
1851; RV32I-NEXT:    srai a0, a0, 24
1852; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
1853; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
1854; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
1855; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
1856; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
1857; RV32I-NEXT:    lw s4, 8(sp) # 4-byte Folded Reload
1858; RV32I-NEXT:    addi sp, sp, 32
1859; RV32I-NEXT:    ret
1860;
1861; RV64I-LABEL: fcvt_w_s_sat_i8:
1862; RV64I:       # %bb.0: # %start
1863; RV64I-NEXT:    addi sp, sp, -48
1864; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
1865; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
1866; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
1867; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
1868; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
1869; RV64I-NEXT:    mv s0, a0
1870; RV64I-NEXT:    li a0, -509
1871; RV64I-NEXT:    slli a1, a0, 53
1872; RV64I-NEXT:    mv a0, s0
1873; RV64I-NEXT:    call __gedf2@plt
1874; RV64I-NEXT:    mv s1, a0
1875; RV64I-NEXT:    mv a0, s0
1876; RV64I-NEXT:    call __fixdfdi@plt
1877; RV64I-NEXT:    li s2, 0
1878; RV64I-NEXT:    li s3, -128
1879; RV64I-NEXT:    bltz s1, .LBB30_2
1880; RV64I-NEXT:  # %bb.1: # %start
1881; RV64I-NEXT:    mv s3, a0
1882; RV64I-NEXT:  .LBB30_2: # %start
1883; RV64I-NEXT:    lui a0, 65919
1884; RV64I-NEXT:    slli a1, a0, 34
1885; RV64I-NEXT:    mv a0, s0
1886; RV64I-NEXT:    call __gtdf2@plt
1887; RV64I-NEXT:    li s1, 127
1888; RV64I-NEXT:    blt s2, a0, .LBB30_4
1889; RV64I-NEXT:  # %bb.3: # %start
1890; RV64I-NEXT:    mv s1, s3
1891; RV64I-NEXT:  .LBB30_4: # %start
1892; RV64I-NEXT:    mv a0, s0
1893; RV64I-NEXT:    mv a1, s0
1894; RV64I-NEXT:    call __unorddf2@plt
1895; RV64I-NEXT:    bne a0, s2, .LBB30_6
1896; RV64I-NEXT:  # %bb.5: # %start
1897; RV64I-NEXT:    mv s2, s1
1898; RV64I-NEXT:  .LBB30_6: # %start
1899; RV64I-NEXT:    slli a0, s2, 56
1900; RV64I-NEXT:    srai a0, a0, 56
1901; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
1902; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
1903; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
1904; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
1905; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
1906; RV64I-NEXT:    addi sp, sp, 48
1907; RV64I-NEXT:    ret
1908start:
1909  %0 = tail call i8 @llvm.fptosi.sat.i8.f64(double %a)
1910  ret i8 %0
1911}
1912declare i8 @llvm.fptosi.sat.i8.f64(double)
1913
1914define zeroext i8 @fcvt_wu_s_i8(double %a) nounwind {
1915;
1916;
1917; RV32IFD-LABEL: fcvt_wu_s_i8:
1918; RV32IFD:       # %bb.0:
1919; RV32IFD-NEXT:    fcvt.wu.d a0, fa0, rtz
1920; RV32IFD-NEXT:    ret
1921;
1922; RV64IFD-LABEL: fcvt_wu_s_i8:
1923; RV64IFD:       # %bb.0:
1924; RV64IFD-NEXT:    fcvt.lu.d a0, fa0, rtz
1925; RV64IFD-NEXT:    ret
1926;
1927; RV32I-LABEL: fcvt_wu_s_i8:
1928; RV32I:       # %bb.0:
1929; RV32I-NEXT:    addi sp, sp, -16
1930; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1931; RV32I-NEXT:    call __fixunsdfsi@plt
1932; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1933; RV32I-NEXT:    addi sp, sp, 16
1934; RV32I-NEXT:    ret
1935;
1936; RV64I-LABEL: fcvt_wu_s_i8:
1937; RV64I:       # %bb.0:
1938; RV64I-NEXT:    addi sp, sp, -16
1939; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1940; RV64I-NEXT:    call __fixunsdfdi@plt
1941; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1942; RV64I-NEXT:    addi sp, sp, 16
1943; RV64I-NEXT:    ret
1944  %1 = fptoui double %a to i8
1945  ret i8 %1
1946}
1947
1948define zeroext i8 @fcvt_wu_s_sat_i8(double %a) nounwind {
1949;
1950;
1951; RV32IFD-LABEL: fcvt_wu_s_sat_i8:
1952; RV32IFD:       # %bb.0: # %start
1953; RV32IFD-NEXT:    lui a0, %hi(.LCPI32_0)
1954; RV32IFD-NEXT:    fld ft0, %lo(.LCPI32_0)(a0)
1955; RV32IFD-NEXT:    fcvt.d.w ft1, zero
1956; RV32IFD-NEXT:    fmax.d ft1, fa0, ft1
1957; RV32IFD-NEXT:    fmin.d ft0, ft1, ft0
1958; RV32IFD-NEXT:    fcvt.wu.d a0, ft0, rtz
1959; RV32IFD-NEXT:    ret
1960;
1961; RV64IFD-LABEL: fcvt_wu_s_sat_i8:
1962; RV64IFD:       # %bb.0: # %start
1963; RV64IFD-NEXT:    lui a0, %hi(.LCPI32_0)
1964; RV64IFD-NEXT:    fld ft0, %lo(.LCPI32_0)(a0)
1965; RV64IFD-NEXT:    fmv.d.x ft1, zero
1966; RV64IFD-NEXT:    fmax.d ft1, fa0, ft1
1967; RV64IFD-NEXT:    fmin.d ft0, ft1, ft0
1968; RV64IFD-NEXT:    fcvt.lu.d a0, ft0, rtz
1969; RV64IFD-NEXT:    ret
1970;
1971; RV32I-LABEL: fcvt_wu_s_sat_i8:
1972; RV32I:       # %bb.0: # %start
1973; RV32I-NEXT:    addi sp, sp, -32
1974; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
1975; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
1976; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
1977; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
1978; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
1979; RV32I-NEXT:    mv s1, a1
1980; RV32I-NEXT:    mv s2, a0
1981; RV32I-NEXT:    lui a3, 263934
1982; RV32I-NEXT:    li a2, 0
1983; RV32I-NEXT:    call __gtdf2@plt
1984; RV32I-NEXT:    mv s0, a0
1985; RV32I-NEXT:    mv a0, s2
1986; RV32I-NEXT:    mv a1, s1
1987; RV32I-NEXT:    li a2, 0
1988; RV32I-NEXT:    li a3, 0
1989; RV32I-NEXT:    call __gedf2@plt
1990; RV32I-NEXT:    mv s3, a0
1991; RV32I-NEXT:    mv a0, s2
1992; RV32I-NEXT:    mv a1, s1
1993; RV32I-NEXT:    call __fixunsdfsi@plt
1994; RV32I-NEXT:    li a1, 0
1995; RV32I-NEXT:    bltz s3, .LBB32_2
1996; RV32I-NEXT:  # %bb.1: # %start
1997; RV32I-NEXT:    mv a1, a0
1998; RV32I-NEXT:  .LBB32_2: # %start
1999; RV32I-NEXT:    li a0, 255
2000; RV32I-NEXT:    bgtz s0, .LBB32_4
2001; RV32I-NEXT:  # %bb.3: # %start
2002; RV32I-NEXT:    mv a0, a1
2003; RV32I-NEXT:  .LBB32_4: # %start
2004; RV32I-NEXT:    andi a0, a0, 255
2005; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
2006; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
2007; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
2008; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
2009; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
2010; RV32I-NEXT:    addi sp, sp, 32
2011; RV32I-NEXT:    ret
2012;
2013; RV64I-LABEL: fcvt_wu_s_sat_i8:
2014; RV64I:       # %bb.0: # %start
2015; RV64I-NEXT:    addi sp, sp, -32
2016; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
2017; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
2018; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
2019; RV64I-NEXT:    sd s2, 0(sp) # 8-byte Folded Spill
2020; RV64I-NEXT:    mv s0, a0
2021; RV64I-NEXT:    li a1, 0
2022; RV64I-NEXT:    call __gedf2@plt
2023; RV64I-NEXT:    mv s1, a0
2024; RV64I-NEXT:    mv a0, s0
2025; RV64I-NEXT:    call __fixunsdfdi@plt
2026; RV64I-NEXT:    li s2, 0
2027; RV64I-NEXT:    bltz s1, .LBB32_2
2028; RV64I-NEXT:  # %bb.1: # %start
2029; RV64I-NEXT:    mv s2, a0
2030; RV64I-NEXT:  .LBB32_2: # %start
2031; RV64I-NEXT:    lui a0, 131967
2032; RV64I-NEXT:    slli a1, a0, 33
2033; RV64I-NEXT:    mv a0, s0
2034; RV64I-NEXT:    call __gtdf2@plt
2035; RV64I-NEXT:    li a1, 255
2036; RV64I-NEXT:    bgtz a0, .LBB32_4
2037; RV64I-NEXT:  # %bb.3: # %start
2038; RV64I-NEXT:    mv a1, s2
2039; RV64I-NEXT:  .LBB32_4: # %start
2040; RV64I-NEXT:    andi a0, a1, 255
2041; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
2042; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
2043; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
2044; RV64I-NEXT:    ld s2, 0(sp) # 8-byte Folded Reload
2045; RV64I-NEXT:    addi sp, sp, 32
2046; RV64I-NEXT:    ret
2047start:
2048  %0 = tail call i8 @llvm.fptoui.sat.i8.f64(double %a)
2049  ret i8 %0
2050}
2051declare i8 @llvm.fptoui.sat.i8.f64(double)
2052