1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32I %s
4; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
5; RUN:   | FileCheck -check-prefix=RV32IA %s
6; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
7; RUN:   | FileCheck -check-prefix=RV64I %s
8; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
9; RUN:   | FileCheck -check-prefix=RV64IA %s
10
11define i8 @atomicrmw_xchg_i8_monotonic(i8* %a, i8 %b) {
12; RV32I-LABEL: atomicrmw_xchg_i8_monotonic:
13; RV32I:       # %bb.0:
14; RV32I-NEXT:    addi sp, sp, -16
15; RV32I-NEXT:    sw ra, 12(sp)
16; RV32I-NEXT:    mv a2, zero
17; RV32I-NEXT:    call __atomic_exchange_1
18; RV32I-NEXT:    lw ra, 12(sp)
19; RV32I-NEXT:    addi sp, sp, 16
20; RV32I-NEXT:    ret
21;
22; RV32IA-LABEL: atomicrmw_xchg_i8_monotonic:
23; RV32IA:       # %bb.0:
24; RV32IA-NEXT:    slli a2, a0, 3
25; RV32IA-NEXT:    andi a2, a2, 24
26; RV32IA-NEXT:    addi a3, zero, 255
27; RV32IA-NEXT:    sll a3, a3, a2
28; RV32IA-NEXT:    andi a1, a1, 255
29; RV32IA-NEXT:    sll a1, a1, a2
30; RV32IA-NEXT:    andi a0, a0, -4
31; RV32IA-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
32; RV32IA-NEXT:    lr.w a4, (a0)
33; RV32IA-NEXT:    add a5, zero, a1
34; RV32IA-NEXT:    xor a5, a4, a5
35; RV32IA-NEXT:    and a5, a5, a3
36; RV32IA-NEXT:    xor a5, a4, a5
37; RV32IA-NEXT:    sc.w a5, a5, (a0)
38; RV32IA-NEXT:    bnez a5, .LBB0_1
39; RV32IA-NEXT:  # %bb.2:
40; RV32IA-NEXT:    srl a0, a4, a2
41; RV32IA-NEXT:    ret
42;
43; RV64I-LABEL: atomicrmw_xchg_i8_monotonic:
44; RV64I:       # %bb.0:
45; RV64I-NEXT:    addi sp, sp, -16
46; RV64I-NEXT:    sd ra, 8(sp)
47; RV64I-NEXT:    mv a2, zero
48; RV64I-NEXT:    call __atomic_exchange_1
49; RV64I-NEXT:    ld ra, 8(sp)
50; RV64I-NEXT:    addi sp, sp, 16
51; RV64I-NEXT:    ret
52;
53; RV64IA-LABEL: atomicrmw_xchg_i8_monotonic:
54; RV64IA:       # %bb.0:
55; RV64IA-NEXT:    slli a2, a0, 3
56; RV64IA-NEXT:    andi a2, a2, 24
57; RV64IA-NEXT:    addi a3, zero, 255
58; RV64IA-NEXT:    sllw a3, a3, a2
59; RV64IA-NEXT:    andi a1, a1, 255
60; RV64IA-NEXT:    sllw a1, a1, a2
61; RV64IA-NEXT:    andi a0, a0, -4
62; RV64IA-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
63; RV64IA-NEXT:    lr.w a4, (a0)
64; RV64IA-NEXT:    add a5, zero, a1
65; RV64IA-NEXT:    xor a5, a4, a5
66; RV64IA-NEXT:    and a5, a5, a3
67; RV64IA-NEXT:    xor a5, a4, a5
68; RV64IA-NEXT:    sc.w a5, a5, (a0)
69; RV64IA-NEXT:    bnez a5, .LBB0_1
70; RV64IA-NEXT:  # %bb.2:
71; RV64IA-NEXT:    srlw a0, a4, a2
72; RV64IA-NEXT:    ret
73  %1 = atomicrmw xchg i8* %a, i8 %b monotonic
74  ret i8 %1
75}
76
77define i8 @atomicrmw_xchg_i8_acquire(i8* %a, i8 %b) {
78; RV32I-LABEL: atomicrmw_xchg_i8_acquire:
79; RV32I:       # %bb.0:
80; RV32I-NEXT:    addi sp, sp, -16
81; RV32I-NEXT:    sw ra, 12(sp)
82; RV32I-NEXT:    addi a2, zero, 2
83; RV32I-NEXT:    call __atomic_exchange_1
84; RV32I-NEXT:    lw ra, 12(sp)
85; RV32I-NEXT:    addi sp, sp, 16
86; RV32I-NEXT:    ret
87;
88; RV32IA-LABEL: atomicrmw_xchg_i8_acquire:
89; RV32IA:       # %bb.0:
90; RV32IA-NEXT:    slli a2, a0, 3
91; RV32IA-NEXT:    andi a2, a2, 24
92; RV32IA-NEXT:    addi a3, zero, 255
93; RV32IA-NEXT:    sll a3, a3, a2
94; RV32IA-NEXT:    andi a1, a1, 255
95; RV32IA-NEXT:    sll a1, a1, a2
96; RV32IA-NEXT:    andi a0, a0, -4
97; RV32IA-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
98; RV32IA-NEXT:    lr.w.aq a4, (a0)
99; RV32IA-NEXT:    add a5, zero, a1
100; RV32IA-NEXT:    xor a5, a4, a5
101; RV32IA-NEXT:    and a5, a5, a3
102; RV32IA-NEXT:    xor a5, a4, a5
103; RV32IA-NEXT:    sc.w a5, a5, (a0)
104; RV32IA-NEXT:    bnez a5, .LBB1_1
105; RV32IA-NEXT:  # %bb.2:
106; RV32IA-NEXT:    srl a0, a4, a2
107; RV32IA-NEXT:    ret
108;
109; RV64I-LABEL: atomicrmw_xchg_i8_acquire:
110; RV64I:       # %bb.0:
111; RV64I-NEXT:    addi sp, sp, -16
112; RV64I-NEXT:    sd ra, 8(sp)
113; RV64I-NEXT:    addi a2, zero, 2
114; RV64I-NEXT:    call __atomic_exchange_1
115; RV64I-NEXT:    ld ra, 8(sp)
116; RV64I-NEXT:    addi sp, sp, 16
117; RV64I-NEXT:    ret
118;
119; RV64IA-LABEL: atomicrmw_xchg_i8_acquire:
120; RV64IA:       # %bb.0:
121; RV64IA-NEXT:    slli a2, a0, 3
122; RV64IA-NEXT:    andi a2, a2, 24
123; RV64IA-NEXT:    addi a3, zero, 255
124; RV64IA-NEXT:    sllw a3, a3, a2
125; RV64IA-NEXT:    andi a1, a1, 255
126; RV64IA-NEXT:    sllw a1, a1, a2
127; RV64IA-NEXT:    andi a0, a0, -4
128; RV64IA-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
129; RV64IA-NEXT:    lr.w.aq a4, (a0)
130; RV64IA-NEXT:    add a5, zero, a1
131; RV64IA-NEXT:    xor a5, a4, a5
132; RV64IA-NEXT:    and a5, a5, a3
133; RV64IA-NEXT:    xor a5, a4, a5
134; RV64IA-NEXT:    sc.w a5, a5, (a0)
135; RV64IA-NEXT:    bnez a5, .LBB1_1
136; RV64IA-NEXT:  # %bb.2:
137; RV64IA-NEXT:    srlw a0, a4, a2
138; RV64IA-NEXT:    ret
139  %1 = atomicrmw xchg i8* %a, i8 %b acquire
140  ret i8 %1
141}
142
143define i8 @atomicrmw_xchg_i8_release(i8* %a, i8 %b) {
144; RV32I-LABEL: atomicrmw_xchg_i8_release:
145; RV32I:       # %bb.0:
146; RV32I-NEXT:    addi sp, sp, -16
147; RV32I-NEXT:    sw ra, 12(sp)
148; RV32I-NEXT:    addi a2, zero, 3
149; RV32I-NEXT:    call __atomic_exchange_1
150; RV32I-NEXT:    lw ra, 12(sp)
151; RV32I-NEXT:    addi sp, sp, 16
152; RV32I-NEXT:    ret
153;
154; RV32IA-LABEL: atomicrmw_xchg_i8_release:
155; RV32IA:       # %bb.0:
156; RV32IA-NEXT:    slli a2, a0, 3
157; RV32IA-NEXT:    andi a2, a2, 24
158; RV32IA-NEXT:    addi a3, zero, 255
159; RV32IA-NEXT:    sll a3, a3, a2
160; RV32IA-NEXT:    andi a1, a1, 255
161; RV32IA-NEXT:    sll a1, a1, a2
162; RV32IA-NEXT:    andi a0, a0, -4
163; RV32IA-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
164; RV32IA-NEXT:    lr.w a4, (a0)
165; RV32IA-NEXT:    add a5, zero, a1
166; RV32IA-NEXT:    xor a5, a4, a5
167; RV32IA-NEXT:    and a5, a5, a3
168; RV32IA-NEXT:    xor a5, a4, a5
169; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
170; RV32IA-NEXT:    bnez a5, .LBB2_1
171; RV32IA-NEXT:  # %bb.2:
172; RV32IA-NEXT:    srl a0, a4, a2
173; RV32IA-NEXT:    ret
174;
175; RV64I-LABEL: atomicrmw_xchg_i8_release:
176; RV64I:       # %bb.0:
177; RV64I-NEXT:    addi sp, sp, -16
178; RV64I-NEXT:    sd ra, 8(sp)
179; RV64I-NEXT:    addi a2, zero, 3
180; RV64I-NEXT:    call __atomic_exchange_1
181; RV64I-NEXT:    ld ra, 8(sp)
182; RV64I-NEXT:    addi sp, sp, 16
183; RV64I-NEXT:    ret
184;
185; RV64IA-LABEL: atomicrmw_xchg_i8_release:
186; RV64IA:       # %bb.0:
187; RV64IA-NEXT:    slli a2, a0, 3
188; RV64IA-NEXT:    andi a2, a2, 24
189; RV64IA-NEXT:    addi a3, zero, 255
190; RV64IA-NEXT:    sllw a3, a3, a2
191; RV64IA-NEXT:    andi a1, a1, 255
192; RV64IA-NEXT:    sllw a1, a1, a2
193; RV64IA-NEXT:    andi a0, a0, -4
194; RV64IA-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
195; RV64IA-NEXT:    lr.w a4, (a0)
196; RV64IA-NEXT:    add a5, zero, a1
197; RV64IA-NEXT:    xor a5, a4, a5
198; RV64IA-NEXT:    and a5, a5, a3
199; RV64IA-NEXT:    xor a5, a4, a5
200; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
201; RV64IA-NEXT:    bnez a5, .LBB2_1
202; RV64IA-NEXT:  # %bb.2:
203; RV64IA-NEXT:    srlw a0, a4, a2
204; RV64IA-NEXT:    ret
205  %1 = atomicrmw xchg i8* %a, i8 %b release
206  ret i8 %1
207}
208
209define i8 @atomicrmw_xchg_i8_acq_rel(i8* %a, i8 %b) {
210; RV32I-LABEL: atomicrmw_xchg_i8_acq_rel:
211; RV32I:       # %bb.0:
212; RV32I-NEXT:    addi sp, sp, -16
213; RV32I-NEXT:    sw ra, 12(sp)
214; RV32I-NEXT:    addi a2, zero, 4
215; RV32I-NEXT:    call __atomic_exchange_1
216; RV32I-NEXT:    lw ra, 12(sp)
217; RV32I-NEXT:    addi sp, sp, 16
218; RV32I-NEXT:    ret
219;
220; RV32IA-LABEL: atomicrmw_xchg_i8_acq_rel:
221; RV32IA:       # %bb.0:
222; RV32IA-NEXT:    slli a2, a0, 3
223; RV32IA-NEXT:    andi a2, a2, 24
224; RV32IA-NEXT:    addi a3, zero, 255
225; RV32IA-NEXT:    sll a3, a3, a2
226; RV32IA-NEXT:    andi a1, a1, 255
227; RV32IA-NEXT:    sll a1, a1, a2
228; RV32IA-NEXT:    andi a0, a0, -4
229; RV32IA-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
230; RV32IA-NEXT:    lr.w.aq a4, (a0)
231; RV32IA-NEXT:    add a5, zero, a1
232; RV32IA-NEXT:    xor a5, a4, a5
233; RV32IA-NEXT:    and a5, a5, a3
234; RV32IA-NEXT:    xor a5, a4, a5
235; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
236; RV32IA-NEXT:    bnez a5, .LBB3_1
237; RV32IA-NEXT:  # %bb.2:
238; RV32IA-NEXT:    srl a0, a4, a2
239; RV32IA-NEXT:    ret
240;
241; RV64I-LABEL: atomicrmw_xchg_i8_acq_rel:
242; RV64I:       # %bb.0:
243; RV64I-NEXT:    addi sp, sp, -16
244; RV64I-NEXT:    sd ra, 8(sp)
245; RV64I-NEXT:    addi a2, zero, 4
246; RV64I-NEXT:    call __atomic_exchange_1
247; RV64I-NEXT:    ld ra, 8(sp)
248; RV64I-NEXT:    addi sp, sp, 16
249; RV64I-NEXT:    ret
250;
251; RV64IA-LABEL: atomicrmw_xchg_i8_acq_rel:
252; RV64IA:       # %bb.0:
253; RV64IA-NEXT:    slli a2, a0, 3
254; RV64IA-NEXT:    andi a2, a2, 24
255; RV64IA-NEXT:    addi a3, zero, 255
256; RV64IA-NEXT:    sllw a3, a3, a2
257; RV64IA-NEXT:    andi a1, a1, 255
258; RV64IA-NEXT:    sllw a1, a1, a2
259; RV64IA-NEXT:    andi a0, a0, -4
260; RV64IA-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
261; RV64IA-NEXT:    lr.w.aq a4, (a0)
262; RV64IA-NEXT:    add a5, zero, a1
263; RV64IA-NEXT:    xor a5, a4, a5
264; RV64IA-NEXT:    and a5, a5, a3
265; RV64IA-NEXT:    xor a5, a4, a5
266; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
267; RV64IA-NEXT:    bnez a5, .LBB3_1
268; RV64IA-NEXT:  # %bb.2:
269; RV64IA-NEXT:    srlw a0, a4, a2
270; RV64IA-NEXT:    ret
271  %1 = atomicrmw xchg i8* %a, i8 %b acq_rel
272  ret i8 %1
273}
274
275define i8 @atomicrmw_xchg_i8_seq_cst(i8* %a, i8 %b) {
276; RV32I-LABEL: atomicrmw_xchg_i8_seq_cst:
277; RV32I:       # %bb.0:
278; RV32I-NEXT:    addi sp, sp, -16
279; RV32I-NEXT:    sw ra, 12(sp)
280; RV32I-NEXT:    addi a2, zero, 5
281; RV32I-NEXT:    call __atomic_exchange_1
282; RV32I-NEXT:    lw ra, 12(sp)
283; RV32I-NEXT:    addi sp, sp, 16
284; RV32I-NEXT:    ret
285;
286; RV32IA-LABEL: atomicrmw_xchg_i8_seq_cst:
287; RV32IA:       # %bb.0:
288; RV32IA-NEXT:    slli a2, a0, 3
289; RV32IA-NEXT:    andi a2, a2, 24
290; RV32IA-NEXT:    addi a3, zero, 255
291; RV32IA-NEXT:    sll a3, a3, a2
292; RV32IA-NEXT:    andi a1, a1, 255
293; RV32IA-NEXT:    sll a1, a1, a2
294; RV32IA-NEXT:    andi a0, a0, -4
295; RV32IA-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
296; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
297; RV32IA-NEXT:    add a5, zero, a1
298; RV32IA-NEXT:    xor a5, a4, a5
299; RV32IA-NEXT:    and a5, a5, a3
300; RV32IA-NEXT:    xor a5, a4, a5
301; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
302; RV32IA-NEXT:    bnez a5, .LBB4_1
303; RV32IA-NEXT:  # %bb.2:
304; RV32IA-NEXT:    srl a0, a4, a2
305; RV32IA-NEXT:    ret
306;
307; RV64I-LABEL: atomicrmw_xchg_i8_seq_cst:
308; RV64I:       # %bb.0:
309; RV64I-NEXT:    addi sp, sp, -16
310; RV64I-NEXT:    sd ra, 8(sp)
311; RV64I-NEXT:    addi a2, zero, 5
312; RV64I-NEXT:    call __atomic_exchange_1
313; RV64I-NEXT:    ld ra, 8(sp)
314; RV64I-NEXT:    addi sp, sp, 16
315; RV64I-NEXT:    ret
316;
317; RV64IA-LABEL: atomicrmw_xchg_i8_seq_cst:
318; RV64IA:       # %bb.0:
319; RV64IA-NEXT:    slli a2, a0, 3
320; RV64IA-NEXT:    andi a2, a2, 24
321; RV64IA-NEXT:    addi a3, zero, 255
322; RV64IA-NEXT:    sllw a3, a3, a2
323; RV64IA-NEXT:    andi a1, a1, 255
324; RV64IA-NEXT:    sllw a1, a1, a2
325; RV64IA-NEXT:    andi a0, a0, -4
326; RV64IA-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
327; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
328; RV64IA-NEXT:    add a5, zero, a1
329; RV64IA-NEXT:    xor a5, a4, a5
330; RV64IA-NEXT:    and a5, a5, a3
331; RV64IA-NEXT:    xor a5, a4, a5
332; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
333; RV64IA-NEXT:    bnez a5, .LBB4_1
334; RV64IA-NEXT:  # %bb.2:
335; RV64IA-NEXT:    srlw a0, a4, a2
336; RV64IA-NEXT:    ret
337  %1 = atomicrmw xchg i8* %a, i8 %b seq_cst
338  ret i8 %1
339}
340
341define i8 @atomicrmw_add_i8_monotonic(i8 *%a, i8 %b) nounwind {
342; RV32I-LABEL: atomicrmw_add_i8_monotonic:
343; RV32I:       # %bb.0:
344; RV32I-NEXT:    addi sp, sp, -16
345; RV32I-NEXT:    sw ra, 12(sp)
346; RV32I-NEXT:    mv a2, zero
347; RV32I-NEXT:    call __atomic_fetch_add_1
348; RV32I-NEXT:    lw ra, 12(sp)
349; RV32I-NEXT:    addi sp, sp, 16
350; RV32I-NEXT:    ret
351;
352; RV32IA-LABEL: atomicrmw_add_i8_monotonic:
353; RV32IA:       # %bb.0:
354; RV32IA-NEXT:    slli a2, a0, 3
355; RV32IA-NEXT:    andi a2, a2, 24
356; RV32IA-NEXT:    addi a3, zero, 255
357; RV32IA-NEXT:    sll a3, a3, a2
358; RV32IA-NEXT:    andi a1, a1, 255
359; RV32IA-NEXT:    sll a1, a1, a2
360; RV32IA-NEXT:    andi a0, a0, -4
361; RV32IA-NEXT:  .LBB5_1: # =>This Inner Loop Header: Depth=1
362; RV32IA-NEXT:    lr.w a4, (a0)
363; RV32IA-NEXT:    add a5, a4, a1
364; RV32IA-NEXT:    xor a5, a4, a5
365; RV32IA-NEXT:    and a5, a5, a3
366; RV32IA-NEXT:    xor a5, a4, a5
367; RV32IA-NEXT:    sc.w a5, a5, (a0)
368; RV32IA-NEXT:    bnez a5, .LBB5_1
369; RV32IA-NEXT:  # %bb.2:
370; RV32IA-NEXT:    srl a0, a4, a2
371; RV32IA-NEXT:    ret
372;
373; RV64I-LABEL: atomicrmw_add_i8_monotonic:
374; RV64I:       # %bb.0:
375; RV64I-NEXT:    addi sp, sp, -16
376; RV64I-NEXT:    sd ra, 8(sp)
377; RV64I-NEXT:    mv a2, zero
378; RV64I-NEXT:    call __atomic_fetch_add_1
379; RV64I-NEXT:    ld ra, 8(sp)
380; RV64I-NEXT:    addi sp, sp, 16
381; RV64I-NEXT:    ret
382;
383; RV64IA-LABEL: atomicrmw_add_i8_monotonic:
384; RV64IA:       # %bb.0:
385; RV64IA-NEXT:    slli a2, a0, 3
386; RV64IA-NEXT:    andi a2, a2, 24
387; RV64IA-NEXT:    addi a3, zero, 255
388; RV64IA-NEXT:    sllw a3, a3, a2
389; RV64IA-NEXT:    andi a1, a1, 255
390; RV64IA-NEXT:    sllw a1, a1, a2
391; RV64IA-NEXT:    andi a0, a0, -4
392; RV64IA-NEXT:  .LBB5_1: # =>This Inner Loop Header: Depth=1
393; RV64IA-NEXT:    lr.w a4, (a0)
394; RV64IA-NEXT:    add a5, a4, a1
395; RV64IA-NEXT:    xor a5, a4, a5
396; RV64IA-NEXT:    and a5, a5, a3
397; RV64IA-NEXT:    xor a5, a4, a5
398; RV64IA-NEXT:    sc.w a5, a5, (a0)
399; RV64IA-NEXT:    bnez a5, .LBB5_1
400; RV64IA-NEXT:  # %bb.2:
401; RV64IA-NEXT:    srlw a0, a4, a2
402; RV64IA-NEXT:    ret
403  %1 = atomicrmw add i8* %a, i8 %b monotonic
404  ret i8 %1
405}
406
407define i8 @atomicrmw_add_i8_acquire(i8 *%a, i8 %b) nounwind {
408; RV32I-LABEL: atomicrmw_add_i8_acquire:
409; RV32I:       # %bb.0:
410; RV32I-NEXT:    addi sp, sp, -16
411; RV32I-NEXT:    sw ra, 12(sp)
412; RV32I-NEXT:    addi a2, zero, 2
413; RV32I-NEXT:    call __atomic_fetch_add_1
414; RV32I-NEXT:    lw ra, 12(sp)
415; RV32I-NEXT:    addi sp, sp, 16
416; RV32I-NEXT:    ret
417;
418; RV32IA-LABEL: atomicrmw_add_i8_acquire:
419; RV32IA:       # %bb.0:
420; RV32IA-NEXT:    slli a2, a0, 3
421; RV32IA-NEXT:    andi a2, a2, 24
422; RV32IA-NEXT:    addi a3, zero, 255
423; RV32IA-NEXT:    sll a3, a3, a2
424; RV32IA-NEXT:    andi a1, a1, 255
425; RV32IA-NEXT:    sll a1, a1, a2
426; RV32IA-NEXT:    andi a0, a0, -4
427; RV32IA-NEXT:  .LBB6_1: # =>This Inner Loop Header: Depth=1
428; RV32IA-NEXT:    lr.w.aq a4, (a0)
429; RV32IA-NEXT:    add a5, a4, a1
430; RV32IA-NEXT:    xor a5, a4, a5
431; RV32IA-NEXT:    and a5, a5, a3
432; RV32IA-NEXT:    xor a5, a4, a5
433; RV32IA-NEXT:    sc.w a5, a5, (a0)
434; RV32IA-NEXT:    bnez a5, .LBB6_1
435; RV32IA-NEXT:  # %bb.2:
436; RV32IA-NEXT:    srl a0, a4, a2
437; RV32IA-NEXT:    ret
438;
439; RV64I-LABEL: atomicrmw_add_i8_acquire:
440; RV64I:       # %bb.0:
441; RV64I-NEXT:    addi sp, sp, -16
442; RV64I-NEXT:    sd ra, 8(sp)
443; RV64I-NEXT:    addi a2, zero, 2
444; RV64I-NEXT:    call __atomic_fetch_add_1
445; RV64I-NEXT:    ld ra, 8(sp)
446; RV64I-NEXT:    addi sp, sp, 16
447; RV64I-NEXT:    ret
448;
449; RV64IA-LABEL: atomicrmw_add_i8_acquire:
450; RV64IA:       # %bb.0:
451; RV64IA-NEXT:    slli a2, a0, 3
452; RV64IA-NEXT:    andi a2, a2, 24
453; RV64IA-NEXT:    addi a3, zero, 255
454; RV64IA-NEXT:    sllw a3, a3, a2
455; RV64IA-NEXT:    andi a1, a1, 255
456; RV64IA-NEXT:    sllw a1, a1, a2
457; RV64IA-NEXT:    andi a0, a0, -4
458; RV64IA-NEXT:  .LBB6_1: # =>This Inner Loop Header: Depth=1
459; RV64IA-NEXT:    lr.w.aq a4, (a0)
460; RV64IA-NEXT:    add a5, a4, a1
461; RV64IA-NEXT:    xor a5, a4, a5
462; RV64IA-NEXT:    and a5, a5, a3
463; RV64IA-NEXT:    xor a5, a4, a5
464; RV64IA-NEXT:    sc.w a5, a5, (a0)
465; RV64IA-NEXT:    bnez a5, .LBB6_1
466; RV64IA-NEXT:  # %bb.2:
467; RV64IA-NEXT:    srlw a0, a4, a2
468; RV64IA-NEXT:    ret
469  %1 = atomicrmw add i8* %a, i8 %b acquire
470  ret i8 %1
471}
472
473define i8 @atomicrmw_add_i8_release(i8 *%a, i8 %b) nounwind {
474; RV32I-LABEL: atomicrmw_add_i8_release:
475; RV32I:       # %bb.0:
476; RV32I-NEXT:    addi sp, sp, -16
477; RV32I-NEXT:    sw ra, 12(sp)
478; RV32I-NEXT:    addi a2, zero, 3
479; RV32I-NEXT:    call __atomic_fetch_add_1
480; RV32I-NEXT:    lw ra, 12(sp)
481; RV32I-NEXT:    addi sp, sp, 16
482; RV32I-NEXT:    ret
483;
484; RV32IA-LABEL: atomicrmw_add_i8_release:
485; RV32IA:       # %bb.0:
486; RV32IA-NEXT:    slli a2, a0, 3
487; RV32IA-NEXT:    andi a2, a2, 24
488; RV32IA-NEXT:    addi a3, zero, 255
489; RV32IA-NEXT:    sll a3, a3, a2
490; RV32IA-NEXT:    andi a1, a1, 255
491; RV32IA-NEXT:    sll a1, a1, a2
492; RV32IA-NEXT:    andi a0, a0, -4
493; RV32IA-NEXT:  .LBB7_1: # =>This Inner Loop Header: Depth=1
494; RV32IA-NEXT:    lr.w a4, (a0)
495; RV32IA-NEXT:    add a5, a4, a1
496; RV32IA-NEXT:    xor a5, a4, a5
497; RV32IA-NEXT:    and a5, a5, a3
498; RV32IA-NEXT:    xor a5, a4, a5
499; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
500; RV32IA-NEXT:    bnez a5, .LBB7_1
501; RV32IA-NEXT:  # %bb.2:
502; RV32IA-NEXT:    srl a0, a4, a2
503; RV32IA-NEXT:    ret
504;
505; RV64I-LABEL: atomicrmw_add_i8_release:
506; RV64I:       # %bb.0:
507; RV64I-NEXT:    addi sp, sp, -16
508; RV64I-NEXT:    sd ra, 8(sp)
509; RV64I-NEXT:    addi a2, zero, 3
510; RV64I-NEXT:    call __atomic_fetch_add_1
511; RV64I-NEXT:    ld ra, 8(sp)
512; RV64I-NEXT:    addi sp, sp, 16
513; RV64I-NEXT:    ret
514;
515; RV64IA-LABEL: atomicrmw_add_i8_release:
516; RV64IA:       # %bb.0:
517; RV64IA-NEXT:    slli a2, a0, 3
518; RV64IA-NEXT:    andi a2, a2, 24
519; RV64IA-NEXT:    addi a3, zero, 255
520; RV64IA-NEXT:    sllw a3, a3, a2
521; RV64IA-NEXT:    andi a1, a1, 255
522; RV64IA-NEXT:    sllw a1, a1, a2
523; RV64IA-NEXT:    andi a0, a0, -4
524; RV64IA-NEXT:  .LBB7_1: # =>This Inner Loop Header: Depth=1
525; RV64IA-NEXT:    lr.w a4, (a0)
526; RV64IA-NEXT:    add a5, a4, a1
527; RV64IA-NEXT:    xor a5, a4, a5
528; RV64IA-NEXT:    and a5, a5, a3
529; RV64IA-NEXT:    xor a5, a4, a5
530; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
531; RV64IA-NEXT:    bnez a5, .LBB7_1
532; RV64IA-NEXT:  # %bb.2:
533; RV64IA-NEXT:    srlw a0, a4, a2
534; RV64IA-NEXT:    ret
535  %1 = atomicrmw add i8* %a, i8 %b release
536  ret i8 %1
537}
538
539define i8 @atomicrmw_add_i8_acq_rel(i8 *%a, i8 %b) nounwind {
540; RV32I-LABEL: atomicrmw_add_i8_acq_rel:
541; RV32I:       # %bb.0:
542; RV32I-NEXT:    addi sp, sp, -16
543; RV32I-NEXT:    sw ra, 12(sp)
544; RV32I-NEXT:    addi a2, zero, 4
545; RV32I-NEXT:    call __atomic_fetch_add_1
546; RV32I-NEXT:    lw ra, 12(sp)
547; RV32I-NEXT:    addi sp, sp, 16
548; RV32I-NEXT:    ret
549;
550; RV32IA-LABEL: atomicrmw_add_i8_acq_rel:
551; RV32IA:       # %bb.0:
552; RV32IA-NEXT:    slli a2, a0, 3
553; RV32IA-NEXT:    andi a2, a2, 24
554; RV32IA-NEXT:    addi a3, zero, 255
555; RV32IA-NEXT:    sll a3, a3, a2
556; RV32IA-NEXT:    andi a1, a1, 255
557; RV32IA-NEXT:    sll a1, a1, a2
558; RV32IA-NEXT:    andi a0, a0, -4
559; RV32IA-NEXT:  .LBB8_1: # =>This Inner Loop Header: Depth=1
560; RV32IA-NEXT:    lr.w.aq a4, (a0)
561; RV32IA-NEXT:    add a5, a4, a1
562; RV32IA-NEXT:    xor a5, a4, a5
563; RV32IA-NEXT:    and a5, a5, a3
564; RV32IA-NEXT:    xor a5, a4, a5
565; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
566; RV32IA-NEXT:    bnez a5, .LBB8_1
567; RV32IA-NEXT:  # %bb.2:
568; RV32IA-NEXT:    srl a0, a4, a2
569; RV32IA-NEXT:    ret
570;
571; RV64I-LABEL: atomicrmw_add_i8_acq_rel:
572; RV64I:       # %bb.0:
573; RV64I-NEXT:    addi sp, sp, -16
574; RV64I-NEXT:    sd ra, 8(sp)
575; RV64I-NEXT:    addi a2, zero, 4
576; RV64I-NEXT:    call __atomic_fetch_add_1
577; RV64I-NEXT:    ld ra, 8(sp)
578; RV64I-NEXT:    addi sp, sp, 16
579; RV64I-NEXT:    ret
580;
581; RV64IA-LABEL: atomicrmw_add_i8_acq_rel:
582; RV64IA:       # %bb.0:
583; RV64IA-NEXT:    slli a2, a0, 3
584; RV64IA-NEXT:    andi a2, a2, 24
585; RV64IA-NEXT:    addi a3, zero, 255
586; RV64IA-NEXT:    sllw a3, a3, a2
587; RV64IA-NEXT:    andi a1, a1, 255
588; RV64IA-NEXT:    sllw a1, a1, a2
589; RV64IA-NEXT:    andi a0, a0, -4
590; RV64IA-NEXT:  .LBB8_1: # =>This Inner Loop Header: Depth=1
591; RV64IA-NEXT:    lr.w.aq a4, (a0)
592; RV64IA-NEXT:    add a5, a4, a1
593; RV64IA-NEXT:    xor a5, a4, a5
594; RV64IA-NEXT:    and a5, a5, a3
595; RV64IA-NEXT:    xor a5, a4, a5
596; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
597; RV64IA-NEXT:    bnez a5, .LBB8_1
598; RV64IA-NEXT:  # %bb.2:
599; RV64IA-NEXT:    srlw a0, a4, a2
600; RV64IA-NEXT:    ret
601  %1 = atomicrmw add i8* %a, i8 %b acq_rel
602  ret i8 %1
603}
604
605define i8 @atomicrmw_add_i8_seq_cst(i8 *%a, i8 %b) nounwind {
606; RV32I-LABEL: atomicrmw_add_i8_seq_cst:
607; RV32I:       # %bb.0:
608; RV32I-NEXT:    addi sp, sp, -16
609; RV32I-NEXT:    sw ra, 12(sp)
610; RV32I-NEXT:    addi a2, zero, 5
611; RV32I-NEXT:    call __atomic_fetch_add_1
612; RV32I-NEXT:    lw ra, 12(sp)
613; RV32I-NEXT:    addi sp, sp, 16
614; RV32I-NEXT:    ret
615;
616; RV32IA-LABEL: atomicrmw_add_i8_seq_cst:
617; RV32IA:       # %bb.0:
618; RV32IA-NEXT:    slli a2, a0, 3
619; RV32IA-NEXT:    andi a2, a2, 24
620; RV32IA-NEXT:    addi a3, zero, 255
621; RV32IA-NEXT:    sll a3, a3, a2
622; RV32IA-NEXT:    andi a1, a1, 255
623; RV32IA-NEXT:    sll a1, a1, a2
624; RV32IA-NEXT:    andi a0, a0, -4
625; RV32IA-NEXT:  .LBB9_1: # =>This Inner Loop Header: Depth=1
626; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
627; RV32IA-NEXT:    add a5, a4, a1
628; RV32IA-NEXT:    xor a5, a4, a5
629; RV32IA-NEXT:    and a5, a5, a3
630; RV32IA-NEXT:    xor a5, a4, a5
631; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
632; RV32IA-NEXT:    bnez a5, .LBB9_1
633; RV32IA-NEXT:  # %bb.2:
634; RV32IA-NEXT:    srl a0, a4, a2
635; RV32IA-NEXT:    ret
636;
637; RV64I-LABEL: atomicrmw_add_i8_seq_cst:
638; RV64I:       # %bb.0:
639; RV64I-NEXT:    addi sp, sp, -16
640; RV64I-NEXT:    sd ra, 8(sp)
641; RV64I-NEXT:    addi a2, zero, 5
642; RV64I-NEXT:    call __atomic_fetch_add_1
643; RV64I-NEXT:    ld ra, 8(sp)
644; RV64I-NEXT:    addi sp, sp, 16
645; RV64I-NEXT:    ret
646;
647; RV64IA-LABEL: atomicrmw_add_i8_seq_cst:
648; RV64IA:       # %bb.0:
649; RV64IA-NEXT:    slli a2, a0, 3
650; RV64IA-NEXT:    andi a2, a2, 24
651; RV64IA-NEXT:    addi a3, zero, 255
652; RV64IA-NEXT:    sllw a3, a3, a2
653; RV64IA-NEXT:    andi a1, a1, 255
654; RV64IA-NEXT:    sllw a1, a1, a2
655; RV64IA-NEXT:    andi a0, a0, -4
656; RV64IA-NEXT:  .LBB9_1: # =>This Inner Loop Header: Depth=1
657; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
658; RV64IA-NEXT:    add a5, a4, a1
659; RV64IA-NEXT:    xor a5, a4, a5
660; RV64IA-NEXT:    and a5, a5, a3
661; RV64IA-NEXT:    xor a5, a4, a5
662; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
663; RV64IA-NEXT:    bnez a5, .LBB9_1
664; RV64IA-NEXT:  # %bb.2:
665; RV64IA-NEXT:    srlw a0, a4, a2
666; RV64IA-NEXT:    ret
667  %1 = atomicrmw add i8* %a, i8 %b seq_cst
668  ret i8 %1
669}
670
671define i8 @atomicrmw_sub_i8_monotonic(i8* %a, i8 %b) {
672; RV32I-LABEL: atomicrmw_sub_i8_monotonic:
673; RV32I:       # %bb.0:
674; RV32I-NEXT:    addi sp, sp, -16
675; RV32I-NEXT:    sw ra, 12(sp)
676; RV32I-NEXT:    mv a2, zero
677; RV32I-NEXT:    call __atomic_fetch_sub_1
678; RV32I-NEXT:    lw ra, 12(sp)
679; RV32I-NEXT:    addi sp, sp, 16
680; RV32I-NEXT:    ret
681;
682; RV32IA-LABEL: atomicrmw_sub_i8_monotonic:
683; RV32IA:       # %bb.0:
684; RV32IA-NEXT:    slli a2, a0, 3
685; RV32IA-NEXT:    andi a2, a2, 24
686; RV32IA-NEXT:    addi a3, zero, 255
687; RV32IA-NEXT:    sll a3, a3, a2
688; RV32IA-NEXT:    andi a1, a1, 255
689; RV32IA-NEXT:    sll a1, a1, a2
690; RV32IA-NEXT:    andi a0, a0, -4
691; RV32IA-NEXT:  .LBB10_1: # =>This Inner Loop Header: Depth=1
692; RV32IA-NEXT:    lr.w a4, (a0)
693; RV32IA-NEXT:    sub a5, a4, a1
694; RV32IA-NEXT:    xor a5, a4, a5
695; RV32IA-NEXT:    and a5, a5, a3
696; RV32IA-NEXT:    xor a5, a4, a5
697; RV32IA-NEXT:    sc.w a5, a5, (a0)
698; RV32IA-NEXT:    bnez a5, .LBB10_1
699; RV32IA-NEXT:  # %bb.2:
700; RV32IA-NEXT:    srl a0, a4, a2
701; RV32IA-NEXT:    ret
702;
703; RV64I-LABEL: atomicrmw_sub_i8_monotonic:
704; RV64I:       # %bb.0:
705; RV64I-NEXT:    addi sp, sp, -16
706; RV64I-NEXT:    sd ra, 8(sp)
707; RV64I-NEXT:    mv a2, zero
708; RV64I-NEXT:    call __atomic_fetch_sub_1
709; RV64I-NEXT:    ld ra, 8(sp)
710; RV64I-NEXT:    addi sp, sp, 16
711; RV64I-NEXT:    ret
712;
713; RV64IA-LABEL: atomicrmw_sub_i8_monotonic:
714; RV64IA:       # %bb.0:
715; RV64IA-NEXT:    slli a2, a0, 3
716; RV64IA-NEXT:    andi a2, a2, 24
717; RV64IA-NEXT:    addi a3, zero, 255
718; RV64IA-NEXT:    sllw a3, a3, a2
719; RV64IA-NEXT:    andi a1, a1, 255
720; RV64IA-NEXT:    sllw a1, a1, a2
721; RV64IA-NEXT:    andi a0, a0, -4
722; RV64IA-NEXT:  .LBB10_1: # =>This Inner Loop Header: Depth=1
723; RV64IA-NEXT:    lr.w a4, (a0)
724; RV64IA-NEXT:    sub a5, a4, a1
725; RV64IA-NEXT:    xor a5, a4, a5
726; RV64IA-NEXT:    and a5, a5, a3
727; RV64IA-NEXT:    xor a5, a4, a5
728; RV64IA-NEXT:    sc.w a5, a5, (a0)
729; RV64IA-NEXT:    bnez a5, .LBB10_1
730; RV64IA-NEXT:  # %bb.2:
731; RV64IA-NEXT:    srlw a0, a4, a2
732; RV64IA-NEXT:    ret
733  %1 = atomicrmw sub i8* %a, i8 %b monotonic
734  ret i8 %1
735}
736
737define i8 @atomicrmw_sub_i8_acquire(i8* %a, i8 %b) {
738; RV32I-LABEL: atomicrmw_sub_i8_acquire:
739; RV32I:       # %bb.0:
740; RV32I-NEXT:    addi sp, sp, -16
741; RV32I-NEXT:    sw ra, 12(sp)
742; RV32I-NEXT:    addi a2, zero, 2
743; RV32I-NEXT:    call __atomic_fetch_sub_1
744; RV32I-NEXT:    lw ra, 12(sp)
745; RV32I-NEXT:    addi sp, sp, 16
746; RV32I-NEXT:    ret
747;
748; RV32IA-LABEL: atomicrmw_sub_i8_acquire:
749; RV32IA:       # %bb.0:
750; RV32IA-NEXT:    slli a2, a0, 3
751; RV32IA-NEXT:    andi a2, a2, 24
752; RV32IA-NEXT:    addi a3, zero, 255
753; RV32IA-NEXT:    sll a3, a3, a2
754; RV32IA-NEXT:    andi a1, a1, 255
755; RV32IA-NEXT:    sll a1, a1, a2
756; RV32IA-NEXT:    andi a0, a0, -4
757; RV32IA-NEXT:  .LBB11_1: # =>This Inner Loop Header: Depth=1
758; RV32IA-NEXT:    lr.w.aq a4, (a0)
759; RV32IA-NEXT:    sub a5, a4, a1
760; RV32IA-NEXT:    xor a5, a4, a5
761; RV32IA-NEXT:    and a5, a5, a3
762; RV32IA-NEXT:    xor a5, a4, a5
763; RV32IA-NEXT:    sc.w a5, a5, (a0)
764; RV32IA-NEXT:    bnez a5, .LBB11_1
765; RV32IA-NEXT:  # %bb.2:
766; RV32IA-NEXT:    srl a0, a4, a2
767; RV32IA-NEXT:    ret
768;
769; RV64I-LABEL: atomicrmw_sub_i8_acquire:
770; RV64I:       # %bb.0:
771; RV64I-NEXT:    addi sp, sp, -16
772; RV64I-NEXT:    sd ra, 8(sp)
773; RV64I-NEXT:    addi a2, zero, 2
774; RV64I-NEXT:    call __atomic_fetch_sub_1
775; RV64I-NEXT:    ld ra, 8(sp)
776; RV64I-NEXT:    addi sp, sp, 16
777; RV64I-NEXT:    ret
778;
779; RV64IA-LABEL: atomicrmw_sub_i8_acquire:
780; RV64IA:       # %bb.0:
781; RV64IA-NEXT:    slli a2, a0, 3
782; RV64IA-NEXT:    andi a2, a2, 24
783; RV64IA-NEXT:    addi a3, zero, 255
784; RV64IA-NEXT:    sllw a3, a3, a2
785; RV64IA-NEXT:    andi a1, a1, 255
786; RV64IA-NEXT:    sllw a1, a1, a2
787; RV64IA-NEXT:    andi a0, a0, -4
788; RV64IA-NEXT:  .LBB11_1: # =>This Inner Loop Header: Depth=1
789; RV64IA-NEXT:    lr.w.aq a4, (a0)
790; RV64IA-NEXT:    sub a5, a4, a1
791; RV64IA-NEXT:    xor a5, a4, a5
792; RV64IA-NEXT:    and a5, a5, a3
793; RV64IA-NEXT:    xor a5, a4, a5
794; RV64IA-NEXT:    sc.w a5, a5, (a0)
795; RV64IA-NEXT:    bnez a5, .LBB11_1
796; RV64IA-NEXT:  # %bb.2:
797; RV64IA-NEXT:    srlw a0, a4, a2
798; RV64IA-NEXT:    ret
799  %1 = atomicrmw sub i8* %a, i8 %b acquire
800  ret i8 %1
801}
802
803define i8 @atomicrmw_sub_i8_release(i8* %a, i8 %b) {
804; RV32I-LABEL: atomicrmw_sub_i8_release:
805; RV32I:       # %bb.0:
806; RV32I-NEXT:    addi sp, sp, -16
807; RV32I-NEXT:    sw ra, 12(sp)
808; RV32I-NEXT:    addi a2, zero, 3
809; RV32I-NEXT:    call __atomic_fetch_sub_1
810; RV32I-NEXT:    lw ra, 12(sp)
811; RV32I-NEXT:    addi sp, sp, 16
812; RV32I-NEXT:    ret
813;
814; RV32IA-LABEL: atomicrmw_sub_i8_release:
815; RV32IA:       # %bb.0:
816; RV32IA-NEXT:    slli a2, a0, 3
817; RV32IA-NEXT:    andi a2, a2, 24
818; RV32IA-NEXT:    addi a3, zero, 255
819; RV32IA-NEXT:    sll a3, a3, a2
820; RV32IA-NEXT:    andi a1, a1, 255
821; RV32IA-NEXT:    sll a1, a1, a2
822; RV32IA-NEXT:    andi a0, a0, -4
823; RV32IA-NEXT:  .LBB12_1: # =>This Inner Loop Header: Depth=1
824; RV32IA-NEXT:    lr.w a4, (a0)
825; RV32IA-NEXT:    sub a5, a4, a1
826; RV32IA-NEXT:    xor a5, a4, a5
827; RV32IA-NEXT:    and a5, a5, a3
828; RV32IA-NEXT:    xor a5, a4, a5
829; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
830; RV32IA-NEXT:    bnez a5, .LBB12_1
831; RV32IA-NEXT:  # %bb.2:
832; RV32IA-NEXT:    srl a0, a4, a2
833; RV32IA-NEXT:    ret
834;
835; RV64I-LABEL: atomicrmw_sub_i8_release:
836; RV64I:       # %bb.0:
837; RV64I-NEXT:    addi sp, sp, -16
838; RV64I-NEXT:    sd ra, 8(sp)
839; RV64I-NEXT:    addi a2, zero, 3
840; RV64I-NEXT:    call __atomic_fetch_sub_1
841; RV64I-NEXT:    ld ra, 8(sp)
842; RV64I-NEXT:    addi sp, sp, 16
843; RV64I-NEXT:    ret
844;
845; RV64IA-LABEL: atomicrmw_sub_i8_release:
846; RV64IA:       # %bb.0:
847; RV64IA-NEXT:    slli a2, a0, 3
848; RV64IA-NEXT:    andi a2, a2, 24
849; RV64IA-NEXT:    addi a3, zero, 255
850; RV64IA-NEXT:    sllw a3, a3, a2
851; RV64IA-NEXT:    andi a1, a1, 255
852; RV64IA-NEXT:    sllw a1, a1, a2
853; RV64IA-NEXT:    andi a0, a0, -4
854; RV64IA-NEXT:  .LBB12_1: # =>This Inner Loop Header: Depth=1
855; RV64IA-NEXT:    lr.w a4, (a0)
856; RV64IA-NEXT:    sub a5, a4, a1
857; RV64IA-NEXT:    xor a5, a4, a5
858; RV64IA-NEXT:    and a5, a5, a3
859; RV64IA-NEXT:    xor a5, a4, a5
860; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
861; RV64IA-NEXT:    bnez a5, .LBB12_1
862; RV64IA-NEXT:  # %bb.2:
863; RV64IA-NEXT:    srlw a0, a4, a2
864; RV64IA-NEXT:    ret
865  %1 = atomicrmw sub i8* %a, i8 %b release
866  ret i8 %1
867}
868
869define i8 @atomicrmw_sub_i8_acq_rel(i8* %a, i8 %b) {
870; RV32I-LABEL: atomicrmw_sub_i8_acq_rel:
871; RV32I:       # %bb.0:
872; RV32I-NEXT:    addi sp, sp, -16
873; RV32I-NEXT:    sw ra, 12(sp)
874; RV32I-NEXT:    addi a2, zero, 4
875; RV32I-NEXT:    call __atomic_fetch_sub_1
876; RV32I-NEXT:    lw ra, 12(sp)
877; RV32I-NEXT:    addi sp, sp, 16
878; RV32I-NEXT:    ret
879;
880; RV32IA-LABEL: atomicrmw_sub_i8_acq_rel:
881; RV32IA:       # %bb.0:
882; RV32IA-NEXT:    slli a2, a0, 3
883; RV32IA-NEXT:    andi a2, a2, 24
884; RV32IA-NEXT:    addi a3, zero, 255
885; RV32IA-NEXT:    sll a3, a3, a2
886; RV32IA-NEXT:    andi a1, a1, 255
887; RV32IA-NEXT:    sll a1, a1, a2
888; RV32IA-NEXT:    andi a0, a0, -4
889; RV32IA-NEXT:  .LBB13_1: # =>This Inner Loop Header: Depth=1
890; RV32IA-NEXT:    lr.w.aq a4, (a0)
891; RV32IA-NEXT:    sub a5, a4, a1
892; RV32IA-NEXT:    xor a5, a4, a5
893; RV32IA-NEXT:    and a5, a5, a3
894; RV32IA-NEXT:    xor a5, a4, a5
895; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
896; RV32IA-NEXT:    bnez a5, .LBB13_1
897; RV32IA-NEXT:  # %bb.2:
898; RV32IA-NEXT:    srl a0, a4, a2
899; RV32IA-NEXT:    ret
900;
901; RV64I-LABEL: atomicrmw_sub_i8_acq_rel:
902; RV64I:       # %bb.0:
903; RV64I-NEXT:    addi sp, sp, -16
904; RV64I-NEXT:    sd ra, 8(sp)
905; RV64I-NEXT:    addi a2, zero, 4
906; RV64I-NEXT:    call __atomic_fetch_sub_1
907; RV64I-NEXT:    ld ra, 8(sp)
908; RV64I-NEXT:    addi sp, sp, 16
909; RV64I-NEXT:    ret
910;
911; RV64IA-LABEL: atomicrmw_sub_i8_acq_rel:
912; RV64IA:       # %bb.0:
913; RV64IA-NEXT:    slli a2, a0, 3
914; RV64IA-NEXT:    andi a2, a2, 24
915; RV64IA-NEXT:    addi a3, zero, 255
916; RV64IA-NEXT:    sllw a3, a3, a2
917; RV64IA-NEXT:    andi a1, a1, 255
918; RV64IA-NEXT:    sllw a1, a1, a2
919; RV64IA-NEXT:    andi a0, a0, -4
920; RV64IA-NEXT:  .LBB13_1: # =>This Inner Loop Header: Depth=1
921; RV64IA-NEXT:    lr.w.aq a4, (a0)
922; RV64IA-NEXT:    sub a5, a4, a1
923; RV64IA-NEXT:    xor a5, a4, a5
924; RV64IA-NEXT:    and a5, a5, a3
925; RV64IA-NEXT:    xor a5, a4, a5
926; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
927; RV64IA-NEXT:    bnez a5, .LBB13_1
928; RV64IA-NEXT:  # %bb.2:
929; RV64IA-NEXT:    srlw a0, a4, a2
930; RV64IA-NEXT:    ret
931  %1 = atomicrmw sub i8* %a, i8 %b acq_rel
932  ret i8 %1
933}
934
935define i8 @atomicrmw_sub_i8_seq_cst(i8* %a, i8 %b) {
936; RV32I-LABEL: atomicrmw_sub_i8_seq_cst:
937; RV32I:       # %bb.0:
938; RV32I-NEXT:    addi sp, sp, -16
939; RV32I-NEXT:    sw ra, 12(sp)
940; RV32I-NEXT:    addi a2, zero, 5
941; RV32I-NEXT:    call __atomic_fetch_sub_1
942; RV32I-NEXT:    lw ra, 12(sp)
943; RV32I-NEXT:    addi sp, sp, 16
944; RV32I-NEXT:    ret
945;
946; RV32IA-LABEL: atomicrmw_sub_i8_seq_cst:
947; RV32IA:       # %bb.0:
948; RV32IA-NEXT:    slli a2, a0, 3
949; RV32IA-NEXT:    andi a2, a2, 24
950; RV32IA-NEXT:    addi a3, zero, 255
951; RV32IA-NEXT:    sll a3, a3, a2
952; RV32IA-NEXT:    andi a1, a1, 255
953; RV32IA-NEXT:    sll a1, a1, a2
954; RV32IA-NEXT:    andi a0, a0, -4
955; RV32IA-NEXT:  .LBB14_1: # =>This Inner Loop Header: Depth=1
956; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
957; RV32IA-NEXT:    sub a5, a4, a1
958; RV32IA-NEXT:    xor a5, a4, a5
959; RV32IA-NEXT:    and a5, a5, a3
960; RV32IA-NEXT:    xor a5, a4, a5
961; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
962; RV32IA-NEXT:    bnez a5, .LBB14_1
963; RV32IA-NEXT:  # %bb.2:
964; RV32IA-NEXT:    srl a0, a4, a2
965; RV32IA-NEXT:    ret
966;
967; RV64I-LABEL: atomicrmw_sub_i8_seq_cst:
968; RV64I:       # %bb.0:
969; RV64I-NEXT:    addi sp, sp, -16
970; RV64I-NEXT:    sd ra, 8(sp)
971; RV64I-NEXT:    addi a2, zero, 5
972; RV64I-NEXT:    call __atomic_fetch_sub_1
973; RV64I-NEXT:    ld ra, 8(sp)
974; RV64I-NEXT:    addi sp, sp, 16
975; RV64I-NEXT:    ret
976;
977; RV64IA-LABEL: atomicrmw_sub_i8_seq_cst:
978; RV64IA:       # %bb.0:
979; RV64IA-NEXT:    slli a2, a0, 3
980; RV64IA-NEXT:    andi a2, a2, 24
981; RV64IA-NEXT:    addi a3, zero, 255
982; RV64IA-NEXT:    sllw a3, a3, a2
983; RV64IA-NEXT:    andi a1, a1, 255
984; RV64IA-NEXT:    sllw a1, a1, a2
985; RV64IA-NEXT:    andi a0, a0, -4
986; RV64IA-NEXT:  .LBB14_1: # =>This Inner Loop Header: Depth=1
987; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
988; RV64IA-NEXT:    sub a5, a4, a1
989; RV64IA-NEXT:    xor a5, a4, a5
990; RV64IA-NEXT:    and a5, a5, a3
991; RV64IA-NEXT:    xor a5, a4, a5
992; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
993; RV64IA-NEXT:    bnez a5, .LBB14_1
994; RV64IA-NEXT:  # %bb.2:
995; RV64IA-NEXT:    srlw a0, a4, a2
996; RV64IA-NEXT:    ret
997  %1 = atomicrmw sub i8* %a, i8 %b seq_cst
998  ret i8 %1
999}
1000
1001define i8 @atomicrmw_and_i8_monotonic(i8 *%a, i8 %b) nounwind {
1002; RV32I-LABEL: atomicrmw_and_i8_monotonic:
1003; RV32I:       # %bb.0:
1004; RV32I-NEXT:    addi sp, sp, -16
1005; RV32I-NEXT:    sw ra, 12(sp)
1006; RV32I-NEXT:    mv a2, zero
1007; RV32I-NEXT:    call __atomic_fetch_and_1
1008; RV32I-NEXT:    lw ra, 12(sp)
1009; RV32I-NEXT:    addi sp, sp, 16
1010; RV32I-NEXT:    ret
1011;
1012; RV32IA-LABEL: atomicrmw_and_i8_monotonic:
1013; RV32IA:       # %bb.0:
1014; RV32IA-NEXT:    andi a1, a1, 255
1015; RV32IA-NEXT:    slli a2, a0, 3
1016; RV32IA-NEXT:    andi a2, a2, 24
1017; RV32IA-NEXT:    sll a1, a1, a2
1018; RV32IA-NEXT:    addi a3, zero, 255
1019; RV32IA-NEXT:    sll a3, a3, a2
1020; RV32IA-NEXT:    not a3, a3
1021; RV32IA-NEXT:    or a1, a3, a1
1022; RV32IA-NEXT:    andi a0, a0, -4
1023; RV32IA-NEXT:    amoand.w a0, a1, (a0)
1024; RV32IA-NEXT:    srl a0, a0, a2
1025; RV32IA-NEXT:    ret
1026;
1027; RV64I-LABEL: atomicrmw_and_i8_monotonic:
1028; RV64I:       # %bb.0:
1029; RV64I-NEXT:    addi sp, sp, -16
1030; RV64I-NEXT:    sd ra, 8(sp)
1031; RV64I-NEXT:    mv a2, zero
1032; RV64I-NEXT:    call __atomic_fetch_and_1
1033; RV64I-NEXT:    ld ra, 8(sp)
1034; RV64I-NEXT:    addi sp, sp, 16
1035; RV64I-NEXT:    ret
1036;
1037; RV64IA-LABEL: atomicrmw_and_i8_monotonic:
1038; RV64IA:       # %bb.0:
1039; RV64IA-NEXT:    andi a1, a1, 255
1040; RV64IA-NEXT:    slli a2, a0, 3
1041; RV64IA-NEXT:    andi a2, a2, 24
1042; RV64IA-NEXT:    sllw a1, a1, a2
1043; RV64IA-NEXT:    addi a3, zero, 255
1044; RV64IA-NEXT:    sllw a3, a3, a2
1045; RV64IA-NEXT:    not a3, a3
1046; RV64IA-NEXT:    or a1, a3, a1
1047; RV64IA-NEXT:    andi a0, a0, -4
1048; RV64IA-NEXT:    amoand.w a0, a1, (a0)
1049; RV64IA-NEXT:    srlw a0, a0, a2
1050; RV64IA-NEXT:    ret
1051  %1 = atomicrmw and i8* %a, i8 %b monotonic
1052  ret i8 %1
1053}
1054
1055define i8 @atomicrmw_and_i8_acquire(i8 *%a, i8 %b) nounwind {
1056; RV32I-LABEL: atomicrmw_and_i8_acquire:
1057; RV32I:       # %bb.0:
1058; RV32I-NEXT:    addi sp, sp, -16
1059; RV32I-NEXT:    sw ra, 12(sp)
1060; RV32I-NEXT:    addi a2, zero, 2
1061; RV32I-NEXT:    call __atomic_fetch_and_1
1062; RV32I-NEXT:    lw ra, 12(sp)
1063; RV32I-NEXT:    addi sp, sp, 16
1064; RV32I-NEXT:    ret
1065;
1066; RV32IA-LABEL: atomicrmw_and_i8_acquire:
1067; RV32IA:       # %bb.0:
1068; RV32IA-NEXT:    andi a1, a1, 255
1069; RV32IA-NEXT:    slli a2, a0, 3
1070; RV32IA-NEXT:    andi a2, a2, 24
1071; RV32IA-NEXT:    sll a1, a1, a2
1072; RV32IA-NEXT:    addi a3, zero, 255
1073; RV32IA-NEXT:    sll a3, a3, a2
1074; RV32IA-NEXT:    not a3, a3
1075; RV32IA-NEXT:    or a1, a3, a1
1076; RV32IA-NEXT:    andi a0, a0, -4
1077; RV32IA-NEXT:    amoand.w.aq a0, a1, (a0)
1078; RV32IA-NEXT:    srl a0, a0, a2
1079; RV32IA-NEXT:    ret
1080;
1081; RV64I-LABEL: atomicrmw_and_i8_acquire:
1082; RV64I:       # %bb.0:
1083; RV64I-NEXT:    addi sp, sp, -16
1084; RV64I-NEXT:    sd ra, 8(sp)
1085; RV64I-NEXT:    addi a2, zero, 2
1086; RV64I-NEXT:    call __atomic_fetch_and_1
1087; RV64I-NEXT:    ld ra, 8(sp)
1088; RV64I-NEXT:    addi sp, sp, 16
1089; RV64I-NEXT:    ret
1090;
1091; RV64IA-LABEL: atomicrmw_and_i8_acquire:
1092; RV64IA:       # %bb.0:
1093; RV64IA-NEXT:    andi a1, a1, 255
1094; RV64IA-NEXT:    slli a2, a0, 3
1095; RV64IA-NEXT:    andi a2, a2, 24
1096; RV64IA-NEXT:    sllw a1, a1, a2
1097; RV64IA-NEXT:    addi a3, zero, 255
1098; RV64IA-NEXT:    sllw a3, a3, a2
1099; RV64IA-NEXT:    not a3, a3
1100; RV64IA-NEXT:    or a1, a3, a1
1101; RV64IA-NEXT:    andi a0, a0, -4
1102; RV64IA-NEXT:    amoand.w.aq a0, a1, (a0)
1103; RV64IA-NEXT:    srlw a0, a0, a2
1104; RV64IA-NEXT:    ret
1105  %1 = atomicrmw and i8* %a, i8 %b acquire
1106  ret i8 %1
1107}
1108
1109define i8 @atomicrmw_and_i8_release(i8 *%a, i8 %b) nounwind {
1110; RV32I-LABEL: atomicrmw_and_i8_release:
1111; RV32I:       # %bb.0:
1112; RV32I-NEXT:    addi sp, sp, -16
1113; RV32I-NEXT:    sw ra, 12(sp)
1114; RV32I-NEXT:    addi a2, zero, 3
1115; RV32I-NEXT:    call __atomic_fetch_and_1
1116; RV32I-NEXT:    lw ra, 12(sp)
1117; RV32I-NEXT:    addi sp, sp, 16
1118; RV32I-NEXT:    ret
1119;
1120; RV32IA-LABEL: atomicrmw_and_i8_release:
1121; RV32IA:       # %bb.0:
1122; RV32IA-NEXT:    andi a1, a1, 255
1123; RV32IA-NEXT:    slli a2, a0, 3
1124; RV32IA-NEXT:    andi a2, a2, 24
1125; RV32IA-NEXT:    sll a1, a1, a2
1126; RV32IA-NEXT:    addi a3, zero, 255
1127; RV32IA-NEXT:    sll a3, a3, a2
1128; RV32IA-NEXT:    not a3, a3
1129; RV32IA-NEXT:    or a1, a3, a1
1130; RV32IA-NEXT:    andi a0, a0, -4
1131; RV32IA-NEXT:    amoand.w.rl a0, a1, (a0)
1132; RV32IA-NEXT:    srl a0, a0, a2
1133; RV32IA-NEXT:    ret
1134;
1135; RV64I-LABEL: atomicrmw_and_i8_release:
1136; RV64I:       # %bb.0:
1137; RV64I-NEXT:    addi sp, sp, -16
1138; RV64I-NEXT:    sd ra, 8(sp)
1139; RV64I-NEXT:    addi a2, zero, 3
1140; RV64I-NEXT:    call __atomic_fetch_and_1
1141; RV64I-NEXT:    ld ra, 8(sp)
1142; RV64I-NEXT:    addi sp, sp, 16
1143; RV64I-NEXT:    ret
1144;
1145; RV64IA-LABEL: atomicrmw_and_i8_release:
1146; RV64IA:       # %bb.0:
1147; RV64IA-NEXT:    andi a1, a1, 255
1148; RV64IA-NEXT:    slli a2, a0, 3
1149; RV64IA-NEXT:    andi a2, a2, 24
1150; RV64IA-NEXT:    sllw a1, a1, a2
1151; RV64IA-NEXT:    addi a3, zero, 255
1152; RV64IA-NEXT:    sllw a3, a3, a2
1153; RV64IA-NEXT:    not a3, a3
1154; RV64IA-NEXT:    or a1, a3, a1
1155; RV64IA-NEXT:    andi a0, a0, -4
1156; RV64IA-NEXT:    amoand.w.rl a0, a1, (a0)
1157; RV64IA-NEXT:    srlw a0, a0, a2
1158; RV64IA-NEXT:    ret
1159  %1 = atomicrmw and i8* %a, i8 %b release
1160  ret i8 %1
1161}
1162
1163define i8 @atomicrmw_and_i8_acq_rel(i8 *%a, i8 %b) nounwind {
1164; RV32I-LABEL: atomicrmw_and_i8_acq_rel:
1165; RV32I:       # %bb.0:
1166; RV32I-NEXT:    addi sp, sp, -16
1167; RV32I-NEXT:    sw ra, 12(sp)
1168; RV32I-NEXT:    addi a2, zero, 4
1169; RV32I-NEXT:    call __atomic_fetch_and_1
1170; RV32I-NEXT:    lw ra, 12(sp)
1171; RV32I-NEXT:    addi sp, sp, 16
1172; RV32I-NEXT:    ret
1173;
1174; RV32IA-LABEL: atomicrmw_and_i8_acq_rel:
1175; RV32IA:       # %bb.0:
1176; RV32IA-NEXT:    andi a1, a1, 255
1177; RV32IA-NEXT:    slli a2, a0, 3
1178; RV32IA-NEXT:    andi a2, a2, 24
1179; RV32IA-NEXT:    sll a1, a1, a2
1180; RV32IA-NEXT:    addi a3, zero, 255
1181; RV32IA-NEXT:    sll a3, a3, a2
1182; RV32IA-NEXT:    not a3, a3
1183; RV32IA-NEXT:    or a1, a3, a1
1184; RV32IA-NEXT:    andi a0, a0, -4
1185; RV32IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
1186; RV32IA-NEXT:    srl a0, a0, a2
1187; RV32IA-NEXT:    ret
1188;
1189; RV64I-LABEL: atomicrmw_and_i8_acq_rel:
1190; RV64I:       # %bb.0:
1191; RV64I-NEXT:    addi sp, sp, -16
1192; RV64I-NEXT:    sd ra, 8(sp)
1193; RV64I-NEXT:    addi a2, zero, 4
1194; RV64I-NEXT:    call __atomic_fetch_and_1
1195; RV64I-NEXT:    ld ra, 8(sp)
1196; RV64I-NEXT:    addi sp, sp, 16
1197; RV64I-NEXT:    ret
1198;
1199; RV64IA-LABEL: atomicrmw_and_i8_acq_rel:
1200; RV64IA:       # %bb.0:
1201; RV64IA-NEXT:    andi a1, a1, 255
1202; RV64IA-NEXT:    slli a2, a0, 3
1203; RV64IA-NEXT:    andi a2, a2, 24
1204; RV64IA-NEXT:    sllw a1, a1, a2
1205; RV64IA-NEXT:    addi a3, zero, 255
1206; RV64IA-NEXT:    sllw a3, a3, a2
1207; RV64IA-NEXT:    not a3, a3
1208; RV64IA-NEXT:    or a1, a3, a1
1209; RV64IA-NEXT:    andi a0, a0, -4
1210; RV64IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
1211; RV64IA-NEXT:    srlw a0, a0, a2
1212; RV64IA-NEXT:    ret
1213  %1 = atomicrmw and i8* %a, i8 %b acq_rel
1214  ret i8 %1
1215}
1216
1217define i8 @atomicrmw_and_i8_seq_cst(i8 *%a, i8 %b) nounwind {
1218; RV32I-LABEL: atomicrmw_and_i8_seq_cst:
1219; RV32I:       # %bb.0:
1220; RV32I-NEXT:    addi sp, sp, -16
1221; RV32I-NEXT:    sw ra, 12(sp)
1222; RV32I-NEXT:    addi a2, zero, 5
1223; RV32I-NEXT:    call __atomic_fetch_and_1
1224; RV32I-NEXT:    lw ra, 12(sp)
1225; RV32I-NEXT:    addi sp, sp, 16
1226; RV32I-NEXT:    ret
1227;
1228; RV32IA-LABEL: atomicrmw_and_i8_seq_cst:
1229; RV32IA:       # %bb.0:
1230; RV32IA-NEXT:    andi a1, a1, 255
1231; RV32IA-NEXT:    slli a2, a0, 3
1232; RV32IA-NEXT:    andi a2, a2, 24
1233; RV32IA-NEXT:    sll a1, a1, a2
1234; RV32IA-NEXT:    addi a3, zero, 255
1235; RV32IA-NEXT:    sll a3, a3, a2
1236; RV32IA-NEXT:    not a3, a3
1237; RV32IA-NEXT:    or a1, a3, a1
1238; RV32IA-NEXT:    andi a0, a0, -4
1239; RV32IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
1240; RV32IA-NEXT:    srl a0, a0, a2
1241; RV32IA-NEXT:    ret
1242;
1243; RV64I-LABEL: atomicrmw_and_i8_seq_cst:
1244; RV64I:       # %bb.0:
1245; RV64I-NEXT:    addi sp, sp, -16
1246; RV64I-NEXT:    sd ra, 8(sp)
1247; RV64I-NEXT:    addi a2, zero, 5
1248; RV64I-NEXT:    call __atomic_fetch_and_1
1249; RV64I-NEXT:    ld ra, 8(sp)
1250; RV64I-NEXT:    addi sp, sp, 16
1251; RV64I-NEXT:    ret
1252;
1253; RV64IA-LABEL: atomicrmw_and_i8_seq_cst:
1254; RV64IA:       # %bb.0:
1255; RV64IA-NEXT:    andi a1, a1, 255
1256; RV64IA-NEXT:    slli a2, a0, 3
1257; RV64IA-NEXT:    andi a2, a2, 24
1258; RV64IA-NEXT:    sllw a1, a1, a2
1259; RV64IA-NEXT:    addi a3, zero, 255
1260; RV64IA-NEXT:    sllw a3, a3, a2
1261; RV64IA-NEXT:    not a3, a3
1262; RV64IA-NEXT:    or a1, a3, a1
1263; RV64IA-NEXT:    andi a0, a0, -4
1264; RV64IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
1265; RV64IA-NEXT:    srlw a0, a0, a2
1266; RV64IA-NEXT:    ret
1267  %1 = atomicrmw and i8* %a, i8 %b seq_cst
1268  ret i8 %1
1269}
1270
1271define i8 @atomicrmw_nand_i8_monotonic(i8* %a, i8 %b) {
1272; RV32I-LABEL: atomicrmw_nand_i8_monotonic:
1273; RV32I:       # %bb.0:
1274; RV32I-NEXT:    addi sp, sp, -16
1275; RV32I-NEXT:    sw ra, 12(sp)
1276; RV32I-NEXT:    mv a2, zero
1277; RV32I-NEXT:    call __atomic_fetch_nand_1
1278; RV32I-NEXT:    lw ra, 12(sp)
1279; RV32I-NEXT:    addi sp, sp, 16
1280; RV32I-NEXT:    ret
1281;
1282; RV32IA-LABEL: atomicrmw_nand_i8_monotonic:
1283; RV32IA:       # %bb.0:
1284; RV32IA-NEXT:    slli a2, a0, 3
1285; RV32IA-NEXT:    andi a2, a2, 24
1286; RV32IA-NEXT:    addi a3, zero, 255
1287; RV32IA-NEXT:    sll a3, a3, a2
1288; RV32IA-NEXT:    andi a1, a1, 255
1289; RV32IA-NEXT:    sll a1, a1, a2
1290; RV32IA-NEXT:    andi a0, a0, -4
1291; RV32IA-NEXT:  .LBB20_1: # =>This Inner Loop Header: Depth=1
1292; RV32IA-NEXT:    lr.w a4, (a0)
1293; RV32IA-NEXT:    and a5, a4, a1
1294; RV32IA-NEXT:    not a5, a5
1295; RV32IA-NEXT:    xor a5, a4, a5
1296; RV32IA-NEXT:    and a5, a5, a3
1297; RV32IA-NEXT:    xor a5, a4, a5
1298; RV32IA-NEXT:    sc.w a5, a5, (a0)
1299; RV32IA-NEXT:    bnez a5, .LBB20_1
1300; RV32IA-NEXT:  # %bb.2:
1301; RV32IA-NEXT:    srl a0, a4, a2
1302; RV32IA-NEXT:    ret
1303;
1304; RV64I-LABEL: atomicrmw_nand_i8_monotonic:
1305; RV64I:       # %bb.0:
1306; RV64I-NEXT:    addi sp, sp, -16
1307; RV64I-NEXT:    sd ra, 8(sp)
1308; RV64I-NEXT:    mv a2, zero
1309; RV64I-NEXT:    call __atomic_fetch_nand_1
1310; RV64I-NEXT:    ld ra, 8(sp)
1311; RV64I-NEXT:    addi sp, sp, 16
1312; RV64I-NEXT:    ret
1313;
1314; RV64IA-LABEL: atomicrmw_nand_i8_monotonic:
1315; RV64IA:       # %bb.0:
1316; RV64IA-NEXT:    slli a2, a0, 3
1317; RV64IA-NEXT:    andi a2, a2, 24
1318; RV64IA-NEXT:    addi a3, zero, 255
1319; RV64IA-NEXT:    sllw a3, a3, a2
1320; RV64IA-NEXT:    andi a1, a1, 255
1321; RV64IA-NEXT:    sllw a1, a1, a2
1322; RV64IA-NEXT:    andi a0, a0, -4
1323; RV64IA-NEXT:  .LBB20_1: # =>This Inner Loop Header: Depth=1
1324; RV64IA-NEXT:    lr.w a4, (a0)
1325; RV64IA-NEXT:    and a5, a4, a1
1326; RV64IA-NEXT:    not a5, a5
1327; RV64IA-NEXT:    xor a5, a4, a5
1328; RV64IA-NEXT:    and a5, a5, a3
1329; RV64IA-NEXT:    xor a5, a4, a5
1330; RV64IA-NEXT:    sc.w a5, a5, (a0)
1331; RV64IA-NEXT:    bnez a5, .LBB20_1
1332; RV64IA-NEXT:  # %bb.2:
1333; RV64IA-NEXT:    srlw a0, a4, a2
1334; RV64IA-NEXT:    ret
1335  %1 = atomicrmw nand i8* %a, i8 %b monotonic
1336  ret i8 %1
1337}
1338
1339define i8 @atomicrmw_nand_i8_acquire(i8* %a, i8 %b) {
1340; RV32I-LABEL: atomicrmw_nand_i8_acquire:
1341; RV32I:       # %bb.0:
1342; RV32I-NEXT:    addi sp, sp, -16
1343; RV32I-NEXT:    sw ra, 12(sp)
1344; RV32I-NEXT:    addi a2, zero, 2
1345; RV32I-NEXT:    call __atomic_fetch_nand_1
1346; RV32I-NEXT:    lw ra, 12(sp)
1347; RV32I-NEXT:    addi sp, sp, 16
1348; RV32I-NEXT:    ret
1349;
1350; RV32IA-LABEL: atomicrmw_nand_i8_acquire:
1351; RV32IA:       # %bb.0:
1352; RV32IA-NEXT:    slli a2, a0, 3
1353; RV32IA-NEXT:    andi a2, a2, 24
1354; RV32IA-NEXT:    addi a3, zero, 255
1355; RV32IA-NEXT:    sll a3, a3, a2
1356; RV32IA-NEXT:    andi a1, a1, 255
1357; RV32IA-NEXT:    sll a1, a1, a2
1358; RV32IA-NEXT:    andi a0, a0, -4
1359; RV32IA-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
1360; RV32IA-NEXT:    lr.w.aq a4, (a0)
1361; RV32IA-NEXT:    and a5, a4, a1
1362; RV32IA-NEXT:    not a5, a5
1363; RV32IA-NEXT:    xor a5, a4, a5
1364; RV32IA-NEXT:    and a5, a5, a3
1365; RV32IA-NEXT:    xor a5, a4, a5
1366; RV32IA-NEXT:    sc.w a5, a5, (a0)
1367; RV32IA-NEXT:    bnez a5, .LBB21_1
1368; RV32IA-NEXT:  # %bb.2:
1369; RV32IA-NEXT:    srl a0, a4, a2
1370; RV32IA-NEXT:    ret
1371;
1372; RV64I-LABEL: atomicrmw_nand_i8_acquire:
1373; RV64I:       # %bb.0:
1374; RV64I-NEXT:    addi sp, sp, -16
1375; RV64I-NEXT:    sd ra, 8(sp)
1376; RV64I-NEXT:    addi a2, zero, 2
1377; RV64I-NEXT:    call __atomic_fetch_nand_1
1378; RV64I-NEXT:    ld ra, 8(sp)
1379; RV64I-NEXT:    addi sp, sp, 16
1380; RV64I-NEXT:    ret
1381;
1382; RV64IA-LABEL: atomicrmw_nand_i8_acquire:
1383; RV64IA:       # %bb.0:
1384; RV64IA-NEXT:    slli a2, a0, 3
1385; RV64IA-NEXT:    andi a2, a2, 24
1386; RV64IA-NEXT:    addi a3, zero, 255
1387; RV64IA-NEXT:    sllw a3, a3, a2
1388; RV64IA-NEXT:    andi a1, a1, 255
1389; RV64IA-NEXT:    sllw a1, a1, a2
1390; RV64IA-NEXT:    andi a0, a0, -4
1391; RV64IA-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
1392; RV64IA-NEXT:    lr.w.aq a4, (a0)
1393; RV64IA-NEXT:    and a5, a4, a1
1394; RV64IA-NEXT:    not a5, a5
1395; RV64IA-NEXT:    xor a5, a4, a5
1396; RV64IA-NEXT:    and a5, a5, a3
1397; RV64IA-NEXT:    xor a5, a4, a5
1398; RV64IA-NEXT:    sc.w a5, a5, (a0)
1399; RV64IA-NEXT:    bnez a5, .LBB21_1
1400; RV64IA-NEXT:  # %bb.2:
1401; RV64IA-NEXT:    srlw a0, a4, a2
1402; RV64IA-NEXT:    ret
1403  %1 = atomicrmw nand i8* %a, i8 %b acquire
1404  ret i8 %1
1405}
1406
1407define i8 @atomicrmw_nand_i8_release(i8* %a, i8 %b) {
1408; RV32I-LABEL: atomicrmw_nand_i8_release:
1409; RV32I:       # %bb.0:
1410; RV32I-NEXT:    addi sp, sp, -16
1411; RV32I-NEXT:    sw ra, 12(sp)
1412; RV32I-NEXT:    addi a2, zero, 3
1413; RV32I-NEXT:    call __atomic_fetch_nand_1
1414; RV32I-NEXT:    lw ra, 12(sp)
1415; RV32I-NEXT:    addi sp, sp, 16
1416; RV32I-NEXT:    ret
1417;
1418; RV32IA-LABEL: atomicrmw_nand_i8_release:
1419; RV32IA:       # %bb.0:
1420; RV32IA-NEXT:    slli a2, a0, 3
1421; RV32IA-NEXT:    andi a2, a2, 24
1422; RV32IA-NEXT:    addi a3, zero, 255
1423; RV32IA-NEXT:    sll a3, a3, a2
1424; RV32IA-NEXT:    andi a1, a1, 255
1425; RV32IA-NEXT:    sll a1, a1, a2
1426; RV32IA-NEXT:    andi a0, a0, -4
1427; RV32IA-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
1428; RV32IA-NEXT:    lr.w a4, (a0)
1429; RV32IA-NEXT:    and a5, a4, a1
1430; RV32IA-NEXT:    not a5, a5
1431; RV32IA-NEXT:    xor a5, a4, a5
1432; RV32IA-NEXT:    and a5, a5, a3
1433; RV32IA-NEXT:    xor a5, a4, a5
1434; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
1435; RV32IA-NEXT:    bnez a5, .LBB22_1
1436; RV32IA-NEXT:  # %bb.2:
1437; RV32IA-NEXT:    srl a0, a4, a2
1438; RV32IA-NEXT:    ret
1439;
1440; RV64I-LABEL: atomicrmw_nand_i8_release:
1441; RV64I:       # %bb.0:
1442; RV64I-NEXT:    addi sp, sp, -16
1443; RV64I-NEXT:    sd ra, 8(sp)
1444; RV64I-NEXT:    addi a2, zero, 3
1445; RV64I-NEXT:    call __atomic_fetch_nand_1
1446; RV64I-NEXT:    ld ra, 8(sp)
1447; RV64I-NEXT:    addi sp, sp, 16
1448; RV64I-NEXT:    ret
1449;
1450; RV64IA-LABEL: atomicrmw_nand_i8_release:
1451; RV64IA:       # %bb.0:
1452; RV64IA-NEXT:    slli a2, a0, 3
1453; RV64IA-NEXT:    andi a2, a2, 24
1454; RV64IA-NEXT:    addi a3, zero, 255
1455; RV64IA-NEXT:    sllw a3, a3, a2
1456; RV64IA-NEXT:    andi a1, a1, 255
1457; RV64IA-NEXT:    sllw a1, a1, a2
1458; RV64IA-NEXT:    andi a0, a0, -4
1459; RV64IA-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
1460; RV64IA-NEXT:    lr.w a4, (a0)
1461; RV64IA-NEXT:    and a5, a4, a1
1462; RV64IA-NEXT:    not a5, a5
1463; RV64IA-NEXT:    xor a5, a4, a5
1464; RV64IA-NEXT:    and a5, a5, a3
1465; RV64IA-NEXT:    xor a5, a4, a5
1466; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
1467; RV64IA-NEXT:    bnez a5, .LBB22_1
1468; RV64IA-NEXT:  # %bb.2:
1469; RV64IA-NEXT:    srlw a0, a4, a2
1470; RV64IA-NEXT:    ret
1471  %1 = atomicrmw nand i8* %a, i8 %b release
1472  ret i8 %1
1473}
1474
1475define i8 @atomicrmw_nand_i8_acq_rel(i8* %a, i8 %b) {
1476; RV32I-LABEL: atomicrmw_nand_i8_acq_rel:
1477; RV32I:       # %bb.0:
1478; RV32I-NEXT:    addi sp, sp, -16
1479; RV32I-NEXT:    sw ra, 12(sp)
1480; RV32I-NEXT:    addi a2, zero, 4
1481; RV32I-NEXT:    call __atomic_fetch_nand_1
1482; RV32I-NEXT:    lw ra, 12(sp)
1483; RV32I-NEXT:    addi sp, sp, 16
1484; RV32I-NEXT:    ret
1485;
1486; RV32IA-LABEL: atomicrmw_nand_i8_acq_rel:
1487; RV32IA:       # %bb.0:
1488; RV32IA-NEXT:    slli a2, a0, 3
1489; RV32IA-NEXT:    andi a2, a2, 24
1490; RV32IA-NEXT:    addi a3, zero, 255
1491; RV32IA-NEXT:    sll a3, a3, a2
1492; RV32IA-NEXT:    andi a1, a1, 255
1493; RV32IA-NEXT:    sll a1, a1, a2
1494; RV32IA-NEXT:    andi a0, a0, -4
1495; RV32IA-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
1496; RV32IA-NEXT:    lr.w.aq a4, (a0)
1497; RV32IA-NEXT:    and a5, a4, a1
1498; RV32IA-NEXT:    not a5, a5
1499; RV32IA-NEXT:    xor a5, a4, a5
1500; RV32IA-NEXT:    and a5, a5, a3
1501; RV32IA-NEXT:    xor a5, a4, a5
1502; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
1503; RV32IA-NEXT:    bnez a5, .LBB23_1
1504; RV32IA-NEXT:  # %bb.2:
1505; RV32IA-NEXT:    srl a0, a4, a2
1506; RV32IA-NEXT:    ret
1507;
1508; RV64I-LABEL: atomicrmw_nand_i8_acq_rel:
1509; RV64I:       # %bb.0:
1510; RV64I-NEXT:    addi sp, sp, -16
1511; RV64I-NEXT:    sd ra, 8(sp)
1512; RV64I-NEXT:    addi a2, zero, 4
1513; RV64I-NEXT:    call __atomic_fetch_nand_1
1514; RV64I-NEXT:    ld ra, 8(sp)
1515; RV64I-NEXT:    addi sp, sp, 16
1516; RV64I-NEXT:    ret
1517;
1518; RV64IA-LABEL: atomicrmw_nand_i8_acq_rel:
1519; RV64IA:       # %bb.0:
1520; RV64IA-NEXT:    slli a2, a0, 3
1521; RV64IA-NEXT:    andi a2, a2, 24
1522; RV64IA-NEXT:    addi a3, zero, 255
1523; RV64IA-NEXT:    sllw a3, a3, a2
1524; RV64IA-NEXT:    andi a1, a1, 255
1525; RV64IA-NEXT:    sllw a1, a1, a2
1526; RV64IA-NEXT:    andi a0, a0, -4
1527; RV64IA-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
1528; RV64IA-NEXT:    lr.w.aq a4, (a0)
1529; RV64IA-NEXT:    and a5, a4, a1
1530; RV64IA-NEXT:    not a5, a5
1531; RV64IA-NEXT:    xor a5, a4, a5
1532; RV64IA-NEXT:    and a5, a5, a3
1533; RV64IA-NEXT:    xor a5, a4, a5
1534; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
1535; RV64IA-NEXT:    bnez a5, .LBB23_1
1536; RV64IA-NEXT:  # %bb.2:
1537; RV64IA-NEXT:    srlw a0, a4, a2
1538; RV64IA-NEXT:    ret
1539  %1 = atomicrmw nand i8* %a, i8 %b acq_rel
1540  ret i8 %1
1541}
1542
1543define i8 @atomicrmw_nand_i8_seq_cst(i8* %a, i8 %b) {
1544; RV32I-LABEL: atomicrmw_nand_i8_seq_cst:
1545; RV32I:       # %bb.0:
1546; RV32I-NEXT:    addi sp, sp, -16
1547; RV32I-NEXT:    sw ra, 12(sp)
1548; RV32I-NEXT:    addi a2, zero, 5
1549; RV32I-NEXT:    call __atomic_fetch_nand_1
1550; RV32I-NEXT:    lw ra, 12(sp)
1551; RV32I-NEXT:    addi sp, sp, 16
1552; RV32I-NEXT:    ret
1553;
1554; RV32IA-LABEL: atomicrmw_nand_i8_seq_cst:
1555; RV32IA:       # %bb.0:
1556; RV32IA-NEXT:    slli a2, a0, 3
1557; RV32IA-NEXT:    andi a2, a2, 24
1558; RV32IA-NEXT:    addi a3, zero, 255
1559; RV32IA-NEXT:    sll a3, a3, a2
1560; RV32IA-NEXT:    andi a1, a1, 255
1561; RV32IA-NEXT:    sll a1, a1, a2
1562; RV32IA-NEXT:    andi a0, a0, -4
1563; RV32IA-NEXT:  .LBB24_1: # =>This Inner Loop Header: Depth=1
1564; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
1565; RV32IA-NEXT:    and a5, a4, a1
1566; RV32IA-NEXT:    not a5, a5
1567; RV32IA-NEXT:    xor a5, a4, a5
1568; RV32IA-NEXT:    and a5, a5, a3
1569; RV32IA-NEXT:    xor a5, a4, a5
1570; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
1571; RV32IA-NEXT:    bnez a5, .LBB24_1
1572; RV32IA-NEXT:  # %bb.2:
1573; RV32IA-NEXT:    srl a0, a4, a2
1574; RV32IA-NEXT:    ret
1575;
1576; RV64I-LABEL: atomicrmw_nand_i8_seq_cst:
1577; RV64I:       # %bb.0:
1578; RV64I-NEXT:    addi sp, sp, -16
1579; RV64I-NEXT:    sd ra, 8(sp)
1580; RV64I-NEXT:    addi a2, zero, 5
1581; RV64I-NEXT:    call __atomic_fetch_nand_1
1582; RV64I-NEXT:    ld ra, 8(sp)
1583; RV64I-NEXT:    addi sp, sp, 16
1584; RV64I-NEXT:    ret
1585;
1586; RV64IA-LABEL: atomicrmw_nand_i8_seq_cst:
1587; RV64IA:       # %bb.0:
1588; RV64IA-NEXT:    slli a2, a0, 3
1589; RV64IA-NEXT:    andi a2, a2, 24
1590; RV64IA-NEXT:    addi a3, zero, 255
1591; RV64IA-NEXT:    sllw a3, a3, a2
1592; RV64IA-NEXT:    andi a1, a1, 255
1593; RV64IA-NEXT:    sllw a1, a1, a2
1594; RV64IA-NEXT:    andi a0, a0, -4
1595; RV64IA-NEXT:  .LBB24_1: # =>This Inner Loop Header: Depth=1
1596; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
1597; RV64IA-NEXT:    and a5, a4, a1
1598; RV64IA-NEXT:    not a5, a5
1599; RV64IA-NEXT:    xor a5, a4, a5
1600; RV64IA-NEXT:    and a5, a5, a3
1601; RV64IA-NEXT:    xor a5, a4, a5
1602; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
1603; RV64IA-NEXT:    bnez a5, .LBB24_1
1604; RV64IA-NEXT:  # %bb.2:
1605; RV64IA-NEXT:    srlw a0, a4, a2
1606; RV64IA-NEXT:    ret
1607  %1 = atomicrmw nand i8* %a, i8 %b seq_cst
1608  ret i8 %1
1609}
1610
1611define i8 @atomicrmw_or_i8_monotonic(i8 *%a, i8 %b) nounwind {
1612; RV32I-LABEL: atomicrmw_or_i8_monotonic:
1613; RV32I:       # %bb.0:
1614; RV32I-NEXT:    addi sp, sp, -16
1615; RV32I-NEXT:    sw ra, 12(sp)
1616; RV32I-NEXT:    mv a2, zero
1617; RV32I-NEXT:    call __atomic_fetch_or_1
1618; RV32I-NEXT:    lw ra, 12(sp)
1619; RV32I-NEXT:    addi sp, sp, 16
1620; RV32I-NEXT:    ret
1621;
1622; RV32IA-LABEL: atomicrmw_or_i8_monotonic:
1623; RV32IA:       # %bb.0:
1624; RV32IA-NEXT:    andi a1, a1, 255
1625; RV32IA-NEXT:    slli a2, a0, 3
1626; RV32IA-NEXT:    andi a2, a2, 24
1627; RV32IA-NEXT:    sll a1, a1, a2
1628; RV32IA-NEXT:    andi a0, a0, -4
1629; RV32IA-NEXT:    amoor.w a0, a1, (a0)
1630; RV32IA-NEXT:    srl a0, a0, a2
1631; RV32IA-NEXT:    ret
1632;
1633; RV64I-LABEL: atomicrmw_or_i8_monotonic:
1634; RV64I:       # %bb.0:
1635; RV64I-NEXT:    addi sp, sp, -16
1636; RV64I-NEXT:    sd ra, 8(sp)
1637; RV64I-NEXT:    mv a2, zero
1638; RV64I-NEXT:    call __atomic_fetch_or_1
1639; RV64I-NEXT:    ld ra, 8(sp)
1640; RV64I-NEXT:    addi sp, sp, 16
1641; RV64I-NEXT:    ret
1642;
1643; RV64IA-LABEL: atomicrmw_or_i8_monotonic:
1644; RV64IA:       # %bb.0:
1645; RV64IA-NEXT:    andi a1, a1, 255
1646; RV64IA-NEXT:    slli a2, a0, 3
1647; RV64IA-NEXT:    andi a2, a2, 24
1648; RV64IA-NEXT:    sllw a1, a1, a2
1649; RV64IA-NEXT:    andi a0, a0, -4
1650; RV64IA-NEXT:    amoor.w a0, a1, (a0)
1651; RV64IA-NEXT:    srlw a0, a0, a2
1652; RV64IA-NEXT:    ret
1653  %1 = atomicrmw or i8* %a, i8 %b monotonic
1654  ret i8 %1
1655}
1656
1657define i8 @atomicrmw_or_i8_acquire(i8 *%a, i8 %b) nounwind {
1658; RV32I-LABEL: atomicrmw_or_i8_acquire:
1659; RV32I:       # %bb.0:
1660; RV32I-NEXT:    addi sp, sp, -16
1661; RV32I-NEXT:    sw ra, 12(sp)
1662; RV32I-NEXT:    addi a2, zero, 2
1663; RV32I-NEXT:    call __atomic_fetch_or_1
1664; RV32I-NEXT:    lw ra, 12(sp)
1665; RV32I-NEXT:    addi sp, sp, 16
1666; RV32I-NEXT:    ret
1667;
1668; RV32IA-LABEL: atomicrmw_or_i8_acquire:
1669; RV32IA:       # %bb.0:
1670; RV32IA-NEXT:    andi a1, a1, 255
1671; RV32IA-NEXT:    slli a2, a0, 3
1672; RV32IA-NEXT:    andi a2, a2, 24
1673; RV32IA-NEXT:    sll a1, a1, a2
1674; RV32IA-NEXT:    andi a0, a0, -4
1675; RV32IA-NEXT:    amoor.w.aq a0, a1, (a0)
1676; RV32IA-NEXT:    srl a0, a0, a2
1677; RV32IA-NEXT:    ret
1678;
1679; RV64I-LABEL: atomicrmw_or_i8_acquire:
1680; RV64I:       # %bb.0:
1681; RV64I-NEXT:    addi sp, sp, -16
1682; RV64I-NEXT:    sd ra, 8(sp)
1683; RV64I-NEXT:    addi a2, zero, 2
1684; RV64I-NEXT:    call __atomic_fetch_or_1
1685; RV64I-NEXT:    ld ra, 8(sp)
1686; RV64I-NEXT:    addi sp, sp, 16
1687; RV64I-NEXT:    ret
1688;
1689; RV64IA-LABEL: atomicrmw_or_i8_acquire:
1690; RV64IA:       # %bb.0:
1691; RV64IA-NEXT:    andi a1, a1, 255
1692; RV64IA-NEXT:    slli a2, a0, 3
1693; RV64IA-NEXT:    andi a2, a2, 24
1694; RV64IA-NEXT:    sllw a1, a1, a2
1695; RV64IA-NEXT:    andi a0, a0, -4
1696; RV64IA-NEXT:    amoor.w.aq a0, a1, (a0)
1697; RV64IA-NEXT:    srlw a0, a0, a2
1698; RV64IA-NEXT:    ret
1699  %1 = atomicrmw or i8* %a, i8 %b acquire
1700  ret i8 %1
1701}
1702
1703define i8 @atomicrmw_or_i8_release(i8 *%a, i8 %b) nounwind {
1704; RV32I-LABEL: atomicrmw_or_i8_release:
1705; RV32I:       # %bb.0:
1706; RV32I-NEXT:    addi sp, sp, -16
1707; RV32I-NEXT:    sw ra, 12(sp)
1708; RV32I-NEXT:    addi a2, zero, 3
1709; RV32I-NEXT:    call __atomic_fetch_or_1
1710; RV32I-NEXT:    lw ra, 12(sp)
1711; RV32I-NEXT:    addi sp, sp, 16
1712; RV32I-NEXT:    ret
1713;
1714; RV32IA-LABEL: atomicrmw_or_i8_release:
1715; RV32IA:       # %bb.0:
1716; RV32IA-NEXT:    andi a1, a1, 255
1717; RV32IA-NEXT:    slli a2, a0, 3
1718; RV32IA-NEXT:    andi a2, a2, 24
1719; RV32IA-NEXT:    sll a1, a1, a2
1720; RV32IA-NEXT:    andi a0, a0, -4
1721; RV32IA-NEXT:    amoor.w.rl a0, a1, (a0)
1722; RV32IA-NEXT:    srl a0, a0, a2
1723; RV32IA-NEXT:    ret
1724;
1725; RV64I-LABEL: atomicrmw_or_i8_release:
1726; RV64I:       # %bb.0:
1727; RV64I-NEXT:    addi sp, sp, -16
1728; RV64I-NEXT:    sd ra, 8(sp)
1729; RV64I-NEXT:    addi a2, zero, 3
1730; RV64I-NEXT:    call __atomic_fetch_or_1
1731; RV64I-NEXT:    ld ra, 8(sp)
1732; RV64I-NEXT:    addi sp, sp, 16
1733; RV64I-NEXT:    ret
1734;
1735; RV64IA-LABEL: atomicrmw_or_i8_release:
1736; RV64IA:       # %bb.0:
1737; RV64IA-NEXT:    andi a1, a1, 255
1738; RV64IA-NEXT:    slli a2, a0, 3
1739; RV64IA-NEXT:    andi a2, a2, 24
1740; RV64IA-NEXT:    sllw a1, a1, a2
1741; RV64IA-NEXT:    andi a0, a0, -4
1742; RV64IA-NEXT:    amoor.w.rl a0, a1, (a0)
1743; RV64IA-NEXT:    srlw a0, a0, a2
1744; RV64IA-NEXT:    ret
1745  %1 = atomicrmw or i8* %a, i8 %b release
1746  ret i8 %1
1747}
1748
1749define i8 @atomicrmw_or_i8_acq_rel(i8 *%a, i8 %b) nounwind {
1750; RV32I-LABEL: atomicrmw_or_i8_acq_rel:
1751; RV32I:       # %bb.0:
1752; RV32I-NEXT:    addi sp, sp, -16
1753; RV32I-NEXT:    sw ra, 12(sp)
1754; RV32I-NEXT:    addi a2, zero, 4
1755; RV32I-NEXT:    call __atomic_fetch_or_1
1756; RV32I-NEXT:    lw ra, 12(sp)
1757; RV32I-NEXT:    addi sp, sp, 16
1758; RV32I-NEXT:    ret
1759;
1760; RV32IA-LABEL: atomicrmw_or_i8_acq_rel:
1761; RV32IA:       # %bb.0:
1762; RV32IA-NEXT:    andi a1, a1, 255
1763; RV32IA-NEXT:    slli a2, a0, 3
1764; RV32IA-NEXT:    andi a2, a2, 24
1765; RV32IA-NEXT:    sll a1, a1, a2
1766; RV32IA-NEXT:    andi a0, a0, -4
1767; RV32IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
1768; RV32IA-NEXT:    srl a0, a0, a2
1769; RV32IA-NEXT:    ret
1770;
1771; RV64I-LABEL: atomicrmw_or_i8_acq_rel:
1772; RV64I:       # %bb.0:
1773; RV64I-NEXT:    addi sp, sp, -16
1774; RV64I-NEXT:    sd ra, 8(sp)
1775; RV64I-NEXT:    addi a2, zero, 4
1776; RV64I-NEXT:    call __atomic_fetch_or_1
1777; RV64I-NEXT:    ld ra, 8(sp)
1778; RV64I-NEXT:    addi sp, sp, 16
1779; RV64I-NEXT:    ret
1780;
1781; RV64IA-LABEL: atomicrmw_or_i8_acq_rel:
1782; RV64IA:       # %bb.0:
1783; RV64IA-NEXT:    andi a1, a1, 255
1784; RV64IA-NEXT:    slli a2, a0, 3
1785; RV64IA-NEXT:    andi a2, a2, 24
1786; RV64IA-NEXT:    sllw a1, a1, a2
1787; RV64IA-NEXT:    andi a0, a0, -4
1788; RV64IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
1789; RV64IA-NEXT:    srlw a0, a0, a2
1790; RV64IA-NEXT:    ret
1791  %1 = atomicrmw or i8* %a, i8 %b acq_rel
1792  ret i8 %1
1793}
1794
1795define i8 @atomicrmw_or_i8_seq_cst(i8 *%a, i8 %b) nounwind {
1796; RV32I-LABEL: atomicrmw_or_i8_seq_cst:
1797; RV32I:       # %bb.0:
1798; RV32I-NEXT:    addi sp, sp, -16
1799; RV32I-NEXT:    sw ra, 12(sp)
1800; RV32I-NEXT:    addi a2, zero, 5
1801; RV32I-NEXT:    call __atomic_fetch_or_1
1802; RV32I-NEXT:    lw ra, 12(sp)
1803; RV32I-NEXT:    addi sp, sp, 16
1804; RV32I-NEXT:    ret
1805;
1806; RV32IA-LABEL: atomicrmw_or_i8_seq_cst:
1807; RV32IA:       # %bb.0:
1808; RV32IA-NEXT:    andi a1, a1, 255
1809; RV32IA-NEXT:    slli a2, a0, 3
1810; RV32IA-NEXT:    andi a2, a2, 24
1811; RV32IA-NEXT:    sll a1, a1, a2
1812; RV32IA-NEXT:    andi a0, a0, -4
1813; RV32IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
1814; RV32IA-NEXT:    srl a0, a0, a2
1815; RV32IA-NEXT:    ret
1816;
1817; RV64I-LABEL: atomicrmw_or_i8_seq_cst:
1818; RV64I:       # %bb.0:
1819; RV64I-NEXT:    addi sp, sp, -16
1820; RV64I-NEXT:    sd ra, 8(sp)
1821; RV64I-NEXT:    addi a2, zero, 5
1822; RV64I-NEXT:    call __atomic_fetch_or_1
1823; RV64I-NEXT:    ld ra, 8(sp)
1824; RV64I-NEXT:    addi sp, sp, 16
1825; RV64I-NEXT:    ret
1826;
1827; RV64IA-LABEL: atomicrmw_or_i8_seq_cst:
1828; RV64IA:       # %bb.0:
1829; RV64IA-NEXT:    andi a1, a1, 255
1830; RV64IA-NEXT:    slli a2, a0, 3
1831; RV64IA-NEXT:    andi a2, a2, 24
1832; RV64IA-NEXT:    sllw a1, a1, a2
1833; RV64IA-NEXT:    andi a0, a0, -4
1834; RV64IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
1835; RV64IA-NEXT:    srlw a0, a0, a2
1836; RV64IA-NEXT:    ret
1837  %1 = atomicrmw or i8* %a, i8 %b seq_cst
1838  ret i8 %1
1839}
1840
1841define i8 @atomicrmw_xor_i8_monotonic(i8 *%a, i8 %b) nounwind {
1842; RV32I-LABEL: atomicrmw_xor_i8_monotonic:
1843; RV32I:       # %bb.0:
1844; RV32I-NEXT:    addi sp, sp, -16
1845; RV32I-NEXT:    sw ra, 12(sp)
1846; RV32I-NEXT:    mv a2, zero
1847; RV32I-NEXT:    call __atomic_fetch_xor_1
1848; RV32I-NEXT:    lw ra, 12(sp)
1849; RV32I-NEXT:    addi sp, sp, 16
1850; RV32I-NEXT:    ret
1851;
1852; RV32IA-LABEL: atomicrmw_xor_i8_monotonic:
1853; RV32IA:       # %bb.0:
1854; RV32IA-NEXT:    andi a1, a1, 255
1855; RV32IA-NEXT:    slli a2, a0, 3
1856; RV32IA-NEXT:    andi a2, a2, 24
1857; RV32IA-NEXT:    sll a1, a1, a2
1858; RV32IA-NEXT:    andi a0, a0, -4
1859; RV32IA-NEXT:    amoxor.w a0, a1, (a0)
1860; RV32IA-NEXT:    srl a0, a0, a2
1861; RV32IA-NEXT:    ret
1862;
1863; RV64I-LABEL: atomicrmw_xor_i8_monotonic:
1864; RV64I:       # %bb.0:
1865; RV64I-NEXT:    addi sp, sp, -16
1866; RV64I-NEXT:    sd ra, 8(sp)
1867; RV64I-NEXT:    mv a2, zero
1868; RV64I-NEXT:    call __atomic_fetch_xor_1
1869; RV64I-NEXT:    ld ra, 8(sp)
1870; RV64I-NEXT:    addi sp, sp, 16
1871; RV64I-NEXT:    ret
1872;
1873; RV64IA-LABEL: atomicrmw_xor_i8_monotonic:
1874; RV64IA:       # %bb.0:
1875; RV64IA-NEXT:    andi a1, a1, 255
1876; RV64IA-NEXT:    slli a2, a0, 3
1877; RV64IA-NEXT:    andi a2, a2, 24
1878; RV64IA-NEXT:    sllw a1, a1, a2
1879; RV64IA-NEXT:    andi a0, a0, -4
1880; RV64IA-NEXT:    amoxor.w a0, a1, (a0)
1881; RV64IA-NEXT:    srlw a0, a0, a2
1882; RV64IA-NEXT:    ret
1883  %1 = atomicrmw xor i8* %a, i8 %b monotonic
1884  ret i8 %1
1885}
1886
1887define i8 @atomicrmw_xor_i8_acquire(i8 *%a, i8 %b) nounwind {
1888; RV32I-LABEL: atomicrmw_xor_i8_acquire:
1889; RV32I:       # %bb.0:
1890; RV32I-NEXT:    addi sp, sp, -16
1891; RV32I-NEXT:    sw ra, 12(sp)
1892; RV32I-NEXT:    addi a2, zero, 2
1893; RV32I-NEXT:    call __atomic_fetch_xor_1
1894; RV32I-NEXT:    lw ra, 12(sp)
1895; RV32I-NEXT:    addi sp, sp, 16
1896; RV32I-NEXT:    ret
1897;
1898; RV32IA-LABEL: atomicrmw_xor_i8_acquire:
1899; RV32IA:       # %bb.0:
1900; RV32IA-NEXT:    andi a1, a1, 255
1901; RV32IA-NEXT:    slli a2, a0, 3
1902; RV32IA-NEXT:    andi a2, a2, 24
1903; RV32IA-NEXT:    sll a1, a1, a2
1904; RV32IA-NEXT:    andi a0, a0, -4
1905; RV32IA-NEXT:    amoxor.w.aq a0, a1, (a0)
1906; RV32IA-NEXT:    srl a0, a0, a2
1907; RV32IA-NEXT:    ret
1908;
1909; RV64I-LABEL: atomicrmw_xor_i8_acquire:
1910; RV64I:       # %bb.0:
1911; RV64I-NEXT:    addi sp, sp, -16
1912; RV64I-NEXT:    sd ra, 8(sp)
1913; RV64I-NEXT:    addi a2, zero, 2
1914; RV64I-NEXT:    call __atomic_fetch_xor_1
1915; RV64I-NEXT:    ld ra, 8(sp)
1916; RV64I-NEXT:    addi sp, sp, 16
1917; RV64I-NEXT:    ret
1918;
1919; RV64IA-LABEL: atomicrmw_xor_i8_acquire:
1920; RV64IA:       # %bb.0:
1921; RV64IA-NEXT:    andi a1, a1, 255
1922; RV64IA-NEXT:    slli a2, a0, 3
1923; RV64IA-NEXT:    andi a2, a2, 24
1924; RV64IA-NEXT:    sllw a1, a1, a2
1925; RV64IA-NEXT:    andi a0, a0, -4
1926; RV64IA-NEXT:    amoxor.w.aq a0, a1, (a0)
1927; RV64IA-NEXT:    srlw a0, a0, a2
1928; RV64IA-NEXT:    ret
1929  %1 = atomicrmw xor i8* %a, i8 %b acquire
1930  ret i8 %1
1931}
1932
1933define i8 @atomicrmw_xor_i8_release(i8 *%a, i8 %b) nounwind {
1934; RV32I-LABEL: atomicrmw_xor_i8_release:
1935; RV32I:       # %bb.0:
1936; RV32I-NEXT:    addi sp, sp, -16
1937; RV32I-NEXT:    sw ra, 12(sp)
1938; RV32I-NEXT:    addi a2, zero, 3
1939; RV32I-NEXT:    call __atomic_fetch_xor_1
1940; RV32I-NEXT:    lw ra, 12(sp)
1941; RV32I-NEXT:    addi sp, sp, 16
1942; RV32I-NEXT:    ret
1943;
1944; RV32IA-LABEL: atomicrmw_xor_i8_release:
1945; RV32IA:       # %bb.0:
1946; RV32IA-NEXT:    andi a1, a1, 255
1947; RV32IA-NEXT:    slli a2, a0, 3
1948; RV32IA-NEXT:    andi a2, a2, 24
1949; RV32IA-NEXT:    sll a1, a1, a2
1950; RV32IA-NEXT:    andi a0, a0, -4
1951; RV32IA-NEXT:    amoxor.w.rl a0, a1, (a0)
1952; RV32IA-NEXT:    srl a0, a0, a2
1953; RV32IA-NEXT:    ret
1954;
1955; RV64I-LABEL: atomicrmw_xor_i8_release:
1956; RV64I:       # %bb.0:
1957; RV64I-NEXT:    addi sp, sp, -16
1958; RV64I-NEXT:    sd ra, 8(sp)
1959; RV64I-NEXT:    addi a2, zero, 3
1960; RV64I-NEXT:    call __atomic_fetch_xor_1
1961; RV64I-NEXT:    ld ra, 8(sp)
1962; RV64I-NEXT:    addi sp, sp, 16
1963; RV64I-NEXT:    ret
1964;
1965; RV64IA-LABEL: atomicrmw_xor_i8_release:
1966; RV64IA:       # %bb.0:
1967; RV64IA-NEXT:    andi a1, a1, 255
1968; RV64IA-NEXT:    slli a2, a0, 3
1969; RV64IA-NEXT:    andi a2, a2, 24
1970; RV64IA-NEXT:    sllw a1, a1, a2
1971; RV64IA-NEXT:    andi a0, a0, -4
1972; RV64IA-NEXT:    amoxor.w.rl a0, a1, (a0)
1973; RV64IA-NEXT:    srlw a0, a0, a2
1974; RV64IA-NEXT:    ret
1975  %1 = atomicrmw xor i8* %a, i8 %b release
1976  ret i8 %1
1977}
1978
1979define i8 @atomicrmw_xor_i8_acq_rel(i8 *%a, i8 %b) nounwind {
1980; RV32I-LABEL: atomicrmw_xor_i8_acq_rel:
1981; RV32I:       # %bb.0:
1982; RV32I-NEXT:    addi sp, sp, -16
1983; RV32I-NEXT:    sw ra, 12(sp)
1984; RV32I-NEXT:    addi a2, zero, 4
1985; RV32I-NEXT:    call __atomic_fetch_xor_1
1986; RV32I-NEXT:    lw ra, 12(sp)
1987; RV32I-NEXT:    addi sp, sp, 16
1988; RV32I-NEXT:    ret
1989;
1990; RV32IA-LABEL: atomicrmw_xor_i8_acq_rel:
1991; RV32IA:       # %bb.0:
1992; RV32IA-NEXT:    andi a1, a1, 255
1993; RV32IA-NEXT:    slli a2, a0, 3
1994; RV32IA-NEXT:    andi a2, a2, 24
1995; RV32IA-NEXT:    sll a1, a1, a2
1996; RV32IA-NEXT:    andi a0, a0, -4
1997; RV32IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
1998; RV32IA-NEXT:    srl a0, a0, a2
1999; RV32IA-NEXT:    ret
2000;
2001; RV64I-LABEL: atomicrmw_xor_i8_acq_rel:
2002; RV64I:       # %bb.0:
2003; RV64I-NEXT:    addi sp, sp, -16
2004; RV64I-NEXT:    sd ra, 8(sp)
2005; RV64I-NEXT:    addi a2, zero, 4
2006; RV64I-NEXT:    call __atomic_fetch_xor_1
2007; RV64I-NEXT:    ld ra, 8(sp)
2008; RV64I-NEXT:    addi sp, sp, 16
2009; RV64I-NEXT:    ret
2010;
2011; RV64IA-LABEL: atomicrmw_xor_i8_acq_rel:
2012; RV64IA:       # %bb.0:
2013; RV64IA-NEXT:    andi a1, a1, 255
2014; RV64IA-NEXT:    slli a2, a0, 3
2015; RV64IA-NEXT:    andi a2, a2, 24
2016; RV64IA-NEXT:    sllw a1, a1, a2
2017; RV64IA-NEXT:    andi a0, a0, -4
2018; RV64IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
2019; RV64IA-NEXT:    srlw a0, a0, a2
2020; RV64IA-NEXT:    ret
2021  %1 = atomicrmw xor i8* %a, i8 %b acq_rel
2022  ret i8 %1
2023}
2024
2025define i8 @atomicrmw_xor_i8_seq_cst(i8 *%a, i8 %b) nounwind {
2026; RV32I-LABEL: atomicrmw_xor_i8_seq_cst:
2027; RV32I:       # %bb.0:
2028; RV32I-NEXT:    addi sp, sp, -16
2029; RV32I-NEXT:    sw ra, 12(sp)
2030; RV32I-NEXT:    addi a2, zero, 5
2031; RV32I-NEXT:    call __atomic_fetch_xor_1
2032; RV32I-NEXT:    lw ra, 12(sp)
2033; RV32I-NEXT:    addi sp, sp, 16
2034; RV32I-NEXT:    ret
2035;
2036; RV32IA-LABEL: atomicrmw_xor_i8_seq_cst:
2037; RV32IA:       # %bb.0:
2038; RV32IA-NEXT:    andi a1, a1, 255
2039; RV32IA-NEXT:    slli a2, a0, 3
2040; RV32IA-NEXT:    andi a2, a2, 24
2041; RV32IA-NEXT:    sll a1, a1, a2
2042; RV32IA-NEXT:    andi a0, a0, -4
2043; RV32IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
2044; RV32IA-NEXT:    srl a0, a0, a2
2045; RV32IA-NEXT:    ret
2046;
2047; RV64I-LABEL: atomicrmw_xor_i8_seq_cst:
2048; RV64I:       # %bb.0:
2049; RV64I-NEXT:    addi sp, sp, -16
2050; RV64I-NEXT:    sd ra, 8(sp)
2051; RV64I-NEXT:    addi a2, zero, 5
2052; RV64I-NEXT:    call __atomic_fetch_xor_1
2053; RV64I-NEXT:    ld ra, 8(sp)
2054; RV64I-NEXT:    addi sp, sp, 16
2055; RV64I-NEXT:    ret
2056;
2057; RV64IA-LABEL: atomicrmw_xor_i8_seq_cst:
2058; RV64IA:       # %bb.0:
2059; RV64IA-NEXT:    andi a1, a1, 255
2060; RV64IA-NEXT:    slli a2, a0, 3
2061; RV64IA-NEXT:    andi a2, a2, 24
2062; RV64IA-NEXT:    sllw a1, a1, a2
2063; RV64IA-NEXT:    andi a0, a0, -4
2064; RV64IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
2065; RV64IA-NEXT:    srlw a0, a0, a2
2066; RV64IA-NEXT:    ret
2067  %1 = atomicrmw xor i8* %a, i8 %b seq_cst
2068  ret i8 %1
2069}
2070
2071define i8 @atomicrmw_max_i8_monotonic(i8 *%a, i8 %b) nounwind {
2072; RV32I-LABEL: atomicrmw_max_i8_monotonic:
2073; RV32I:       # %bb.0:
2074; RV32I-NEXT:    addi sp, sp, -32
2075; RV32I-NEXT:    sw ra, 28(sp)
2076; RV32I-NEXT:    sw s0, 24(sp)
2077; RV32I-NEXT:    sw s1, 20(sp)
2078; RV32I-NEXT:    sw s2, 16(sp)
2079; RV32I-NEXT:    sw s3, 12(sp)
2080; RV32I-NEXT:    mv s2, a1
2081; RV32I-NEXT:    mv s1, a0
2082; RV32I-NEXT:    lbu a0, 0(a0)
2083; RV32I-NEXT:    slli a1, a1, 24
2084; RV32I-NEXT:    srai s0, a1, 24
2085; RV32I-NEXT:    addi s3, sp, 11
2086; RV32I-NEXT:  .LBB35_1: # %atomicrmw.start
2087; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
2088; RV32I-NEXT:    slli a1, a0, 24
2089; RV32I-NEXT:    srai a1, a1, 24
2090; RV32I-NEXT:    mv a2, a0
2091; RV32I-NEXT:    blt s0, a1, .LBB35_3
2092; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
2093; RV32I-NEXT:    # in Loop: Header=BB35_1 Depth=1
2094; RV32I-NEXT:    mv a2, s2
2095; RV32I-NEXT:  .LBB35_3: # %atomicrmw.start
2096; RV32I-NEXT:    # in Loop: Header=BB35_1 Depth=1
2097; RV32I-NEXT:    sb a0, 11(sp)
2098; RV32I-NEXT:    mv a0, s1
2099; RV32I-NEXT:    mv a1, s3
2100; RV32I-NEXT:    mv a3, zero
2101; RV32I-NEXT:    mv a4, zero
2102; RV32I-NEXT:    call __atomic_compare_exchange_1
2103; RV32I-NEXT:    mv a1, a0
2104; RV32I-NEXT:    lb a0, 11(sp)
2105; RV32I-NEXT:    beqz a1, .LBB35_1
2106; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
2107; RV32I-NEXT:    lw s3, 12(sp)
2108; RV32I-NEXT:    lw s2, 16(sp)
2109; RV32I-NEXT:    lw s1, 20(sp)
2110; RV32I-NEXT:    lw s0, 24(sp)
2111; RV32I-NEXT:    lw ra, 28(sp)
2112; RV32I-NEXT:    addi sp, sp, 32
2113; RV32I-NEXT:    ret
2114;
2115; RV32IA-LABEL: atomicrmw_max_i8_monotonic:
2116; RV32IA:       # %bb.0:
2117; RV32IA-NEXT:    slli a2, a0, 3
2118; RV32IA-NEXT:    andi a2, a2, 24
2119; RV32IA-NEXT:    addi a3, zero, 24
2120; RV32IA-NEXT:    sub a6, a3, a2
2121; RV32IA-NEXT:    addi a4, zero, 255
2122; RV32IA-NEXT:    sll a7, a4, a2
2123; RV32IA-NEXT:    slli a1, a1, 24
2124; RV32IA-NEXT:    srai a1, a1, 24
2125; RV32IA-NEXT:    sll a1, a1, a2
2126; RV32IA-NEXT:    andi a0, a0, -4
2127; RV32IA-NEXT:  .LBB35_1: # =>This Inner Loop Header: Depth=1
2128; RV32IA-NEXT:    lr.w a5, (a0)
2129; RV32IA-NEXT:    and a4, a5, a7
2130; RV32IA-NEXT:    mv a3, a5
2131; RV32IA-NEXT:    sll a4, a4, a6
2132; RV32IA-NEXT:    sra a4, a4, a6
2133; RV32IA-NEXT:    bge a4, a1, .LBB35_3
2134; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB35_1 Depth=1
2135; RV32IA-NEXT:    xor a3, a5, a1
2136; RV32IA-NEXT:    and a3, a3, a7
2137; RV32IA-NEXT:    xor a3, a5, a3
2138; RV32IA-NEXT:  .LBB35_3: # in Loop: Header=BB35_1 Depth=1
2139; RV32IA-NEXT:    sc.w a3, a3, (a0)
2140; RV32IA-NEXT:    bnez a3, .LBB35_1
2141; RV32IA-NEXT:  # %bb.4:
2142; RV32IA-NEXT:    srl a0, a5, a2
2143; RV32IA-NEXT:    ret
2144;
2145; RV64I-LABEL: atomicrmw_max_i8_monotonic:
2146; RV64I:       # %bb.0:
2147; RV64I-NEXT:    addi sp, sp, -48
2148; RV64I-NEXT:    sd ra, 40(sp)
2149; RV64I-NEXT:    sd s0, 32(sp)
2150; RV64I-NEXT:    sd s1, 24(sp)
2151; RV64I-NEXT:    sd s2, 16(sp)
2152; RV64I-NEXT:    sd s3, 8(sp)
2153; RV64I-NEXT:    mv s2, a1
2154; RV64I-NEXT:    mv s1, a0
2155; RV64I-NEXT:    lbu a0, 0(a0)
2156; RV64I-NEXT:    slli a1, a1, 56
2157; RV64I-NEXT:    srai s0, a1, 56
2158; RV64I-NEXT:    addi s3, sp, 7
2159; RV64I-NEXT:  .LBB35_1: # %atomicrmw.start
2160; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
2161; RV64I-NEXT:    slli a1, a0, 56
2162; RV64I-NEXT:    srai a1, a1, 56
2163; RV64I-NEXT:    mv a2, a0
2164; RV64I-NEXT:    blt s0, a1, .LBB35_3
2165; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
2166; RV64I-NEXT:    # in Loop: Header=BB35_1 Depth=1
2167; RV64I-NEXT:    mv a2, s2
2168; RV64I-NEXT:  .LBB35_3: # %atomicrmw.start
2169; RV64I-NEXT:    # in Loop: Header=BB35_1 Depth=1
2170; RV64I-NEXT:    sb a0, 7(sp)
2171; RV64I-NEXT:    mv a0, s1
2172; RV64I-NEXT:    mv a1, s3
2173; RV64I-NEXT:    mv a3, zero
2174; RV64I-NEXT:    mv a4, zero
2175; RV64I-NEXT:    call __atomic_compare_exchange_1
2176; RV64I-NEXT:    mv a1, a0
2177; RV64I-NEXT:    lb a0, 7(sp)
2178; RV64I-NEXT:    beqz a1, .LBB35_1
2179; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
2180; RV64I-NEXT:    ld s3, 8(sp)
2181; RV64I-NEXT:    ld s2, 16(sp)
2182; RV64I-NEXT:    ld s1, 24(sp)
2183; RV64I-NEXT:    ld s0, 32(sp)
2184; RV64I-NEXT:    ld ra, 40(sp)
2185; RV64I-NEXT:    addi sp, sp, 48
2186; RV64I-NEXT:    ret
2187;
2188; RV64IA-LABEL: atomicrmw_max_i8_monotonic:
2189; RV64IA:       # %bb.0:
2190; RV64IA-NEXT:    slli a2, a0, 3
2191; RV64IA-NEXT:    andi a2, a2, 24
2192; RV64IA-NEXT:    addi a3, zero, 56
2193; RV64IA-NEXT:    sub a6, a3, a2
2194; RV64IA-NEXT:    addi a4, zero, 255
2195; RV64IA-NEXT:    sllw a7, a4, a2
2196; RV64IA-NEXT:    slli a1, a1, 56
2197; RV64IA-NEXT:    srai a1, a1, 56
2198; RV64IA-NEXT:    sllw a1, a1, a2
2199; RV64IA-NEXT:    andi a0, a0, -4
2200; RV64IA-NEXT:  .LBB35_1: # =>This Inner Loop Header: Depth=1
2201; RV64IA-NEXT:    lr.w a5, (a0)
2202; RV64IA-NEXT:    and a4, a5, a7
2203; RV64IA-NEXT:    mv a3, a5
2204; RV64IA-NEXT:    sll a4, a4, a6
2205; RV64IA-NEXT:    sra a4, a4, a6
2206; RV64IA-NEXT:    bge a4, a1, .LBB35_3
2207; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB35_1 Depth=1
2208; RV64IA-NEXT:    xor a3, a5, a1
2209; RV64IA-NEXT:    and a3, a3, a7
2210; RV64IA-NEXT:    xor a3, a5, a3
2211; RV64IA-NEXT:  .LBB35_3: # in Loop: Header=BB35_1 Depth=1
2212; RV64IA-NEXT:    sc.w a3, a3, (a0)
2213; RV64IA-NEXT:    bnez a3, .LBB35_1
2214; RV64IA-NEXT:  # %bb.4:
2215; RV64IA-NEXT:    srlw a0, a5, a2
2216; RV64IA-NEXT:    ret
2217  %1 = atomicrmw max i8* %a, i8 %b monotonic
2218  ret i8 %1
2219}
2220
2221define i8 @atomicrmw_max_i8_acquire(i8 *%a, i8 %b) nounwind {
2222; RV32I-LABEL: atomicrmw_max_i8_acquire:
2223; RV32I:       # %bb.0:
2224; RV32I-NEXT:    addi sp, sp, -32
2225; RV32I-NEXT:    sw ra, 28(sp)
2226; RV32I-NEXT:    sw s0, 24(sp)
2227; RV32I-NEXT:    sw s1, 20(sp)
2228; RV32I-NEXT:    sw s2, 16(sp)
2229; RV32I-NEXT:    sw s3, 12(sp)
2230; RV32I-NEXT:    mv s2, a1
2231; RV32I-NEXT:    mv s1, a0
2232; RV32I-NEXT:    lbu a0, 0(a0)
2233; RV32I-NEXT:    slli a1, a1, 24
2234; RV32I-NEXT:    srai s0, a1, 24
2235; RV32I-NEXT:    addi s3, sp, 11
2236; RV32I-NEXT:  .LBB36_1: # %atomicrmw.start
2237; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
2238; RV32I-NEXT:    slli a1, a0, 24
2239; RV32I-NEXT:    srai a1, a1, 24
2240; RV32I-NEXT:    mv a2, a0
2241; RV32I-NEXT:    blt s0, a1, .LBB36_3
2242; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
2243; RV32I-NEXT:    # in Loop: Header=BB36_1 Depth=1
2244; RV32I-NEXT:    mv a2, s2
2245; RV32I-NEXT:  .LBB36_3: # %atomicrmw.start
2246; RV32I-NEXT:    # in Loop: Header=BB36_1 Depth=1
2247; RV32I-NEXT:    sb a0, 11(sp)
2248; RV32I-NEXT:    mv a0, s1
2249; RV32I-NEXT:    mv a1, s3
2250; RV32I-NEXT:    addi a3, zero, 2
2251; RV32I-NEXT:    addi a4, zero, 2
2252; RV32I-NEXT:    call __atomic_compare_exchange_1
2253; RV32I-NEXT:    mv a1, a0
2254; RV32I-NEXT:    lb a0, 11(sp)
2255; RV32I-NEXT:    beqz a1, .LBB36_1
2256; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
2257; RV32I-NEXT:    lw s3, 12(sp)
2258; RV32I-NEXT:    lw s2, 16(sp)
2259; RV32I-NEXT:    lw s1, 20(sp)
2260; RV32I-NEXT:    lw s0, 24(sp)
2261; RV32I-NEXT:    lw ra, 28(sp)
2262; RV32I-NEXT:    addi sp, sp, 32
2263; RV32I-NEXT:    ret
2264;
2265; RV32IA-LABEL: atomicrmw_max_i8_acquire:
2266; RV32IA:       # %bb.0:
2267; RV32IA-NEXT:    slli a2, a0, 3
2268; RV32IA-NEXT:    andi a2, a2, 24
2269; RV32IA-NEXT:    addi a3, zero, 24
2270; RV32IA-NEXT:    sub a6, a3, a2
2271; RV32IA-NEXT:    addi a4, zero, 255
2272; RV32IA-NEXT:    sll a7, a4, a2
2273; RV32IA-NEXT:    slli a1, a1, 24
2274; RV32IA-NEXT:    srai a1, a1, 24
2275; RV32IA-NEXT:    sll a1, a1, a2
2276; RV32IA-NEXT:    andi a0, a0, -4
2277; RV32IA-NEXT:  .LBB36_1: # =>This Inner Loop Header: Depth=1
2278; RV32IA-NEXT:    lr.w.aq a5, (a0)
2279; RV32IA-NEXT:    and a4, a5, a7
2280; RV32IA-NEXT:    mv a3, a5
2281; RV32IA-NEXT:    sll a4, a4, a6
2282; RV32IA-NEXT:    sra a4, a4, a6
2283; RV32IA-NEXT:    bge a4, a1, .LBB36_3
2284; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB36_1 Depth=1
2285; RV32IA-NEXT:    xor a3, a5, a1
2286; RV32IA-NEXT:    and a3, a3, a7
2287; RV32IA-NEXT:    xor a3, a5, a3
2288; RV32IA-NEXT:  .LBB36_3: # in Loop: Header=BB36_1 Depth=1
2289; RV32IA-NEXT:    sc.w a3, a3, (a0)
2290; RV32IA-NEXT:    bnez a3, .LBB36_1
2291; RV32IA-NEXT:  # %bb.4:
2292; RV32IA-NEXT:    srl a0, a5, a2
2293; RV32IA-NEXT:    ret
2294;
2295; RV64I-LABEL: atomicrmw_max_i8_acquire:
2296; RV64I:       # %bb.0:
2297; RV64I-NEXT:    addi sp, sp, -48
2298; RV64I-NEXT:    sd ra, 40(sp)
2299; RV64I-NEXT:    sd s0, 32(sp)
2300; RV64I-NEXT:    sd s1, 24(sp)
2301; RV64I-NEXT:    sd s2, 16(sp)
2302; RV64I-NEXT:    sd s3, 8(sp)
2303; RV64I-NEXT:    mv s2, a1
2304; RV64I-NEXT:    mv s1, a0
2305; RV64I-NEXT:    lbu a0, 0(a0)
2306; RV64I-NEXT:    slli a1, a1, 56
2307; RV64I-NEXT:    srai s0, a1, 56
2308; RV64I-NEXT:    addi s3, sp, 7
2309; RV64I-NEXT:  .LBB36_1: # %atomicrmw.start
2310; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
2311; RV64I-NEXT:    slli a1, a0, 56
2312; RV64I-NEXT:    srai a1, a1, 56
2313; RV64I-NEXT:    mv a2, a0
2314; RV64I-NEXT:    blt s0, a1, .LBB36_3
2315; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
2316; RV64I-NEXT:    # in Loop: Header=BB36_1 Depth=1
2317; RV64I-NEXT:    mv a2, s2
2318; RV64I-NEXT:  .LBB36_3: # %atomicrmw.start
2319; RV64I-NEXT:    # in Loop: Header=BB36_1 Depth=1
2320; RV64I-NEXT:    sb a0, 7(sp)
2321; RV64I-NEXT:    mv a0, s1
2322; RV64I-NEXT:    mv a1, s3
2323; RV64I-NEXT:    addi a3, zero, 2
2324; RV64I-NEXT:    addi a4, zero, 2
2325; RV64I-NEXT:    call __atomic_compare_exchange_1
2326; RV64I-NEXT:    mv a1, a0
2327; RV64I-NEXT:    lb a0, 7(sp)
2328; RV64I-NEXT:    beqz a1, .LBB36_1
2329; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
2330; RV64I-NEXT:    ld s3, 8(sp)
2331; RV64I-NEXT:    ld s2, 16(sp)
2332; RV64I-NEXT:    ld s1, 24(sp)
2333; RV64I-NEXT:    ld s0, 32(sp)
2334; RV64I-NEXT:    ld ra, 40(sp)
2335; RV64I-NEXT:    addi sp, sp, 48
2336; RV64I-NEXT:    ret
2337;
2338; RV64IA-LABEL: atomicrmw_max_i8_acquire:
2339; RV64IA:       # %bb.0:
2340; RV64IA-NEXT:    slli a2, a0, 3
2341; RV64IA-NEXT:    andi a2, a2, 24
2342; RV64IA-NEXT:    addi a3, zero, 56
2343; RV64IA-NEXT:    sub a6, a3, a2
2344; RV64IA-NEXT:    addi a4, zero, 255
2345; RV64IA-NEXT:    sllw a7, a4, a2
2346; RV64IA-NEXT:    slli a1, a1, 56
2347; RV64IA-NEXT:    srai a1, a1, 56
2348; RV64IA-NEXT:    sllw a1, a1, a2
2349; RV64IA-NEXT:    andi a0, a0, -4
2350; RV64IA-NEXT:  .LBB36_1: # =>This Inner Loop Header: Depth=1
2351; RV64IA-NEXT:    lr.w.aq a5, (a0)
2352; RV64IA-NEXT:    and a4, a5, a7
2353; RV64IA-NEXT:    mv a3, a5
2354; RV64IA-NEXT:    sll a4, a4, a6
2355; RV64IA-NEXT:    sra a4, a4, a6
2356; RV64IA-NEXT:    bge a4, a1, .LBB36_3
2357; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB36_1 Depth=1
2358; RV64IA-NEXT:    xor a3, a5, a1
2359; RV64IA-NEXT:    and a3, a3, a7
2360; RV64IA-NEXT:    xor a3, a5, a3
2361; RV64IA-NEXT:  .LBB36_3: # in Loop: Header=BB36_1 Depth=1
2362; RV64IA-NEXT:    sc.w a3, a3, (a0)
2363; RV64IA-NEXT:    bnez a3, .LBB36_1
2364; RV64IA-NEXT:  # %bb.4:
2365; RV64IA-NEXT:    srlw a0, a5, a2
2366; RV64IA-NEXT:    ret
2367  %1 = atomicrmw max i8* %a, i8 %b acquire
2368  ret i8 %1
2369}
2370
2371define i8 @atomicrmw_max_i8_release(i8 *%a, i8 %b) nounwind {
2372; RV32I-LABEL: atomicrmw_max_i8_release:
2373; RV32I:       # %bb.0:
2374; RV32I-NEXT:    addi sp, sp, -32
2375; RV32I-NEXT:    sw ra, 28(sp)
2376; RV32I-NEXT:    sw s0, 24(sp)
2377; RV32I-NEXT:    sw s1, 20(sp)
2378; RV32I-NEXT:    sw s2, 16(sp)
2379; RV32I-NEXT:    sw s3, 12(sp)
2380; RV32I-NEXT:    mv s2, a1
2381; RV32I-NEXT:    mv s1, a0
2382; RV32I-NEXT:    lbu a0, 0(a0)
2383; RV32I-NEXT:    slli a1, a1, 24
2384; RV32I-NEXT:    srai s0, a1, 24
2385; RV32I-NEXT:    addi s3, sp, 11
2386; RV32I-NEXT:  .LBB37_1: # %atomicrmw.start
2387; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
2388; RV32I-NEXT:    slli a1, a0, 24
2389; RV32I-NEXT:    srai a1, a1, 24
2390; RV32I-NEXT:    mv a2, a0
2391; RV32I-NEXT:    blt s0, a1, .LBB37_3
2392; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
2393; RV32I-NEXT:    # in Loop: Header=BB37_1 Depth=1
2394; RV32I-NEXT:    mv a2, s2
2395; RV32I-NEXT:  .LBB37_3: # %atomicrmw.start
2396; RV32I-NEXT:    # in Loop: Header=BB37_1 Depth=1
2397; RV32I-NEXT:    sb a0, 11(sp)
2398; RV32I-NEXT:    mv a0, s1
2399; RV32I-NEXT:    mv a1, s3
2400; RV32I-NEXT:    addi a3, zero, 3
2401; RV32I-NEXT:    mv a4, zero
2402; RV32I-NEXT:    call __atomic_compare_exchange_1
2403; RV32I-NEXT:    mv a1, a0
2404; RV32I-NEXT:    lb a0, 11(sp)
2405; RV32I-NEXT:    beqz a1, .LBB37_1
2406; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
2407; RV32I-NEXT:    lw s3, 12(sp)
2408; RV32I-NEXT:    lw s2, 16(sp)
2409; RV32I-NEXT:    lw s1, 20(sp)
2410; RV32I-NEXT:    lw s0, 24(sp)
2411; RV32I-NEXT:    lw ra, 28(sp)
2412; RV32I-NEXT:    addi sp, sp, 32
2413; RV32I-NEXT:    ret
2414;
2415; RV32IA-LABEL: atomicrmw_max_i8_release:
2416; RV32IA:       # %bb.0:
2417; RV32IA-NEXT:    slli a2, a0, 3
2418; RV32IA-NEXT:    andi a2, a2, 24
2419; RV32IA-NEXT:    addi a3, zero, 24
2420; RV32IA-NEXT:    sub a6, a3, a2
2421; RV32IA-NEXT:    addi a4, zero, 255
2422; RV32IA-NEXT:    sll a7, a4, a2
2423; RV32IA-NEXT:    slli a1, a1, 24
2424; RV32IA-NEXT:    srai a1, a1, 24
2425; RV32IA-NEXT:    sll a1, a1, a2
2426; RV32IA-NEXT:    andi a0, a0, -4
2427; RV32IA-NEXT:  .LBB37_1: # =>This Inner Loop Header: Depth=1
2428; RV32IA-NEXT:    lr.w a5, (a0)
2429; RV32IA-NEXT:    and a4, a5, a7
2430; RV32IA-NEXT:    mv a3, a5
2431; RV32IA-NEXT:    sll a4, a4, a6
2432; RV32IA-NEXT:    sra a4, a4, a6
2433; RV32IA-NEXT:    bge a4, a1, .LBB37_3
2434; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB37_1 Depth=1
2435; RV32IA-NEXT:    xor a3, a5, a1
2436; RV32IA-NEXT:    and a3, a3, a7
2437; RV32IA-NEXT:    xor a3, a5, a3
2438; RV32IA-NEXT:  .LBB37_3: # in Loop: Header=BB37_1 Depth=1
2439; RV32IA-NEXT:    sc.w.rl a3, a3, (a0)
2440; RV32IA-NEXT:    bnez a3, .LBB37_1
2441; RV32IA-NEXT:  # %bb.4:
2442; RV32IA-NEXT:    srl a0, a5, a2
2443; RV32IA-NEXT:    ret
2444;
2445; RV64I-LABEL: atomicrmw_max_i8_release:
2446; RV64I:       # %bb.0:
2447; RV64I-NEXT:    addi sp, sp, -48
2448; RV64I-NEXT:    sd ra, 40(sp)
2449; RV64I-NEXT:    sd s0, 32(sp)
2450; RV64I-NEXT:    sd s1, 24(sp)
2451; RV64I-NEXT:    sd s2, 16(sp)
2452; RV64I-NEXT:    sd s3, 8(sp)
2453; RV64I-NEXT:    mv s2, a1
2454; RV64I-NEXT:    mv s1, a0
2455; RV64I-NEXT:    lbu a0, 0(a0)
2456; RV64I-NEXT:    slli a1, a1, 56
2457; RV64I-NEXT:    srai s0, a1, 56
2458; RV64I-NEXT:    addi s3, sp, 7
2459; RV64I-NEXT:  .LBB37_1: # %atomicrmw.start
2460; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
2461; RV64I-NEXT:    slli a1, a0, 56
2462; RV64I-NEXT:    srai a1, a1, 56
2463; RV64I-NEXT:    mv a2, a0
2464; RV64I-NEXT:    blt s0, a1, .LBB37_3
2465; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
2466; RV64I-NEXT:    # in Loop: Header=BB37_1 Depth=1
2467; RV64I-NEXT:    mv a2, s2
2468; RV64I-NEXT:  .LBB37_3: # %atomicrmw.start
2469; RV64I-NEXT:    # in Loop: Header=BB37_1 Depth=1
2470; RV64I-NEXT:    sb a0, 7(sp)
2471; RV64I-NEXT:    mv a0, s1
2472; RV64I-NEXT:    mv a1, s3
2473; RV64I-NEXT:    addi a3, zero, 3
2474; RV64I-NEXT:    mv a4, zero
2475; RV64I-NEXT:    call __atomic_compare_exchange_1
2476; RV64I-NEXT:    mv a1, a0
2477; RV64I-NEXT:    lb a0, 7(sp)
2478; RV64I-NEXT:    beqz a1, .LBB37_1
2479; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
2480; RV64I-NEXT:    ld s3, 8(sp)
2481; RV64I-NEXT:    ld s2, 16(sp)
2482; RV64I-NEXT:    ld s1, 24(sp)
2483; RV64I-NEXT:    ld s0, 32(sp)
2484; RV64I-NEXT:    ld ra, 40(sp)
2485; RV64I-NEXT:    addi sp, sp, 48
2486; RV64I-NEXT:    ret
2487;
2488; RV64IA-LABEL: atomicrmw_max_i8_release:
2489; RV64IA:       # %bb.0:
2490; RV64IA-NEXT:    slli a2, a0, 3
2491; RV64IA-NEXT:    andi a2, a2, 24
2492; RV64IA-NEXT:    addi a3, zero, 56
2493; RV64IA-NEXT:    sub a6, a3, a2
2494; RV64IA-NEXT:    addi a4, zero, 255
2495; RV64IA-NEXT:    sllw a7, a4, a2
2496; RV64IA-NEXT:    slli a1, a1, 56
2497; RV64IA-NEXT:    srai a1, a1, 56
2498; RV64IA-NEXT:    sllw a1, a1, a2
2499; RV64IA-NEXT:    andi a0, a0, -4
2500; RV64IA-NEXT:  .LBB37_1: # =>This Inner Loop Header: Depth=1
2501; RV64IA-NEXT:    lr.w a5, (a0)
2502; RV64IA-NEXT:    and a4, a5, a7
2503; RV64IA-NEXT:    mv a3, a5
2504; RV64IA-NEXT:    sll a4, a4, a6
2505; RV64IA-NEXT:    sra a4, a4, a6
2506; RV64IA-NEXT:    bge a4, a1, .LBB37_3
2507; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB37_1 Depth=1
2508; RV64IA-NEXT:    xor a3, a5, a1
2509; RV64IA-NEXT:    and a3, a3, a7
2510; RV64IA-NEXT:    xor a3, a5, a3
2511; RV64IA-NEXT:  .LBB37_3: # in Loop: Header=BB37_1 Depth=1
2512; RV64IA-NEXT:    sc.w.rl a3, a3, (a0)
2513; RV64IA-NEXT:    bnez a3, .LBB37_1
2514; RV64IA-NEXT:  # %bb.4:
2515; RV64IA-NEXT:    srlw a0, a5, a2
2516; RV64IA-NEXT:    ret
2517  %1 = atomicrmw max i8* %a, i8 %b release
2518  ret i8 %1
2519}
2520
2521define i8 @atomicrmw_max_i8_acq_rel(i8 *%a, i8 %b) nounwind {
2522; RV32I-LABEL: atomicrmw_max_i8_acq_rel:
2523; RV32I:       # %bb.0:
2524; RV32I-NEXT:    addi sp, sp, -32
2525; RV32I-NEXT:    sw ra, 28(sp)
2526; RV32I-NEXT:    sw s0, 24(sp)
2527; RV32I-NEXT:    sw s1, 20(sp)
2528; RV32I-NEXT:    sw s2, 16(sp)
2529; RV32I-NEXT:    sw s3, 12(sp)
2530; RV32I-NEXT:    mv s2, a1
2531; RV32I-NEXT:    mv s1, a0
2532; RV32I-NEXT:    lbu a0, 0(a0)
2533; RV32I-NEXT:    slli a1, a1, 24
2534; RV32I-NEXT:    srai s0, a1, 24
2535; RV32I-NEXT:    addi s3, sp, 11
2536; RV32I-NEXT:  .LBB38_1: # %atomicrmw.start
2537; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
2538; RV32I-NEXT:    slli a1, a0, 24
2539; RV32I-NEXT:    srai a1, a1, 24
2540; RV32I-NEXT:    mv a2, a0
2541; RV32I-NEXT:    blt s0, a1, .LBB38_3
2542; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
2543; RV32I-NEXT:    # in Loop: Header=BB38_1 Depth=1
2544; RV32I-NEXT:    mv a2, s2
2545; RV32I-NEXT:  .LBB38_3: # %atomicrmw.start
2546; RV32I-NEXT:    # in Loop: Header=BB38_1 Depth=1
2547; RV32I-NEXT:    sb a0, 11(sp)
2548; RV32I-NEXT:    mv a0, s1
2549; RV32I-NEXT:    mv a1, s3
2550; RV32I-NEXT:    addi a3, zero, 4
2551; RV32I-NEXT:    addi a4, zero, 2
2552; RV32I-NEXT:    call __atomic_compare_exchange_1
2553; RV32I-NEXT:    mv a1, a0
2554; RV32I-NEXT:    lb a0, 11(sp)
2555; RV32I-NEXT:    beqz a1, .LBB38_1
2556; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
2557; RV32I-NEXT:    lw s3, 12(sp)
2558; RV32I-NEXT:    lw s2, 16(sp)
2559; RV32I-NEXT:    lw s1, 20(sp)
2560; RV32I-NEXT:    lw s0, 24(sp)
2561; RV32I-NEXT:    lw ra, 28(sp)
2562; RV32I-NEXT:    addi sp, sp, 32
2563; RV32I-NEXT:    ret
2564;
2565; RV32IA-LABEL: atomicrmw_max_i8_acq_rel:
2566; RV32IA:       # %bb.0:
2567; RV32IA-NEXT:    slli a2, a0, 3
2568; RV32IA-NEXT:    andi a2, a2, 24
2569; RV32IA-NEXT:    addi a3, zero, 24
2570; RV32IA-NEXT:    sub a6, a3, a2
2571; RV32IA-NEXT:    addi a4, zero, 255
2572; RV32IA-NEXT:    sll a7, a4, a2
2573; RV32IA-NEXT:    slli a1, a1, 24
2574; RV32IA-NEXT:    srai a1, a1, 24
2575; RV32IA-NEXT:    sll a1, a1, a2
2576; RV32IA-NEXT:    andi a0, a0, -4
2577; RV32IA-NEXT:  .LBB38_1: # =>This Inner Loop Header: Depth=1
2578; RV32IA-NEXT:    lr.w.aq a5, (a0)
2579; RV32IA-NEXT:    and a4, a5, a7
2580; RV32IA-NEXT:    mv a3, a5
2581; RV32IA-NEXT:    sll a4, a4, a6
2582; RV32IA-NEXT:    sra a4, a4, a6
2583; RV32IA-NEXT:    bge a4, a1, .LBB38_3
2584; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB38_1 Depth=1
2585; RV32IA-NEXT:    xor a3, a5, a1
2586; RV32IA-NEXT:    and a3, a3, a7
2587; RV32IA-NEXT:    xor a3, a5, a3
2588; RV32IA-NEXT:  .LBB38_3: # in Loop: Header=BB38_1 Depth=1
2589; RV32IA-NEXT:    sc.w.rl a3, a3, (a0)
2590; RV32IA-NEXT:    bnez a3, .LBB38_1
2591; RV32IA-NEXT:  # %bb.4:
2592; RV32IA-NEXT:    srl a0, a5, a2
2593; RV32IA-NEXT:    ret
2594;
2595; RV64I-LABEL: atomicrmw_max_i8_acq_rel:
2596; RV64I:       # %bb.0:
2597; RV64I-NEXT:    addi sp, sp, -48
2598; RV64I-NEXT:    sd ra, 40(sp)
2599; RV64I-NEXT:    sd s0, 32(sp)
2600; RV64I-NEXT:    sd s1, 24(sp)
2601; RV64I-NEXT:    sd s2, 16(sp)
2602; RV64I-NEXT:    sd s3, 8(sp)
2603; RV64I-NEXT:    mv s2, a1
2604; RV64I-NEXT:    mv s1, a0
2605; RV64I-NEXT:    lbu a0, 0(a0)
2606; RV64I-NEXT:    slli a1, a1, 56
2607; RV64I-NEXT:    srai s0, a1, 56
2608; RV64I-NEXT:    addi s3, sp, 7
2609; RV64I-NEXT:  .LBB38_1: # %atomicrmw.start
2610; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
2611; RV64I-NEXT:    slli a1, a0, 56
2612; RV64I-NEXT:    srai a1, a1, 56
2613; RV64I-NEXT:    mv a2, a0
2614; RV64I-NEXT:    blt s0, a1, .LBB38_3
2615; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
2616; RV64I-NEXT:    # in Loop: Header=BB38_1 Depth=1
2617; RV64I-NEXT:    mv a2, s2
2618; RV64I-NEXT:  .LBB38_3: # %atomicrmw.start
2619; RV64I-NEXT:    # in Loop: Header=BB38_1 Depth=1
2620; RV64I-NEXT:    sb a0, 7(sp)
2621; RV64I-NEXT:    mv a0, s1
2622; RV64I-NEXT:    mv a1, s3
2623; RV64I-NEXT:    addi a3, zero, 4
2624; RV64I-NEXT:    addi a4, zero, 2
2625; RV64I-NEXT:    call __atomic_compare_exchange_1
2626; RV64I-NEXT:    mv a1, a0
2627; RV64I-NEXT:    lb a0, 7(sp)
2628; RV64I-NEXT:    beqz a1, .LBB38_1
2629; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
2630; RV64I-NEXT:    ld s3, 8(sp)
2631; RV64I-NEXT:    ld s2, 16(sp)
2632; RV64I-NEXT:    ld s1, 24(sp)
2633; RV64I-NEXT:    ld s0, 32(sp)
2634; RV64I-NEXT:    ld ra, 40(sp)
2635; RV64I-NEXT:    addi sp, sp, 48
2636; RV64I-NEXT:    ret
2637;
2638; RV64IA-LABEL: atomicrmw_max_i8_acq_rel:
2639; RV64IA:       # %bb.0:
2640; RV64IA-NEXT:    slli a2, a0, 3
2641; RV64IA-NEXT:    andi a2, a2, 24
2642; RV64IA-NEXT:    addi a3, zero, 56
2643; RV64IA-NEXT:    sub a6, a3, a2
2644; RV64IA-NEXT:    addi a4, zero, 255
2645; RV64IA-NEXT:    sllw a7, a4, a2
2646; RV64IA-NEXT:    slli a1, a1, 56
2647; RV64IA-NEXT:    srai a1, a1, 56
2648; RV64IA-NEXT:    sllw a1, a1, a2
2649; RV64IA-NEXT:    andi a0, a0, -4
2650; RV64IA-NEXT:  .LBB38_1: # =>This Inner Loop Header: Depth=1
2651; RV64IA-NEXT:    lr.w.aq a5, (a0)
2652; RV64IA-NEXT:    and a4, a5, a7
2653; RV64IA-NEXT:    mv a3, a5
2654; RV64IA-NEXT:    sll a4, a4, a6
2655; RV64IA-NEXT:    sra a4, a4, a6
2656; RV64IA-NEXT:    bge a4, a1, .LBB38_3
2657; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB38_1 Depth=1
2658; RV64IA-NEXT:    xor a3, a5, a1
2659; RV64IA-NEXT:    and a3, a3, a7
2660; RV64IA-NEXT:    xor a3, a5, a3
2661; RV64IA-NEXT:  .LBB38_3: # in Loop: Header=BB38_1 Depth=1
2662; RV64IA-NEXT:    sc.w.rl a3, a3, (a0)
2663; RV64IA-NEXT:    bnez a3, .LBB38_1
2664; RV64IA-NEXT:  # %bb.4:
2665; RV64IA-NEXT:    srlw a0, a5, a2
2666; RV64IA-NEXT:    ret
2667  %1 = atomicrmw max i8* %a, i8 %b acq_rel
2668  ret i8 %1
2669}
2670
2671define i8 @atomicrmw_max_i8_seq_cst(i8 *%a, i8 %b) nounwind {
2672; RV32I-LABEL: atomicrmw_max_i8_seq_cst:
2673; RV32I:       # %bb.0:
2674; RV32I-NEXT:    addi sp, sp, -32
2675; RV32I-NEXT:    sw ra, 28(sp)
2676; RV32I-NEXT:    sw s0, 24(sp)
2677; RV32I-NEXT:    sw s1, 20(sp)
2678; RV32I-NEXT:    sw s2, 16(sp)
2679; RV32I-NEXT:    sw s3, 12(sp)
2680; RV32I-NEXT:    mv s2, a1
2681; RV32I-NEXT:    mv s1, a0
2682; RV32I-NEXT:    lbu a0, 0(a0)
2683; RV32I-NEXT:    slli a1, a1, 24
2684; RV32I-NEXT:    srai s0, a1, 24
2685; RV32I-NEXT:    addi s3, sp, 11
2686; RV32I-NEXT:  .LBB39_1: # %atomicrmw.start
2687; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
2688; RV32I-NEXT:    slli a1, a0, 24
2689; RV32I-NEXT:    srai a1, a1, 24
2690; RV32I-NEXT:    mv a2, a0
2691; RV32I-NEXT:    blt s0, a1, .LBB39_3
2692; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
2693; RV32I-NEXT:    # in Loop: Header=BB39_1 Depth=1
2694; RV32I-NEXT:    mv a2, s2
2695; RV32I-NEXT:  .LBB39_3: # %atomicrmw.start
2696; RV32I-NEXT:    # in Loop: Header=BB39_1 Depth=1
2697; RV32I-NEXT:    sb a0, 11(sp)
2698; RV32I-NEXT:    mv a0, s1
2699; RV32I-NEXT:    mv a1, s3
2700; RV32I-NEXT:    addi a3, zero, 5
2701; RV32I-NEXT:    addi a4, zero, 5
2702; RV32I-NEXT:    call __atomic_compare_exchange_1
2703; RV32I-NEXT:    mv a1, a0
2704; RV32I-NEXT:    lb a0, 11(sp)
2705; RV32I-NEXT:    beqz a1, .LBB39_1
2706; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
2707; RV32I-NEXT:    lw s3, 12(sp)
2708; RV32I-NEXT:    lw s2, 16(sp)
2709; RV32I-NEXT:    lw s1, 20(sp)
2710; RV32I-NEXT:    lw s0, 24(sp)
2711; RV32I-NEXT:    lw ra, 28(sp)
2712; RV32I-NEXT:    addi sp, sp, 32
2713; RV32I-NEXT:    ret
2714;
2715; RV32IA-LABEL: atomicrmw_max_i8_seq_cst:
2716; RV32IA:       # %bb.0:
2717; RV32IA-NEXT:    slli a2, a0, 3
2718; RV32IA-NEXT:    andi a2, a2, 24
2719; RV32IA-NEXT:    addi a3, zero, 24
2720; RV32IA-NEXT:    sub a6, a3, a2
2721; RV32IA-NEXT:    addi a4, zero, 255
2722; RV32IA-NEXT:    sll a7, a4, a2
2723; RV32IA-NEXT:    slli a1, a1, 24
2724; RV32IA-NEXT:    srai a1, a1, 24
2725; RV32IA-NEXT:    sll a1, a1, a2
2726; RV32IA-NEXT:    andi a0, a0, -4
2727; RV32IA-NEXT:  .LBB39_1: # =>This Inner Loop Header: Depth=1
2728; RV32IA-NEXT:    lr.w.aqrl a5, (a0)
2729; RV32IA-NEXT:    and a4, a5, a7
2730; RV32IA-NEXT:    mv a3, a5
2731; RV32IA-NEXT:    sll a4, a4, a6
2732; RV32IA-NEXT:    sra a4, a4, a6
2733; RV32IA-NEXT:    bge a4, a1, .LBB39_3
2734; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB39_1 Depth=1
2735; RV32IA-NEXT:    xor a3, a5, a1
2736; RV32IA-NEXT:    and a3, a3, a7
2737; RV32IA-NEXT:    xor a3, a5, a3
2738; RV32IA-NEXT:  .LBB39_3: # in Loop: Header=BB39_1 Depth=1
2739; RV32IA-NEXT:    sc.w.aqrl a3, a3, (a0)
2740; RV32IA-NEXT:    bnez a3, .LBB39_1
2741; RV32IA-NEXT:  # %bb.4:
2742; RV32IA-NEXT:    srl a0, a5, a2
2743; RV32IA-NEXT:    ret
2744;
2745; RV64I-LABEL: atomicrmw_max_i8_seq_cst:
2746; RV64I:       # %bb.0:
2747; RV64I-NEXT:    addi sp, sp, -48
2748; RV64I-NEXT:    sd ra, 40(sp)
2749; RV64I-NEXT:    sd s0, 32(sp)
2750; RV64I-NEXT:    sd s1, 24(sp)
2751; RV64I-NEXT:    sd s2, 16(sp)
2752; RV64I-NEXT:    sd s3, 8(sp)
2753; RV64I-NEXT:    mv s2, a1
2754; RV64I-NEXT:    mv s1, a0
2755; RV64I-NEXT:    lbu a0, 0(a0)
2756; RV64I-NEXT:    slli a1, a1, 56
2757; RV64I-NEXT:    srai s0, a1, 56
2758; RV64I-NEXT:    addi s3, sp, 7
2759; RV64I-NEXT:  .LBB39_1: # %atomicrmw.start
2760; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
2761; RV64I-NEXT:    slli a1, a0, 56
2762; RV64I-NEXT:    srai a1, a1, 56
2763; RV64I-NEXT:    mv a2, a0
2764; RV64I-NEXT:    blt s0, a1, .LBB39_3
2765; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
2766; RV64I-NEXT:    # in Loop: Header=BB39_1 Depth=1
2767; RV64I-NEXT:    mv a2, s2
2768; RV64I-NEXT:  .LBB39_3: # %atomicrmw.start
2769; RV64I-NEXT:    # in Loop: Header=BB39_1 Depth=1
2770; RV64I-NEXT:    sb a0, 7(sp)
2771; RV64I-NEXT:    mv a0, s1
2772; RV64I-NEXT:    mv a1, s3
2773; RV64I-NEXT:    addi a3, zero, 5
2774; RV64I-NEXT:    addi a4, zero, 5
2775; RV64I-NEXT:    call __atomic_compare_exchange_1
2776; RV64I-NEXT:    mv a1, a0
2777; RV64I-NEXT:    lb a0, 7(sp)
2778; RV64I-NEXT:    beqz a1, .LBB39_1
2779; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
2780; RV64I-NEXT:    ld s3, 8(sp)
2781; RV64I-NEXT:    ld s2, 16(sp)
2782; RV64I-NEXT:    ld s1, 24(sp)
2783; RV64I-NEXT:    ld s0, 32(sp)
2784; RV64I-NEXT:    ld ra, 40(sp)
2785; RV64I-NEXT:    addi sp, sp, 48
2786; RV64I-NEXT:    ret
2787;
2788; RV64IA-LABEL: atomicrmw_max_i8_seq_cst:
2789; RV64IA:       # %bb.0:
2790; RV64IA-NEXT:    slli a2, a0, 3
2791; RV64IA-NEXT:    andi a2, a2, 24
2792; RV64IA-NEXT:    addi a3, zero, 56
2793; RV64IA-NEXT:    sub a6, a3, a2
2794; RV64IA-NEXT:    addi a4, zero, 255
2795; RV64IA-NEXT:    sllw a7, a4, a2
2796; RV64IA-NEXT:    slli a1, a1, 56
2797; RV64IA-NEXT:    srai a1, a1, 56
2798; RV64IA-NEXT:    sllw a1, a1, a2
2799; RV64IA-NEXT:    andi a0, a0, -4
2800; RV64IA-NEXT:  .LBB39_1: # =>This Inner Loop Header: Depth=1
2801; RV64IA-NEXT:    lr.w.aqrl a5, (a0)
2802; RV64IA-NEXT:    and a4, a5, a7
2803; RV64IA-NEXT:    mv a3, a5
2804; RV64IA-NEXT:    sll a4, a4, a6
2805; RV64IA-NEXT:    sra a4, a4, a6
2806; RV64IA-NEXT:    bge a4, a1, .LBB39_3
2807; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB39_1 Depth=1
2808; RV64IA-NEXT:    xor a3, a5, a1
2809; RV64IA-NEXT:    and a3, a3, a7
2810; RV64IA-NEXT:    xor a3, a5, a3
2811; RV64IA-NEXT:  .LBB39_3: # in Loop: Header=BB39_1 Depth=1
2812; RV64IA-NEXT:    sc.w.aqrl a3, a3, (a0)
2813; RV64IA-NEXT:    bnez a3, .LBB39_1
2814; RV64IA-NEXT:  # %bb.4:
2815; RV64IA-NEXT:    srlw a0, a5, a2
2816; RV64IA-NEXT:    ret
2817  %1 = atomicrmw max i8* %a, i8 %b seq_cst
2818  ret i8 %1
2819}
2820
2821define i8 @atomicrmw_min_i8_monotonic(i8 *%a, i8 %b) nounwind {
2822; RV32I-LABEL: atomicrmw_min_i8_monotonic:
2823; RV32I:       # %bb.0:
2824; RV32I-NEXT:    addi sp, sp, -32
2825; RV32I-NEXT:    sw ra, 28(sp)
2826; RV32I-NEXT:    sw s0, 24(sp)
2827; RV32I-NEXT:    sw s1, 20(sp)
2828; RV32I-NEXT:    sw s2, 16(sp)
2829; RV32I-NEXT:    sw s3, 12(sp)
2830; RV32I-NEXT:    mv s2, a1
2831; RV32I-NEXT:    mv s1, a0
2832; RV32I-NEXT:    lbu a0, 0(a0)
2833; RV32I-NEXT:    slli a1, a1, 24
2834; RV32I-NEXT:    srai s0, a1, 24
2835; RV32I-NEXT:    addi s3, sp, 11
2836; RV32I-NEXT:  .LBB40_1: # %atomicrmw.start
2837; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
2838; RV32I-NEXT:    slli a1, a0, 24
2839; RV32I-NEXT:    srai a1, a1, 24
2840; RV32I-NEXT:    mv a2, a0
2841; RV32I-NEXT:    bge s0, a1, .LBB40_3
2842; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
2843; RV32I-NEXT:    # in Loop: Header=BB40_1 Depth=1
2844; RV32I-NEXT:    mv a2, s2
2845; RV32I-NEXT:  .LBB40_3: # %atomicrmw.start
2846; RV32I-NEXT:    # in Loop: Header=BB40_1 Depth=1
2847; RV32I-NEXT:    sb a0, 11(sp)
2848; RV32I-NEXT:    mv a0, s1
2849; RV32I-NEXT:    mv a1, s3
2850; RV32I-NEXT:    mv a3, zero
2851; RV32I-NEXT:    mv a4, zero
2852; RV32I-NEXT:    call __atomic_compare_exchange_1
2853; RV32I-NEXT:    mv a1, a0
2854; RV32I-NEXT:    lb a0, 11(sp)
2855; RV32I-NEXT:    beqz a1, .LBB40_1
2856; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
2857; RV32I-NEXT:    lw s3, 12(sp)
2858; RV32I-NEXT:    lw s2, 16(sp)
2859; RV32I-NEXT:    lw s1, 20(sp)
2860; RV32I-NEXT:    lw s0, 24(sp)
2861; RV32I-NEXT:    lw ra, 28(sp)
2862; RV32I-NEXT:    addi sp, sp, 32
2863; RV32I-NEXT:    ret
2864;
2865; RV32IA-LABEL: atomicrmw_min_i8_monotonic:
2866; RV32IA:       # %bb.0:
2867; RV32IA-NEXT:    slli a2, a0, 3
2868; RV32IA-NEXT:    andi a2, a2, 24
2869; RV32IA-NEXT:    addi a3, zero, 24
2870; RV32IA-NEXT:    sub a6, a3, a2
2871; RV32IA-NEXT:    addi a4, zero, 255
2872; RV32IA-NEXT:    sll a7, a4, a2
2873; RV32IA-NEXT:    slli a1, a1, 24
2874; RV32IA-NEXT:    srai a1, a1, 24
2875; RV32IA-NEXT:    sll a1, a1, a2
2876; RV32IA-NEXT:    andi a0, a0, -4
2877; RV32IA-NEXT:  .LBB40_1: # =>This Inner Loop Header: Depth=1
2878; RV32IA-NEXT:    lr.w a5, (a0)
2879; RV32IA-NEXT:    and a4, a5, a7
2880; RV32IA-NEXT:    mv a3, a5
2881; RV32IA-NEXT:    sll a4, a4, a6
2882; RV32IA-NEXT:    sra a4, a4, a6
2883; RV32IA-NEXT:    bge a1, a4, .LBB40_3
2884; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB40_1 Depth=1
2885; RV32IA-NEXT:    xor a3, a5, a1
2886; RV32IA-NEXT:    and a3, a3, a7
2887; RV32IA-NEXT:    xor a3, a5, a3
2888; RV32IA-NEXT:  .LBB40_3: # in Loop: Header=BB40_1 Depth=1
2889; RV32IA-NEXT:    sc.w a3, a3, (a0)
2890; RV32IA-NEXT:    bnez a3, .LBB40_1
2891; RV32IA-NEXT:  # %bb.4:
2892; RV32IA-NEXT:    srl a0, a5, a2
2893; RV32IA-NEXT:    ret
2894;
2895; RV64I-LABEL: atomicrmw_min_i8_monotonic:
2896; RV64I:       # %bb.0:
2897; RV64I-NEXT:    addi sp, sp, -48
2898; RV64I-NEXT:    sd ra, 40(sp)
2899; RV64I-NEXT:    sd s0, 32(sp)
2900; RV64I-NEXT:    sd s1, 24(sp)
2901; RV64I-NEXT:    sd s2, 16(sp)
2902; RV64I-NEXT:    sd s3, 8(sp)
2903; RV64I-NEXT:    mv s2, a1
2904; RV64I-NEXT:    mv s1, a0
2905; RV64I-NEXT:    lbu a0, 0(a0)
2906; RV64I-NEXT:    slli a1, a1, 56
2907; RV64I-NEXT:    srai s0, a1, 56
2908; RV64I-NEXT:    addi s3, sp, 7
2909; RV64I-NEXT:  .LBB40_1: # %atomicrmw.start
2910; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
2911; RV64I-NEXT:    slli a1, a0, 56
2912; RV64I-NEXT:    srai a1, a1, 56
2913; RV64I-NEXT:    mv a2, a0
2914; RV64I-NEXT:    bge s0, a1, .LBB40_3
2915; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
2916; RV64I-NEXT:    # in Loop: Header=BB40_1 Depth=1
2917; RV64I-NEXT:    mv a2, s2
2918; RV64I-NEXT:  .LBB40_3: # %atomicrmw.start
2919; RV64I-NEXT:    # in Loop: Header=BB40_1 Depth=1
2920; RV64I-NEXT:    sb a0, 7(sp)
2921; RV64I-NEXT:    mv a0, s1
2922; RV64I-NEXT:    mv a1, s3
2923; RV64I-NEXT:    mv a3, zero
2924; RV64I-NEXT:    mv a4, zero
2925; RV64I-NEXT:    call __atomic_compare_exchange_1
2926; RV64I-NEXT:    mv a1, a0
2927; RV64I-NEXT:    lb a0, 7(sp)
2928; RV64I-NEXT:    beqz a1, .LBB40_1
2929; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
2930; RV64I-NEXT:    ld s3, 8(sp)
2931; RV64I-NEXT:    ld s2, 16(sp)
2932; RV64I-NEXT:    ld s1, 24(sp)
2933; RV64I-NEXT:    ld s0, 32(sp)
2934; RV64I-NEXT:    ld ra, 40(sp)
2935; RV64I-NEXT:    addi sp, sp, 48
2936; RV64I-NEXT:    ret
2937;
2938; RV64IA-LABEL: atomicrmw_min_i8_monotonic:
2939; RV64IA:       # %bb.0:
2940; RV64IA-NEXT:    slli a2, a0, 3
2941; RV64IA-NEXT:    andi a2, a2, 24
2942; RV64IA-NEXT:    addi a3, zero, 56
2943; RV64IA-NEXT:    sub a6, a3, a2
2944; RV64IA-NEXT:    addi a4, zero, 255
2945; RV64IA-NEXT:    sllw a7, a4, a2
2946; RV64IA-NEXT:    slli a1, a1, 56
2947; RV64IA-NEXT:    srai a1, a1, 56
2948; RV64IA-NEXT:    sllw a1, a1, a2
2949; RV64IA-NEXT:    andi a0, a0, -4
2950; RV64IA-NEXT:  .LBB40_1: # =>This Inner Loop Header: Depth=1
2951; RV64IA-NEXT:    lr.w a5, (a0)
2952; RV64IA-NEXT:    and a4, a5, a7
2953; RV64IA-NEXT:    mv a3, a5
2954; RV64IA-NEXT:    sll a4, a4, a6
2955; RV64IA-NEXT:    sra a4, a4, a6
2956; RV64IA-NEXT:    bge a1, a4, .LBB40_3
2957; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB40_1 Depth=1
2958; RV64IA-NEXT:    xor a3, a5, a1
2959; RV64IA-NEXT:    and a3, a3, a7
2960; RV64IA-NEXT:    xor a3, a5, a3
2961; RV64IA-NEXT:  .LBB40_3: # in Loop: Header=BB40_1 Depth=1
2962; RV64IA-NEXT:    sc.w a3, a3, (a0)
2963; RV64IA-NEXT:    bnez a3, .LBB40_1
2964; RV64IA-NEXT:  # %bb.4:
2965; RV64IA-NEXT:    srlw a0, a5, a2
2966; RV64IA-NEXT:    ret
2967  %1 = atomicrmw min i8* %a, i8 %b monotonic
2968  ret i8 %1
2969}
2970
2971define i8 @atomicrmw_min_i8_acquire(i8 *%a, i8 %b) nounwind {
2972; RV32I-LABEL: atomicrmw_min_i8_acquire:
2973; RV32I:       # %bb.0:
2974; RV32I-NEXT:    addi sp, sp, -32
2975; RV32I-NEXT:    sw ra, 28(sp)
2976; RV32I-NEXT:    sw s0, 24(sp)
2977; RV32I-NEXT:    sw s1, 20(sp)
2978; RV32I-NEXT:    sw s2, 16(sp)
2979; RV32I-NEXT:    sw s3, 12(sp)
2980; RV32I-NEXT:    mv s2, a1
2981; RV32I-NEXT:    mv s1, a0
2982; RV32I-NEXT:    lbu a0, 0(a0)
2983; RV32I-NEXT:    slli a1, a1, 24
2984; RV32I-NEXT:    srai s0, a1, 24
2985; RV32I-NEXT:    addi s3, sp, 11
2986; RV32I-NEXT:  .LBB41_1: # %atomicrmw.start
2987; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
2988; RV32I-NEXT:    slli a1, a0, 24
2989; RV32I-NEXT:    srai a1, a1, 24
2990; RV32I-NEXT:    mv a2, a0
2991; RV32I-NEXT:    bge s0, a1, .LBB41_3
2992; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
2993; RV32I-NEXT:    # in Loop: Header=BB41_1 Depth=1
2994; RV32I-NEXT:    mv a2, s2
2995; RV32I-NEXT:  .LBB41_3: # %atomicrmw.start
2996; RV32I-NEXT:    # in Loop: Header=BB41_1 Depth=1
2997; RV32I-NEXT:    sb a0, 11(sp)
2998; RV32I-NEXT:    mv a0, s1
2999; RV32I-NEXT:    mv a1, s3
3000; RV32I-NEXT:    addi a3, zero, 2
3001; RV32I-NEXT:    addi a4, zero, 2
3002; RV32I-NEXT:    call __atomic_compare_exchange_1
3003; RV32I-NEXT:    mv a1, a0
3004; RV32I-NEXT:    lb a0, 11(sp)
3005; RV32I-NEXT:    beqz a1, .LBB41_1
3006; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
3007; RV32I-NEXT:    lw s3, 12(sp)
3008; RV32I-NEXT:    lw s2, 16(sp)
3009; RV32I-NEXT:    lw s1, 20(sp)
3010; RV32I-NEXT:    lw s0, 24(sp)
3011; RV32I-NEXT:    lw ra, 28(sp)
3012; RV32I-NEXT:    addi sp, sp, 32
3013; RV32I-NEXT:    ret
3014;
3015; RV32IA-LABEL: atomicrmw_min_i8_acquire:
3016; RV32IA:       # %bb.0:
3017; RV32IA-NEXT:    slli a2, a0, 3
3018; RV32IA-NEXT:    andi a2, a2, 24
3019; RV32IA-NEXT:    addi a3, zero, 24
3020; RV32IA-NEXT:    sub a6, a3, a2
3021; RV32IA-NEXT:    addi a4, zero, 255
3022; RV32IA-NEXT:    sll a7, a4, a2
3023; RV32IA-NEXT:    slli a1, a1, 24
3024; RV32IA-NEXT:    srai a1, a1, 24
3025; RV32IA-NEXT:    sll a1, a1, a2
3026; RV32IA-NEXT:    andi a0, a0, -4
3027; RV32IA-NEXT:  .LBB41_1: # =>This Inner Loop Header: Depth=1
3028; RV32IA-NEXT:    lr.w.aq a5, (a0)
3029; RV32IA-NEXT:    and a4, a5, a7
3030; RV32IA-NEXT:    mv a3, a5
3031; RV32IA-NEXT:    sll a4, a4, a6
3032; RV32IA-NEXT:    sra a4, a4, a6
3033; RV32IA-NEXT:    bge a1, a4, .LBB41_3
3034; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB41_1 Depth=1
3035; RV32IA-NEXT:    xor a3, a5, a1
3036; RV32IA-NEXT:    and a3, a3, a7
3037; RV32IA-NEXT:    xor a3, a5, a3
3038; RV32IA-NEXT:  .LBB41_3: # in Loop: Header=BB41_1 Depth=1
3039; RV32IA-NEXT:    sc.w a3, a3, (a0)
3040; RV32IA-NEXT:    bnez a3, .LBB41_1
3041; RV32IA-NEXT:  # %bb.4:
3042; RV32IA-NEXT:    srl a0, a5, a2
3043; RV32IA-NEXT:    ret
3044;
3045; RV64I-LABEL: atomicrmw_min_i8_acquire:
3046; RV64I:       # %bb.0:
3047; RV64I-NEXT:    addi sp, sp, -48
3048; RV64I-NEXT:    sd ra, 40(sp)
3049; RV64I-NEXT:    sd s0, 32(sp)
3050; RV64I-NEXT:    sd s1, 24(sp)
3051; RV64I-NEXT:    sd s2, 16(sp)
3052; RV64I-NEXT:    sd s3, 8(sp)
3053; RV64I-NEXT:    mv s2, a1
3054; RV64I-NEXT:    mv s1, a0
3055; RV64I-NEXT:    lbu a0, 0(a0)
3056; RV64I-NEXT:    slli a1, a1, 56
3057; RV64I-NEXT:    srai s0, a1, 56
3058; RV64I-NEXT:    addi s3, sp, 7
3059; RV64I-NEXT:  .LBB41_1: # %atomicrmw.start
3060; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
3061; RV64I-NEXT:    slli a1, a0, 56
3062; RV64I-NEXT:    srai a1, a1, 56
3063; RV64I-NEXT:    mv a2, a0
3064; RV64I-NEXT:    bge s0, a1, .LBB41_3
3065; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
3066; RV64I-NEXT:    # in Loop: Header=BB41_1 Depth=1
3067; RV64I-NEXT:    mv a2, s2
3068; RV64I-NEXT:  .LBB41_3: # %atomicrmw.start
3069; RV64I-NEXT:    # in Loop: Header=BB41_1 Depth=1
3070; RV64I-NEXT:    sb a0, 7(sp)
3071; RV64I-NEXT:    mv a0, s1
3072; RV64I-NEXT:    mv a1, s3
3073; RV64I-NEXT:    addi a3, zero, 2
3074; RV64I-NEXT:    addi a4, zero, 2
3075; RV64I-NEXT:    call __atomic_compare_exchange_1
3076; RV64I-NEXT:    mv a1, a0
3077; RV64I-NEXT:    lb a0, 7(sp)
3078; RV64I-NEXT:    beqz a1, .LBB41_1
3079; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
3080; RV64I-NEXT:    ld s3, 8(sp)
3081; RV64I-NEXT:    ld s2, 16(sp)
3082; RV64I-NEXT:    ld s1, 24(sp)
3083; RV64I-NEXT:    ld s0, 32(sp)
3084; RV64I-NEXT:    ld ra, 40(sp)
3085; RV64I-NEXT:    addi sp, sp, 48
3086; RV64I-NEXT:    ret
3087;
3088; RV64IA-LABEL: atomicrmw_min_i8_acquire:
3089; RV64IA:       # %bb.0:
3090; RV64IA-NEXT:    slli a2, a0, 3
3091; RV64IA-NEXT:    andi a2, a2, 24
3092; RV64IA-NEXT:    addi a3, zero, 56
3093; RV64IA-NEXT:    sub a6, a3, a2
3094; RV64IA-NEXT:    addi a4, zero, 255
3095; RV64IA-NEXT:    sllw a7, a4, a2
3096; RV64IA-NEXT:    slli a1, a1, 56
3097; RV64IA-NEXT:    srai a1, a1, 56
3098; RV64IA-NEXT:    sllw a1, a1, a2
3099; RV64IA-NEXT:    andi a0, a0, -4
3100; RV64IA-NEXT:  .LBB41_1: # =>This Inner Loop Header: Depth=1
3101; RV64IA-NEXT:    lr.w.aq a5, (a0)
3102; RV64IA-NEXT:    and a4, a5, a7
3103; RV64IA-NEXT:    mv a3, a5
3104; RV64IA-NEXT:    sll a4, a4, a6
3105; RV64IA-NEXT:    sra a4, a4, a6
3106; RV64IA-NEXT:    bge a1, a4, .LBB41_3
3107; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB41_1 Depth=1
3108; RV64IA-NEXT:    xor a3, a5, a1
3109; RV64IA-NEXT:    and a3, a3, a7
3110; RV64IA-NEXT:    xor a3, a5, a3
3111; RV64IA-NEXT:  .LBB41_3: # in Loop: Header=BB41_1 Depth=1
3112; RV64IA-NEXT:    sc.w a3, a3, (a0)
3113; RV64IA-NEXT:    bnez a3, .LBB41_1
3114; RV64IA-NEXT:  # %bb.4:
3115; RV64IA-NEXT:    srlw a0, a5, a2
3116; RV64IA-NEXT:    ret
3117  %1 = atomicrmw min i8* %a, i8 %b acquire
3118  ret i8 %1
3119}
3120
3121define i8 @atomicrmw_min_i8_release(i8 *%a, i8 %b) nounwind {
3122; RV32I-LABEL: atomicrmw_min_i8_release:
3123; RV32I:       # %bb.0:
3124; RV32I-NEXT:    addi sp, sp, -32
3125; RV32I-NEXT:    sw ra, 28(sp)
3126; RV32I-NEXT:    sw s0, 24(sp)
3127; RV32I-NEXT:    sw s1, 20(sp)
3128; RV32I-NEXT:    sw s2, 16(sp)
3129; RV32I-NEXT:    sw s3, 12(sp)
3130; RV32I-NEXT:    mv s2, a1
3131; RV32I-NEXT:    mv s1, a0
3132; RV32I-NEXT:    lbu a0, 0(a0)
3133; RV32I-NEXT:    slli a1, a1, 24
3134; RV32I-NEXT:    srai s0, a1, 24
3135; RV32I-NEXT:    addi s3, sp, 11
3136; RV32I-NEXT:  .LBB42_1: # %atomicrmw.start
3137; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
3138; RV32I-NEXT:    slli a1, a0, 24
3139; RV32I-NEXT:    srai a1, a1, 24
3140; RV32I-NEXT:    mv a2, a0
3141; RV32I-NEXT:    bge s0, a1, .LBB42_3
3142; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
3143; RV32I-NEXT:    # in Loop: Header=BB42_1 Depth=1
3144; RV32I-NEXT:    mv a2, s2
3145; RV32I-NEXT:  .LBB42_3: # %atomicrmw.start
3146; RV32I-NEXT:    # in Loop: Header=BB42_1 Depth=1
3147; RV32I-NEXT:    sb a0, 11(sp)
3148; RV32I-NEXT:    mv a0, s1
3149; RV32I-NEXT:    mv a1, s3
3150; RV32I-NEXT:    addi a3, zero, 3
3151; RV32I-NEXT:    mv a4, zero
3152; RV32I-NEXT:    call __atomic_compare_exchange_1
3153; RV32I-NEXT:    mv a1, a0
3154; RV32I-NEXT:    lb a0, 11(sp)
3155; RV32I-NEXT:    beqz a1, .LBB42_1
3156; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
3157; RV32I-NEXT:    lw s3, 12(sp)
3158; RV32I-NEXT:    lw s2, 16(sp)
3159; RV32I-NEXT:    lw s1, 20(sp)
3160; RV32I-NEXT:    lw s0, 24(sp)
3161; RV32I-NEXT:    lw ra, 28(sp)
3162; RV32I-NEXT:    addi sp, sp, 32
3163; RV32I-NEXT:    ret
3164;
3165; RV32IA-LABEL: atomicrmw_min_i8_release:
3166; RV32IA:       # %bb.0:
3167; RV32IA-NEXT:    slli a2, a0, 3
3168; RV32IA-NEXT:    andi a2, a2, 24
3169; RV32IA-NEXT:    addi a3, zero, 24
3170; RV32IA-NEXT:    sub a6, a3, a2
3171; RV32IA-NEXT:    addi a4, zero, 255
3172; RV32IA-NEXT:    sll a7, a4, a2
3173; RV32IA-NEXT:    slli a1, a1, 24
3174; RV32IA-NEXT:    srai a1, a1, 24
3175; RV32IA-NEXT:    sll a1, a1, a2
3176; RV32IA-NEXT:    andi a0, a0, -4
3177; RV32IA-NEXT:  .LBB42_1: # =>This Inner Loop Header: Depth=1
3178; RV32IA-NEXT:    lr.w a5, (a0)
3179; RV32IA-NEXT:    and a4, a5, a7
3180; RV32IA-NEXT:    mv a3, a5
3181; RV32IA-NEXT:    sll a4, a4, a6
3182; RV32IA-NEXT:    sra a4, a4, a6
3183; RV32IA-NEXT:    bge a1, a4, .LBB42_3
3184; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB42_1 Depth=1
3185; RV32IA-NEXT:    xor a3, a5, a1
3186; RV32IA-NEXT:    and a3, a3, a7
3187; RV32IA-NEXT:    xor a3, a5, a3
3188; RV32IA-NEXT:  .LBB42_3: # in Loop: Header=BB42_1 Depth=1
3189; RV32IA-NEXT:    sc.w.rl a3, a3, (a0)
3190; RV32IA-NEXT:    bnez a3, .LBB42_1
3191; RV32IA-NEXT:  # %bb.4:
3192; RV32IA-NEXT:    srl a0, a5, a2
3193; RV32IA-NEXT:    ret
3194;
3195; RV64I-LABEL: atomicrmw_min_i8_release:
3196; RV64I:       # %bb.0:
3197; RV64I-NEXT:    addi sp, sp, -48
3198; RV64I-NEXT:    sd ra, 40(sp)
3199; RV64I-NEXT:    sd s0, 32(sp)
3200; RV64I-NEXT:    sd s1, 24(sp)
3201; RV64I-NEXT:    sd s2, 16(sp)
3202; RV64I-NEXT:    sd s3, 8(sp)
3203; RV64I-NEXT:    mv s2, a1
3204; RV64I-NEXT:    mv s1, a0
3205; RV64I-NEXT:    lbu a0, 0(a0)
3206; RV64I-NEXT:    slli a1, a1, 56
3207; RV64I-NEXT:    srai s0, a1, 56
3208; RV64I-NEXT:    addi s3, sp, 7
3209; RV64I-NEXT:  .LBB42_1: # %atomicrmw.start
3210; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
3211; RV64I-NEXT:    slli a1, a0, 56
3212; RV64I-NEXT:    srai a1, a1, 56
3213; RV64I-NEXT:    mv a2, a0
3214; RV64I-NEXT:    bge s0, a1, .LBB42_3
3215; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
3216; RV64I-NEXT:    # in Loop: Header=BB42_1 Depth=1
3217; RV64I-NEXT:    mv a2, s2
3218; RV64I-NEXT:  .LBB42_3: # %atomicrmw.start
3219; RV64I-NEXT:    # in Loop: Header=BB42_1 Depth=1
3220; RV64I-NEXT:    sb a0, 7(sp)
3221; RV64I-NEXT:    mv a0, s1
3222; RV64I-NEXT:    mv a1, s3
3223; RV64I-NEXT:    addi a3, zero, 3
3224; RV64I-NEXT:    mv a4, zero
3225; RV64I-NEXT:    call __atomic_compare_exchange_1
3226; RV64I-NEXT:    mv a1, a0
3227; RV64I-NEXT:    lb a0, 7(sp)
3228; RV64I-NEXT:    beqz a1, .LBB42_1
3229; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
3230; RV64I-NEXT:    ld s3, 8(sp)
3231; RV64I-NEXT:    ld s2, 16(sp)
3232; RV64I-NEXT:    ld s1, 24(sp)
3233; RV64I-NEXT:    ld s0, 32(sp)
3234; RV64I-NEXT:    ld ra, 40(sp)
3235; RV64I-NEXT:    addi sp, sp, 48
3236; RV64I-NEXT:    ret
3237;
3238; RV64IA-LABEL: atomicrmw_min_i8_release:
3239; RV64IA:       # %bb.0:
3240; RV64IA-NEXT:    slli a2, a0, 3
3241; RV64IA-NEXT:    andi a2, a2, 24
3242; RV64IA-NEXT:    addi a3, zero, 56
3243; RV64IA-NEXT:    sub a6, a3, a2
3244; RV64IA-NEXT:    addi a4, zero, 255
3245; RV64IA-NEXT:    sllw a7, a4, a2
3246; RV64IA-NEXT:    slli a1, a1, 56
3247; RV64IA-NEXT:    srai a1, a1, 56
3248; RV64IA-NEXT:    sllw a1, a1, a2
3249; RV64IA-NEXT:    andi a0, a0, -4
3250; RV64IA-NEXT:  .LBB42_1: # =>This Inner Loop Header: Depth=1
3251; RV64IA-NEXT:    lr.w a5, (a0)
3252; RV64IA-NEXT:    and a4, a5, a7
3253; RV64IA-NEXT:    mv a3, a5
3254; RV64IA-NEXT:    sll a4, a4, a6
3255; RV64IA-NEXT:    sra a4, a4, a6
3256; RV64IA-NEXT:    bge a1, a4, .LBB42_3
3257; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB42_1 Depth=1
3258; RV64IA-NEXT:    xor a3, a5, a1
3259; RV64IA-NEXT:    and a3, a3, a7
3260; RV64IA-NEXT:    xor a3, a5, a3
3261; RV64IA-NEXT:  .LBB42_3: # in Loop: Header=BB42_1 Depth=1
3262; RV64IA-NEXT:    sc.w.rl a3, a3, (a0)
3263; RV64IA-NEXT:    bnez a3, .LBB42_1
3264; RV64IA-NEXT:  # %bb.4:
3265; RV64IA-NEXT:    srlw a0, a5, a2
3266; RV64IA-NEXT:    ret
3267  %1 = atomicrmw min i8* %a, i8 %b release
3268  ret i8 %1
3269}
3270
3271define i8 @atomicrmw_min_i8_acq_rel(i8 *%a, i8 %b) nounwind {
3272; RV32I-LABEL: atomicrmw_min_i8_acq_rel:
3273; RV32I:       # %bb.0:
3274; RV32I-NEXT:    addi sp, sp, -32
3275; RV32I-NEXT:    sw ra, 28(sp)
3276; RV32I-NEXT:    sw s0, 24(sp)
3277; RV32I-NEXT:    sw s1, 20(sp)
3278; RV32I-NEXT:    sw s2, 16(sp)
3279; RV32I-NEXT:    sw s3, 12(sp)
3280; RV32I-NEXT:    mv s2, a1
3281; RV32I-NEXT:    mv s1, a0
3282; RV32I-NEXT:    lbu a0, 0(a0)
3283; RV32I-NEXT:    slli a1, a1, 24
3284; RV32I-NEXT:    srai s0, a1, 24
3285; RV32I-NEXT:    addi s3, sp, 11
3286; RV32I-NEXT:  .LBB43_1: # %atomicrmw.start
3287; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
3288; RV32I-NEXT:    slli a1, a0, 24
3289; RV32I-NEXT:    srai a1, a1, 24
3290; RV32I-NEXT:    mv a2, a0
3291; RV32I-NEXT:    bge s0, a1, .LBB43_3
3292; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
3293; RV32I-NEXT:    # in Loop: Header=BB43_1 Depth=1
3294; RV32I-NEXT:    mv a2, s2
3295; RV32I-NEXT:  .LBB43_3: # %atomicrmw.start
3296; RV32I-NEXT:    # in Loop: Header=BB43_1 Depth=1
3297; RV32I-NEXT:    sb a0, 11(sp)
3298; RV32I-NEXT:    mv a0, s1
3299; RV32I-NEXT:    mv a1, s3
3300; RV32I-NEXT:    addi a3, zero, 4
3301; RV32I-NEXT:    addi a4, zero, 2
3302; RV32I-NEXT:    call __atomic_compare_exchange_1
3303; RV32I-NEXT:    mv a1, a0
3304; RV32I-NEXT:    lb a0, 11(sp)
3305; RV32I-NEXT:    beqz a1, .LBB43_1
3306; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
3307; RV32I-NEXT:    lw s3, 12(sp)
3308; RV32I-NEXT:    lw s2, 16(sp)
3309; RV32I-NEXT:    lw s1, 20(sp)
3310; RV32I-NEXT:    lw s0, 24(sp)
3311; RV32I-NEXT:    lw ra, 28(sp)
3312; RV32I-NEXT:    addi sp, sp, 32
3313; RV32I-NEXT:    ret
3314;
3315; RV32IA-LABEL: atomicrmw_min_i8_acq_rel:
3316; RV32IA:       # %bb.0:
3317; RV32IA-NEXT:    slli a2, a0, 3
3318; RV32IA-NEXT:    andi a2, a2, 24
3319; RV32IA-NEXT:    addi a3, zero, 24
3320; RV32IA-NEXT:    sub a6, a3, a2
3321; RV32IA-NEXT:    addi a4, zero, 255
3322; RV32IA-NEXT:    sll a7, a4, a2
3323; RV32IA-NEXT:    slli a1, a1, 24
3324; RV32IA-NEXT:    srai a1, a1, 24
3325; RV32IA-NEXT:    sll a1, a1, a2
3326; RV32IA-NEXT:    andi a0, a0, -4
3327; RV32IA-NEXT:  .LBB43_1: # =>This Inner Loop Header: Depth=1
3328; RV32IA-NEXT:    lr.w.aq a5, (a0)
3329; RV32IA-NEXT:    and a4, a5, a7
3330; RV32IA-NEXT:    mv a3, a5
3331; RV32IA-NEXT:    sll a4, a4, a6
3332; RV32IA-NEXT:    sra a4, a4, a6
3333; RV32IA-NEXT:    bge a1, a4, .LBB43_3
3334; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB43_1 Depth=1
3335; RV32IA-NEXT:    xor a3, a5, a1
3336; RV32IA-NEXT:    and a3, a3, a7
3337; RV32IA-NEXT:    xor a3, a5, a3
3338; RV32IA-NEXT:  .LBB43_3: # in Loop: Header=BB43_1 Depth=1
3339; RV32IA-NEXT:    sc.w.rl a3, a3, (a0)
3340; RV32IA-NEXT:    bnez a3, .LBB43_1
3341; RV32IA-NEXT:  # %bb.4:
3342; RV32IA-NEXT:    srl a0, a5, a2
3343; RV32IA-NEXT:    ret
3344;
3345; RV64I-LABEL: atomicrmw_min_i8_acq_rel:
3346; RV64I:       # %bb.0:
3347; RV64I-NEXT:    addi sp, sp, -48
3348; RV64I-NEXT:    sd ra, 40(sp)
3349; RV64I-NEXT:    sd s0, 32(sp)
3350; RV64I-NEXT:    sd s1, 24(sp)
3351; RV64I-NEXT:    sd s2, 16(sp)
3352; RV64I-NEXT:    sd s3, 8(sp)
3353; RV64I-NEXT:    mv s2, a1
3354; RV64I-NEXT:    mv s1, a0
3355; RV64I-NEXT:    lbu a0, 0(a0)
3356; RV64I-NEXT:    slli a1, a1, 56
3357; RV64I-NEXT:    srai s0, a1, 56
3358; RV64I-NEXT:    addi s3, sp, 7
3359; RV64I-NEXT:  .LBB43_1: # %atomicrmw.start
3360; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
3361; RV64I-NEXT:    slli a1, a0, 56
3362; RV64I-NEXT:    srai a1, a1, 56
3363; RV64I-NEXT:    mv a2, a0
3364; RV64I-NEXT:    bge s0, a1, .LBB43_3
3365; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
3366; RV64I-NEXT:    # in Loop: Header=BB43_1 Depth=1
3367; RV64I-NEXT:    mv a2, s2
3368; RV64I-NEXT:  .LBB43_3: # %atomicrmw.start
3369; RV64I-NEXT:    # in Loop: Header=BB43_1 Depth=1
3370; RV64I-NEXT:    sb a0, 7(sp)
3371; RV64I-NEXT:    mv a0, s1
3372; RV64I-NEXT:    mv a1, s3
3373; RV64I-NEXT:    addi a3, zero, 4
3374; RV64I-NEXT:    addi a4, zero, 2
3375; RV64I-NEXT:    call __atomic_compare_exchange_1
3376; RV64I-NEXT:    mv a1, a0
3377; RV64I-NEXT:    lb a0, 7(sp)
3378; RV64I-NEXT:    beqz a1, .LBB43_1
3379; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
3380; RV64I-NEXT:    ld s3, 8(sp)
3381; RV64I-NEXT:    ld s2, 16(sp)
3382; RV64I-NEXT:    ld s1, 24(sp)
3383; RV64I-NEXT:    ld s0, 32(sp)
3384; RV64I-NEXT:    ld ra, 40(sp)
3385; RV64I-NEXT:    addi sp, sp, 48
3386; RV64I-NEXT:    ret
3387;
3388; RV64IA-LABEL: atomicrmw_min_i8_acq_rel:
3389; RV64IA:       # %bb.0:
3390; RV64IA-NEXT:    slli a2, a0, 3
3391; RV64IA-NEXT:    andi a2, a2, 24
3392; RV64IA-NEXT:    addi a3, zero, 56
3393; RV64IA-NEXT:    sub a6, a3, a2
3394; RV64IA-NEXT:    addi a4, zero, 255
3395; RV64IA-NEXT:    sllw a7, a4, a2
3396; RV64IA-NEXT:    slli a1, a1, 56
3397; RV64IA-NEXT:    srai a1, a1, 56
3398; RV64IA-NEXT:    sllw a1, a1, a2
3399; RV64IA-NEXT:    andi a0, a0, -4
3400; RV64IA-NEXT:  .LBB43_1: # =>This Inner Loop Header: Depth=1
3401; RV64IA-NEXT:    lr.w.aq a5, (a0)
3402; RV64IA-NEXT:    and a4, a5, a7
3403; RV64IA-NEXT:    mv a3, a5
3404; RV64IA-NEXT:    sll a4, a4, a6
3405; RV64IA-NEXT:    sra a4, a4, a6
3406; RV64IA-NEXT:    bge a1, a4, .LBB43_3
3407; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB43_1 Depth=1
3408; RV64IA-NEXT:    xor a3, a5, a1
3409; RV64IA-NEXT:    and a3, a3, a7
3410; RV64IA-NEXT:    xor a3, a5, a3
3411; RV64IA-NEXT:  .LBB43_3: # in Loop: Header=BB43_1 Depth=1
3412; RV64IA-NEXT:    sc.w.rl a3, a3, (a0)
3413; RV64IA-NEXT:    bnez a3, .LBB43_1
3414; RV64IA-NEXT:  # %bb.4:
3415; RV64IA-NEXT:    srlw a0, a5, a2
3416; RV64IA-NEXT:    ret
3417  %1 = atomicrmw min i8* %a, i8 %b acq_rel
3418  ret i8 %1
3419}
3420
3421define i8 @atomicrmw_min_i8_seq_cst(i8 *%a, i8 %b) nounwind {
3422; RV32I-LABEL: atomicrmw_min_i8_seq_cst:
3423; RV32I:       # %bb.0:
3424; RV32I-NEXT:    addi sp, sp, -32
3425; RV32I-NEXT:    sw ra, 28(sp)
3426; RV32I-NEXT:    sw s0, 24(sp)
3427; RV32I-NEXT:    sw s1, 20(sp)
3428; RV32I-NEXT:    sw s2, 16(sp)
3429; RV32I-NEXT:    sw s3, 12(sp)
3430; RV32I-NEXT:    mv s2, a1
3431; RV32I-NEXT:    mv s1, a0
3432; RV32I-NEXT:    lbu a0, 0(a0)
3433; RV32I-NEXT:    slli a1, a1, 24
3434; RV32I-NEXT:    srai s0, a1, 24
3435; RV32I-NEXT:    addi s3, sp, 11
3436; RV32I-NEXT:  .LBB44_1: # %atomicrmw.start
3437; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
3438; RV32I-NEXT:    slli a1, a0, 24
3439; RV32I-NEXT:    srai a1, a1, 24
3440; RV32I-NEXT:    mv a2, a0
3441; RV32I-NEXT:    bge s0, a1, .LBB44_3
3442; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
3443; RV32I-NEXT:    # in Loop: Header=BB44_1 Depth=1
3444; RV32I-NEXT:    mv a2, s2
3445; RV32I-NEXT:  .LBB44_3: # %atomicrmw.start
3446; RV32I-NEXT:    # in Loop: Header=BB44_1 Depth=1
3447; RV32I-NEXT:    sb a0, 11(sp)
3448; RV32I-NEXT:    mv a0, s1
3449; RV32I-NEXT:    mv a1, s3
3450; RV32I-NEXT:    addi a3, zero, 5
3451; RV32I-NEXT:    addi a4, zero, 5
3452; RV32I-NEXT:    call __atomic_compare_exchange_1
3453; RV32I-NEXT:    mv a1, a0
3454; RV32I-NEXT:    lb a0, 11(sp)
3455; RV32I-NEXT:    beqz a1, .LBB44_1
3456; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
3457; RV32I-NEXT:    lw s3, 12(sp)
3458; RV32I-NEXT:    lw s2, 16(sp)
3459; RV32I-NEXT:    lw s1, 20(sp)
3460; RV32I-NEXT:    lw s0, 24(sp)
3461; RV32I-NEXT:    lw ra, 28(sp)
3462; RV32I-NEXT:    addi sp, sp, 32
3463; RV32I-NEXT:    ret
3464;
3465; RV32IA-LABEL: atomicrmw_min_i8_seq_cst:
3466; RV32IA:       # %bb.0:
3467; RV32IA-NEXT:    slli a2, a0, 3
3468; RV32IA-NEXT:    andi a2, a2, 24
3469; RV32IA-NEXT:    addi a3, zero, 24
3470; RV32IA-NEXT:    sub a6, a3, a2
3471; RV32IA-NEXT:    addi a4, zero, 255
3472; RV32IA-NEXT:    sll a7, a4, a2
3473; RV32IA-NEXT:    slli a1, a1, 24
3474; RV32IA-NEXT:    srai a1, a1, 24
3475; RV32IA-NEXT:    sll a1, a1, a2
3476; RV32IA-NEXT:    andi a0, a0, -4
3477; RV32IA-NEXT:  .LBB44_1: # =>This Inner Loop Header: Depth=1
3478; RV32IA-NEXT:    lr.w.aqrl a5, (a0)
3479; RV32IA-NEXT:    and a4, a5, a7
3480; RV32IA-NEXT:    mv a3, a5
3481; RV32IA-NEXT:    sll a4, a4, a6
3482; RV32IA-NEXT:    sra a4, a4, a6
3483; RV32IA-NEXT:    bge a1, a4, .LBB44_3
3484; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB44_1 Depth=1
3485; RV32IA-NEXT:    xor a3, a5, a1
3486; RV32IA-NEXT:    and a3, a3, a7
3487; RV32IA-NEXT:    xor a3, a5, a3
3488; RV32IA-NEXT:  .LBB44_3: # in Loop: Header=BB44_1 Depth=1
3489; RV32IA-NEXT:    sc.w.aqrl a3, a3, (a0)
3490; RV32IA-NEXT:    bnez a3, .LBB44_1
3491; RV32IA-NEXT:  # %bb.4:
3492; RV32IA-NEXT:    srl a0, a5, a2
3493; RV32IA-NEXT:    ret
3494;
3495; RV64I-LABEL: atomicrmw_min_i8_seq_cst:
3496; RV64I:       # %bb.0:
3497; RV64I-NEXT:    addi sp, sp, -48
3498; RV64I-NEXT:    sd ra, 40(sp)
3499; RV64I-NEXT:    sd s0, 32(sp)
3500; RV64I-NEXT:    sd s1, 24(sp)
3501; RV64I-NEXT:    sd s2, 16(sp)
3502; RV64I-NEXT:    sd s3, 8(sp)
3503; RV64I-NEXT:    mv s2, a1
3504; RV64I-NEXT:    mv s1, a0
3505; RV64I-NEXT:    lbu a0, 0(a0)
3506; RV64I-NEXT:    slli a1, a1, 56
3507; RV64I-NEXT:    srai s0, a1, 56
3508; RV64I-NEXT:    addi s3, sp, 7
3509; RV64I-NEXT:  .LBB44_1: # %atomicrmw.start
3510; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
3511; RV64I-NEXT:    slli a1, a0, 56
3512; RV64I-NEXT:    srai a1, a1, 56
3513; RV64I-NEXT:    mv a2, a0
3514; RV64I-NEXT:    bge s0, a1, .LBB44_3
3515; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
3516; RV64I-NEXT:    # in Loop: Header=BB44_1 Depth=1
3517; RV64I-NEXT:    mv a2, s2
3518; RV64I-NEXT:  .LBB44_3: # %atomicrmw.start
3519; RV64I-NEXT:    # in Loop: Header=BB44_1 Depth=1
3520; RV64I-NEXT:    sb a0, 7(sp)
3521; RV64I-NEXT:    mv a0, s1
3522; RV64I-NEXT:    mv a1, s3
3523; RV64I-NEXT:    addi a3, zero, 5
3524; RV64I-NEXT:    addi a4, zero, 5
3525; RV64I-NEXT:    call __atomic_compare_exchange_1
3526; RV64I-NEXT:    mv a1, a0
3527; RV64I-NEXT:    lb a0, 7(sp)
3528; RV64I-NEXT:    beqz a1, .LBB44_1
3529; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
3530; RV64I-NEXT:    ld s3, 8(sp)
3531; RV64I-NEXT:    ld s2, 16(sp)
3532; RV64I-NEXT:    ld s1, 24(sp)
3533; RV64I-NEXT:    ld s0, 32(sp)
3534; RV64I-NEXT:    ld ra, 40(sp)
3535; RV64I-NEXT:    addi sp, sp, 48
3536; RV64I-NEXT:    ret
3537;
3538; RV64IA-LABEL: atomicrmw_min_i8_seq_cst:
3539; RV64IA:       # %bb.0:
3540; RV64IA-NEXT:    slli a2, a0, 3
3541; RV64IA-NEXT:    andi a2, a2, 24
3542; RV64IA-NEXT:    addi a3, zero, 56
3543; RV64IA-NEXT:    sub a6, a3, a2
3544; RV64IA-NEXT:    addi a4, zero, 255
3545; RV64IA-NEXT:    sllw a7, a4, a2
3546; RV64IA-NEXT:    slli a1, a1, 56
3547; RV64IA-NEXT:    srai a1, a1, 56
3548; RV64IA-NEXT:    sllw a1, a1, a2
3549; RV64IA-NEXT:    andi a0, a0, -4
3550; RV64IA-NEXT:  .LBB44_1: # =>This Inner Loop Header: Depth=1
3551; RV64IA-NEXT:    lr.w.aqrl a5, (a0)
3552; RV64IA-NEXT:    and a4, a5, a7
3553; RV64IA-NEXT:    mv a3, a5
3554; RV64IA-NEXT:    sll a4, a4, a6
3555; RV64IA-NEXT:    sra a4, a4, a6
3556; RV64IA-NEXT:    bge a1, a4, .LBB44_3
3557; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB44_1 Depth=1
3558; RV64IA-NEXT:    xor a3, a5, a1
3559; RV64IA-NEXT:    and a3, a3, a7
3560; RV64IA-NEXT:    xor a3, a5, a3
3561; RV64IA-NEXT:  .LBB44_3: # in Loop: Header=BB44_1 Depth=1
3562; RV64IA-NEXT:    sc.w.aqrl a3, a3, (a0)
3563; RV64IA-NEXT:    bnez a3, .LBB44_1
3564; RV64IA-NEXT:  # %bb.4:
3565; RV64IA-NEXT:    srlw a0, a5, a2
3566; RV64IA-NEXT:    ret
3567  %1 = atomicrmw min i8* %a, i8 %b seq_cst
3568  ret i8 %1
3569}
3570
3571define i8 @atomicrmw_umax_i8_monotonic(i8 *%a, i8 %b) nounwind {
3572; RV32I-LABEL: atomicrmw_umax_i8_monotonic:
3573; RV32I:       # %bb.0:
3574; RV32I-NEXT:    addi sp, sp, -32
3575; RV32I-NEXT:    sw ra, 28(sp)
3576; RV32I-NEXT:    sw s0, 24(sp)
3577; RV32I-NEXT:    sw s1, 20(sp)
3578; RV32I-NEXT:    sw s2, 16(sp)
3579; RV32I-NEXT:    sw s3, 12(sp)
3580; RV32I-NEXT:    mv s2, a1
3581; RV32I-NEXT:    mv s1, a0
3582; RV32I-NEXT:    lbu a0, 0(a0)
3583; RV32I-NEXT:    andi s0, a1, 255
3584; RV32I-NEXT:    addi s3, sp, 11
3585; RV32I-NEXT:  .LBB45_1: # %atomicrmw.start
3586; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
3587; RV32I-NEXT:    andi a1, a0, 255
3588; RV32I-NEXT:    mv a2, a0
3589; RV32I-NEXT:    bltu s0, a1, .LBB45_3
3590; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
3591; RV32I-NEXT:    # in Loop: Header=BB45_1 Depth=1
3592; RV32I-NEXT:    mv a2, s2
3593; RV32I-NEXT:  .LBB45_3: # %atomicrmw.start
3594; RV32I-NEXT:    # in Loop: Header=BB45_1 Depth=1
3595; RV32I-NEXT:    sb a0, 11(sp)
3596; RV32I-NEXT:    mv a0, s1
3597; RV32I-NEXT:    mv a1, s3
3598; RV32I-NEXT:    mv a3, zero
3599; RV32I-NEXT:    mv a4, zero
3600; RV32I-NEXT:    call __atomic_compare_exchange_1
3601; RV32I-NEXT:    mv a1, a0
3602; RV32I-NEXT:    lb a0, 11(sp)
3603; RV32I-NEXT:    beqz a1, .LBB45_1
3604; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
3605; RV32I-NEXT:    lw s3, 12(sp)
3606; RV32I-NEXT:    lw s2, 16(sp)
3607; RV32I-NEXT:    lw s1, 20(sp)
3608; RV32I-NEXT:    lw s0, 24(sp)
3609; RV32I-NEXT:    lw ra, 28(sp)
3610; RV32I-NEXT:    addi sp, sp, 32
3611; RV32I-NEXT:    ret
3612;
3613; RV32IA-LABEL: atomicrmw_umax_i8_monotonic:
3614; RV32IA:       # %bb.0:
3615; RV32IA-NEXT:    slli a2, a0, 3
3616; RV32IA-NEXT:    andi a2, a2, 24
3617; RV32IA-NEXT:    addi a3, zero, 255
3618; RV32IA-NEXT:    sll a6, a3, a2
3619; RV32IA-NEXT:    andi a1, a1, 255
3620; RV32IA-NEXT:    sll a1, a1, a2
3621; RV32IA-NEXT:    andi a0, a0, -4
3622; RV32IA-NEXT:  .LBB45_1: # =>This Inner Loop Header: Depth=1
3623; RV32IA-NEXT:    lr.w a4, (a0)
3624; RV32IA-NEXT:    and a3, a4, a6
3625; RV32IA-NEXT:    mv a5, a4
3626; RV32IA-NEXT:    bgeu a3, a1, .LBB45_3
3627; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB45_1 Depth=1
3628; RV32IA-NEXT:    xor a5, a4, a1
3629; RV32IA-NEXT:    and a5, a5, a6
3630; RV32IA-NEXT:    xor a5, a4, a5
3631; RV32IA-NEXT:  .LBB45_3: # in Loop: Header=BB45_1 Depth=1
3632; RV32IA-NEXT:    sc.w a5, a5, (a0)
3633; RV32IA-NEXT:    bnez a5, .LBB45_1
3634; RV32IA-NEXT:  # %bb.4:
3635; RV32IA-NEXT:    srl a0, a4, a2
3636; RV32IA-NEXT:    ret
3637;
3638; RV64I-LABEL: atomicrmw_umax_i8_monotonic:
3639; RV64I:       # %bb.0:
3640; RV64I-NEXT:    addi sp, sp, -48
3641; RV64I-NEXT:    sd ra, 40(sp)
3642; RV64I-NEXT:    sd s0, 32(sp)
3643; RV64I-NEXT:    sd s1, 24(sp)
3644; RV64I-NEXT:    sd s2, 16(sp)
3645; RV64I-NEXT:    sd s3, 8(sp)
3646; RV64I-NEXT:    mv s2, a1
3647; RV64I-NEXT:    mv s1, a0
3648; RV64I-NEXT:    lbu a0, 0(a0)
3649; RV64I-NEXT:    andi s0, a1, 255
3650; RV64I-NEXT:    addi s3, sp, 7
3651; RV64I-NEXT:  .LBB45_1: # %atomicrmw.start
3652; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
3653; RV64I-NEXT:    andi a1, a0, 255
3654; RV64I-NEXT:    mv a2, a0
3655; RV64I-NEXT:    bltu s0, a1, .LBB45_3
3656; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
3657; RV64I-NEXT:    # in Loop: Header=BB45_1 Depth=1
3658; RV64I-NEXT:    mv a2, s2
3659; RV64I-NEXT:  .LBB45_3: # %atomicrmw.start
3660; RV64I-NEXT:    # in Loop: Header=BB45_1 Depth=1
3661; RV64I-NEXT:    sb a0, 7(sp)
3662; RV64I-NEXT:    mv a0, s1
3663; RV64I-NEXT:    mv a1, s3
3664; RV64I-NEXT:    mv a3, zero
3665; RV64I-NEXT:    mv a4, zero
3666; RV64I-NEXT:    call __atomic_compare_exchange_1
3667; RV64I-NEXT:    mv a1, a0
3668; RV64I-NEXT:    lb a0, 7(sp)
3669; RV64I-NEXT:    beqz a1, .LBB45_1
3670; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
3671; RV64I-NEXT:    ld s3, 8(sp)
3672; RV64I-NEXT:    ld s2, 16(sp)
3673; RV64I-NEXT:    ld s1, 24(sp)
3674; RV64I-NEXT:    ld s0, 32(sp)
3675; RV64I-NEXT:    ld ra, 40(sp)
3676; RV64I-NEXT:    addi sp, sp, 48
3677; RV64I-NEXT:    ret
3678;
3679; RV64IA-LABEL: atomicrmw_umax_i8_monotonic:
3680; RV64IA:       # %bb.0:
3681; RV64IA-NEXT:    slli a2, a0, 3
3682; RV64IA-NEXT:    andi a2, a2, 24
3683; RV64IA-NEXT:    addi a3, zero, 255
3684; RV64IA-NEXT:    sllw a6, a3, a2
3685; RV64IA-NEXT:    andi a1, a1, 255
3686; RV64IA-NEXT:    sllw a1, a1, a2
3687; RV64IA-NEXT:    andi a0, a0, -4
3688; RV64IA-NEXT:  .LBB45_1: # =>This Inner Loop Header: Depth=1
3689; RV64IA-NEXT:    lr.w a4, (a0)
3690; RV64IA-NEXT:    and a3, a4, a6
3691; RV64IA-NEXT:    mv a5, a4
3692; RV64IA-NEXT:    bgeu a3, a1, .LBB45_3
3693; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB45_1 Depth=1
3694; RV64IA-NEXT:    xor a5, a4, a1
3695; RV64IA-NEXT:    and a5, a5, a6
3696; RV64IA-NEXT:    xor a5, a4, a5
3697; RV64IA-NEXT:  .LBB45_3: # in Loop: Header=BB45_1 Depth=1
3698; RV64IA-NEXT:    sc.w a5, a5, (a0)
3699; RV64IA-NEXT:    bnez a5, .LBB45_1
3700; RV64IA-NEXT:  # %bb.4:
3701; RV64IA-NEXT:    srlw a0, a4, a2
3702; RV64IA-NEXT:    ret
3703  %1 = atomicrmw umax i8* %a, i8 %b monotonic
3704  ret i8 %1
3705}
3706
3707define i8 @atomicrmw_umax_i8_acquire(i8 *%a, i8 %b) nounwind {
3708; RV32I-LABEL: atomicrmw_umax_i8_acquire:
3709; RV32I:       # %bb.0:
3710; RV32I-NEXT:    addi sp, sp, -32
3711; RV32I-NEXT:    sw ra, 28(sp)
3712; RV32I-NEXT:    sw s0, 24(sp)
3713; RV32I-NEXT:    sw s1, 20(sp)
3714; RV32I-NEXT:    sw s2, 16(sp)
3715; RV32I-NEXT:    sw s3, 12(sp)
3716; RV32I-NEXT:    mv s2, a1
3717; RV32I-NEXT:    mv s1, a0
3718; RV32I-NEXT:    lbu a0, 0(a0)
3719; RV32I-NEXT:    andi s0, a1, 255
3720; RV32I-NEXT:    addi s3, sp, 11
3721; RV32I-NEXT:  .LBB46_1: # %atomicrmw.start
3722; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
3723; RV32I-NEXT:    andi a1, a0, 255
3724; RV32I-NEXT:    mv a2, a0
3725; RV32I-NEXT:    bltu s0, a1, .LBB46_3
3726; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
3727; RV32I-NEXT:    # in Loop: Header=BB46_1 Depth=1
3728; RV32I-NEXT:    mv a2, s2
3729; RV32I-NEXT:  .LBB46_3: # %atomicrmw.start
3730; RV32I-NEXT:    # in Loop: Header=BB46_1 Depth=1
3731; RV32I-NEXT:    sb a0, 11(sp)
3732; RV32I-NEXT:    mv a0, s1
3733; RV32I-NEXT:    mv a1, s3
3734; RV32I-NEXT:    addi a3, zero, 2
3735; RV32I-NEXT:    addi a4, zero, 2
3736; RV32I-NEXT:    call __atomic_compare_exchange_1
3737; RV32I-NEXT:    mv a1, a0
3738; RV32I-NEXT:    lb a0, 11(sp)
3739; RV32I-NEXT:    beqz a1, .LBB46_1
3740; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
3741; RV32I-NEXT:    lw s3, 12(sp)
3742; RV32I-NEXT:    lw s2, 16(sp)
3743; RV32I-NEXT:    lw s1, 20(sp)
3744; RV32I-NEXT:    lw s0, 24(sp)
3745; RV32I-NEXT:    lw ra, 28(sp)
3746; RV32I-NEXT:    addi sp, sp, 32
3747; RV32I-NEXT:    ret
3748;
3749; RV32IA-LABEL: atomicrmw_umax_i8_acquire:
3750; RV32IA:       # %bb.0:
3751; RV32IA-NEXT:    slli a2, a0, 3
3752; RV32IA-NEXT:    andi a2, a2, 24
3753; RV32IA-NEXT:    addi a3, zero, 255
3754; RV32IA-NEXT:    sll a6, a3, a2
3755; RV32IA-NEXT:    andi a1, a1, 255
3756; RV32IA-NEXT:    sll a1, a1, a2
3757; RV32IA-NEXT:    andi a0, a0, -4
3758; RV32IA-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
3759; RV32IA-NEXT:    lr.w.aq a4, (a0)
3760; RV32IA-NEXT:    and a3, a4, a6
3761; RV32IA-NEXT:    mv a5, a4
3762; RV32IA-NEXT:    bgeu a3, a1, .LBB46_3
3763; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
3764; RV32IA-NEXT:    xor a5, a4, a1
3765; RV32IA-NEXT:    and a5, a5, a6
3766; RV32IA-NEXT:    xor a5, a4, a5
3767; RV32IA-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
3768; RV32IA-NEXT:    sc.w a5, a5, (a0)
3769; RV32IA-NEXT:    bnez a5, .LBB46_1
3770; RV32IA-NEXT:  # %bb.4:
3771; RV32IA-NEXT:    srl a0, a4, a2
3772; RV32IA-NEXT:    ret
3773;
3774; RV64I-LABEL: atomicrmw_umax_i8_acquire:
3775; RV64I:       # %bb.0:
3776; RV64I-NEXT:    addi sp, sp, -48
3777; RV64I-NEXT:    sd ra, 40(sp)
3778; RV64I-NEXT:    sd s0, 32(sp)
3779; RV64I-NEXT:    sd s1, 24(sp)
3780; RV64I-NEXT:    sd s2, 16(sp)
3781; RV64I-NEXT:    sd s3, 8(sp)
3782; RV64I-NEXT:    mv s2, a1
3783; RV64I-NEXT:    mv s1, a0
3784; RV64I-NEXT:    lbu a0, 0(a0)
3785; RV64I-NEXT:    andi s0, a1, 255
3786; RV64I-NEXT:    addi s3, sp, 7
3787; RV64I-NEXT:  .LBB46_1: # %atomicrmw.start
3788; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
3789; RV64I-NEXT:    andi a1, a0, 255
3790; RV64I-NEXT:    mv a2, a0
3791; RV64I-NEXT:    bltu s0, a1, .LBB46_3
3792; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
3793; RV64I-NEXT:    # in Loop: Header=BB46_1 Depth=1
3794; RV64I-NEXT:    mv a2, s2
3795; RV64I-NEXT:  .LBB46_3: # %atomicrmw.start
3796; RV64I-NEXT:    # in Loop: Header=BB46_1 Depth=1
3797; RV64I-NEXT:    sb a0, 7(sp)
3798; RV64I-NEXT:    mv a0, s1
3799; RV64I-NEXT:    mv a1, s3
3800; RV64I-NEXT:    addi a3, zero, 2
3801; RV64I-NEXT:    addi a4, zero, 2
3802; RV64I-NEXT:    call __atomic_compare_exchange_1
3803; RV64I-NEXT:    mv a1, a0
3804; RV64I-NEXT:    lb a0, 7(sp)
3805; RV64I-NEXT:    beqz a1, .LBB46_1
3806; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
3807; RV64I-NEXT:    ld s3, 8(sp)
3808; RV64I-NEXT:    ld s2, 16(sp)
3809; RV64I-NEXT:    ld s1, 24(sp)
3810; RV64I-NEXT:    ld s0, 32(sp)
3811; RV64I-NEXT:    ld ra, 40(sp)
3812; RV64I-NEXT:    addi sp, sp, 48
3813; RV64I-NEXT:    ret
3814;
3815; RV64IA-LABEL: atomicrmw_umax_i8_acquire:
3816; RV64IA:       # %bb.0:
3817; RV64IA-NEXT:    slli a2, a0, 3
3818; RV64IA-NEXT:    andi a2, a2, 24
3819; RV64IA-NEXT:    addi a3, zero, 255
3820; RV64IA-NEXT:    sllw a6, a3, a2
3821; RV64IA-NEXT:    andi a1, a1, 255
3822; RV64IA-NEXT:    sllw a1, a1, a2
3823; RV64IA-NEXT:    andi a0, a0, -4
3824; RV64IA-NEXT:  .LBB46_1: # =>This Inner Loop Header: Depth=1
3825; RV64IA-NEXT:    lr.w.aq a4, (a0)
3826; RV64IA-NEXT:    and a3, a4, a6
3827; RV64IA-NEXT:    mv a5, a4
3828; RV64IA-NEXT:    bgeu a3, a1, .LBB46_3
3829; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB46_1 Depth=1
3830; RV64IA-NEXT:    xor a5, a4, a1
3831; RV64IA-NEXT:    and a5, a5, a6
3832; RV64IA-NEXT:    xor a5, a4, a5
3833; RV64IA-NEXT:  .LBB46_3: # in Loop: Header=BB46_1 Depth=1
3834; RV64IA-NEXT:    sc.w a5, a5, (a0)
3835; RV64IA-NEXT:    bnez a5, .LBB46_1
3836; RV64IA-NEXT:  # %bb.4:
3837; RV64IA-NEXT:    srlw a0, a4, a2
3838; RV64IA-NEXT:    ret
3839  %1 = atomicrmw umax i8* %a, i8 %b acquire
3840  ret i8 %1
3841}
3842
3843define i8 @atomicrmw_umax_i8_release(i8 *%a, i8 %b) nounwind {
3844; RV32I-LABEL: atomicrmw_umax_i8_release:
3845; RV32I:       # %bb.0:
3846; RV32I-NEXT:    addi sp, sp, -32
3847; RV32I-NEXT:    sw ra, 28(sp)
3848; RV32I-NEXT:    sw s0, 24(sp)
3849; RV32I-NEXT:    sw s1, 20(sp)
3850; RV32I-NEXT:    sw s2, 16(sp)
3851; RV32I-NEXT:    sw s3, 12(sp)
3852; RV32I-NEXT:    mv s2, a1
3853; RV32I-NEXT:    mv s1, a0
3854; RV32I-NEXT:    lbu a0, 0(a0)
3855; RV32I-NEXT:    andi s0, a1, 255
3856; RV32I-NEXT:    addi s3, sp, 11
3857; RV32I-NEXT:  .LBB47_1: # %atomicrmw.start
3858; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
3859; RV32I-NEXT:    andi a1, a0, 255
3860; RV32I-NEXT:    mv a2, a0
3861; RV32I-NEXT:    bltu s0, a1, .LBB47_3
3862; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
3863; RV32I-NEXT:    # in Loop: Header=BB47_1 Depth=1
3864; RV32I-NEXT:    mv a2, s2
3865; RV32I-NEXT:  .LBB47_3: # %atomicrmw.start
3866; RV32I-NEXT:    # in Loop: Header=BB47_1 Depth=1
3867; RV32I-NEXT:    sb a0, 11(sp)
3868; RV32I-NEXT:    mv a0, s1
3869; RV32I-NEXT:    mv a1, s3
3870; RV32I-NEXT:    addi a3, zero, 3
3871; RV32I-NEXT:    mv a4, zero
3872; RV32I-NEXT:    call __atomic_compare_exchange_1
3873; RV32I-NEXT:    mv a1, a0
3874; RV32I-NEXT:    lb a0, 11(sp)
3875; RV32I-NEXT:    beqz a1, .LBB47_1
3876; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
3877; RV32I-NEXT:    lw s3, 12(sp)
3878; RV32I-NEXT:    lw s2, 16(sp)
3879; RV32I-NEXT:    lw s1, 20(sp)
3880; RV32I-NEXT:    lw s0, 24(sp)
3881; RV32I-NEXT:    lw ra, 28(sp)
3882; RV32I-NEXT:    addi sp, sp, 32
3883; RV32I-NEXT:    ret
3884;
3885; RV32IA-LABEL: atomicrmw_umax_i8_release:
3886; RV32IA:       # %bb.0:
3887; RV32IA-NEXT:    slli a2, a0, 3
3888; RV32IA-NEXT:    andi a2, a2, 24
3889; RV32IA-NEXT:    addi a3, zero, 255
3890; RV32IA-NEXT:    sll a6, a3, a2
3891; RV32IA-NEXT:    andi a1, a1, 255
3892; RV32IA-NEXT:    sll a1, a1, a2
3893; RV32IA-NEXT:    andi a0, a0, -4
3894; RV32IA-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
3895; RV32IA-NEXT:    lr.w a4, (a0)
3896; RV32IA-NEXT:    and a3, a4, a6
3897; RV32IA-NEXT:    mv a5, a4
3898; RV32IA-NEXT:    bgeu a3, a1, .LBB47_3
3899; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
3900; RV32IA-NEXT:    xor a5, a4, a1
3901; RV32IA-NEXT:    and a5, a5, a6
3902; RV32IA-NEXT:    xor a5, a4, a5
3903; RV32IA-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
3904; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
3905; RV32IA-NEXT:    bnez a5, .LBB47_1
3906; RV32IA-NEXT:  # %bb.4:
3907; RV32IA-NEXT:    srl a0, a4, a2
3908; RV32IA-NEXT:    ret
3909;
3910; RV64I-LABEL: atomicrmw_umax_i8_release:
3911; RV64I:       # %bb.0:
3912; RV64I-NEXT:    addi sp, sp, -48
3913; RV64I-NEXT:    sd ra, 40(sp)
3914; RV64I-NEXT:    sd s0, 32(sp)
3915; RV64I-NEXT:    sd s1, 24(sp)
3916; RV64I-NEXT:    sd s2, 16(sp)
3917; RV64I-NEXT:    sd s3, 8(sp)
3918; RV64I-NEXT:    mv s2, a1
3919; RV64I-NEXT:    mv s1, a0
3920; RV64I-NEXT:    lbu a0, 0(a0)
3921; RV64I-NEXT:    andi s0, a1, 255
3922; RV64I-NEXT:    addi s3, sp, 7
3923; RV64I-NEXT:  .LBB47_1: # %atomicrmw.start
3924; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
3925; RV64I-NEXT:    andi a1, a0, 255
3926; RV64I-NEXT:    mv a2, a0
3927; RV64I-NEXT:    bltu s0, a1, .LBB47_3
3928; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
3929; RV64I-NEXT:    # in Loop: Header=BB47_1 Depth=1
3930; RV64I-NEXT:    mv a2, s2
3931; RV64I-NEXT:  .LBB47_3: # %atomicrmw.start
3932; RV64I-NEXT:    # in Loop: Header=BB47_1 Depth=1
3933; RV64I-NEXT:    sb a0, 7(sp)
3934; RV64I-NEXT:    mv a0, s1
3935; RV64I-NEXT:    mv a1, s3
3936; RV64I-NEXT:    addi a3, zero, 3
3937; RV64I-NEXT:    mv a4, zero
3938; RV64I-NEXT:    call __atomic_compare_exchange_1
3939; RV64I-NEXT:    mv a1, a0
3940; RV64I-NEXT:    lb a0, 7(sp)
3941; RV64I-NEXT:    beqz a1, .LBB47_1
3942; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
3943; RV64I-NEXT:    ld s3, 8(sp)
3944; RV64I-NEXT:    ld s2, 16(sp)
3945; RV64I-NEXT:    ld s1, 24(sp)
3946; RV64I-NEXT:    ld s0, 32(sp)
3947; RV64I-NEXT:    ld ra, 40(sp)
3948; RV64I-NEXT:    addi sp, sp, 48
3949; RV64I-NEXT:    ret
3950;
3951; RV64IA-LABEL: atomicrmw_umax_i8_release:
3952; RV64IA:       # %bb.0:
3953; RV64IA-NEXT:    slli a2, a0, 3
3954; RV64IA-NEXT:    andi a2, a2, 24
3955; RV64IA-NEXT:    addi a3, zero, 255
3956; RV64IA-NEXT:    sllw a6, a3, a2
3957; RV64IA-NEXT:    andi a1, a1, 255
3958; RV64IA-NEXT:    sllw a1, a1, a2
3959; RV64IA-NEXT:    andi a0, a0, -4
3960; RV64IA-NEXT:  .LBB47_1: # =>This Inner Loop Header: Depth=1
3961; RV64IA-NEXT:    lr.w a4, (a0)
3962; RV64IA-NEXT:    and a3, a4, a6
3963; RV64IA-NEXT:    mv a5, a4
3964; RV64IA-NEXT:    bgeu a3, a1, .LBB47_3
3965; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB47_1 Depth=1
3966; RV64IA-NEXT:    xor a5, a4, a1
3967; RV64IA-NEXT:    and a5, a5, a6
3968; RV64IA-NEXT:    xor a5, a4, a5
3969; RV64IA-NEXT:  .LBB47_3: # in Loop: Header=BB47_1 Depth=1
3970; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
3971; RV64IA-NEXT:    bnez a5, .LBB47_1
3972; RV64IA-NEXT:  # %bb.4:
3973; RV64IA-NEXT:    srlw a0, a4, a2
3974; RV64IA-NEXT:    ret
3975  %1 = atomicrmw umax i8* %a, i8 %b release
3976  ret i8 %1
3977}
3978
3979define i8 @atomicrmw_umax_i8_acq_rel(i8 *%a, i8 %b) nounwind {
3980; RV32I-LABEL: atomicrmw_umax_i8_acq_rel:
3981; RV32I:       # %bb.0:
3982; RV32I-NEXT:    addi sp, sp, -32
3983; RV32I-NEXT:    sw ra, 28(sp)
3984; RV32I-NEXT:    sw s0, 24(sp)
3985; RV32I-NEXT:    sw s1, 20(sp)
3986; RV32I-NEXT:    sw s2, 16(sp)
3987; RV32I-NEXT:    sw s3, 12(sp)
3988; RV32I-NEXT:    mv s2, a1
3989; RV32I-NEXT:    mv s1, a0
3990; RV32I-NEXT:    lbu a0, 0(a0)
3991; RV32I-NEXT:    andi s0, a1, 255
3992; RV32I-NEXT:    addi s3, sp, 11
3993; RV32I-NEXT:  .LBB48_1: # %atomicrmw.start
3994; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
3995; RV32I-NEXT:    andi a1, a0, 255
3996; RV32I-NEXT:    mv a2, a0
3997; RV32I-NEXT:    bltu s0, a1, .LBB48_3
3998; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
3999; RV32I-NEXT:    # in Loop: Header=BB48_1 Depth=1
4000; RV32I-NEXT:    mv a2, s2
4001; RV32I-NEXT:  .LBB48_3: # %atomicrmw.start
4002; RV32I-NEXT:    # in Loop: Header=BB48_1 Depth=1
4003; RV32I-NEXT:    sb a0, 11(sp)
4004; RV32I-NEXT:    mv a0, s1
4005; RV32I-NEXT:    mv a1, s3
4006; RV32I-NEXT:    addi a3, zero, 4
4007; RV32I-NEXT:    addi a4, zero, 2
4008; RV32I-NEXT:    call __atomic_compare_exchange_1
4009; RV32I-NEXT:    mv a1, a0
4010; RV32I-NEXT:    lb a0, 11(sp)
4011; RV32I-NEXT:    beqz a1, .LBB48_1
4012; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
4013; RV32I-NEXT:    lw s3, 12(sp)
4014; RV32I-NEXT:    lw s2, 16(sp)
4015; RV32I-NEXT:    lw s1, 20(sp)
4016; RV32I-NEXT:    lw s0, 24(sp)
4017; RV32I-NEXT:    lw ra, 28(sp)
4018; RV32I-NEXT:    addi sp, sp, 32
4019; RV32I-NEXT:    ret
4020;
4021; RV32IA-LABEL: atomicrmw_umax_i8_acq_rel:
4022; RV32IA:       # %bb.0:
4023; RV32IA-NEXT:    slli a2, a0, 3
4024; RV32IA-NEXT:    andi a2, a2, 24
4025; RV32IA-NEXT:    addi a3, zero, 255
4026; RV32IA-NEXT:    sll a6, a3, a2
4027; RV32IA-NEXT:    andi a1, a1, 255
4028; RV32IA-NEXT:    sll a1, a1, a2
4029; RV32IA-NEXT:    andi a0, a0, -4
4030; RV32IA-NEXT:  .LBB48_1: # =>This Inner Loop Header: Depth=1
4031; RV32IA-NEXT:    lr.w.aq a4, (a0)
4032; RV32IA-NEXT:    and a3, a4, a6
4033; RV32IA-NEXT:    mv a5, a4
4034; RV32IA-NEXT:    bgeu a3, a1, .LBB48_3
4035; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB48_1 Depth=1
4036; RV32IA-NEXT:    xor a5, a4, a1
4037; RV32IA-NEXT:    and a5, a5, a6
4038; RV32IA-NEXT:    xor a5, a4, a5
4039; RV32IA-NEXT:  .LBB48_3: # in Loop: Header=BB48_1 Depth=1
4040; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
4041; RV32IA-NEXT:    bnez a5, .LBB48_1
4042; RV32IA-NEXT:  # %bb.4:
4043; RV32IA-NEXT:    srl a0, a4, a2
4044; RV32IA-NEXT:    ret
4045;
4046; RV64I-LABEL: atomicrmw_umax_i8_acq_rel:
4047; RV64I:       # %bb.0:
4048; RV64I-NEXT:    addi sp, sp, -48
4049; RV64I-NEXT:    sd ra, 40(sp)
4050; RV64I-NEXT:    sd s0, 32(sp)
4051; RV64I-NEXT:    sd s1, 24(sp)
4052; RV64I-NEXT:    sd s2, 16(sp)
4053; RV64I-NEXT:    sd s3, 8(sp)
4054; RV64I-NEXT:    mv s2, a1
4055; RV64I-NEXT:    mv s1, a0
4056; RV64I-NEXT:    lbu a0, 0(a0)
4057; RV64I-NEXT:    andi s0, a1, 255
4058; RV64I-NEXT:    addi s3, sp, 7
4059; RV64I-NEXT:  .LBB48_1: # %atomicrmw.start
4060; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
4061; RV64I-NEXT:    andi a1, a0, 255
4062; RV64I-NEXT:    mv a2, a0
4063; RV64I-NEXT:    bltu s0, a1, .LBB48_3
4064; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
4065; RV64I-NEXT:    # in Loop: Header=BB48_1 Depth=1
4066; RV64I-NEXT:    mv a2, s2
4067; RV64I-NEXT:  .LBB48_3: # %atomicrmw.start
4068; RV64I-NEXT:    # in Loop: Header=BB48_1 Depth=1
4069; RV64I-NEXT:    sb a0, 7(sp)
4070; RV64I-NEXT:    mv a0, s1
4071; RV64I-NEXT:    mv a1, s3
4072; RV64I-NEXT:    addi a3, zero, 4
4073; RV64I-NEXT:    addi a4, zero, 2
4074; RV64I-NEXT:    call __atomic_compare_exchange_1
4075; RV64I-NEXT:    mv a1, a0
4076; RV64I-NEXT:    lb a0, 7(sp)
4077; RV64I-NEXT:    beqz a1, .LBB48_1
4078; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
4079; RV64I-NEXT:    ld s3, 8(sp)
4080; RV64I-NEXT:    ld s2, 16(sp)
4081; RV64I-NEXT:    ld s1, 24(sp)
4082; RV64I-NEXT:    ld s0, 32(sp)
4083; RV64I-NEXT:    ld ra, 40(sp)
4084; RV64I-NEXT:    addi sp, sp, 48
4085; RV64I-NEXT:    ret
4086;
4087; RV64IA-LABEL: atomicrmw_umax_i8_acq_rel:
4088; RV64IA:       # %bb.0:
4089; RV64IA-NEXT:    slli a2, a0, 3
4090; RV64IA-NEXT:    andi a2, a2, 24
4091; RV64IA-NEXT:    addi a3, zero, 255
4092; RV64IA-NEXT:    sllw a6, a3, a2
4093; RV64IA-NEXT:    andi a1, a1, 255
4094; RV64IA-NEXT:    sllw a1, a1, a2
4095; RV64IA-NEXT:    andi a0, a0, -4
4096; RV64IA-NEXT:  .LBB48_1: # =>This Inner Loop Header: Depth=1
4097; RV64IA-NEXT:    lr.w.aq a4, (a0)
4098; RV64IA-NEXT:    and a3, a4, a6
4099; RV64IA-NEXT:    mv a5, a4
4100; RV64IA-NEXT:    bgeu a3, a1, .LBB48_3
4101; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB48_1 Depth=1
4102; RV64IA-NEXT:    xor a5, a4, a1
4103; RV64IA-NEXT:    and a5, a5, a6
4104; RV64IA-NEXT:    xor a5, a4, a5
4105; RV64IA-NEXT:  .LBB48_3: # in Loop: Header=BB48_1 Depth=1
4106; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
4107; RV64IA-NEXT:    bnez a5, .LBB48_1
4108; RV64IA-NEXT:  # %bb.4:
4109; RV64IA-NEXT:    srlw a0, a4, a2
4110; RV64IA-NEXT:    ret
4111  %1 = atomicrmw umax i8* %a, i8 %b acq_rel
4112  ret i8 %1
4113}
4114
4115define i8 @atomicrmw_umax_i8_seq_cst(i8 *%a, i8 %b) nounwind {
4116; RV32I-LABEL: atomicrmw_umax_i8_seq_cst:
4117; RV32I:       # %bb.0:
4118; RV32I-NEXT:    addi sp, sp, -32
4119; RV32I-NEXT:    sw ra, 28(sp)
4120; RV32I-NEXT:    sw s0, 24(sp)
4121; RV32I-NEXT:    sw s1, 20(sp)
4122; RV32I-NEXT:    sw s2, 16(sp)
4123; RV32I-NEXT:    sw s3, 12(sp)
4124; RV32I-NEXT:    mv s2, a1
4125; RV32I-NEXT:    mv s1, a0
4126; RV32I-NEXT:    lbu a0, 0(a0)
4127; RV32I-NEXT:    andi s0, a1, 255
4128; RV32I-NEXT:    addi s3, sp, 11
4129; RV32I-NEXT:  .LBB49_1: # %atomicrmw.start
4130; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
4131; RV32I-NEXT:    andi a1, a0, 255
4132; RV32I-NEXT:    mv a2, a0
4133; RV32I-NEXT:    bltu s0, a1, .LBB49_3
4134; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
4135; RV32I-NEXT:    # in Loop: Header=BB49_1 Depth=1
4136; RV32I-NEXT:    mv a2, s2
4137; RV32I-NEXT:  .LBB49_3: # %atomicrmw.start
4138; RV32I-NEXT:    # in Loop: Header=BB49_1 Depth=1
4139; RV32I-NEXT:    sb a0, 11(sp)
4140; RV32I-NEXT:    mv a0, s1
4141; RV32I-NEXT:    mv a1, s3
4142; RV32I-NEXT:    addi a3, zero, 5
4143; RV32I-NEXT:    addi a4, zero, 5
4144; RV32I-NEXT:    call __atomic_compare_exchange_1
4145; RV32I-NEXT:    mv a1, a0
4146; RV32I-NEXT:    lb a0, 11(sp)
4147; RV32I-NEXT:    beqz a1, .LBB49_1
4148; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
4149; RV32I-NEXT:    lw s3, 12(sp)
4150; RV32I-NEXT:    lw s2, 16(sp)
4151; RV32I-NEXT:    lw s1, 20(sp)
4152; RV32I-NEXT:    lw s0, 24(sp)
4153; RV32I-NEXT:    lw ra, 28(sp)
4154; RV32I-NEXT:    addi sp, sp, 32
4155; RV32I-NEXT:    ret
4156;
4157; RV32IA-LABEL: atomicrmw_umax_i8_seq_cst:
4158; RV32IA:       # %bb.0:
4159; RV32IA-NEXT:    slli a2, a0, 3
4160; RV32IA-NEXT:    andi a2, a2, 24
4161; RV32IA-NEXT:    addi a3, zero, 255
4162; RV32IA-NEXT:    sll a6, a3, a2
4163; RV32IA-NEXT:    andi a1, a1, 255
4164; RV32IA-NEXT:    sll a1, a1, a2
4165; RV32IA-NEXT:    andi a0, a0, -4
4166; RV32IA-NEXT:  .LBB49_1: # =>This Inner Loop Header: Depth=1
4167; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
4168; RV32IA-NEXT:    and a3, a4, a6
4169; RV32IA-NEXT:    mv a5, a4
4170; RV32IA-NEXT:    bgeu a3, a1, .LBB49_3
4171; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB49_1 Depth=1
4172; RV32IA-NEXT:    xor a5, a4, a1
4173; RV32IA-NEXT:    and a5, a5, a6
4174; RV32IA-NEXT:    xor a5, a4, a5
4175; RV32IA-NEXT:  .LBB49_3: # in Loop: Header=BB49_1 Depth=1
4176; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
4177; RV32IA-NEXT:    bnez a5, .LBB49_1
4178; RV32IA-NEXT:  # %bb.4:
4179; RV32IA-NEXT:    srl a0, a4, a2
4180; RV32IA-NEXT:    ret
4181;
4182; RV64I-LABEL: atomicrmw_umax_i8_seq_cst:
4183; RV64I:       # %bb.0:
4184; RV64I-NEXT:    addi sp, sp, -48
4185; RV64I-NEXT:    sd ra, 40(sp)
4186; RV64I-NEXT:    sd s0, 32(sp)
4187; RV64I-NEXT:    sd s1, 24(sp)
4188; RV64I-NEXT:    sd s2, 16(sp)
4189; RV64I-NEXT:    sd s3, 8(sp)
4190; RV64I-NEXT:    mv s2, a1
4191; RV64I-NEXT:    mv s1, a0
4192; RV64I-NEXT:    lbu a0, 0(a0)
4193; RV64I-NEXT:    andi s0, a1, 255
4194; RV64I-NEXT:    addi s3, sp, 7
4195; RV64I-NEXT:  .LBB49_1: # %atomicrmw.start
4196; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
4197; RV64I-NEXT:    andi a1, a0, 255
4198; RV64I-NEXT:    mv a2, a0
4199; RV64I-NEXT:    bltu s0, a1, .LBB49_3
4200; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
4201; RV64I-NEXT:    # in Loop: Header=BB49_1 Depth=1
4202; RV64I-NEXT:    mv a2, s2
4203; RV64I-NEXT:  .LBB49_3: # %atomicrmw.start
4204; RV64I-NEXT:    # in Loop: Header=BB49_1 Depth=1
4205; RV64I-NEXT:    sb a0, 7(sp)
4206; RV64I-NEXT:    mv a0, s1
4207; RV64I-NEXT:    mv a1, s3
4208; RV64I-NEXT:    addi a3, zero, 5
4209; RV64I-NEXT:    addi a4, zero, 5
4210; RV64I-NEXT:    call __atomic_compare_exchange_1
4211; RV64I-NEXT:    mv a1, a0
4212; RV64I-NEXT:    lb a0, 7(sp)
4213; RV64I-NEXT:    beqz a1, .LBB49_1
4214; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
4215; RV64I-NEXT:    ld s3, 8(sp)
4216; RV64I-NEXT:    ld s2, 16(sp)
4217; RV64I-NEXT:    ld s1, 24(sp)
4218; RV64I-NEXT:    ld s0, 32(sp)
4219; RV64I-NEXT:    ld ra, 40(sp)
4220; RV64I-NEXT:    addi sp, sp, 48
4221; RV64I-NEXT:    ret
4222;
4223; RV64IA-LABEL: atomicrmw_umax_i8_seq_cst:
4224; RV64IA:       # %bb.0:
4225; RV64IA-NEXT:    slli a2, a0, 3
4226; RV64IA-NEXT:    andi a2, a2, 24
4227; RV64IA-NEXT:    addi a3, zero, 255
4228; RV64IA-NEXT:    sllw a6, a3, a2
4229; RV64IA-NEXT:    andi a1, a1, 255
4230; RV64IA-NEXT:    sllw a1, a1, a2
4231; RV64IA-NEXT:    andi a0, a0, -4
4232; RV64IA-NEXT:  .LBB49_1: # =>This Inner Loop Header: Depth=1
4233; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
4234; RV64IA-NEXT:    and a3, a4, a6
4235; RV64IA-NEXT:    mv a5, a4
4236; RV64IA-NEXT:    bgeu a3, a1, .LBB49_3
4237; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB49_1 Depth=1
4238; RV64IA-NEXT:    xor a5, a4, a1
4239; RV64IA-NEXT:    and a5, a5, a6
4240; RV64IA-NEXT:    xor a5, a4, a5
4241; RV64IA-NEXT:  .LBB49_3: # in Loop: Header=BB49_1 Depth=1
4242; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
4243; RV64IA-NEXT:    bnez a5, .LBB49_1
4244; RV64IA-NEXT:  # %bb.4:
4245; RV64IA-NEXT:    srlw a0, a4, a2
4246; RV64IA-NEXT:    ret
4247  %1 = atomicrmw umax i8* %a, i8 %b seq_cst
4248  ret i8 %1
4249}
4250
4251define i8 @atomicrmw_umin_i8_monotonic(i8 *%a, i8 %b) nounwind {
4252; RV32I-LABEL: atomicrmw_umin_i8_monotonic:
4253; RV32I:       # %bb.0:
4254; RV32I-NEXT:    addi sp, sp, -32
4255; RV32I-NEXT:    sw ra, 28(sp)
4256; RV32I-NEXT:    sw s0, 24(sp)
4257; RV32I-NEXT:    sw s1, 20(sp)
4258; RV32I-NEXT:    sw s2, 16(sp)
4259; RV32I-NEXT:    sw s3, 12(sp)
4260; RV32I-NEXT:    mv s2, a1
4261; RV32I-NEXT:    mv s1, a0
4262; RV32I-NEXT:    lbu a0, 0(a0)
4263; RV32I-NEXT:    andi s0, a1, 255
4264; RV32I-NEXT:    addi s3, sp, 11
4265; RV32I-NEXT:  .LBB50_1: # %atomicrmw.start
4266; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
4267; RV32I-NEXT:    andi a1, a0, 255
4268; RV32I-NEXT:    mv a2, a0
4269; RV32I-NEXT:    bgeu s0, a1, .LBB50_3
4270; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
4271; RV32I-NEXT:    # in Loop: Header=BB50_1 Depth=1
4272; RV32I-NEXT:    mv a2, s2
4273; RV32I-NEXT:  .LBB50_3: # %atomicrmw.start
4274; RV32I-NEXT:    # in Loop: Header=BB50_1 Depth=1
4275; RV32I-NEXT:    sb a0, 11(sp)
4276; RV32I-NEXT:    mv a0, s1
4277; RV32I-NEXT:    mv a1, s3
4278; RV32I-NEXT:    mv a3, zero
4279; RV32I-NEXT:    mv a4, zero
4280; RV32I-NEXT:    call __atomic_compare_exchange_1
4281; RV32I-NEXT:    mv a1, a0
4282; RV32I-NEXT:    lb a0, 11(sp)
4283; RV32I-NEXT:    beqz a1, .LBB50_1
4284; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
4285; RV32I-NEXT:    lw s3, 12(sp)
4286; RV32I-NEXT:    lw s2, 16(sp)
4287; RV32I-NEXT:    lw s1, 20(sp)
4288; RV32I-NEXT:    lw s0, 24(sp)
4289; RV32I-NEXT:    lw ra, 28(sp)
4290; RV32I-NEXT:    addi sp, sp, 32
4291; RV32I-NEXT:    ret
4292;
4293; RV32IA-LABEL: atomicrmw_umin_i8_monotonic:
4294; RV32IA:       # %bb.0:
4295; RV32IA-NEXT:    slli a2, a0, 3
4296; RV32IA-NEXT:    andi a2, a2, 24
4297; RV32IA-NEXT:    addi a3, zero, 255
4298; RV32IA-NEXT:    sll a6, a3, a2
4299; RV32IA-NEXT:    andi a1, a1, 255
4300; RV32IA-NEXT:    sll a1, a1, a2
4301; RV32IA-NEXT:    andi a0, a0, -4
4302; RV32IA-NEXT:  .LBB50_1: # =>This Inner Loop Header: Depth=1
4303; RV32IA-NEXT:    lr.w a4, (a0)
4304; RV32IA-NEXT:    and a3, a4, a6
4305; RV32IA-NEXT:    mv a5, a4
4306; RV32IA-NEXT:    bgeu a1, a3, .LBB50_3
4307; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB50_1 Depth=1
4308; RV32IA-NEXT:    xor a5, a4, a1
4309; RV32IA-NEXT:    and a5, a5, a6
4310; RV32IA-NEXT:    xor a5, a4, a5
4311; RV32IA-NEXT:  .LBB50_3: # in Loop: Header=BB50_1 Depth=1
4312; RV32IA-NEXT:    sc.w a5, a5, (a0)
4313; RV32IA-NEXT:    bnez a5, .LBB50_1
4314; RV32IA-NEXT:  # %bb.4:
4315; RV32IA-NEXT:    srl a0, a4, a2
4316; RV32IA-NEXT:    ret
4317;
4318; RV64I-LABEL: atomicrmw_umin_i8_monotonic:
4319; RV64I:       # %bb.0:
4320; RV64I-NEXT:    addi sp, sp, -48
4321; RV64I-NEXT:    sd ra, 40(sp)
4322; RV64I-NEXT:    sd s0, 32(sp)
4323; RV64I-NEXT:    sd s1, 24(sp)
4324; RV64I-NEXT:    sd s2, 16(sp)
4325; RV64I-NEXT:    sd s3, 8(sp)
4326; RV64I-NEXT:    mv s2, a1
4327; RV64I-NEXT:    mv s1, a0
4328; RV64I-NEXT:    lbu a0, 0(a0)
4329; RV64I-NEXT:    andi s0, a1, 255
4330; RV64I-NEXT:    addi s3, sp, 7
4331; RV64I-NEXT:  .LBB50_1: # %atomicrmw.start
4332; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
4333; RV64I-NEXT:    andi a1, a0, 255
4334; RV64I-NEXT:    mv a2, a0
4335; RV64I-NEXT:    bgeu s0, a1, .LBB50_3
4336; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
4337; RV64I-NEXT:    # in Loop: Header=BB50_1 Depth=1
4338; RV64I-NEXT:    mv a2, s2
4339; RV64I-NEXT:  .LBB50_3: # %atomicrmw.start
4340; RV64I-NEXT:    # in Loop: Header=BB50_1 Depth=1
4341; RV64I-NEXT:    sb a0, 7(sp)
4342; RV64I-NEXT:    mv a0, s1
4343; RV64I-NEXT:    mv a1, s3
4344; RV64I-NEXT:    mv a3, zero
4345; RV64I-NEXT:    mv a4, zero
4346; RV64I-NEXT:    call __atomic_compare_exchange_1
4347; RV64I-NEXT:    mv a1, a0
4348; RV64I-NEXT:    lb a0, 7(sp)
4349; RV64I-NEXT:    beqz a1, .LBB50_1
4350; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
4351; RV64I-NEXT:    ld s3, 8(sp)
4352; RV64I-NEXT:    ld s2, 16(sp)
4353; RV64I-NEXT:    ld s1, 24(sp)
4354; RV64I-NEXT:    ld s0, 32(sp)
4355; RV64I-NEXT:    ld ra, 40(sp)
4356; RV64I-NEXT:    addi sp, sp, 48
4357; RV64I-NEXT:    ret
4358;
4359; RV64IA-LABEL: atomicrmw_umin_i8_monotonic:
4360; RV64IA:       # %bb.0:
4361; RV64IA-NEXT:    slli a2, a0, 3
4362; RV64IA-NEXT:    andi a2, a2, 24
4363; RV64IA-NEXT:    addi a3, zero, 255
4364; RV64IA-NEXT:    sllw a6, a3, a2
4365; RV64IA-NEXT:    andi a1, a1, 255
4366; RV64IA-NEXT:    sllw a1, a1, a2
4367; RV64IA-NEXT:    andi a0, a0, -4
4368; RV64IA-NEXT:  .LBB50_1: # =>This Inner Loop Header: Depth=1
4369; RV64IA-NEXT:    lr.w a4, (a0)
4370; RV64IA-NEXT:    and a3, a4, a6
4371; RV64IA-NEXT:    mv a5, a4
4372; RV64IA-NEXT:    bgeu a1, a3, .LBB50_3
4373; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB50_1 Depth=1
4374; RV64IA-NEXT:    xor a5, a4, a1
4375; RV64IA-NEXT:    and a5, a5, a6
4376; RV64IA-NEXT:    xor a5, a4, a5
4377; RV64IA-NEXT:  .LBB50_3: # in Loop: Header=BB50_1 Depth=1
4378; RV64IA-NEXT:    sc.w a5, a5, (a0)
4379; RV64IA-NEXT:    bnez a5, .LBB50_1
4380; RV64IA-NEXT:  # %bb.4:
4381; RV64IA-NEXT:    srlw a0, a4, a2
4382; RV64IA-NEXT:    ret
4383  %1 = atomicrmw umin i8* %a, i8 %b monotonic
4384  ret i8 %1
4385}
4386
4387define i8 @atomicrmw_umin_i8_acquire(i8 *%a, i8 %b) nounwind {
4388; RV32I-LABEL: atomicrmw_umin_i8_acquire:
4389; RV32I:       # %bb.0:
4390; RV32I-NEXT:    addi sp, sp, -32
4391; RV32I-NEXT:    sw ra, 28(sp)
4392; RV32I-NEXT:    sw s0, 24(sp)
4393; RV32I-NEXT:    sw s1, 20(sp)
4394; RV32I-NEXT:    sw s2, 16(sp)
4395; RV32I-NEXT:    sw s3, 12(sp)
4396; RV32I-NEXT:    mv s2, a1
4397; RV32I-NEXT:    mv s1, a0
4398; RV32I-NEXT:    lbu a0, 0(a0)
4399; RV32I-NEXT:    andi s0, a1, 255
4400; RV32I-NEXT:    addi s3, sp, 11
4401; RV32I-NEXT:  .LBB51_1: # %atomicrmw.start
4402; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
4403; RV32I-NEXT:    andi a1, a0, 255
4404; RV32I-NEXT:    mv a2, a0
4405; RV32I-NEXT:    bgeu s0, a1, .LBB51_3
4406; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
4407; RV32I-NEXT:    # in Loop: Header=BB51_1 Depth=1
4408; RV32I-NEXT:    mv a2, s2
4409; RV32I-NEXT:  .LBB51_3: # %atomicrmw.start
4410; RV32I-NEXT:    # in Loop: Header=BB51_1 Depth=1
4411; RV32I-NEXT:    sb a0, 11(sp)
4412; RV32I-NEXT:    mv a0, s1
4413; RV32I-NEXT:    mv a1, s3
4414; RV32I-NEXT:    addi a3, zero, 2
4415; RV32I-NEXT:    addi a4, zero, 2
4416; RV32I-NEXT:    call __atomic_compare_exchange_1
4417; RV32I-NEXT:    mv a1, a0
4418; RV32I-NEXT:    lb a0, 11(sp)
4419; RV32I-NEXT:    beqz a1, .LBB51_1
4420; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
4421; RV32I-NEXT:    lw s3, 12(sp)
4422; RV32I-NEXT:    lw s2, 16(sp)
4423; RV32I-NEXT:    lw s1, 20(sp)
4424; RV32I-NEXT:    lw s0, 24(sp)
4425; RV32I-NEXT:    lw ra, 28(sp)
4426; RV32I-NEXT:    addi sp, sp, 32
4427; RV32I-NEXT:    ret
4428;
4429; RV32IA-LABEL: atomicrmw_umin_i8_acquire:
4430; RV32IA:       # %bb.0:
4431; RV32IA-NEXT:    slli a2, a0, 3
4432; RV32IA-NEXT:    andi a2, a2, 24
4433; RV32IA-NEXT:    addi a3, zero, 255
4434; RV32IA-NEXT:    sll a6, a3, a2
4435; RV32IA-NEXT:    andi a1, a1, 255
4436; RV32IA-NEXT:    sll a1, a1, a2
4437; RV32IA-NEXT:    andi a0, a0, -4
4438; RV32IA-NEXT:  .LBB51_1: # =>This Inner Loop Header: Depth=1
4439; RV32IA-NEXT:    lr.w.aq a4, (a0)
4440; RV32IA-NEXT:    and a3, a4, a6
4441; RV32IA-NEXT:    mv a5, a4
4442; RV32IA-NEXT:    bgeu a1, a3, .LBB51_3
4443; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB51_1 Depth=1
4444; RV32IA-NEXT:    xor a5, a4, a1
4445; RV32IA-NEXT:    and a5, a5, a6
4446; RV32IA-NEXT:    xor a5, a4, a5
4447; RV32IA-NEXT:  .LBB51_3: # in Loop: Header=BB51_1 Depth=1
4448; RV32IA-NEXT:    sc.w a5, a5, (a0)
4449; RV32IA-NEXT:    bnez a5, .LBB51_1
4450; RV32IA-NEXT:  # %bb.4:
4451; RV32IA-NEXT:    srl a0, a4, a2
4452; RV32IA-NEXT:    ret
4453;
4454; RV64I-LABEL: atomicrmw_umin_i8_acquire:
4455; RV64I:       # %bb.0:
4456; RV64I-NEXT:    addi sp, sp, -48
4457; RV64I-NEXT:    sd ra, 40(sp)
4458; RV64I-NEXT:    sd s0, 32(sp)
4459; RV64I-NEXT:    sd s1, 24(sp)
4460; RV64I-NEXT:    sd s2, 16(sp)
4461; RV64I-NEXT:    sd s3, 8(sp)
4462; RV64I-NEXT:    mv s2, a1
4463; RV64I-NEXT:    mv s1, a0
4464; RV64I-NEXT:    lbu a0, 0(a0)
4465; RV64I-NEXT:    andi s0, a1, 255
4466; RV64I-NEXT:    addi s3, sp, 7
4467; RV64I-NEXT:  .LBB51_1: # %atomicrmw.start
4468; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
4469; RV64I-NEXT:    andi a1, a0, 255
4470; RV64I-NEXT:    mv a2, a0
4471; RV64I-NEXT:    bgeu s0, a1, .LBB51_3
4472; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
4473; RV64I-NEXT:    # in Loop: Header=BB51_1 Depth=1
4474; RV64I-NEXT:    mv a2, s2
4475; RV64I-NEXT:  .LBB51_3: # %atomicrmw.start
4476; RV64I-NEXT:    # in Loop: Header=BB51_1 Depth=1
4477; RV64I-NEXT:    sb a0, 7(sp)
4478; RV64I-NEXT:    mv a0, s1
4479; RV64I-NEXT:    mv a1, s3
4480; RV64I-NEXT:    addi a3, zero, 2
4481; RV64I-NEXT:    addi a4, zero, 2
4482; RV64I-NEXT:    call __atomic_compare_exchange_1
4483; RV64I-NEXT:    mv a1, a0
4484; RV64I-NEXT:    lb a0, 7(sp)
4485; RV64I-NEXT:    beqz a1, .LBB51_1
4486; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
4487; RV64I-NEXT:    ld s3, 8(sp)
4488; RV64I-NEXT:    ld s2, 16(sp)
4489; RV64I-NEXT:    ld s1, 24(sp)
4490; RV64I-NEXT:    ld s0, 32(sp)
4491; RV64I-NEXT:    ld ra, 40(sp)
4492; RV64I-NEXT:    addi sp, sp, 48
4493; RV64I-NEXT:    ret
4494;
4495; RV64IA-LABEL: atomicrmw_umin_i8_acquire:
4496; RV64IA:       # %bb.0:
4497; RV64IA-NEXT:    slli a2, a0, 3
4498; RV64IA-NEXT:    andi a2, a2, 24
4499; RV64IA-NEXT:    addi a3, zero, 255
4500; RV64IA-NEXT:    sllw a6, a3, a2
4501; RV64IA-NEXT:    andi a1, a1, 255
4502; RV64IA-NEXT:    sllw a1, a1, a2
4503; RV64IA-NEXT:    andi a0, a0, -4
4504; RV64IA-NEXT:  .LBB51_1: # =>This Inner Loop Header: Depth=1
4505; RV64IA-NEXT:    lr.w.aq a4, (a0)
4506; RV64IA-NEXT:    and a3, a4, a6
4507; RV64IA-NEXT:    mv a5, a4
4508; RV64IA-NEXT:    bgeu a1, a3, .LBB51_3
4509; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB51_1 Depth=1
4510; RV64IA-NEXT:    xor a5, a4, a1
4511; RV64IA-NEXT:    and a5, a5, a6
4512; RV64IA-NEXT:    xor a5, a4, a5
4513; RV64IA-NEXT:  .LBB51_3: # in Loop: Header=BB51_1 Depth=1
4514; RV64IA-NEXT:    sc.w a5, a5, (a0)
4515; RV64IA-NEXT:    bnez a5, .LBB51_1
4516; RV64IA-NEXT:  # %bb.4:
4517; RV64IA-NEXT:    srlw a0, a4, a2
4518; RV64IA-NEXT:    ret
4519  %1 = atomicrmw umin i8* %a, i8 %b acquire
4520  ret i8 %1
4521}
4522
4523define i8 @atomicrmw_umin_i8_release(i8 *%a, i8 %b) nounwind {
4524; RV32I-LABEL: atomicrmw_umin_i8_release:
4525; RV32I:       # %bb.0:
4526; RV32I-NEXT:    addi sp, sp, -32
4527; RV32I-NEXT:    sw ra, 28(sp)
4528; RV32I-NEXT:    sw s0, 24(sp)
4529; RV32I-NEXT:    sw s1, 20(sp)
4530; RV32I-NEXT:    sw s2, 16(sp)
4531; RV32I-NEXT:    sw s3, 12(sp)
4532; RV32I-NEXT:    mv s2, a1
4533; RV32I-NEXT:    mv s1, a0
4534; RV32I-NEXT:    lbu a0, 0(a0)
4535; RV32I-NEXT:    andi s0, a1, 255
4536; RV32I-NEXT:    addi s3, sp, 11
4537; RV32I-NEXT:  .LBB52_1: # %atomicrmw.start
4538; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
4539; RV32I-NEXT:    andi a1, a0, 255
4540; RV32I-NEXT:    mv a2, a0
4541; RV32I-NEXT:    bgeu s0, a1, .LBB52_3
4542; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
4543; RV32I-NEXT:    # in Loop: Header=BB52_1 Depth=1
4544; RV32I-NEXT:    mv a2, s2
4545; RV32I-NEXT:  .LBB52_3: # %atomicrmw.start
4546; RV32I-NEXT:    # in Loop: Header=BB52_1 Depth=1
4547; RV32I-NEXT:    sb a0, 11(sp)
4548; RV32I-NEXT:    mv a0, s1
4549; RV32I-NEXT:    mv a1, s3
4550; RV32I-NEXT:    addi a3, zero, 3
4551; RV32I-NEXT:    mv a4, zero
4552; RV32I-NEXT:    call __atomic_compare_exchange_1
4553; RV32I-NEXT:    mv a1, a0
4554; RV32I-NEXT:    lb a0, 11(sp)
4555; RV32I-NEXT:    beqz a1, .LBB52_1
4556; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
4557; RV32I-NEXT:    lw s3, 12(sp)
4558; RV32I-NEXT:    lw s2, 16(sp)
4559; RV32I-NEXT:    lw s1, 20(sp)
4560; RV32I-NEXT:    lw s0, 24(sp)
4561; RV32I-NEXT:    lw ra, 28(sp)
4562; RV32I-NEXT:    addi sp, sp, 32
4563; RV32I-NEXT:    ret
4564;
4565; RV32IA-LABEL: atomicrmw_umin_i8_release:
4566; RV32IA:       # %bb.0:
4567; RV32IA-NEXT:    slli a2, a0, 3
4568; RV32IA-NEXT:    andi a2, a2, 24
4569; RV32IA-NEXT:    addi a3, zero, 255
4570; RV32IA-NEXT:    sll a6, a3, a2
4571; RV32IA-NEXT:    andi a1, a1, 255
4572; RV32IA-NEXT:    sll a1, a1, a2
4573; RV32IA-NEXT:    andi a0, a0, -4
4574; RV32IA-NEXT:  .LBB52_1: # =>This Inner Loop Header: Depth=1
4575; RV32IA-NEXT:    lr.w a4, (a0)
4576; RV32IA-NEXT:    and a3, a4, a6
4577; RV32IA-NEXT:    mv a5, a4
4578; RV32IA-NEXT:    bgeu a1, a3, .LBB52_3
4579; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB52_1 Depth=1
4580; RV32IA-NEXT:    xor a5, a4, a1
4581; RV32IA-NEXT:    and a5, a5, a6
4582; RV32IA-NEXT:    xor a5, a4, a5
4583; RV32IA-NEXT:  .LBB52_3: # in Loop: Header=BB52_1 Depth=1
4584; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
4585; RV32IA-NEXT:    bnez a5, .LBB52_1
4586; RV32IA-NEXT:  # %bb.4:
4587; RV32IA-NEXT:    srl a0, a4, a2
4588; RV32IA-NEXT:    ret
4589;
4590; RV64I-LABEL: atomicrmw_umin_i8_release:
4591; RV64I:       # %bb.0:
4592; RV64I-NEXT:    addi sp, sp, -48
4593; RV64I-NEXT:    sd ra, 40(sp)
4594; RV64I-NEXT:    sd s0, 32(sp)
4595; RV64I-NEXT:    sd s1, 24(sp)
4596; RV64I-NEXT:    sd s2, 16(sp)
4597; RV64I-NEXT:    sd s3, 8(sp)
4598; RV64I-NEXT:    mv s2, a1
4599; RV64I-NEXT:    mv s1, a0
4600; RV64I-NEXT:    lbu a0, 0(a0)
4601; RV64I-NEXT:    andi s0, a1, 255
4602; RV64I-NEXT:    addi s3, sp, 7
4603; RV64I-NEXT:  .LBB52_1: # %atomicrmw.start
4604; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
4605; RV64I-NEXT:    andi a1, a0, 255
4606; RV64I-NEXT:    mv a2, a0
4607; RV64I-NEXT:    bgeu s0, a1, .LBB52_3
4608; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
4609; RV64I-NEXT:    # in Loop: Header=BB52_1 Depth=1
4610; RV64I-NEXT:    mv a2, s2
4611; RV64I-NEXT:  .LBB52_3: # %atomicrmw.start
4612; RV64I-NEXT:    # in Loop: Header=BB52_1 Depth=1
4613; RV64I-NEXT:    sb a0, 7(sp)
4614; RV64I-NEXT:    mv a0, s1
4615; RV64I-NEXT:    mv a1, s3
4616; RV64I-NEXT:    addi a3, zero, 3
4617; RV64I-NEXT:    mv a4, zero
4618; RV64I-NEXT:    call __atomic_compare_exchange_1
4619; RV64I-NEXT:    mv a1, a0
4620; RV64I-NEXT:    lb a0, 7(sp)
4621; RV64I-NEXT:    beqz a1, .LBB52_1
4622; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
4623; RV64I-NEXT:    ld s3, 8(sp)
4624; RV64I-NEXT:    ld s2, 16(sp)
4625; RV64I-NEXT:    ld s1, 24(sp)
4626; RV64I-NEXT:    ld s0, 32(sp)
4627; RV64I-NEXT:    ld ra, 40(sp)
4628; RV64I-NEXT:    addi sp, sp, 48
4629; RV64I-NEXT:    ret
4630;
4631; RV64IA-LABEL: atomicrmw_umin_i8_release:
4632; RV64IA:       # %bb.0:
4633; RV64IA-NEXT:    slli a2, a0, 3
4634; RV64IA-NEXT:    andi a2, a2, 24
4635; RV64IA-NEXT:    addi a3, zero, 255
4636; RV64IA-NEXT:    sllw a6, a3, a2
4637; RV64IA-NEXT:    andi a1, a1, 255
4638; RV64IA-NEXT:    sllw a1, a1, a2
4639; RV64IA-NEXT:    andi a0, a0, -4
4640; RV64IA-NEXT:  .LBB52_1: # =>This Inner Loop Header: Depth=1
4641; RV64IA-NEXT:    lr.w a4, (a0)
4642; RV64IA-NEXT:    and a3, a4, a6
4643; RV64IA-NEXT:    mv a5, a4
4644; RV64IA-NEXT:    bgeu a1, a3, .LBB52_3
4645; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB52_1 Depth=1
4646; RV64IA-NEXT:    xor a5, a4, a1
4647; RV64IA-NEXT:    and a5, a5, a6
4648; RV64IA-NEXT:    xor a5, a4, a5
4649; RV64IA-NEXT:  .LBB52_3: # in Loop: Header=BB52_1 Depth=1
4650; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
4651; RV64IA-NEXT:    bnez a5, .LBB52_1
4652; RV64IA-NEXT:  # %bb.4:
4653; RV64IA-NEXT:    srlw a0, a4, a2
4654; RV64IA-NEXT:    ret
4655  %1 = atomicrmw umin i8* %a, i8 %b release
4656  ret i8 %1
4657}
4658
4659define i8 @atomicrmw_umin_i8_acq_rel(i8 *%a, i8 %b) nounwind {
4660; RV32I-LABEL: atomicrmw_umin_i8_acq_rel:
4661; RV32I:       # %bb.0:
4662; RV32I-NEXT:    addi sp, sp, -32
4663; RV32I-NEXT:    sw ra, 28(sp)
4664; RV32I-NEXT:    sw s0, 24(sp)
4665; RV32I-NEXT:    sw s1, 20(sp)
4666; RV32I-NEXT:    sw s2, 16(sp)
4667; RV32I-NEXT:    sw s3, 12(sp)
4668; RV32I-NEXT:    mv s2, a1
4669; RV32I-NEXT:    mv s1, a0
4670; RV32I-NEXT:    lbu a0, 0(a0)
4671; RV32I-NEXT:    andi s0, a1, 255
4672; RV32I-NEXT:    addi s3, sp, 11
4673; RV32I-NEXT:  .LBB53_1: # %atomicrmw.start
4674; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
4675; RV32I-NEXT:    andi a1, a0, 255
4676; RV32I-NEXT:    mv a2, a0
4677; RV32I-NEXT:    bgeu s0, a1, .LBB53_3
4678; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
4679; RV32I-NEXT:    # in Loop: Header=BB53_1 Depth=1
4680; RV32I-NEXT:    mv a2, s2
4681; RV32I-NEXT:  .LBB53_3: # %atomicrmw.start
4682; RV32I-NEXT:    # in Loop: Header=BB53_1 Depth=1
4683; RV32I-NEXT:    sb a0, 11(sp)
4684; RV32I-NEXT:    mv a0, s1
4685; RV32I-NEXT:    mv a1, s3
4686; RV32I-NEXT:    addi a3, zero, 4
4687; RV32I-NEXT:    addi a4, zero, 2
4688; RV32I-NEXT:    call __atomic_compare_exchange_1
4689; RV32I-NEXT:    mv a1, a0
4690; RV32I-NEXT:    lb a0, 11(sp)
4691; RV32I-NEXT:    beqz a1, .LBB53_1
4692; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
4693; RV32I-NEXT:    lw s3, 12(sp)
4694; RV32I-NEXT:    lw s2, 16(sp)
4695; RV32I-NEXT:    lw s1, 20(sp)
4696; RV32I-NEXT:    lw s0, 24(sp)
4697; RV32I-NEXT:    lw ra, 28(sp)
4698; RV32I-NEXT:    addi sp, sp, 32
4699; RV32I-NEXT:    ret
4700;
4701; RV32IA-LABEL: atomicrmw_umin_i8_acq_rel:
4702; RV32IA:       # %bb.0:
4703; RV32IA-NEXT:    slli a2, a0, 3
4704; RV32IA-NEXT:    andi a2, a2, 24
4705; RV32IA-NEXT:    addi a3, zero, 255
4706; RV32IA-NEXT:    sll a6, a3, a2
4707; RV32IA-NEXT:    andi a1, a1, 255
4708; RV32IA-NEXT:    sll a1, a1, a2
4709; RV32IA-NEXT:    andi a0, a0, -4
4710; RV32IA-NEXT:  .LBB53_1: # =>This Inner Loop Header: Depth=1
4711; RV32IA-NEXT:    lr.w.aq a4, (a0)
4712; RV32IA-NEXT:    and a3, a4, a6
4713; RV32IA-NEXT:    mv a5, a4
4714; RV32IA-NEXT:    bgeu a1, a3, .LBB53_3
4715; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB53_1 Depth=1
4716; RV32IA-NEXT:    xor a5, a4, a1
4717; RV32IA-NEXT:    and a5, a5, a6
4718; RV32IA-NEXT:    xor a5, a4, a5
4719; RV32IA-NEXT:  .LBB53_3: # in Loop: Header=BB53_1 Depth=1
4720; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
4721; RV32IA-NEXT:    bnez a5, .LBB53_1
4722; RV32IA-NEXT:  # %bb.4:
4723; RV32IA-NEXT:    srl a0, a4, a2
4724; RV32IA-NEXT:    ret
4725;
4726; RV64I-LABEL: atomicrmw_umin_i8_acq_rel:
4727; RV64I:       # %bb.0:
4728; RV64I-NEXT:    addi sp, sp, -48
4729; RV64I-NEXT:    sd ra, 40(sp)
4730; RV64I-NEXT:    sd s0, 32(sp)
4731; RV64I-NEXT:    sd s1, 24(sp)
4732; RV64I-NEXT:    sd s2, 16(sp)
4733; RV64I-NEXT:    sd s3, 8(sp)
4734; RV64I-NEXT:    mv s2, a1
4735; RV64I-NEXT:    mv s1, a0
4736; RV64I-NEXT:    lbu a0, 0(a0)
4737; RV64I-NEXT:    andi s0, a1, 255
4738; RV64I-NEXT:    addi s3, sp, 7
4739; RV64I-NEXT:  .LBB53_1: # %atomicrmw.start
4740; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
4741; RV64I-NEXT:    andi a1, a0, 255
4742; RV64I-NEXT:    mv a2, a0
4743; RV64I-NEXT:    bgeu s0, a1, .LBB53_3
4744; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
4745; RV64I-NEXT:    # in Loop: Header=BB53_1 Depth=1
4746; RV64I-NEXT:    mv a2, s2
4747; RV64I-NEXT:  .LBB53_3: # %atomicrmw.start
4748; RV64I-NEXT:    # in Loop: Header=BB53_1 Depth=1
4749; RV64I-NEXT:    sb a0, 7(sp)
4750; RV64I-NEXT:    mv a0, s1
4751; RV64I-NEXT:    mv a1, s3
4752; RV64I-NEXT:    addi a3, zero, 4
4753; RV64I-NEXT:    addi a4, zero, 2
4754; RV64I-NEXT:    call __atomic_compare_exchange_1
4755; RV64I-NEXT:    mv a1, a0
4756; RV64I-NEXT:    lb a0, 7(sp)
4757; RV64I-NEXT:    beqz a1, .LBB53_1
4758; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
4759; RV64I-NEXT:    ld s3, 8(sp)
4760; RV64I-NEXT:    ld s2, 16(sp)
4761; RV64I-NEXT:    ld s1, 24(sp)
4762; RV64I-NEXT:    ld s0, 32(sp)
4763; RV64I-NEXT:    ld ra, 40(sp)
4764; RV64I-NEXT:    addi sp, sp, 48
4765; RV64I-NEXT:    ret
4766;
4767; RV64IA-LABEL: atomicrmw_umin_i8_acq_rel:
4768; RV64IA:       # %bb.0:
4769; RV64IA-NEXT:    slli a2, a0, 3
4770; RV64IA-NEXT:    andi a2, a2, 24
4771; RV64IA-NEXT:    addi a3, zero, 255
4772; RV64IA-NEXT:    sllw a6, a3, a2
4773; RV64IA-NEXT:    andi a1, a1, 255
4774; RV64IA-NEXT:    sllw a1, a1, a2
4775; RV64IA-NEXT:    andi a0, a0, -4
4776; RV64IA-NEXT:  .LBB53_1: # =>This Inner Loop Header: Depth=1
4777; RV64IA-NEXT:    lr.w.aq a4, (a0)
4778; RV64IA-NEXT:    and a3, a4, a6
4779; RV64IA-NEXT:    mv a5, a4
4780; RV64IA-NEXT:    bgeu a1, a3, .LBB53_3
4781; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB53_1 Depth=1
4782; RV64IA-NEXT:    xor a5, a4, a1
4783; RV64IA-NEXT:    and a5, a5, a6
4784; RV64IA-NEXT:    xor a5, a4, a5
4785; RV64IA-NEXT:  .LBB53_3: # in Loop: Header=BB53_1 Depth=1
4786; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
4787; RV64IA-NEXT:    bnez a5, .LBB53_1
4788; RV64IA-NEXT:  # %bb.4:
4789; RV64IA-NEXT:    srlw a0, a4, a2
4790; RV64IA-NEXT:    ret
4791  %1 = atomicrmw umin i8* %a, i8 %b acq_rel
4792  ret i8 %1
4793}
4794
4795define i8 @atomicrmw_umin_i8_seq_cst(i8 *%a, i8 %b) nounwind {
4796; RV32I-LABEL: atomicrmw_umin_i8_seq_cst:
4797; RV32I:       # %bb.0:
4798; RV32I-NEXT:    addi sp, sp, -32
4799; RV32I-NEXT:    sw ra, 28(sp)
4800; RV32I-NEXT:    sw s0, 24(sp)
4801; RV32I-NEXT:    sw s1, 20(sp)
4802; RV32I-NEXT:    sw s2, 16(sp)
4803; RV32I-NEXT:    sw s3, 12(sp)
4804; RV32I-NEXT:    mv s2, a1
4805; RV32I-NEXT:    mv s1, a0
4806; RV32I-NEXT:    lbu a0, 0(a0)
4807; RV32I-NEXT:    andi s0, a1, 255
4808; RV32I-NEXT:    addi s3, sp, 11
4809; RV32I-NEXT:  .LBB54_1: # %atomicrmw.start
4810; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
4811; RV32I-NEXT:    andi a1, a0, 255
4812; RV32I-NEXT:    mv a2, a0
4813; RV32I-NEXT:    bgeu s0, a1, .LBB54_3
4814; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
4815; RV32I-NEXT:    # in Loop: Header=BB54_1 Depth=1
4816; RV32I-NEXT:    mv a2, s2
4817; RV32I-NEXT:  .LBB54_3: # %atomicrmw.start
4818; RV32I-NEXT:    # in Loop: Header=BB54_1 Depth=1
4819; RV32I-NEXT:    sb a0, 11(sp)
4820; RV32I-NEXT:    mv a0, s1
4821; RV32I-NEXT:    mv a1, s3
4822; RV32I-NEXT:    addi a3, zero, 5
4823; RV32I-NEXT:    addi a4, zero, 5
4824; RV32I-NEXT:    call __atomic_compare_exchange_1
4825; RV32I-NEXT:    mv a1, a0
4826; RV32I-NEXT:    lb a0, 11(sp)
4827; RV32I-NEXT:    beqz a1, .LBB54_1
4828; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
4829; RV32I-NEXT:    lw s3, 12(sp)
4830; RV32I-NEXT:    lw s2, 16(sp)
4831; RV32I-NEXT:    lw s1, 20(sp)
4832; RV32I-NEXT:    lw s0, 24(sp)
4833; RV32I-NEXT:    lw ra, 28(sp)
4834; RV32I-NEXT:    addi sp, sp, 32
4835; RV32I-NEXT:    ret
4836;
4837; RV32IA-LABEL: atomicrmw_umin_i8_seq_cst:
4838; RV32IA:       # %bb.0:
4839; RV32IA-NEXT:    slli a2, a0, 3
4840; RV32IA-NEXT:    andi a2, a2, 24
4841; RV32IA-NEXT:    addi a3, zero, 255
4842; RV32IA-NEXT:    sll a6, a3, a2
4843; RV32IA-NEXT:    andi a1, a1, 255
4844; RV32IA-NEXT:    sll a1, a1, a2
4845; RV32IA-NEXT:    andi a0, a0, -4
4846; RV32IA-NEXT:  .LBB54_1: # =>This Inner Loop Header: Depth=1
4847; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
4848; RV32IA-NEXT:    and a3, a4, a6
4849; RV32IA-NEXT:    mv a5, a4
4850; RV32IA-NEXT:    bgeu a1, a3, .LBB54_3
4851; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB54_1 Depth=1
4852; RV32IA-NEXT:    xor a5, a4, a1
4853; RV32IA-NEXT:    and a5, a5, a6
4854; RV32IA-NEXT:    xor a5, a4, a5
4855; RV32IA-NEXT:  .LBB54_3: # in Loop: Header=BB54_1 Depth=1
4856; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
4857; RV32IA-NEXT:    bnez a5, .LBB54_1
4858; RV32IA-NEXT:  # %bb.4:
4859; RV32IA-NEXT:    srl a0, a4, a2
4860; RV32IA-NEXT:    ret
4861;
4862; RV64I-LABEL: atomicrmw_umin_i8_seq_cst:
4863; RV64I:       # %bb.0:
4864; RV64I-NEXT:    addi sp, sp, -48
4865; RV64I-NEXT:    sd ra, 40(sp)
4866; RV64I-NEXT:    sd s0, 32(sp)
4867; RV64I-NEXT:    sd s1, 24(sp)
4868; RV64I-NEXT:    sd s2, 16(sp)
4869; RV64I-NEXT:    sd s3, 8(sp)
4870; RV64I-NEXT:    mv s2, a1
4871; RV64I-NEXT:    mv s1, a0
4872; RV64I-NEXT:    lbu a0, 0(a0)
4873; RV64I-NEXT:    andi s0, a1, 255
4874; RV64I-NEXT:    addi s3, sp, 7
4875; RV64I-NEXT:  .LBB54_1: # %atomicrmw.start
4876; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
4877; RV64I-NEXT:    andi a1, a0, 255
4878; RV64I-NEXT:    mv a2, a0
4879; RV64I-NEXT:    bgeu s0, a1, .LBB54_3
4880; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
4881; RV64I-NEXT:    # in Loop: Header=BB54_1 Depth=1
4882; RV64I-NEXT:    mv a2, s2
4883; RV64I-NEXT:  .LBB54_3: # %atomicrmw.start
4884; RV64I-NEXT:    # in Loop: Header=BB54_1 Depth=1
4885; RV64I-NEXT:    sb a0, 7(sp)
4886; RV64I-NEXT:    mv a0, s1
4887; RV64I-NEXT:    mv a1, s3
4888; RV64I-NEXT:    addi a3, zero, 5
4889; RV64I-NEXT:    addi a4, zero, 5
4890; RV64I-NEXT:    call __atomic_compare_exchange_1
4891; RV64I-NEXT:    mv a1, a0
4892; RV64I-NEXT:    lb a0, 7(sp)
4893; RV64I-NEXT:    beqz a1, .LBB54_1
4894; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
4895; RV64I-NEXT:    ld s3, 8(sp)
4896; RV64I-NEXT:    ld s2, 16(sp)
4897; RV64I-NEXT:    ld s1, 24(sp)
4898; RV64I-NEXT:    ld s0, 32(sp)
4899; RV64I-NEXT:    ld ra, 40(sp)
4900; RV64I-NEXT:    addi sp, sp, 48
4901; RV64I-NEXT:    ret
4902;
4903; RV64IA-LABEL: atomicrmw_umin_i8_seq_cst:
4904; RV64IA:       # %bb.0:
4905; RV64IA-NEXT:    slli a2, a0, 3
4906; RV64IA-NEXT:    andi a2, a2, 24
4907; RV64IA-NEXT:    addi a3, zero, 255
4908; RV64IA-NEXT:    sllw a6, a3, a2
4909; RV64IA-NEXT:    andi a1, a1, 255
4910; RV64IA-NEXT:    sllw a1, a1, a2
4911; RV64IA-NEXT:    andi a0, a0, -4
4912; RV64IA-NEXT:  .LBB54_1: # =>This Inner Loop Header: Depth=1
4913; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
4914; RV64IA-NEXT:    and a3, a4, a6
4915; RV64IA-NEXT:    mv a5, a4
4916; RV64IA-NEXT:    bgeu a1, a3, .LBB54_3
4917; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB54_1 Depth=1
4918; RV64IA-NEXT:    xor a5, a4, a1
4919; RV64IA-NEXT:    and a5, a5, a6
4920; RV64IA-NEXT:    xor a5, a4, a5
4921; RV64IA-NEXT:  .LBB54_3: # in Loop: Header=BB54_1 Depth=1
4922; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
4923; RV64IA-NEXT:    bnez a5, .LBB54_1
4924; RV64IA-NEXT:  # %bb.4:
4925; RV64IA-NEXT:    srlw a0, a4, a2
4926; RV64IA-NEXT:    ret
4927  %1 = atomicrmw umin i8* %a, i8 %b seq_cst
4928  ret i8 %1
4929}
4930
4931define i16 @atomicrmw_xchg_i16_monotonic(i16* %a, i16 %b) {
4932; RV32I-LABEL: atomicrmw_xchg_i16_monotonic:
4933; RV32I:       # %bb.0:
4934; RV32I-NEXT:    addi sp, sp, -16
4935; RV32I-NEXT:    sw ra, 12(sp)
4936; RV32I-NEXT:    mv a2, zero
4937; RV32I-NEXT:    call __atomic_exchange_2
4938; RV32I-NEXT:    lw ra, 12(sp)
4939; RV32I-NEXT:    addi sp, sp, 16
4940; RV32I-NEXT:    ret
4941;
4942; RV32IA-LABEL: atomicrmw_xchg_i16_monotonic:
4943; RV32IA:       # %bb.0:
4944; RV32IA-NEXT:    lui a2, 16
4945; RV32IA-NEXT:    addi a2, a2, -1
4946; RV32IA-NEXT:    and a1, a1, a2
4947; RV32IA-NEXT:    slli a3, a0, 3
4948; RV32IA-NEXT:    andi a3, a3, 24
4949; RV32IA-NEXT:    sll a2, a2, a3
4950; RV32IA-NEXT:    sll a1, a1, a3
4951; RV32IA-NEXT:    andi a0, a0, -4
4952; RV32IA-NEXT:  .LBB55_1: # =>This Inner Loop Header: Depth=1
4953; RV32IA-NEXT:    lr.w a4, (a0)
4954; RV32IA-NEXT:    add a5, zero, a1
4955; RV32IA-NEXT:    xor a5, a4, a5
4956; RV32IA-NEXT:    and a5, a5, a2
4957; RV32IA-NEXT:    xor a5, a4, a5
4958; RV32IA-NEXT:    sc.w a5, a5, (a0)
4959; RV32IA-NEXT:    bnez a5, .LBB55_1
4960; RV32IA-NEXT:  # %bb.2:
4961; RV32IA-NEXT:    srl a0, a4, a3
4962; RV32IA-NEXT:    ret
4963;
4964; RV64I-LABEL: atomicrmw_xchg_i16_monotonic:
4965; RV64I:       # %bb.0:
4966; RV64I-NEXT:    addi sp, sp, -16
4967; RV64I-NEXT:    sd ra, 8(sp)
4968; RV64I-NEXT:    mv a2, zero
4969; RV64I-NEXT:    call __atomic_exchange_2
4970; RV64I-NEXT:    ld ra, 8(sp)
4971; RV64I-NEXT:    addi sp, sp, 16
4972; RV64I-NEXT:    ret
4973;
4974; RV64IA-LABEL: atomicrmw_xchg_i16_monotonic:
4975; RV64IA:       # %bb.0:
4976; RV64IA-NEXT:    lui a2, 16
4977; RV64IA-NEXT:    addiw a2, a2, -1
4978; RV64IA-NEXT:    and a1, a1, a2
4979; RV64IA-NEXT:    slli a3, a0, 3
4980; RV64IA-NEXT:    andi a3, a3, 24
4981; RV64IA-NEXT:    sllw a2, a2, a3
4982; RV64IA-NEXT:    sllw a1, a1, a3
4983; RV64IA-NEXT:    andi a0, a0, -4
4984; RV64IA-NEXT:  .LBB55_1: # =>This Inner Loop Header: Depth=1
4985; RV64IA-NEXT:    lr.w a4, (a0)
4986; RV64IA-NEXT:    add a5, zero, a1
4987; RV64IA-NEXT:    xor a5, a4, a5
4988; RV64IA-NEXT:    and a5, a5, a2
4989; RV64IA-NEXT:    xor a5, a4, a5
4990; RV64IA-NEXT:    sc.w a5, a5, (a0)
4991; RV64IA-NEXT:    bnez a5, .LBB55_1
4992; RV64IA-NEXT:  # %bb.2:
4993; RV64IA-NEXT:    srlw a0, a4, a3
4994; RV64IA-NEXT:    ret
4995  %1 = atomicrmw xchg i16* %a, i16 %b monotonic
4996  ret i16 %1
4997}
4998
4999define i16 @atomicrmw_xchg_i16_acquire(i16* %a, i16 %b) {
5000; RV32I-LABEL: atomicrmw_xchg_i16_acquire:
5001; RV32I:       # %bb.0:
5002; RV32I-NEXT:    addi sp, sp, -16
5003; RV32I-NEXT:    sw ra, 12(sp)
5004; RV32I-NEXT:    addi a2, zero, 2
5005; RV32I-NEXT:    call __atomic_exchange_2
5006; RV32I-NEXT:    lw ra, 12(sp)
5007; RV32I-NEXT:    addi sp, sp, 16
5008; RV32I-NEXT:    ret
5009;
5010; RV32IA-LABEL: atomicrmw_xchg_i16_acquire:
5011; RV32IA:       # %bb.0:
5012; RV32IA-NEXT:    lui a2, 16
5013; RV32IA-NEXT:    addi a2, a2, -1
5014; RV32IA-NEXT:    and a1, a1, a2
5015; RV32IA-NEXT:    slli a3, a0, 3
5016; RV32IA-NEXT:    andi a3, a3, 24
5017; RV32IA-NEXT:    sll a2, a2, a3
5018; RV32IA-NEXT:    sll a1, a1, a3
5019; RV32IA-NEXT:    andi a0, a0, -4
5020; RV32IA-NEXT:  .LBB56_1: # =>This Inner Loop Header: Depth=1
5021; RV32IA-NEXT:    lr.w.aq a4, (a0)
5022; RV32IA-NEXT:    add a5, zero, a1
5023; RV32IA-NEXT:    xor a5, a4, a5
5024; RV32IA-NEXT:    and a5, a5, a2
5025; RV32IA-NEXT:    xor a5, a4, a5
5026; RV32IA-NEXT:    sc.w a5, a5, (a0)
5027; RV32IA-NEXT:    bnez a5, .LBB56_1
5028; RV32IA-NEXT:  # %bb.2:
5029; RV32IA-NEXT:    srl a0, a4, a3
5030; RV32IA-NEXT:    ret
5031;
5032; RV64I-LABEL: atomicrmw_xchg_i16_acquire:
5033; RV64I:       # %bb.0:
5034; RV64I-NEXT:    addi sp, sp, -16
5035; RV64I-NEXT:    sd ra, 8(sp)
5036; RV64I-NEXT:    addi a2, zero, 2
5037; RV64I-NEXT:    call __atomic_exchange_2
5038; RV64I-NEXT:    ld ra, 8(sp)
5039; RV64I-NEXT:    addi sp, sp, 16
5040; RV64I-NEXT:    ret
5041;
5042; RV64IA-LABEL: atomicrmw_xchg_i16_acquire:
5043; RV64IA:       # %bb.0:
5044; RV64IA-NEXT:    lui a2, 16
5045; RV64IA-NEXT:    addiw a2, a2, -1
5046; RV64IA-NEXT:    and a1, a1, a2
5047; RV64IA-NEXT:    slli a3, a0, 3
5048; RV64IA-NEXT:    andi a3, a3, 24
5049; RV64IA-NEXT:    sllw a2, a2, a3
5050; RV64IA-NEXT:    sllw a1, a1, a3
5051; RV64IA-NEXT:    andi a0, a0, -4
5052; RV64IA-NEXT:  .LBB56_1: # =>This Inner Loop Header: Depth=1
5053; RV64IA-NEXT:    lr.w.aq a4, (a0)
5054; RV64IA-NEXT:    add a5, zero, a1
5055; RV64IA-NEXT:    xor a5, a4, a5
5056; RV64IA-NEXT:    and a5, a5, a2
5057; RV64IA-NEXT:    xor a5, a4, a5
5058; RV64IA-NEXT:    sc.w a5, a5, (a0)
5059; RV64IA-NEXT:    bnez a5, .LBB56_1
5060; RV64IA-NEXT:  # %bb.2:
5061; RV64IA-NEXT:    srlw a0, a4, a3
5062; RV64IA-NEXT:    ret
5063  %1 = atomicrmw xchg i16* %a, i16 %b acquire
5064  ret i16 %1
5065}
5066
5067define i16 @atomicrmw_xchg_i16_release(i16* %a, i16 %b) {
5068; RV32I-LABEL: atomicrmw_xchg_i16_release:
5069; RV32I:       # %bb.0:
5070; RV32I-NEXT:    addi sp, sp, -16
5071; RV32I-NEXT:    sw ra, 12(sp)
5072; RV32I-NEXT:    addi a2, zero, 3
5073; RV32I-NEXT:    call __atomic_exchange_2
5074; RV32I-NEXT:    lw ra, 12(sp)
5075; RV32I-NEXT:    addi sp, sp, 16
5076; RV32I-NEXT:    ret
5077;
5078; RV32IA-LABEL: atomicrmw_xchg_i16_release:
5079; RV32IA:       # %bb.0:
5080; RV32IA-NEXT:    lui a2, 16
5081; RV32IA-NEXT:    addi a2, a2, -1
5082; RV32IA-NEXT:    and a1, a1, a2
5083; RV32IA-NEXT:    slli a3, a0, 3
5084; RV32IA-NEXT:    andi a3, a3, 24
5085; RV32IA-NEXT:    sll a2, a2, a3
5086; RV32IA-NEXT:    sll a1, a1, a3
5087; RV32IA-NEXT:    andi a0, a0, -4
5088; RV32IA-NEXT:  .LBB57_1: # =>This Inner Loop Header: Depth=1
5089; RV32IA-NEXT:    lr.w a4, (a0)
5090; RV32IA-NEXT:    add a5, zero, a1
5091; RV32IA-NEXT:    xor a5, a4, a5
5092; RV32IA-NEXT:    and a5, a5, a2
5093; RV32IA-NEXT:    xor a5, a4, a5
5094; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
5095; RV32IA-NEXT:    bnez a5, .LBB57_1
5096; RV32IA-NEXT:  # %bb.2:
5097; RV32IA-NEXT:    srl a0, a4, a3
5098; RV32IA-NEXT:    ret
5099;
5100; RV64I-LABEL: atomicrmw_xchg_i16_release:
5101; RV64I:       # %bb.0:
5102; RV64I-NEXT:    addi sp, sp, -16
5103; RV64I-NEXT:    sd ra, 8(sp)
5104; RV64I-NEXT:    addi a2, zero, 3
5105; RV64I-NEXT:    call __atomic_exchange_2
5106; RV64I-NEXT:    ld ra, 8(sp)
5107; RV64I-NEXT:    addi sp, sp, 16
5108; RV64I-NEXT:    ret
5109;
5110; RV64IA-LABEL: atomicrmw_xchg_i16_release:
5111; RV64IA:       # %bb.0:
5112; RV64IA-NEXT:    lui a2, 16
5113; RV64IA-NEXT:    addiw a2, a2, -1
5114; RV64IA-NEXT:    and a1, a1, a2
5115; RV64IA-NEXT:    slli a3, a0, 3
5116; RV64IA-NEXT:    andi a3, a3, 24
5117; RV64IA-NEXT:    sllw a2, a2, a3
5118; RV64IA-NEXT:    sllw a1, a1, a3
5119; RV64IA-NEXT:    andi a0, a0, -4
5120; RV64IA-NEXT:  .LBB57_1: # =>This Inner Loop Header: Depth=1
5121; RV64IA-NEXT:    lr.w a4, (a0)
5122; RV64IA-NEXT:    add a5, zero, a1
5123; RV64IA-NEXT:    xor a5, a4, a5
5124; RV64IA-NEXT:    and a5, a5, a2
5125; RV64IA-NEXT:    xor a5, a4, a5
5126; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
5127; RV64IA-NEXT:    bnez a5, .LBB57_1
5128; RV64IA-NEXT:  # %bb.2:
5129; RV64IA-NEXT:    srlw a0, a4, a3
5130; RV64IA-NEXT:    ret
5131  %1 = atomicrmw xchg i16* %a, i16 %b release
5132  ret i16 %1
5133}
5134
5135define i16 @atomicrmw_xchg_i16_acq_rel(i16* %a, i16 %b) {
5136; RV32I-LABEL: atomicrmw_xchg_i16_acq_rel:
5137; RV32I:       # %bb.0:
5138; RV32I-NEXT:    addi sp, sp, -16
5139; RV32I-NEXT:    sw ra, 12(sp)
5140; RV32I-NEXT:    addi a2, zero, 4
5141; RV32I-NEXT:    call __atomic_exchange_2
5142; RV32I-NEXT:    lw ra, 12(sp)
5143; RV32I-NEXT:    addi sp, sp, 16
5144; RV32I-NEXT:    ret
5145;
5146; RV32IA-LABEL: atomicrmw_xchg_i16_acq_rel:
5147; RV32IA:       # %bb.0:
5148; RV32IA-NEXT:    lui a2, 16
5149; RV32IA-NEXT:    addi a2, a2, -1
5150; RV32IA-NEXT:    and a1, a1, a2
5151; RV32IA-NEXT:    slli a3, a0, 3
5152; RV32IA-NEXT:    andi a3, a3, 24
5153; RV32IA-NEXT:    sll a2, a2, a3
5154; RV32IA-NEXT:    sll a1, a1, a3
5155; RV32IA-NEXT:    andi a0, a0, -4
5156; RV32IA-NEXT:  .LBB58_1: # =>This Inner Loop Header: Depth=1
5157; RV32IA-NEXT:    lr.w.aq a4, (a0)
5158; RV32IA-NEXT:    add a5, zero, a1
5159; RV32IA-NEXT:    xor a5, a4, a5
5160; RV32IA-NEXT:    and a5, a5, a2
5161; RV32IA-NEXT:    xor a5, a4, a5
5162; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
5163; RV32IA-NEXT:    bnez a5, .LBB58_1
5164; RV32IA-NEXT:  # %bb.2:
5165; RV32IA-NEXT:    srl a0, a4, a3
5166; RV32IA-NEXT:    ret
5167;
5168; RV64I-LABEL: atomicrmw_xchg_i16_acq_rel:
5169; RV64I:       # %bb.0:
5170; RV64I-NEXT:    addi sp, sp, -16
5171; RV64I-NEXT:    sd ra, 8(sp)
5172; RV64I-NEXT:    addi a2, zero, 4
5173; RV64I-NEXT:    call __atomic_exchange_2
5174; RV64I-NEXT:    ld ra, 8(sp)
5175; RV64I-NEXT:    addi sp, sp, 16
5176; RV64I-NEXT:    ret
5177;
5178; RV64IA-LABEL: atomicrmw_xchg_i16_acq_rel:
5179; RV64IA:       # %bb.0:
5180; RV64IA-NEXT:    lui a2, 16
5181; RV64IA-NEXT:    addiw a2, a2, -1
5182; RV64IA-NEXT:    and a1, a1, a2
5183; RV64IA-NEXT:    slli a3, a0, 3
5184; RV64IA-NEXT:    andi a3, a3, 24
5185; RV64IA-NEXT:    sllw a2, a2, a3
5186; RV64IA-NEXT:    sllw a1, a1, a3
5187; RV64IA-NEXT:    andi a0, a0, -4
5188; RV64IA-NEXT:  .LBB58_1: # =>This Inner Loop Header: Depth=1
5189; RV64IA-NEXT:    lr.w.aq a4, (a0)
5190; RV64IA-NEXT:    add a5, zero, a1
5191; RV64IA-NEXT:    xor a5, a4, a5
5192; RV64IA-NEXT:    and a5, a5, a2
5193; RV64IA-NEXT:    xor a5, a4, a5
5194; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
5195; RV64IA-NEXT:    bnez a5, .LBB58_1
5196; RV64IA-NEXT:  # %bb.2:
5197; RV64IA-NEXT:    srlw a0, a4, a3
5198; RV64IA-NEXT:    ret
5199  %1 = atomicrmw xchg i16* %a, i16 %b acq_rel
5200  ret i16 %1
5201}
5202
5203define i16 @atomicrmw_xchg_i16_seq_cst(i16* %a, i16 %b) {
5204; RV32I-LABEL: atomicrmw_xchg_i16_seq_cst:
5205; RV32I:       # %bb.0:
5206; RV32I-NEXT:    addi sp, sp, -16
5207; RV32I-NEXT:    sw ra, 12(sp)
5208; RV32I-NEXT:    addi a2, zero, 5
5209; RV32I-NEXT:    call __atomic_exchange_2
5210; RV32I-NEXT:    lw ra, 12(sp)
5211; RV32I-NEXT:    addi sp, sp, 16
5212; RV32I-NEXT:    ret
5213;
5214; RV32IA-LABEL: atomicrmw_xchg_i16_seq_cst:
5215; RV32IA:       # %bb.0:
5216; RV32IA-NEXT:    lui a2, 16
5217; RV32IA-NEXT:    addi a2, a2, -1
5218; RV32IA-NEXT:    and a1, a1, a2
5219; RV32IA-NEXT:    slli a3, a0, 3
5220; RV32IA-NEXT:    andi a3, a3, 24
5221; RV32IA-NEXT:    sll a2, a2, a3
5222; RV32IA-NEXT:    sll a1, a1, a3
5223; RV32IA-NEXT:    andi a0, a0, -4
5224; RV32IA-NEXT:  .LBB59_1: # =>This Inner Loop Header: Depth=1
5225; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
5226; RV32IA-NEXT:    add a5, zero, a1
5227; RV32IA-NEXT:    xor a5, a4, a5
5228; RV32IA-NEXT:    and a5, a5, a2
5229; RV32IA-NEXT:    xor a5, a4, a5
5230; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
5231; RV32IA-NEXT:    bnez a5, .LBB59_1
5232; RV32IA-NEXT:  # %bb.2:
5233; RV32IA-NEXT:    srl a0, a4, a3
5234; RV32IA-NEXT:    ret
5235;
5236; RV64I-LABEL: atomicrmw_xchg_i16_seq_cst:
5237; RV64I:       # %bb.0:
5238; RV64I-NEXT:    addi sp, sp, -16
5239; RV64I-NEXT:    sd ra, 8(sp)
5240; RV64I-NEXT:    addi a2, zero, 5
5241; RV64I-NEXT:    call __atomic_exchange_2
5242; RV64I-NEXT:    ld ra, 8(sp)
5243; RV64I-NEXT:    addi sp, sp, 16
5244; RV64I-NEXT:    ret
5245;
5246; RV64IA-LABEL: atomicrmw_xchg_i16_seq_cst:
5247; RV64IA:       # %bb.0:
5248; RV64IA-NEXT:    lui a2, 16
5249; RV64IA-NEXT:    addiw a2, a2, -1
5250; RV64IA-NEXT:    and a1, a1, a2
5251; RV64IA-NEXT:    slli a3, a0, 3
5252; RV64IA-NEXT:    andi a3, a3, 24
5253; RV64IA-NEXT:    sllw a2, a2, a3
5254; RV64IA-NEXT:    sllw a1, a1, a3
5255; RV64IA-NEXT:    andi a0, a0, -4
5256; RV64IA-NEXT:  .LBB59_1: # =>This Inner Loop Header: Depth=1
5257; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
5258; RV64IA-NEXT:    add a5, zero, a1
5259; RV64IA-NEXT:    xor a5, a4, a5
5260; RV64IA-NEXT:    and a5, a5, a2
5261; RV64IA-NEXT:    xor a5, a4, a5
5262; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
5263; RV64IA-NEXT:    bnez a5, .LBB59_1
5264; RV64IA-NEXT:  # %bb.2:
5265; RV64IA-NEXT:    srlw a0, a4, a3
5266; RV64IA-NEXT:    ret
5267  %1 = atomicrmw xchg i16* %a, i16 %b seq_cst
5268  ret i16 %1
5269}
5270
5271define i16 @atomicrmw_add_i16_monotonic(i16 *%a, i16 %b) nounwind {
5272; RV32I-LABEL: atomicrmw_add_i16_monotonic:
5273; RV32I:       # %bb.0:
5274; RV32I-NEXT:    addi sp, sp, -16
5275; RV32I-NEXT:    sw ra, 12(sp)
5276; RV32I-NEXT:    mv a2, zero
5277; RV32I-NEXT:    call __atomic_fetch_add_2
5278; RV32I-NEXT:    lw ra, 12(sp)
5279; RV32I-NEXT:    addi sp, sp, 16
5280; RV32I-NEXT:    ret
5281;
5282; RV32IA-LABEL: atomicrmw_add_i16_monotonic:
5283; RV32IA:       # %bb.0:
5284; RV32IA-NEXT:    lui a2, 16
5285; RV32IA-NEXT:    addi a2, a2, -1
5286; RV32IA-NEXT:    and a1, a1, a2
5287; RV32IA-NEXT:    slli a3, a0, 3
5288; RV32IA-NEXT:    andi a3, a3, 24
5289; RV32IA-NEXT:    sll a2, a2, a3
5290; RV32IA-NEXT:    sll a1, a1, a3
5291; RV32IA-NEXT:    andi a0, a0, -4
5292; RV32IA-NEXT:  .LBB60_1: # =>This Inner Loop Header: Depth=1
5293; RV32IA-NEXT:    lr.w a4, (a0)
5294; RV32IA-NEXT:    add a5, a4, a1
5295; RV32IA-NEXT:    xor a5, a4, a5
5296; RV32IA-NEXT:    and a5, a5, a2
5297; RV32IA-NEXT:    xor a5, a4, a5
5298; RV32IA-NEXT:    sc.w a5, a5, (a0)
5299; RV32IA-NEXT:    bnez a5, .LBB60_1
5300; RV32IA-NEXT:  # %bb.2:
5301; RV32IA-NEXT:    srl a0, a4, a3
5302; RV32IA-NEXT:    ret
5303;
5304; RV64I-LABEL: atomicrmw_add_i16_monotonic:
5305; RV64I:       # %bb.0:
5306; RV64I-NEXT:    addi sp, sp, -16
5307; RV64I-NEXT:    sd ra, 8(sp)
5308; RV64I-NEXT:    mv a2, zero
5309; RV64I-NEXT:    call __atomic_fetch_add_2
5310; RV64I-NEXT:    ld ra, 8(sp)
5311; RV64I-NEXT:    addi sp, sp, 16
5312; RV64I-NEXT:    ret
5313;
5314; RV64IA-LABEL: atomicrmw_add_i16_monotonic:
5315; RV64IA:       # %bb.0:
5316; RV64IA-NEXT:    lui a2, 16
5317; RV64IA-NEXT:    addiw a2, a2, -1
5318; RV64IA-NEXT:    and a1, a1, a2
5319; RV64IA-NEXT:    slli a3, a0, 3
5320; RV64IA-NEXT:    andi a3, a3, 24
5321; RV64IA-NEXT:    sllw a2, a2, a3
5322; RV64IA-NEXT:    sllw a1, a1, a3
5323; RV64IA-NEXT:    andi a0, a0, -4
5324; RV64IA-NEXT:  .LBB60_1: # =>This Inner Loop Header: Depth=1
5325; RV64IA-NEXT:    lr.w a4, (a0)
5326; RV64IA-NEXT:    add a5, a4, a1
5327; RV64IA-NEXT:    xor a5, a4, a5
5328; RV64IA-NEXT:    and a5, a5, a2
5329; RV64IA-NEXT:    xor a5, a4, a5
5330; RV64IA-NEXT:    sc.w a5, a5, (a0)
5331; RV64IA-NEXT:    bnez a5, .LBB60_1
5332; RV64IA-NEXT:  # %bb.2:
5333; RV64IA-NEXT:    srlw a0, a4, a3
5334; RV64IA-NEXT:    ret
5335  %1 = atomicrmw add i16* %a, i16 %b monotonic
5336  ret i16 %1
5337}
5338
5339define i16 @atomicrmw_add_i16_acquire(i16 *%a, i16 %b) nounwind {
5340; RV32I-LABEL: atomicrmw_add_i16_acquire:
5341; RV32I:       # %bb.0:
5342; RV32I-NEXT:    addi sp, sp, -16
5343; RV32I-NEXT:    sw ra, 12(sp)
5344; RV32I-NEXT:    addi a2, zero, 2
5345; RV32I-NEXT:    call __atomic_fetch_add_2
5346; RV32I-NEXT:    lw ra, 12(sp)
5347; RV32I-NEXT:    addi sp, sp, 16
5348; RV32I-NEXT:    ret
5349;
5350; RV32IA-LABEL: atomicrmw_add_i16_acquire:
5351; RV32IA:       # %bb.0:
5352; RV32IA-NEXT:    lui a2, 16
5353; RV32IA-NEXT:    addi a2, a2, -1
5354; RV32IA-NEXT:    and a1, a1, a2
5355; RV32IA-NEXT:    slli a3, a0, 3
5356; RV32IA-NEXT:    andi a3, a3, 24
5357; RV32IA-NEXT:    sll a2, a2, a3
5358; RV32IA-NEXT:    sll a1, a1, a3
5359; RV32IA-NEXT:    andi a0, a0, -4
5360; RV32IA-NEXT:  .LBB61_1: # =>This Inner Loop Header: Depth=1
5361; RV32IA-NEXT:    lr.w.aq a4, (a0)
5362; RV32IA-NEXT:    add a5, a4, a1
5363; RV32IA-NEXT:    xor a5, a4, a5
5364; RV32IA-NEXT:    and a5, a5, a2
5365; RV32IA-NEXT:    xor a5, a4, a5
5366; RV32IA-NEXT:    sc.w a5, a5, (a0)
5367; RV32IA-NEXT:    bnez a5, .LBB61_1
5368; RV32IA-NEXT:  # %bb.2:
5369; RV32IA-NEXT:    srl a0, a4, a3
5370; RV32IA-NEXT:    ret
5371;
5372; RV64I-LABEL: atomicrmw_add_i16_acquire:
5373; RV64I:       # %bb.0:
5374; RV64I-NEXT:    addi sp, sp, -16
5375; RV64I-NEXT:    sd ra, 8(sp)
5376; RV64I-NEXT:    addi a2, zero, 2
5377; RV64I-NEXT:    call __atomic_fetch_add_2
5378; RV64I-NEXT:    ld ra, 8(sp)
5379; RV64I-NEXT:    addi sp, sp, 16
5380; RV64I-NEXT:    ret
5381;
5382; RV64IA-LABEL: atomicrmw_add_i16_acquire:
5383; RV64IA:       # %bb.0:
5384; RV64IA-NEXT:    lui a2, 16
5385; RV64IA-NEXT:    addiw a2, a2, -1
5386; RV64IA-NEXT:    and a1, a1, a2
5387; RV64IA-NEXT:    slli a3, a0, 3
5388; RV64IA-NEXT:    andi a3, a3, 24
5389; RV64IA-NEXT:    sllw a2, a2, a3
5390; RV64IA-NEXT:    sllw a1, a1, a3
5391; RV64IA-NEXT:    andi a0, a0, -4
5392; RV64IA-NEXT:  .LBB61_1: # =>This Inner Loop Header: Depth=1
5393; RV64IA-NEXT:    lr.w.aq a4, (a0)
5394; RV64IA-NEXT:    add a5, a4, a1
5395; RV64IA-NEXT:    xor a5, a4, a5
5396; RV64IA-NEXT:    and a5, a5, a2
5397; RV64IA-NEXT:    xor a5, a4, a5
5398; RV64IA-NEXT:    sc.w a5, a5, (a0)
5399; RV64IA-NEXT:    bnez a5, .LBB61_1
5400; RV64IA-NEXT:  # %bb.2:
5401; RV64IA-NEXT:    srlw a0, a4, a3
5402; RV64IA-NEXT:    ret
5403  %1 = atomicrmw add i16* %a, i16 %b acquire
5404  ret i16 %1
5405}
5406
5407define i16 @atomicrmw_add_i16_release(i16 *%a, i16 %b) nounwind {
5408; RV32I-LABEL: atomicrmw_add_i16_release:
5409; RV32I:       # %bb.0:
5410; RV32I-NEXT:    addi sp, sp, -16
5411; RV32I-NEXT:    sw ra, 12(sp)
5412; RV32I-NEXT:    addi a2, zero, 3
5413; RV32I-NEXT:    call __atomic_fetch_add_2
5414; RV32I-NEXT:    lw ra, 12(sp)
5415; RV32I-NEXT:    addi sp, sp, 16
5416; RV32I-NEXT:    ret
5417;
5418; RV32IA-LABEL: atomicrmw_add_i16_release:
5419; RV32IA:       # %bb.0:
5420; RV32IA-NEXT:    lui a2, 16
5421; RV32IA-NEXT:    addi a2, a2, -1
5422; RV32IA-NEXT:    and a1, a1, a2
5423; RV32IA-NEXT:    slli a3, a0, 3
5424; RV32IA-NEXT:    andi a3, a3, 24
5425; RV32IA-NEXT:    sll a2, a2, a3
5426; RV32IA-NEXT:    sll a1, a1, a3
5427; RV32IA-NEXT:    andi a0, a0, -4
5428; RV32IA-NEXT:  .LBB62_1: # =>This Inner Loop Header: Depth=1
5429; RV32IA-NEXT:    lr.w a4, (a0)
5430; RV32IA-NEXT:    add a5, a4, a1
5431; RV32IA-NEXT:    xor a5, a4, a5
5432; RV32IA-NEXT:    and a5, a5, a2
5433; RV32IA-NEXT:    xor a5, a4, a5
5434; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
5435; RV32IA-NEXT:    bnez a5, .LBB62_1
5436; RV32IA-NEXT:  # %bb.2:
5437; RV32IA-NEXT:    srl a0, a4, a3
5438; RV32IA-NEXT:    ret
5439;
5440; RV64I-LABEL: atomicrmw_add_i16_release:
5441; RV64I:       # %bb.0:
5442; RV64I-NEXT:    addi sp, sp, -16
5443; RV64I-NEXT:    sd ra, 8(sp)
5444; RV64I-NEXT:    addi a2, zero, 3
5445; RV64I-NEXT:    call __atomic_fetch_add_2
5446; RV64I-NEXT:    ld ra, 8(sp)
5447; RV64I-NEXT:    addi sp, sp, 16
5448; RV64I-NEXT:    ret
5449;
5450; RV64IA-LABEL: atomicrmw_add_i16_release:
5451; RV64IA:       # %bb.0:
5452; RV64IA-NEXT:    lui a2, 16
5453; RV64IA-NEXT:    addiw a2, a2, -1
5454; RV64IA-NEXT:    and a1, a1, a2
5455; RV64IA-NEXT:    slli a3, a0, 3
5456; RV64IA-NEXT:    andi a3, a3, 24
5457; RV64IA-NEXT:    sllw a2, a2, a3
5458; RV64IA-NEXT:    sllw a1, a1, a3
5459; RV64IA-NEXT:    andi a0, a0, -4
5460; RV64IA-NEXT:  .LBB62_1: # =>This Inner Loop Header: Depth=1
5461; RV64IA-NEXT:    lr.w a4, (a0)
5462; RV64IA-NEXT:    add a5, a4, a1
5463; RV64IA-NEXT:    xor a5, a4, a5
5464; RV64IA-NEXT:    and a5, a5, a2
5465; RV64IA-NEXT:    xor a5, a4, a5
5466; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
5467; RV64IA-NEXT:    bnez a5, .LBB62_1
5468; RV64IA-NEXT:  # %bb.2:
5469; RV64IA-NEXT:    srlw a0, a4, a3
5470; RV64IA-NEXT:    ret
5471  %1 = atomicrmw add i16* %a, i16 %b release
5472  ret i16 %1
5473}
5474
5475define i16 @atomicrmw_add_i16_acq_rel(i16 *%a, i16 %b) nounwind {
5476; RV32I-LABEL: atomicrmw_add_i16_acq_rel:
5477; RV32I:       # %bb.0:
5478; RV32I-NEXT:    addi sp, sp, -16
5479; RV32I-NEXT:    sw ra, 12(sp)
5480; RV32I-NEXT:    addi a2, zero, 4
5481; RV32I-NEXT:    call __atomic_fetch_add_2
5482; RV32I-NEXT:    lw ra, 12(sp)
5483; RV32I-NEXT:    addi sp, sp, 16
5484; RV32I-NEXT:    ret
5485;
5486; RV32IA-LABEL: atomicrmw_add_i16_acq_rel:
5487; RV32IA:       # %bb.0:
5488; RV32IA-NEXT:    lui a2, 16
5489; RV32IA-NEXT:    addi a2, a2, -1
5490; RV32IA-NEXT:    and a1, a1, a2
5491; RV32IA-NEXT:    slli a3, a0, 3
5492; RV32IA-NEXT:    andi a3, a3, 24
5493; RV32IA-NEXT:    sll a2, a2, a3
5494; RV32IA-NEXT:    sll a1, a1, a3
5495; RV32IA-NEXT:    andi a0, a0, -4
5496; RV32IA-NEXT:  .LBB63_1: # =>This Inner Loop Header: Depth=1
5497; RV32IA-NEXT:    lr.w.aq a4, (a0)
5498; RV32IA-NEXT:    add a5, a4, a1
5499; RV32IA-NEXT:    xor a5, a4, a5
5500; RV32IA-NEXT:    and a5, a5, a2
5501; RV32IA-NEXT:    xor a5, a4, a5
5502; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
5503; RV32IA-NEXT:    bnez a5, .LBB63_1
5504; RV32IA-NEXT:  # %bb.2:
5505; RV32IA-NEXT:    srl a0, a4, a3
5506; RV32IA-NEXT:    ret
5507;
5508; RV64I-LABEL: atomicrmw_add_i16_acq_rel:
5509; RV64I:       # %bb.0:
5510; RV64I-NEXT:    addi sp, sp, -16
5511; RV64I-NEXT:    sd ra, 8(sp)
5512; RV64I-NEXT:    addi a2, zero, 4
5513; RV64I-NEXT:    call __atomic_fetch_add_2
5514; RV64I-NEXT:    ld ra, 8(sp)
5515; RV64I-NEXT:    addi sp, sp, 16
5516; RV64I-NEXT:    ret
5517;
5518; RV64IA-LABEL: atomicrmw_add_i16_acq_rel:
5519; RV64IA:       # %bb.0:
5520; RV64IA-NEXT:    lui a2, 16
5521; RV64IA-NEXT:    addiw a2, a2, -1
5522; RV64IA-NEXT:    and a1, a1, a2
5523; RV64IA-NEXT:    slli a3, a0, 3
5524; RV64IA-NEXT:    andi a3, a3, 24
5525; RV64IA-NEXT:    sllw a2, a2, a3
5526; RV64IA-NEXT:    sllw a1, a1, a3
5527; RV64IA-NEXT:    andi a0, a0, -4
5528; RV64IA-NEXT:  .LBB63_1: # =>This Inner Loop Header: Depth=1
5529; RV64IA-NEXT:    lr.w.aq a4, (a0)
5530; RV64IA-NEXT:    add a5, a4, a1
5531; RV64IA-NEXT:    xor a5, a4, a5
5532; RV64IA-NEXT:    and a5, a5, a2
5533; RV64IA-NEXT:    xor a5, a4, a5
5534; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
5535; RV64IA-NEXT:    bnez a5, .LBB63_1
5536; RV64IA-NEXT:  # %bb.2:
5537; RV64IA-NEXT:    srlw a0, a4, a3
5538; RV64IA-NEXT:    ret
5539  %1 = atomicrmw add i16* %a, i16 %b acq_rel
5540  ret i16 %1
5541}
5542
5543define i16 @atomicrmw_add_i16_seq_cst(i16 *%a, i16 %b) nounwind {
5544; RV32I-LABEL: atomicrmw_add_i16_seq_cst:
5545; RV32I:       # %bb.0:
5546; RV32I-NEXT:    addi sp, sp, -16
5547; RV32I-NEXT:    sw ra, 12(sp)
5548; RV32I-NEXT:    addi a2, zero, 5
5549; RV32I-NEXT:    call __atomic_fetch_add_2
5550; RV32I-NEXT:    lw ra, 12(sp)
5551; RV32I-NEXT:    addi sp, sp, 16
5552; RV32I-NEXT:    ret
5553;
5554; RV32IA-LABEL: atomicrmw_add_i16_seq_cst:
5555; RV32IA:       # %bb.0:
5556; RV32IA-NEXT:    lui a2, 16
5557; RV32IA-NEXT:    addi a2, a2, -1
5558; RV32IA-NEXT:    and a1, a1, a2
5559; RV32IA-NEXT:    slli a3, a0, 3
5560; RV32IA-NEXT:    andi a3, a3, 24
5561; RV32IA-NEXT:    sll a2, a2, a3
5562; RV32IA-NEXT:    sll a1, a1, a3
5563; RV32IA-NEXT:    andi a0, a0, -4
5564; RV32IA-NEXT:  .LBB64_1: # =>This Inner Loop Header: Depth=1
5565; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
5566; RV32IA-NEXT:    add a5, a4, a1
5567; RV32IA-NEXT:    xor a5, a4, a5
5568; RV32IA-NEXT:    and a5, a5, a2
5569; RV32IA-NEXT:    xor a5, a4, a5
5570; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
5571; RV32IA-NEXT:    bnez a5, .LBB64_1
5572; RV32IA-NEXT:  # %bb.2:
5573; RV32IA-NEXT:    srl a0, a4, a3
5574; RV32IA-NEXT:    ret
5575;
5576; RV64I-LABEL: atomicrmw_add_i16_seq_cst:
5577; RV64I:       # %bb.0:
5578; RV64I-NEXT:    addi sp, sp, -16
5579; RV64I-NEXT:    sd ra, 8(sp)
5580; RV64I-NEXT:    addi a2, zero, 5
5581; RV64I-NEXT:    call __atomic_fetch_add_2
5582; RV64I-NEXT:    ld ra, 8(sp)
5583; RV64I-NEXT:    addi sp, sp, 16
5584; RV64I-NEXT:    ret
5585;
5586; RV64IA-LABEL: atomicrmw_add_i16_seq_cst:
5587; RV64IA:       # %bb.0:
5588; RV64IA-NEXT:    lui a2, 16
5589; RV64IA-NEXT:    addiw a2, a2, -1
5590; RV64IA-NEXT:    and a1, a1, a2
5591; RV64IA-NEXT:    slli a3, a0, 3
5592; RV64IA-NEXT:    andi a3, a3, 24
5593; RV64IA-NEXT:    sllw a2, a2, a3
5594; RV64IA-NEXT:    sllw a1, a1, a3
5595; RV64IA-NEXT:    andi a0, a0, -4
5596; RV64IA-NEXT:  .LBB64_1: # =>This Inner Loop Header: Depth=1
5597; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
5598; RV64IA-NEXT:    add a5, a4, a1
5599; RV64IA-NEXT:    xor a5, a4, a5
5600; RV64IA-NEXT:    and a5, a5, a2
5601; RV64IA-NEXT:    xor a5, a4, a5
5602; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
5603; RV64IA-NEXT:    bnez a5, .LBB64_1
5604; RV64IA-NEXT:  # %bb.2:
5605; RV64IA-NEXT:    srlw a0, a4, a3
5606; RV64IA-NEXT:    ret
5607  %1 = atomicrmw add i16* %a, i16 %b seq_cst
5608  ret i16 %1
5609}
5610
5611define i16 @atomicrmw_sub_i16_monotonic(i16* %a, i16 %b) {
5612; RV32I-LABEL: atomicrmw_sub_i16_monotonic:
5613; RV32I:       # %bb.0:
5614; RV32I-NEXT:    addi sp, sp, -16
5615; RV32I-NEXT:    sw ra, 12(sp)
5616; RV32I-NEXT:    mv a2, zero
5617; RV32I-NEXT:    call __atomic_fetch_sub_2
5618; RV32I-NEXT:    lw ra, 12(sp)
5619; RV32I-NEXT:    addi sp, sp, 16
5620; RV32I-NEXT:    ret
5621;
5622; RV32IA-LABEL: atomicrmw_sub_i16_monotonic:
5623; RV32IA:       # %bb.0:
5624; RV32IA-NEXT:    lui a2, 16
5625; RV32IA-NEXT:    addi a2, a2, -1
5626; RV32IA-NEXT:    and a1, a1, a2
5627; RV32IA-NEXT:    slli a3, a0, 3
5628; RV32IA-NEXT:    andi a3, a3, 24
5629; RV32IA-NEXT:    sll a2, a2, a3
5630; RV32IA-NEXT:    sll a1, a1, a3
5631; RV32IA-NEXT:    andi a0, a0, -4
5632; RV32IA-NEXT:  .LBB65_1: # =>This Inner Loop Header: Depth=1
5633; RV32IA-NEXT:    lr.w a4, (a0)
5634; RV32IA-NEXT:    sub a5, a4, a1
5635; RV32IA-NEXT:    xor a5, a4, a5
5636; RV32IA-NEXT:    and a5, a5, a2
5637; RV32IA-NEXT:    xor a5, a4, a5
5638; RV32IA-NEXT:    sc.w a5, a5, (a0)
5639; RV32IA-NEXT:    bnez a5, .LBB65_1
5640; RV32IA-NEXT:  # %bb.2:
5641; RV32IA-NEXT:    srl a0, a4, a3
5642; RV32IA-NEXT:    ret
5643;
5644; RV64I-LABEL: atomicrmw_sub_i16_monotonic:
5645; RV64I:       # %bb.0:
5646; RV64I-NEXT:    addi sp, sp, -16
5647; RV64I-NEXT:    sd ra, 8(sp)
5648; RV64I-NEXT:    mv a2, zero
5649; RV64I-NEXT:    call __atomic_fetch_sub_2
5650; RV64I-NEXT:    ld ra, 8(sp)
5651; RV64I-NEXT:    addi sp, sp, 16
5652; RV64I-NEXT:    ret
5653;
5654; RV64IA-LABEL: atomicrmw_sub_i16_monotonic:
5655; RV64IA:       # %bb.0:
5656; RV64IA-NEXT:    lui a2, 16
5657; RV64IA-NEXT:    addiw a2, a2, -1
5658; RV64IA-NEXT:    and a1, a1, a2
5659; RV64IA-NEXT:    slli a3, a0, 3
5660; RV64IA-NEXT:    andi a3, a3, 24
5661; RV64IA-NEXT:    sllw a2, a2, a3
5662; RV64IA-NEXT:    sllw a1, a1, a3
5663; RV64IA-NEXT:    andi a0, a0, -4
5664; RV64IA-NEXT:  .LBB65_1: # =>This Inner Loop Header: Depth=1
5665; RV64IA-NEXT:    lr.w a4, (a0)
5666; RV64IA-NEXT:    sub a5, a4, a1
5667; RV64IA-NEXT:    xor a5, a4, a5
5668; RV64IA-NEXT:    and a5, a5, a2
5669; RV64IA-NEXT:    xor a5, a4, a5
5670; RV64IA-NEXT:    sc.w a5, a5, (a0)
5671; RV64IA-NEXT:    bnez a5, .LBB65_1
5672; RV64IA-NEXT:  # %bb.2:
5673; RV64IA-NEXT:    srlw a0, a4, a3
5674; RV64IA-NEXT:    ret
5675  %1 = atomicrmw sub i16* %a, i16 %b monotonic
5676  ret i16 %1
5677}
5678
5679define i16 @atomicrmw_sub_i16_acquire(i16* %a, i16 %b) {
5680; RV32I-LABEL: atomicrmw_sub_i16_acquire:
5681; RV32I:       # %bb.0:
5682; RV32I-NEXT:    addi sp, sp, -16
5683; RV32I-NEXT:    sw ra, 12(sp)
5684; RV32I-NEXT:    addi a2, zero, 2
5685; RV32I-NEXT:    call __atomic_fetch_sub_2
5686; RV32I-NEXT:    lw ra, 12(sp)
5687; RV32I-NEXT:    addi sp, sp, 16
5688; RV32I-NEXT:    ret
5689;
5690; RV32IA-LABEL: atomicrmw_sub_i16_acquire:
5691; RV32IA:       # %bb.0:
5692; RV32IA-NEXT:    lui a2, 16
5693; RV32IA-NEXT:    addi a2, a2, -1
5694; RV32IA-NEXT:    and a1, a1, a2
5695; RV32IA-NEXT:    slli a3, a0, 3
5696; RV32IA-NEXT:    andi a3, a3, 24
5697; RV32IA-NEXT:    sll a2, a2, a3
5698; RV32IA-NEXT:    sll a1, a1, a3
5699; RV32IA-NEXT:    andi a0, a0, -4
5700; RV32IA-NEXT:  .LBB66_1: # =>This Inner Loop Header: Depth=1
5701; RV32IA-NEXT:    lr.w.aq a4, (a0)
5702; RV32IA-NEXT:    sub a5, a4, a1
5703; RV32IA-NEXT:    xor a5, a4, a5
5704; RV32IA-NEXT:    and a5, a5, a2
5705; RV32IA-NEXT:    xor a5, a4, a5
5706; RV32IA-NEXT:    sc.w a5, a5, (a0)
5707; RV32IA-NEXT:    bnez a5, .LBB66_1
5708; RV32IA-NEXT:  # %bb.2:
5709; RV32IA-NEXT:    srl a0, a4, a3
5710; RV32IA-NEXT:    ret
5711;
5712; RV64I-LABEL: atomicrmw_sub_i16_acquire:
5713; RV64I:       # %bb.0:
5714; RV64I-NEXT:    addi sp, sp, -16
5715; RV64I-NEXT:    sd ra, 8(sp)
5716; RV64I-NEXT:    addi a2, zero, 2
5717; RV64I-NEXT:    call __atomic_fetch_sub_2
5718; RV64I-NEXT:    ld ra, 8(sp)
5719; RV64I-NEXT:    addi sp, sp, 16
5720; RV64I-NEXT:    ret
5721;
5722; RV64IA-LABEL: atomicrmw_sub_i16_acquire:
5723; RV64IA:       # %bb.0:
5724; RV64IA-NEXT:    lui a2, 16
5725; RV64IA-NEXT:    addiw a2, a2, -1
5726; RV64IA-NEXT:    and a1, a1, a2
5727; RV64IA-NEXT:    slli a3, a0, 3
5728; RV64IA-NEXT:    andi a3, a3, 24
5729; RV64IA-NEXT:    sllw a2, a2, a3
5730; RV64IA-NEXT:    sllw a1, a1, a3
5731; RV64IA-NEXT:    andi a0, a0, -4
5732; RV64IA-NEXT:  .LBB66_1: # =>This Inner Loop Header: Depth=1
5733; RV64IA-NEXT:    lr.w.aq a4, (a0)
5734; RV64IA-NEXT:    sub a5, a4, a1
5735; RV64IA-NEXT:    xor a5, a4, a5
5736; RV64IA-NEXT:    and a5, a5, a2
5737; RV64IA-NEXT:    xor a5, a4, a5
5738; RV64IA-NEXT:    sc.w a5, a5, (a0)
5739; RV64IA-NEXT:    bnez a5, .LBB66_1
5740; RV64IA-NEXT:  # %bb.2:
5741; RV64IA-NEXT:    srlw a0, a4, a3
5742; RV64IA-NEXT:    ret
5743  %1 = atomicrmw sub i16* %a, i16 %b acquire
5744  ret i16 %1
5745}
5746
5747define i16 @atomicrmw_sub_i16_release(i16* %a, i16 %b) {
5748; RV32I-LABEL: atomicrmw_sub_i16_release:
5749; RV32I:       # %bb.0:
5750; RV32I-NEXT:    addi sp, sp, -16
5751; RV32I-NEXT:    sw ra, 12(sp)
5752; RV32I-NEXT:    addi a2, zero, 3
5753; RV32I-NEXT:    call __atomic_fetch_sub_2
5754; RV32I-NEXT:    lw ra, 12(sp)
5755; RV32I-NEXT:    addi sp, sp, 16
5756; RV32I-NEXT:    ret
5757;
5758; RV32IA-LABEL: atomicrmw_sub_i16_release:
5759; RV32IA:       # %bb.0:
5760; RV32IA-NEXT:    lui a2, 16
5761; RV32IA-NEXT:    addi a2, a2, -1
5762; RV32IA-NEXT:    and a1, a1, a2
5763; RV32IA-NEXT:    slli a3, a0, 3
5764; RV32IA-NEXT:    andi a3, a3, 24
5765; RV32IA-NEXT:    sll a2, a2, a3
5766; RV32IA-NEXT:    sll a1, a1, a3
5767; RV32IA-NEXT:    andi a0, a0, -4
5768; RV32IA-NEXT:  .LBB67_1: # =>This Inner Loop Header: Depth=1
5769; RV32IA-NEXT:    lr.w a4, (a0)
5770; RV32IA-NEXT:    sub a5, a4, a1
5771; RV32IA-NEXT:    xor a5, a4, a5
5772; RV32IA-NEXT:    and a5, a5, a2
5773; RV32IA-NEXT:    xor a5, a4, a5
5774; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
5775; RV32IA-NEXT:    bnez a5, .LBB67_1
5776; RV32IA-NEXT:  # %bb.2:
5777; RV32IA-NEXT:    srl a0, a4, a3
5778; RV32IA-NEXT:    ret
5779;
5780; RV64I-LABEL: atomicrmw_sub_i16_release:
5781; RV64I:       # %bb.0:
5782; RV64I-NEXT:    addi sp, sp, -16
5783; RV64I-NEXT:    sd ra, 8(sp)
5784; RV64I-NEXT:    addi a2, zero, 3
5785; RV64I-NEXT:    call __atomic_fetch_sub_2
5786; RV64I-NEXT:    ld ra, 8(sp)
5787; RV64I-NEXT:    addi sp, sp, 16
5788; RV64I-NEXT:    ret
5789;
5790; RV64IA-LABEL: atomicrmw_sub_i16_release:
5791; RV64IA:       # %bb.0:
5792; RV64IA-NEXT:    lui a2, 16
5793; RV64IA-NEXT:    addiw a2, a2, -1
5794; RV64IA-NEXT:    and a1, a1, a2
5795; RV64IA-NEXT:    slli a3, a0, 3
5796; RV64IA-NEXT:    andi a3, a3, 24
5797; RV64IA-NEXT:    sllw a2, a2, a3
5798; RV64IA-NEXT:    sllw a1, a1, a3
5799; RV64IA-NEXT:    andi a0, a0, -4
5800; RV64IA-NEXT:  .LBB67_1: # =>This Inner Loop Header: Depth=1
5801; RV64IA-NEXT:    lr.w a4, (a0)
5802; RV64IA-NEXT:    sub a5, a4, a1
5803; RV64IA-NEXT:    xor a5, a4, a5
5804; RV64IA-NEXT:    and a5, a5, a2
5805; RV64IA-NEXT:    xor a5, a4, a5
5806; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
5807; RV64IA-NEXT:    bnez a5, .LBB67_1
5808; RV64IA-NEXT:  # %bb.2:
5809; RV64IA-NEXT:    srlw a0, a4, a3
5810; RV64IA-NEXT:    ret
5811  %1 = atomicrmw sub i16* %a, i16 %b release
5812  ret i16 %1
5813}
5814
5815define i16 @atomicrmw_sub_i16_acq_rel(i16* %a, i16 %b) {
5816; RV32I-LABEL: atomicrmw_sub_i16_acq_rel:
5817; RV32I:       # %bb.0:
5818; RV32I-NEXT:    addi sp, sp, -16
5819; RV32I-NEXT:    sw ra, 12(sp)
5820; RV32I-NEXT:    addi a2, zero, 4
5821; RV32I-NEXT:    call __atomic_fetch_sub_2
5822; RV32I-NEXT:    lw ra, 12(sp)
5823; RV32I-NEXT:    addi sp, sp, 16
5824; RV32I-NEXT:    ret
5825;
5826; RV32IA-LABEL: atomicrmw_sub_i16_acq_rel:
5827; RV32IA:       # %bb.0:
5828; RV32IA-NEXT:    lui a2, 16
5829; RV32IA-NEXT:    addi a2, a2, -1
5830; RV32IA-NEXT:    and a1, a1, a2
5831; RV32IA-NEXT:    slli a3, a0, 3
5832; RV32IA-NEXT:    andi a3, a3, 24
5833; RV32IA-NEXT:    sll a2, a2, a3
5834; RV32IA-NEXT:    sll a1, a1, a3
5835; RV32IA-NEXT:    andi a0, a0, -4
5836; RV32IA-NEXT:  .LBB68_1: # =>This Inner Loop Header: Depth=1
5837; RV32IA-NEXT:    lr.w.aq a4, (a0)
5838; RV32IA-NEXT:    sub a5, a4, a1
5839; RV32IA-NEXT:    xor a5, a4, a5
5840; RV32IA-NEXT:    and a5, a5, a2
5841; RV32IA-NEXT:    xor a5, a4, a5
5842; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
5843; RV32IA-NEXT:    bnez a5, .LBB68_1
5844; RV32IA-NEXT:  # %bb.2:
5845; RV32IA-NEXT:    srl a0, a4, a3
5846; RV32IA-NEXT:    ret
5847;
5848; RV64I-LABEL: atomicrmw_sub_i16_acq_rel:
5849; RV64I:       # %bb.0:
5850; RV64I-NEXT:    addi sp, sp, -16
5851; RV64I-NEXT:    sd ra, 8(sp)
5852; RV64I-NEXT:    addi a2, zero, 4
5853; RV64I-NEXT:    call __atomic_fetch_sub_2
5854; RV64I-NEXT:    ld ra, 8(sp)
5855; RV64I-NEXT:    addi sp, sp, 16
5856; RV64I-NEXT:    ret
5857;
5858; RV64IA-LABEL: atomicrmw_sub_i16_acq_rel:
5859; RV64IA:       # %bb.0:
5860; RV64IA-NEXT:    lui a2, 16
5861; RV64IA-NEXT:    addiw a2, a2, -1
5862; RV64IA-NEXT:    and a1, a1, a2
5863; RV64IA-NEXT:    slli a3, a0, 3
5864; RV64IA-NEXT:    andi a3, a3, 24
5865; RV64IA-NEXT:    sllw a2, a2, a3
5866; RV64IA-NEXT:    sllw a1, a1, a3
5867; RV64IA-NEXT:    andi a0, a0, -4
5868; RV64IA-NEXT:  .LBB68_1: # =>This Inner Loop Header: Depth=1
5869; RV64IA-NEXT:    lr.w.aq a4, (a0)
5870; RV64IA-NEXT:    sub a5, a4, a1
5871; RV64IA-NEXT:    xor a5, a4, a5
5872; RV64IA-NEXT:    and a5, a5, a2
5873; RV64IA-NEXT:    xor a5, a4, a5
5874; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
5875; RV64IA-NEXT:    bnez a5, .LBB68_1
5876; RV64IA-NEXT:  # %bb.2:
5877; RV64IA-NEXT:    srlw a0, a4, a3
5878; RV64IA-NEXT:    ret
5879  %1 = atomicrmw sub i16* %a, i16 %b acq_rel
5880  ret i16 %1
5881}
5882
5883define i16 @atomicrmw_sub_i16_seq_cst(i16* %a, i16 %b) {
5884; RV32I-LABEL: atomicrmw_sub_i16_seq_cst:
5885; RV32I:       # %bb.0:
5886; RV32I-NEXT:    addi sp, sp, -16
5887; RV32I-NEXT:    sw ra, 12(sp)
5888; RV32I-NEXT:    addi a2, zero, 5
5889; RV32I-NEXT:    call __atomic_fetch_sub_2
5890; RV32I-NEXT:    lw ra, 12(sp)
5891; RV32I-NEXT:    addi sp, sp, 16
5892; RV32I-NEXT:    ret
5893;
5894; RV32IA-LABEL: atomicrmw_sub_i16_seq_cst:
5895; RV32IA:       # %bb.0:
5896; RV32IA-NEXT:    lui a2, 16
5897; RV32IA-NEXT:    addi a2, a2, -1
5898; RV32IA-NEXT:    and a1, a1, a2
5899; RV32IA-NEXT:    slli a3, a0, 3
5900; RV32IA-NEXT:    andi a3, a3, 24
5901; RV32IA-NEXT:    sll a2, a2, a3
5902; RV32IA-NEXT:    sll a1, a1, a3
5903; RV32IA-NEXT:    andi a0, a0, -4
5904; RV32IA-NEXT:  .LBB69_1: # =>This Inner Loop Header: Depth=1
5905; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
5906; RV32IA-NEXT:    sub a5, a4, a1
5907; RV32IA-NEXT:    xor a5, a4, a5
5908; RV32IA-NEXT:    and a5, a5, a2
5909; RV32IA-NEXT:    xor a5, a4, a5
5910; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
5911; RV32IA-NEXT:    bnez a5, .LBB69_1
5912; RV32IA-NEXT:  # %bb.2:
5913; RV32IA-NEXT:    srl a0, a4, a3
5914; RV32IA-NEXT:    ret
5915;
5916; RV64I-LABEL: atomicrmw_sub_i16_seq_cst:
5917; RV64I:       # %bb.0:
5918; RV64I-NEXT:    addi sp, sp, -16
5919; RV64I-NEXT:    sd ra, 8(sp)
5920; RV64I-NEXT:    addi a2, zero, 5
5921; RV64I-NEXT:    call __atomic_fetch_sub_2
5922; RV64I-NEXT:    ld ra, 8(sp)
5923; RV64I-NEXT:    addi sp, sp, 16
5924; RV64I-NEXT:    ret
5925;
5926; RV64IA-LABEL: atomicrmw_sub_i16_seq_cst:
5927; RV64IA:       # %bb.0:
5928; RV64IA-NEXT:    lui a2, 16
5929; RV64IA-NEXT:    addiw a2, a2, -1
5930; RV64IA-NEXT:    and a1, a1, a2
5931; RV64IA-NEXT:    slli a3, a0, 3
5932; RV64IA-NEXT:    andi a3, a3, 24
5933; RV64IA-NEXT:    sllw a2, a2, a3
5934; RV64IA-NEXT:    sllw a1, a1, a3
5935; RV64IA-NEXT:    andi a0, a0, -4
5936; RV64IA-NEXT:  .LBB69_1: # =>This Inner Loop Header: Depth=1
5937; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
5938; RV64IA-NEXT:    sub a5, a4, a1
5939; RV64IA-NEXT:    xor a5, a4, a5
5940; RV64IA-NEXT:    and a5, a5, a2
5941; RV64IA-NEXT:    xor a5, a4, a5
5942; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
5943; RV64IA-NEXT:    bnez a5, .LBB69_1
5944; RV64IA-NEXT:  # %bb.2:
5945; RV64IA-NEXT:    srlw a0, a4, a3
5946; RV64IA-NEXT:    ret
5947  %1 = atomicrmw sub i16* %a, i16 %b seq_cst
5948  ret i16 %1
5949}
5950
5951define i16 @atomicrmw_and_i16_monotonic(i16 *%a, i16 %b) nounwind {
5952; RV32I-LABEL: atomicrmw_and_i16_monotonic:
5953; RV32I:       # %bb.0:
5954; RV32I-NEXT:    addi sp, sp, -16
5955; RV32I-NEXT:    sw ra, 12(sp)
5956; RV32I-NEXT:    mv a2, zero
5957; RV32I-NEXT:    call __atomic_fetch_and_2
5958; RV32I-NEXT:    lw ra, 12(sp)
5959; RV32I-NEXT:    addi sp, sp, 16
5960; RV32I-NEXT:    ret
5961;
5962; RV32IA-LABEL: atomicrmw_and_i16_monotonic:
5963; RV32IA:       # %bb.0:
5964; RV32IA-NEXT:    lui a2, 16
5965; RV32IA-NEXT:    addi a2, a2, -1
5966; RV32IA-NEXT:    and a1, a1, a2
5967; RV32IA-NEXT:    slli a3, a0, 3
5968; RV32IA-NEXT:    andi a3, a3, 24
5969; RV32IA-NEXT:    sll a1, a1, a3
5970; RV32IA-NEXT:    sll a2, a2, a3
5971; RV32IA-NEXT:    not a2, a2
5972; RV32IA-NEXT:    or a1, a2, a1
5973; RV32IA-NEXT:    andi a0, a0, -4
5974; RV32IA-NEXT:    amoand.w a0, a1, (a0)
5975; RV32IA-NEXT:    srl a0, a0, a3
5976; RV32IA-NEXT:    ret
5977;
5978; RV64I-LABEL: atomicrmw_and_i16_monotonic:
5979; RV64I:       # %bb.0:
5980; RV64I-NEXT:    addi sp, sp, -16
5981; RV64I-NEXT:    sd ra, 8(sp)
5982; RV64I-NEXT:    mv a2, zero
5983; RV64I-NEXT:    call __atomic_fetch_and_2
5984; RV64I-NEXT:    ld ra, 8(sp)
5985; RV64I-NEXT:    addi sp, sp, 16
5986; RV64I-NEXT:    ret
5987;
5988; RV64IA-LABEL: atomicrmw_and_i16_monotonic:
5989; RV64IA:       # %bb.0:
5990; RV64IA-NEXT:    lui a2, 16
5991; RV64IA-NEXT:    addiw a2, a2, -1
5992; RV64IA-NEXT:    and a1, a1, a2
5993; RV64IA-NEXT:    slli a3, a0, 3
5994; RV64IA-NEXT:    andi a3, a3, 24
5995; RV64IA-NEXT:    sllw a1, a1, a3
5996; RV64IA-NEXT:    sllw a2, a2, a3
5997; RV64IA-NEXT:    not a2, a2
5998; RV64IA-NEXT:    or a1, a2, a1
5999; RV64IA-NEXT:    andi a0, a0, -4
6000; RV64IA-NEXT:    amoand.w a0, a1, (a0)
6001; RV64IA-NEXT:    srlw a0, a0, a3
6002; RV64IA-NEXT:    ret
6003  %1 = atomicrmw and i16* %a, i16 %b monotonic
6004  ret i16 %1
6005}
6006
6007define i16 @atomicrmw_and_i16_acquire(i16 *%a, i16 %b) nounwind {
6008; RV32I-LABEL: atomicrmw_and_i16_acquire:
6009; RV32I:       # %bb.0:
6010; RV32I-NEXT:    addi sp, sp, -16
6011; RV32I-NEXT:    sw ra, 12(sp)
6012; RV32I-NEXT:    addi a2, zero, 2
6013; RV32I-NEXT:    call __atomic_fetch_and_2
6014; RV32I-NEXT:    lw ra, 12(sp)
6015; RV32I-NEXT:    addi sp, sp, 16
6016; RV32I-NEXT:    ret
6017;
6018; RV32IA-LABEL: atomicrmw_and_i16_acquire:
6019; RV32IA:       # %bb.0:
6020; RV32IA-NEXT:    lui a2, 16
6021; RV32IA-NEXT:    addi a2, a2, -1
6022; RV32IA-NEXT:    and a1, a1, a2
6023; RV32IA-NEXT:    slli a3, a0, 3
6024; RV32IA-NEXT:    andi a3, a3, 24
6025; RV32IA-NEXT:    sll a1, a1, a3
6026; RV32IA-NEXT:    sll a2, a2, a3
6027; RV32IA-NEXT:    not a2, a2
6028; RV32IA-NEXT:    or a1, a2, a1
6029; RV32IA-NEXT:    andi a0, a0, -4
6030; RV32IA-NEXT:    amoand.w.aq a0, a1, (a0)
6031; RV32IA-NEXT:    srl a0, a0, a3
6032; RV32IA-NEXT:    ret
6033;
6034; RV64I-LABEL: atomicrmw_and_i16_acquire:
6035; RV64I:       # %bb.0:
6036; RV64I-NEXT:    addi sp, sp, -16
6037; RV64I-NEXT:    sd ra, 8(sp)
6038; RV64I-NEXT:    addi a2, zero, 2
6039; RV64I-NEXT:    call __atomic_fetch_and_2
6040; RV64I-NEXT:    ld ra, 8(sp)
6041; RV64I-NEXT:    addi sp, sp, 16
6042; RV64I-NEXT:    ret
6043;
6044; RV64IA-LABEL: atomicrmw_and_i16_acquire:
6045; RV64IA:       # %bb.0:
6046; RV64IA-NEXT:    lui a2, 16
6047; RV64IA-NEXT:    addiw a2, a2, -1
6048; RV64IA-NEXT:    and a1, a1, a2
6049; RV64IA-NEXT:    slli a3, a0, 3
6050; RV64IA-NEXT:    andi a3, a3, 24
6051; RV64IA-NEXT:    sllw a1, a1, a3
6052; RV64IA-NEXT:    sllw a2, a2, a3
6053; RV64IA-NEXT:    not a2, a2
6054; RV64IA-NEXT:    or a1, a2, a1
6055; RV64IA-NEXT:    andi a0, a0, -4
6056; RV64IA-NEXT:    amoand.w.aq a0, a1, (a0)
6057; RV64IA-NEXT:    srlw a0, a0, a3
6058; RV64IA-NEXT:    ret
6059  %1 = atomicrmw and i16* %a, i16 %b acquire
6060  ret i16 %1
6061}
6062
6063define i16 @atomicrmw_and_i16_release(i16 *%a, i16 %b) nounwind {
6064; RV32I-LABEL: atomicrmw_and_i16_release:
6065; RV32I:       # %bb.0:
6066; RV32I-NEXT:    addi sp, sp, -16
6067; RV32I-NEXT:    sw ra, 12(sp)
6068; RV32I-NEXT:    addi a2, zero, 3
6069; RV32I-NEXT:    call __atomic_fetch_and_2
6070; RV32I-NEXT:    lw ra, 12(sp)
6071; RV32I-NEXT:    addi sp, sp, 16
6072; RV32I-NEXT:    ret
6073;
6074; RV32IA-LABEL: atomicrmw_and_i16_release:
6075; RV32IA:       # %bb.0:
6076; RV32IA-NEXT:    lui a2, 16
6077; RV32IA-NEXT:    addi a2, a2, -1
6078; RV32IA-NEXT:    and a1, a1, a2
6079; RV32IA-NEXT:    slli a3, a0, 3
6080; RV32IA-NEXT:    andi a3, a3, 24
6081; RV32IA-NEXT:    sll a1, a1, a3
6082; RV32IA-NEXT:    sll a2, a2, a3
6083; RV32IA-NEXT:    not a2, a2
6084; RV32IA-NEXT:    or a1, a2, a1
6085; RV32IA-NEXT:    andi a0, a0, -4
6086; RV32IA-NEXT:    amoand.w.rl a0, a1, (a0)
6087; RV32IA-NEXT:    srl a0, a0, a3
6088; RV32IA-NEXT:    ret
6089;
6090; RV64I-LABEL: atomicrmw_and_i16_release:
6091; RV64I:       # %bb.0:
6092; RV64I-NEXT:    addi sp, sp, -16
6093; RV64I-NEXT:    sd ra, 8(sp)
6094; RV64I-NEXT:    addi a2, zero, 3
6095; RV64I-NEXT:    call __atomic_fetch_and_2
6096; RV64I-NEXT:    ld ra, 8(sp)
6097; RV64I-NEXT:    addi sp, sp, 16
6098; RV64I-NEXT:    ret
6099;
6100; RV64IA-LABEL: atomicrmw_and_i16_release:
6101; RV64IA:       # %bb.0:
6102; RV64IA-NEXT:    lui a2, 16
6103; RV64IA-NEXT:    addiw a2, a2, -1
6104; RV64IA-NEXT:    and a1, a1, a2
6105; RV64IA-NEXT:    slli a3, a0, 3
6106; RV64IA-NEXT:    andi a3, a3, 24
6107; RV64IA-NEXT:    sllw a1, a1, a3
6108; RV64IA-NEXT:    sllw a2, a2, a3
6109; RV64IA-NEXT:    not a2, a2
6110; RV64IA-NEXT:    or a1, a2, a1
6111; RV64IA-NEXT:    andi a0, a0, -4
6112; RV64IA-NEXT:    amoand.w.rl a0, a1, (a0)
6113; RV64IA-NEXT:    srlw a0, a0, a3
6114; RV64IA-NEXT:    ret
6115  %1 = atomicrmw and i16* %a, i16 %b release
6116  ret i16 %1
6117}
6118
6119define i16 @atomicrmw_and_i16_acq_rel(i16 *%a, i16 %b) nounwind {
6120; RV32I-LABEL: atomicrmw_and_i16_acq_rel:
6121; RV32I:       # %bb.0:
6122; RV32I-NEXT:    addi sp, sp, -16
6123; RV32I-NEXT:    sw ra, 12(sp)
6124; RV32I-NEXT:    addi a2, zero, 4
6125; RV32I-NEXT:    call __atomic_fetch_and_2
6126; RV32I-NEXT:    lw ra, 12(sp)
6127; RV32I-NEXT:    addi sp, sp, 16
6128; RV32I-NEXT:    ret
6129;
6130; RV32IA-LABEL: atomicrmw_and_i16_acq_rel:
6131; RV32IA:       # %bb.0:
6132; RV32IA-NEXT:    lui a2, 16
6133; RV32IA-NEXT:    addi a2, a2, -1
6134; RV32IA-NEXT:    and a1, a1, a2
6135; RV32IA-NEXT:    slli a3, a0, 3
6136; RV32IA-NEXT:    andi a3, a3, 24
6137; RV32IA-NEXT:    sll a1, a1, a3
6138; RV32IA-NEXT:    sll a2, a2, a3
6139; RV32IA-NEXT:    not a2, a2
6140; RV32IA-NEXT:    or a1, a2, a1
6141; RV32IA-NEXT:    andi a0, a0, -4
6142; RV32IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
6143; RV32IA-NEXT:    srl a0, a0, a3
6144; RV32IA-NEXT:    ret
6145;
6146; RV64I-LABEL: atomicrmw_and_i16_acq_rel:
6147; RV64I:       # %bb.0:
6148; RV64I-NEXT:    addi sp, sp, -16
6149; RV64I-NEXT:    sd ra, 8(sp)
6150; RV64I-NEXT:    addi a2, zero, 4
6151; RV64I-NEXT:    call __atomic_fetch_and_2
6152; RV64I-NEXT:    ld ra, 8(sp)
6153; RV64I-NEXT:    addi sp, sp, 16
6154; RV64I-NEXT:    ret
6155;
6156; RV64IA-LABEL: atomicrmw_and_i16_acq_rel:
6157; RV64IA:       # %bb.0:
6158; RV64IA-NEXT:    lui a2, 16
6159; RV64IA-NEXT:    addiw a2, a2, -1
6160; RV64IA-NEXT:    and a1, a1, a2
6161; RV64IA-NEXT:    slli a3, a0, 3
6162; RV64IA-NEXT:    andi a3, a3, 24
6163; RV64IA-NEXT:    sllw a1, a1, a3
6164; RV64IA-NEXT:    sllw a2, a2, a3
6165; RV64IA-NEXT:    not a2, a2
6166; RV64IA-NEXT:    or a1, a2, a1
6167; RV64IA-NEXT:    andi a0, a0, -4
6168; RV64IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
6169; RV64IA-NEXT:    srlw a0, a0, a3
6170; RV64IA-NEXT:    ret
6171  %1 = atomicrmw and i16* %a, i16 %b acq_rel
6172  ret i16 %1
6173}
6174
6175define i16 @atomicrmw_and_i16_seq_cst(i16 *%a, i16 %b) nounwind {
6176; RV32I-LABEL: atomicrmw_and_i16_seq_cst:
6177; RV32I:       # %bb.0:
6178; RV32I-NEXT:    addi sp, sp, -16
6179; RV32I-NEXT:    sw ra, 12(sp)
6180; RV32I-NEXT:    addi a2, zero, 5
6181; RV32I-NEXT:    call __atomic_fetch_and_2
6182; RV32I-NEXT:    lw ra, 12(sp)
6183; RV32I-NEXT:    addi sp, sp, 16
6184; RV32I-NEXT:    ret
6185;
6186; RV32IA-LABEL: atomicrmw_and_i16_seq_cst:
6187; RV32IA:       # %bb.0:
6188; RV32IA-NEXT:    lui a2, 16
6189; RV32IA-NEXT:    addi a2, a2, -1
6190; RV32IA-NEXT:    and a1, a1, a2
6191; RV32IA-NEXT:    slli a3, a0, 3
6192; RV32IA-NEXT:    andi a3, a3, 24
6193; RV32IA-NEXT:    sll a1, a1, a3
6194; RV32IA-NEXT:    sll a2, a2, a3
6195; RV32IA-NEXT:    not a2, a2
6196; RV32IA-NEXT:    or a1, a2, a1
6197; RV32IA-NEXT:    andi a0, a0, -4
6198; RV32IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
6199; RV32IA-NEXT:    srl a0, a0, a3
6200; RV32IA-NEXT:    ret
6201;
6202; RV64I-LABEL: atomicrmw_and_i16_seq_cst:
6203; RV64I:       # %bb.0:
6204; RV64I-NEXT:    addi sp, sp, -16
6205; RV64I-NEXT:    sd ra, 8(sp)
6206; RV64I-NEXT:    addi a2, zero, 5
6207; RV64I-NEXT:    call __atomic_fetch_and_2
6208; RV64I-NEXT:    ld ra, 8(sp)
6209; RV64I-NEXT:    addi sp, sp, 16
6210; RV64I-NEXT:    ret
6211;
6212; RV64IA-LABEL: atomicrmw_and_i16_seq_cst:
6213; RV64IA:       # %bb.0:
6214; RV64IA-NEXT:    lui a2, 16
6215; RV64IA-NEXT:    addiw a2, a2, -1
6216; RV64IA-NEXT:    and a1, a1, a2
6217; RV64IA-NEXT:    slli a3, a0, 3
6218; RV64IA-NEXT:    andi a3, a3, 24
6219; RV64IA-NEXT:    sllw a1, a1, a3
6220; RV64IA-NEXT:    sllw a2, a2, a3
6221; RV64IA-NEXT:    not a2, a2
6222; RV64IA-NEXT:    or a1, a2, a1
6223; RV64IA-NEXT:    andi a0, a0, -4
6224; RV64IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
6225; RV64IA-NEXT:    srlw a0, a0, a3
6226; RV64IA-NEXT:    ret
6227  %1 = atomicrmw and i16* %a, i16 %b seq_cst
6228  ret i16 %1
6229}
6230
6231define i16 @atomicrmw_nand_i16_monotonic(i16* %a, i16 %b) {
6232; RV32I-LABEL: atomicrmw_nand_i16_monotonic:
6233; RV32I:       # %bb.0:
6234; RV32I-NEXT:    addi sp, sp, -16
6235; RV32I-NEXT:    sw ra, 12(sp)
6236; RV32I-NEXT:    mv a2, zero
6237; RV32I-NEXT:    call __atomic_fetch_nand_2
6238; RV32I-NEXT:    lw ra, 12(sp)
6239; RV32I-NEXT:    addi sp, sp, 16
6240; RV32I-NEXT:    ret
6241;
6242; RV32IA-LABEL: atomicrmw_nand_i16_monotonic:
6243; RV32IA:       # %bb.0:
6244; RV32IA-NEXT:    lui a2, 16
6245; RV32IA-NEXT:    addi a2, a2, -1
6246; RV32IA-NEXT:    and a1, a1, a2
6247; RV32IA-NEXT:    slli a3, a0, 3
6248; RV32IA-NEXT:    andi a3, a3, 24
6249; RV32IA-NEXT:    sll a2, a2, a3
6250; RV32IA-NEXT:    sll a1, a1, a3
6251; RV32IA-NEXT:    andi a0, a0, -4
6252; RV32IA-NEXT:  .LBB75_1: # =>This Inner Loop Header: Depth=1
6253; RV32IA-NEXT:    lr.w a4, (a0)
6254; RV32IA-NEXT:    and a5, a4, a1
6255; RV32IA-NEXT:    not a5, a5
6256; RV32IA-NEXT:    xor a5, a4, a5
6257; RV32IA-NEXT:    and a5, a5, a2
6258; RV32IA-NEXT:    xor a5, a4, a5
6259; RV32IA-NEXT:    sc.w a5, a5, (a0)
6260; RV32IA-NEXT:    bnez a5, .LBB75_1
6261; RV32IA-NEXT:  # %bb.2:
6262; RV32IA-NEXT:    srl a0, a4, a3
6263; RV32IA-NEXT:    ret
6264;
6265; RV64I-LABEL: atomicrmw_nand_i16_monotonic:
6266; RV64I:       # %bb.0:
6267; RV64I-NEXT:    addi sp, sp, -16
6268; RV64I-NEXT:    sd ra, 8(sp)
6269; RV64I-NEXT:    mv a2, zero
6270; RV64I-NEXT:    call __atomic_fetch_nand_2
6271; RV64I-NEXT:    ld ra, 8(sp)
6272; RV64I-NEXT:    addi sp, sp, 16
6273; RV64I-NEXT:    ret
6274;
6275; RV64IA-LABEL: atomicrmw_nand_i16_monotonic:
6276; RV64IA:       # %bb.0:
6277; RV64IA-NEXT:    lui a2, 16
6278; RV64IA-NEXT:    addiw a2, a2, -1
6279; RV64IA-NEXT:    and a1, a1, a2
6280; RV64IA-NEXT:    slli a3, a0, 3
6281; RV64IA-NEXT:    andi a3, a3, 24
6282; RV64IA-NEXT:    sllw a2, a2, a3
6283; RV64IA-NEXT:    sllw a1, a1, a3
6284; RV64IA-NEXT:    andi a0, a0, -4
6285; RV64IA-NEXT:  .LBB75_1: # =>This Inner Loop Header: Depth=1
6286; RV64IA-NEXT:    lr.w a4, (a0)
6287; RV64IA-NEXT:    and a5, a4, a1
6288; RV64IA-NEXT:    not a5, a5
6289; RV64IA-NEXT:    xor a5, a4, a5
6290; RV64IA-NEXT:    and a5, a5, a2
6291; RV64IA-NEXT:    xor a5, a4, a5
6292; RV64IA-NEXT:    sc.w a5, a5, (a0)
6293; RV64IA-NEXT:    bnez a5, .LBB75_1
6294; RV64IA-NEXT:  # %bb.2:
6295; RV64IA-NEXT:    srlw a0, a4, a3
6296; RV64IA-NEXT:    ret
6297  %1 = atomicrmw nand i16* %a, i16 %b monotonic
6298  ret i16 %1
6299}
6300
6301define i16 @atomicrmw_nand_i16_acquire(i16* %a, i16 %b) {
6302; RV32I-LABEL: atomicrmw_nand_i16_acquire:
6303; RV32I:       # %bb.0:
6304; RV32I-NEXT:    addi sp, sp, -16
6305; RV32I-NEXT:    sw ra, 12(sp)
6306; RV32I-NEXT:    addi a2, zero, 2
6307; RV32I-NEXT:    call __atomic_fetch_nand_2
6308; RV32I-NEXT:    lw ra, 12(sp)
6309; RV32I-NEXT:    addi sp, sp, 16
6310; RV32I-NEXT:    ret
6311;
6312; RV32IA-LABEL: atomicrmw_nand_i16_acquire:
6313; RV32IA:       # %bb.0:
6314; RV32IA-NEXT:    lui a2, 16
6315; RV32IA-NEXT:    addi a2, a2, -1
6316; RV32IA-NEXT:    and a1, a1, a2
6317; RV32IA-NEXT:    slli a3, a0, 3
6318; RV32IA-NEXT:    andi a3, a3, 24
6319; RV32IA-NEXT:    sll a2, a2, a3
6320; RV32IA-NEXT:    sll a1, a1, a3
6321; RV32IA-NEXT:    andi a0, a0, -4
6322; RV32IA-NEXT:  .LBB76_1: # =>This Inner Loop Header: Depth=1
6323; RV32IA-NEXT:    lr.w.aq a4, (a0)
6324; RV32IA-NEXT:    and a5, a4, a1
6325; RV32IA-NEXT:    not a5, a5
6326; RV32IA-NEXT:    xor a5, a4, a5
6327; RV32IA-NEXT:    and a5, a5, a2
6328; RV32IA-NEXT:    xor a5, a4, a5
6329; RV32IA-NEXT:    sc.w a5, a5, (a0)
6330; RV32IA-NEXT:    bnez a5, .LBB76_1
6331; RV32IA-NEXT:  # %bb.2:
6332; RV32IA-NEXT:    srl a0, a4, a3
6333; RV32IA-NEXT:    ret
6334;
6335; RV64I-LABEL: atomicrmw_nand_i16_acquire:
6336; RV64I:       # %bb.0:
6337; RV64I-NEXT:    addi sp, sp, -16
6338; RV64I-NEXT:    sd ra, 8(sp)
6339; RV64I-NEXT:    addi a2, zero, 2
6340; RV64I-NEXT:    call __atomic_fetch_nand_2
6341; RV64I-NEXT:    ld ra, 8(sp)
6342; RV64I-NEXT:    addi sp, sp, 16
6343; RV64I-NEXT:    ret
6344;
6345; RV64IA-LABEL: atomicrmw_nand_i16_acquire:
6346; RV64IA:       # %bb.0:
6347; RV64IA-NEXT:    lui a2, 16
6348; RV64IA-NEXT:    addiw a2, a2, -1
6349; RV64IA-NEXT:    and a1, a1, a2
6350; RV64IA-NEXT:    slli a3, a0, 3
6351; RV64IA-NEXT:    andi a3, a3, 24
6352; RV64IA-NEXT:    sllw a2, a2, a3
6353; RV64IA-NEXT:    sllw a1, a1, a3
6354; RV64IA-NEXT:    andi a0, a0, -4
6355; RV64IA-NEXT:  .LBB76_1: # =>This Inner Loop Header: Depth=1
6356; RV64IA-NEXT:    lr.w.aq a4, (a0)
6357; RV64IA-NEXT:    and a5, a4, a1
6358; RV64IA-NEXT:    not a5, a5
6359; RV64IA-NEXT:    xor a5, a4, a5
6360; RV64IA-NEXT:    and a5, a5, a2
6361; RV64IA-NEXT:    xor a5, a4, a5
6362; RV64IA-NEXT:    sc.w a5, a5, (a0)
6363; RV64IA-NEXT:    bnez a5, .LBB76_1
6364; RV64IA-NEXT:  # %bb.2:
6365; RV64IA-NEXT:    srlw a0, a4, a3
6366; RV64IA-NEXT:    ret
6367  %1 = atomicrmw nand i16* %a, i16 %b acquire
6368  ret i16 %1
6369}
6370
6371define i16 @atomicrmw_nand_i16_release(i16* %a, i16 %b) {
6372; RV32I-LABEL: atomicrmw_nand_i16_release:
6373; RV32I:       # %bb.0:
6374; RV32I-NEXT:    addi sp, sp, -16
6375; RV32I-NEXT:    sw ra, 12(sp)
6376; RV32I-NEXT:    addi a2, zero, 3
6377; RV32I-NEXT:    call __atomic_fetch_nand_2
6378; RV32I-NEXT:    lw ra, 12(sp)
6379; RV32I-NEXT:    addi sp, sp, 16
6380; RV32I-NEXT:    ret
6381;
6382; RV32IA-LABEL: atomicrmw_nand_i16_release:
6383; RV32IA:       # %bb.0:
6384; RV32IA-NEXT:    lui a2, 16
6385; RV32IA-NEXT:    addi a2, a2, -1
6386; RV32IA-NEXT:    and a1, a1, a2
6387; RV32IA-NEXT:    slli a3, a0, 3
6388; RV32IA-NEXT:    andi a3, a3, 24
6389; RV32IA-NEXT:    sll a2, a2, a3
6390; RV32IA-NEXT:    sll a1, a1, a3
6391; RV32IA-NEXT:    andi a0, a0, -4
6392; RV32IA-NEXT:  .LBB77_1: # =>This Inner Loop Header: Depth=1
6393; RV32IA-NEXT:    lr.w a4, (a0)
6394; RV32IA-NEXT:    and a5, a4, a1
6395; RV32IA-NEXT:    not a5, a5
6396; RV32IA-NEXT:    xor a5, a4, a5
6397; RV32IA-NEXT:    and a5, a5, a2
6398; RV32IA-NEXT:    xor a5, a4, a5
6399; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
6400; RV32IA-NEXT:    bnez a5, .LBB77_1
6401; RV32IA-NEXT:  # %bb.2:
6402; RV32IA-NEXT:    srl a0, a4, a3
6403; RV32IA-NEXT:    ret
6404;
6405; RV64I-LABEL: atomicrmw_nand_i16_release:
6406; RV64I:       # %bb.0:
6407; RV64I-NEXT:    addi sp, sp, -16
6408; RV64I-NEXT:    sd ra, 8(sp)
6409; RV64I-NEXT:    addi a2, zero, 3
6410; RV64I-NEXT:    call __atomic_fetch_nand_2
6411; RV64I-NEXT:    ld ra, 8(sp)
6412; RV64I-NEXT:    addi sp, sp, 16
6413; RV64I-NEXT:    ret
6414;
6415; RV64IA-LABEL: atomicrmw_nand_i16_release:
6416; RV64IA:       # %bb.0:
6417; RV64IA-NEXT:    lui a2, 16
6418; RV64IA-NEXT:    addiw a2, a2, -1
6419; RV64IA-NEXT:    and a1, a1, a2
6420; RV64IA-NEXT:    slli a3, a0, 3
6421; RV64IA-NEXT:    andi a3, a3, 24
6422; RV64IA-NEXT:    sllw a2, a2, a3
6423; RV64IA-NEXT:    sllw a1, a1, a3
6424; RV64IA-NEXT:    andi a0, a0, -4
6425; RV64IA-NEXT:  .LBB77_1: # =>This Inner Loop Header: Depth=1
6426; RV64IA-NEXT:    lr.w a4, (a0)
6427; RV64IA-NEXT:    and a5, a4, a1
6428; RV64IA-NEXT:    not a5, a5
6429; RV64IA-NEXT:    xor a5, a4, a5
6430; RV64IA-NEXT:    and a5, a5, a2
6431; RV64IA-NEXT:    xor a5, a4, a5
6432; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
6433; RV64IA-NEXT:    bnez a5, .LBB77_1
6434; RV64IA-NEXT:  # %bb.2:
6435; RV64IA-NEXT:    srlw a0, a4, a3
6436; RV64IA-NEXT:    ret
6437  %1 = atomicrmw nand i16* %a, i16 %b release
6438  ret i16 %1
6439}
6440
6441define i16 @atomicrmw_nand_i16_acq_rel(i16* %a, i16 %b) {
6442; RV32I-LABEL: atomicrmw_nand_i16_acq_rel:
6443; RV32I:       # %bb.0:
6444; RV32I-NEXT:    addi sp, sp, -16
6445; RV32I-NEXT:    sw ra, 12(sp)
6446; RV32I-NEXT:    addi a2, zero, 4
6447; RV32I-NEXT:    call __atomic_fetch_nand_2
6448; RV32I-NEXT:    lw ra, 12(sp)
6449; RV32I-NEXT:    addi sp, sp, 16
6450; RV32I-NEXT:    ret
6451;
6452; RV32IA-LABEL: atomicrmw_nand_i16_acq_rel:
6453; RV32IA:       # %bb.0:
6454; RV32IA-NEXT:    lui a2, 16
6455; RV32IA-NEXT:    addi a2, a2, -1
6456; RV32IA-NEXT:    and a1, a1, a2
6457; RV32IA-NEXT:    slli a3, a0, 3
6458; RV32IA-NEXT:    andi a3, a3, 24
6459; RV32IA-NEXT:    sll a2, a2, a3
6460; RV32IA-NEXT:    sll a1, a1, a3
6461; RV32IA-NEXT:    andi a0, a0, -4
6462; RV32IA-NEXT:  .LBB78_1: # =>This Inner Loop Header: Depth=1
6463; RV32IA-NEXT:    lr.w.aq a4, (a0)
6464; RV32IA-NEXT:    and a5, a4, a1
6465; RV32IA-NEXT:    not a5, a5
6466; RV32IA-NEXT:    xor a5, a4, a5
6467; RV32IA-NEXT:    and a5, a5, a2
6468; RV32IA-NEXT:    xor a5, a4, a5
6469; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
6470; RV32IA-NEXT:    bnez a5, .LBB78_1
6471; RV32IA-NEXT:  # %bb.2:
6472; RV32IA-NEXT:    srl a0, a4, a3
6473; RV32IA-NEXT:    ret
6474;
6475; RV64I-LABEL: atomicrmw_nand_i16_acq_rel:
6476; RV64I:       # %bb.0:
6477; RV64I-NEXT:    addi sp, sp, -16
6478; RV64I-NEXT:    sd ra, 8(sp)
6479; RV64I-NEXT:    addi a2, zero, 4
6480; RV64I-NEXT:    call __atomic_fetch_nand_2
6481; RV64I-NEXT:    ld ra, 8(sp)
6482; RV64I-NEXT:    addi sp, sp, 16
6483; RV64I-NEXT:    ret
6484;
6485; RV64IA-LABEL: atomicrmw_nand_i16_acq_rel:
6486; RV64IA:       # %bb.0:
6487; RV64IA-NEXT:    lui a2, 16
6488; RV64IA-NEXT:    addiw a2, a2, -1
6489; RV64IA-NEXT:    and a1, a1, a2
6490; RV64IA-NEXT:    slli a3, a0, 3
6491; RV64IA-NEXT:    andi a3, a3, 24
6492; RV64IA-NEXT:    sllw a2, a2, a3
6493; RV64IA-NEXT:    sllw a1, a1, a3
6494; RV64IA-NEXT:    andi a0, a0, -4
6495; RV64IA-NEXT:  .LBB78_1: # =>This Inner Loop Header: Depth=1
6496; RV64IA-NEXT:    lr.w.aq a4, (a0)
6497; RV64IA-NEXT:    and a5, a4, a1
6498; RV64IA-NEXT:    not a5, a5
6499; RV64IA-NEXT:    xor a5, a4, a5
6500; RV64IA-NEXT:    and a5, a5, a2
6501; RV64IA-NEXT:    xor a5, a4, a5
6502; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
6503; RV64IA-NEXT:    bnez a5, .LBB78_1
6504; RV64IA-NEXT:  # %bb.2:
6505; RV64IA-NEXT:    srlw a0, a4, a3
6506; RV64IA-NEXT:    ret
6507  %1 = atomicrmw nand i16* %a, i16 %b acq_rel
6508  ret i16 %1
6509}
6510
6511define i16 @atomicrmw_nand_i16_seq_cst(i16* %a, i16 %b) {
6512; RV32I-LABEL: atomicrmw_nand_i16_seq_cst:
6513; RV32I:       # %bb.0:
6514; RV32I-NEXT:    addi sp, sp, -16
6515; RV32I-NEXT:    sw ra, 12(sp)
6516; RV32I-NEXT:    addi a2, zero, 5
6517; RV32I-NEXT:    call __atomic_fetch_nand_2
6518; RV32I-NEXT:    lw ra, 12(sp)
6519; RV32I-NEXT:    addi sp, sp, 16
6520; RV32I-NEXT:    ret
6521;
6522; RV32IA-LABEL: atomicrmw_nand_i16_seq_cst:
6523; RV32IA:       # %bb.0:
6524; RV32IA-NEXT:    lui a2, 16
6525; RV32IA-NEXT:    addi a2, a2, -1
6526; RV32IA-NEXT:    and a1, a1, a2
6527; RV32IA-NEXT:    slli a3, a0, 3
6528; RV32IA-NEXT:    andi a3, a3, 24
6529; RV32IA-NEXT:    sll a2, a2, a3
6530; RV32IA-NEXT:    sll a1, a1, a3
6531; RV32IA-NEXT:    andi a0, a0, -4
6532; RV32IA-NEXT:  .LBB79_1: # =>This Inner Loop Header: Depth=1
6533; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
6534; RV32IA-NEXT:    and a5, a4, a1
6535; RV32IA-NEXT:    not a5, a5
6536; RV32IA-NEXT:    xor a5, a4, a5
6537; RV32IA-NEXT:    and a5, a5, a2
6538; RV32IA-NEXT:    xor a5, a4, a5
6539; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
6540; RV32IA-NEXT:    bnez a5, .LBB79_1
6541; RV32IA-NEXT:  # %bb.2:
6542; RV32IA-NEXT:    srl a0, a4, a3
6543; RV32IA-NEXT:    ret
6544;
6545; RV64I-LABEL: atomicrmw_nand_i16_seq_cst:
6546; RV64I:       # %bb.0:
6547; RV64I-NEXT:    addi sp, sp, -16
6548; RV64I-NEXT:    sd ra, 8(sp)
6549; RV64I-NEXT:    addi a2, zero, 5
6550; RV64I-NEXT:    call __atomic_fetch_nand_2
6551; RV64I-NEXT:    ld ra, 8(sp)
6552; RV64I-NEXT:    addi sp, sp, 16
6553; RV64I-NEXT:    ret
6554;
6555; RV64IA-LABEL: atomicrmw_nand_i16_seq_cst:
6556; RV64IA:       # %bb.0:
6557; RV64IA-NEXT:    lui a2, 16
6558; RV64IA-NEXT:    addiw a2, a2, -1
6559; RV64IA-NEXT:    and a1, a1, a2
6560; RV64IA-NEXT:    slli a3, a0, 3
6561; RV64IA-NEXT:    andi a3, a3, 24
6562; RV64IA-NEXT:    sllw a2, a2, a3
6563; RV64IA-NEXT:    sllw a1, a1, a3
6564; RV64IA-NEXT:    andi a0, a0, -4
6565; RV64IA-NEXT:  .LBB79_1: # =>This Inner Loop Header: Depth=1
6566; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
6567; RV64IA-NEXT:    and a5, a4, a1
6568; RV64IA-NEXT:    not a5, a5
6569; RV64IA-NEXT:    xor a5, a4, a5
6570; RV64IA-NEXT:    and a5, a5, a2
6571; RV64IA-NEXT:    xor a5, a4, a5
6572; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
6573; RV64IA-NEXT:    bnez a5, .LBB79_1
6574; RV64IA-NEXT:  # %bb.2:
6575; RV64IA-NEXT:    srlw a0, a4, a3
6576; RV64IA-NEXT:    ret
6577  %1 = atomicrmw nand i16* %a, i16 %b seq_cst
6578  ret i16 %1
6579}
6580
6581define i16 @atomicrmw_or_i16_monotonic(i16 *%a, i16 %b) nounwind {
6582; RV32I-LABEL: atomicrmw_or_i16_monotonic:
6583; RV32I:       # %bb.0:
6584; RV32I-NEXT:    addi sp, sp, -16
6585; RV32I-NEXT:    sw ra, 12(sp)
6586; RV32I-NEXT:    mv a2, zero
6587; RV32I-NEXT:    call __atomic_fetch_or_2
6588; RV32I-NEXT:    lw ra, 12(sp)
6589; RV32I-NEXT:    addi sp, sp, 16
6590; RV32I-NEXT:    ret
6591;
6592; RV32IA-LABEL: atomicrmw_or_i16_monotonic:
6593; RV32IA:       # %bb.0:
6594; RV32IA-NEXT:    lui a2, 16
6595; RV32IA-NEXT:    addi a2, a2, -1
6596; RV32IA-NEXT:    and a1, a1, a2
6597; RV32IA-NEXT:    slli a2, a0, 3
6598; RV32IA-NEXT:    andi a2, a2, 24
6599; RV32IA-NEXT:    sll a1, a1, a2
6600; RV32IA-NEXT:    andi a0, a0, -4
6601; RV32IA-NEXT:    amoor.w a0, a1, (a0)
6602; RV32IA-NEXT:    srl a0, a0, a2
6603; RV32IA-NEXT:    ret
6604;
6605; RV64I-LABEL: atomicrmw_or_i16_monotonic:
6606; RV64I:       # %bb.0:
6607; RV64I-NEXT:    addi sp, sp, -16
6608; RV64I-NEXT:    sd ra, 8(sp)
6609; RV64I-NEXT:    mv a2, zero
6610; RV64I-NEXT:    call __atomic_fetch_or_2
6611; RV64I-NEXT:    ld ra, 8(sp)
6612; RV64I-NEXT:    addi sp, sp, 16
6613; RV64I-NEXT:    ret
6614;
6615; RV64IA-LABEL: atomicrmw_or_i16_monotonic:
6616; RV64IA:       # %bb.0:
6617; RV64IA-NEXT:    lui a2, 16
6618; RV64IA-NEXT:    addiw a2, a2, -1
6619; RV64IA-NEXT:    and a1, a1, a2
6620; RV64IA-NEXT:    slli a2, a0, 3
6621; RV64IA-NEXT:    andi a2, a2, 24
6622; RV64IA-NEXT:    sllw a1, a1, a2
6623; RV64IA-NEXT:    andi a0, a0, -4
6624; RV64IA-NEXT:    amoor.w a0, a1, (a0)
6625; RV64IA-NEXT:    srlw a0, a0, a2
6626; RV64IA-NEXT:    ret
6627  %1 = atomicrmw or i16* %a, i16 %b monotonic
6628  ret i16 %1
6629}
6630
6631define i16 @atomicrmw_or_i16_acquire(i16 *%a, i16 %b) nounwind {
6632; RV32I-LABEL: atomicrmw_or_i16_acquire:
6633; RV32I:       # %bb.0:
6634; RV32I-NEXT:    addi sp, sp, -16
6635; RV32I-NEXT:    sw ra, 12(sp)
6636; RV32I-NEXT:    addi a2, zero, 2
6637; RV32I-NEXT:    call __atomic_fetch_or_2
6638; RV32I-NEXT:    lw ra, 12(sp)
6639; RV32I-NEXT:    addi sp, sp, 16
6640; RV32I-NEXT:    ret
6641;
6642; RV32IA-LABEL: atomicrmw_or_i16_acquire:
6643; RV32IA:       # %bb.0:
6644; RV32IA-NEXT:    lui a2, 16
6645; RV32IA-NEXT:    addi a2, a2, -1
6646; RV32IA-NEXT:    and a1, a1, a2
6647; RV32IA-NEXT:    slli a2, a0, 3
6648; RV32IA-NEXT:    andi a2, a2, 24
6649; RV32IA-NEXT:    sll a1, a1, a2
6650; RV32IA-NEXT:    andi a0, a0, -4
6651; RV32IA-NEXT:    amoor.w.aq a0, a1, (a0)
6652; RV32IA-NEXT:    srl a0, a0, a2
6653; RV32IA-NEXT:    ret
6654;
6655; RV64I-LABEL: atomicrmw_or_i16_acquire:
6656; RV64I:       # %bb.0:
6657; RV64I-NEXT:    addi sp, sp, -16
6658; RV64I-NEXT:    sd ra, 8(sp)
6659; RV64I-NEXT:    addi a2, zero, 2
6660; RV64I-NEXT:    call __atomic_fetch_or_2
6661; RV64I-NEXT:    ld ra, 8(sp)
6662; RV64I-NEXT:    addi sp, sp, 16
6663; RV64I-NEXT:    ret
6664;
6665; RV64IA-LABEL: atomicrmw_or_i16_acquire:
6666; RV64IA:       # %bb.0:
6667; RV64IA-NEXT:    lui a2, 16
6668; RV64IA-NEXT:    addiw a2, a2, -1
6669; RV64IA-NEXT:    and a1, a1, a2
6670; RV64IA-NEXT:    slli a2, a0, 3
6671; RV64IA-NEXT:    andi a2, a2, 24
6672; RV64IA-NEXT:    sllw a1, a1, a2
6673; RV64IA-NEXT:    andi a0, a0, -4
6674; RV64IA-NEXT:    amoor.w.aq a0, a1, (a0)
6675; RV64IA-NEXT:    srlw a0, a0, a2
6676; RV64IA-NEXT:    ret
6677  %1 = atomicrmw or i16* %a, i16 %b acquire
6678  ret i16 %1
6679}
6680
6681define i16 @atomicrmw_or_i16_release(i16 *%a, i16 %b) nounwind {
6682; RV32I-LABEL: atomicrmw_or_i16_release:
6683; RV32I:       # %bb.0:
6684; RV32I-NEXT:    addi sp, sp, -16
6685; RV32I-NEXT:    sw ra, 12(sp)
6686; RV32I-NEXT:    addi a2, zero, 3
6687; RV32I-NEXT:    call __atomic_fetch_or_2
6688; RV32I-NEXT:    lw ra, 12(sp)
6689; RV32I-NEXT:    addi sp, sp, 16
6690; RV32I-NEXT:    ret
6691;
6692; RV32IA-LABEL: atomicrmw_or_i16_release:
6693; RV32IA:       # %bb.0:
6694; RV32IA-NEXT:    lui a2, 16
6695; RV32IA-NEXT:    addi a2, a2, -1
6696; RV32IA-NEXT:    and a1, a1, a2
6697; RV32IA-NEXT:    slli a2, a0, 3
6698; RV32IA-NEXT:    andi a2, a2, 24
6699; RV32IA-NEXT:    sll a1, a1, a2
6700; RV32IA-NEXT:    andi a0, a0, -4
6701; RV32IA-NEXT:    amoor.w.rl a0, a1, (a0)
6702; RV32IA-NEXT:    srl a0, a0, a2
6703; RV32IA-NEXT:    ret
6704;
6705; RV64I-LABEL: atomicrmw_or_i16_release:
6706; RV64I:       # %bb.0:
6707; RV64I-NEXT:    addi sp, sp, -16
6708; RV64I-NEXT:    sd ra, 8(sp)
6709; RV64I-NEXT:    addi a2, zero, 3
6710; RV64I-NEXT:    call __atomic_fetch_or_2
6711; RV64I-NEXT:    ld ra, 8(sp)
6712; RV64I-NEXT:    addi sp, sp, 16
6713; RV64I-NEXT:    ret
6714;
6715; RV64IA-LABEL: atomicrmw_or_i16_release:
6716; RV64IA:       # %bb.0:
6717; RV64IA-NEXT:    lui a2, 16
6718; RV64IA-NEXT:    addiw a2, a2, -1
6719; RV64IA-NEXT:    and a1, a1, a2
6720; RV64IA-NEXT:    slli a2, a0, 3
6721; RV64IA-NEXT:    andi a2, a2, 24
6722; RV64IA-NEXT:    sllw a1, a1, a2
6723; RV64IA-NEXT:    andi a0, a0, -4
6724; RV64IA-NEXT:    amoor.w.rl a0, a1, (a0)
6725; RV64IA-NEXT:    srlw a0, a0, a2
6726; RV64IA-NEXT:    ret
6727  %1 = atomicrmw or i16* %a, i16 %b release
6728  ret i16 %1
6729}
6730
6731define i16 @atomicrmw_or_i16_acq_rel(i16 *%a, i16 %b) nounwind {
6732; RV32I-LABEL: atomicrmw_or_i16_acq_rel:
6733; RV32I:       # %bb.0:
6734; RV32I-NEXT:    addi sp, sp, -16
6735; RV32I-NEXT:    sw ra, 12(sp)
6736; RV32I-NEXT:    addi a2, zero, 4
6737; RV32I-NEXT:    call __atomic_fetch_or_2
6738; RV32I-NEXT:    lw ra, 12(sp)
6739; RV32I-NEXT:    addi sp, sp, 16
6740; RV32I-NEXT:    ret
6741;
6742; RV32IA-LABEL: atomicrmw_or_i16_acq_rel:
6743; RV32IA:       # %bb.0:
6744; RV32IA-NEXT:    lui a2, 16
6745; RV32IA-NEXT:    addi a2, a2, -1
6746; RV32IA-NEXT:    and a1, a1, a2
6747; RV32IA-NEXT:    slli a2, a0, 3
6748; RV32IA-NEXT:    andi a2, a2, 24
6749; RV32IA-NEXT:    sll a1, a1, a2
6750; RV32IA-NEXT:    andi a0, a0, -4
6751; RV32IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
6752; RV32IA-NEXT:    srl a0, a0, a2
6753; RV32IA-NEXT:    ret
6754;
6755; RV64I-LABEL: atomicrmw_or_i16_acq_rel:
6756; RV64I:       # %bb.0:
6757; RV64I-NEXT:    addi sp, sp, -16
6758; RV64I-NEXT:    sd ra, 8(sp)
6759; RV64I-NEXT:    addi a2, zero, 4
6760; RV64I-NEXT:    call __atomic_fetch_or_2
6761; RV64I-NEXT:    ld ra, 8(sp)
6762; RV64I-NEXT:    addi sp, sp, 16
6763; RV64I-NEXT:    ret
6764;
6765; RV64IA-LABEL: atomicrmw_or_i16_acq_rel:
6766; RV64IA:       # %bb.0:
6767; RV64IA-NEXT:    lui a2, 16
6768; RV64IA-NEXT:    addiw a2, a2, -1
6769; RV64IA-NEXT:    and a1, a1, a2
6770; RV64IA-NEXT:    slli a2, a0, 3
6771; RV64IA-NEXT:    andi a2, a2, 24
6772; RV64IA-NEXT:    sllw a1, a1, a2
6773; RV64IA-NEXT:    andi a0, a0, -4
6774; RV64IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
6775; RV64IA-NEXT:    srlw a0, a0, a2
6776; RV64IA-NEXT:    ret
6777  %1 = atomicrmw or i16* %a, i16 %b acq_rel
6778  ret i16 %1
6779}
6780
6781define i16 @atomicrmw_or_i16_seq_cst(i16 *%a, i16 %b) nounwind {
6782; RV32I-LABEL: atomicrmw_or_i16_seq_cst:
6783; RV32I:       # %bb.0:
6784; RV32I-NEXT:    addi sp, sp, -16
6785; RV32I-NEXT:    sw ra, 12(sp)
6786; RV32I-NEXT:    addi a2, zero, 5
6787; RV32I-NEXT:    call __atomic_fetch_or_2
6788; RV32I-NEXT:    lw ra, 12(sp)
6789; RV32I-NEXT:    addi sp, sp, 16
6790; RV32I-NEXT:    ret
6791;
6792; RV32IA-LABEL: atomicrmw_or_i16_seq_cst:
6793; RV32IA:       # %bb.0:
6794; RV32IA-NEXT:    lui a2, 16
6795; RV32IA-NEXT:    addi a2, a2, -1
6796; RV32IA-NEXT:    and a1, a1, a2
6797; RV32IA-NEXT:    slli a2, a0, 3
6798; RV32IA-NEXT:    andi a2, a2, 24
6799; RV32IA-NEXT:    sll a1, a1, a2
6800; RV32IA-NEXT:    andi a0, a0, -4
6801; RV32IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
6802; RV32IA-NEXT:    srl a0, a0, a2
6803; RV32IA-NEXT:    ret
6804;
6805; RV64I-LABEL: atomicrmw_or_i16_seq_cst:
6806; RV64I:       # %bb.0:
6807; RV64I-NEXT:    addi sp, sp, -16
6808; RV64I-NEXT:    sd ra, 8(sp)
6809; RV64I-NEXT:    addi a2, zero, 5
6810; RV64I-NEXT:    call __atomic_fetch_or_2
6811; RV64I-NEXT:    ld ra, 8(sp)
6812; RV64I-NEXT:    addi sp, sp, 16
6813; RV64I-NEXT:    ret
6814;
6815; RV64IA-LABEL: atomicrmw_or_i16_seq_cst:
6816; RV64IA:       # %bb.0:
6817; RV64IA-NEXT:    lui a2, 16
6818; RV64IA-NEXT:    addiw a2, a2, -1
6819; RV64IA-NEXT:    and a1, a1, a2
6820; RV64IA-NEXT:    slli a2, a0, 3
6821; RV64IA-NEXT:    andi a2, a2, 24
6822; RV64IA-NEXT:    sllw a1, a1, a2
6823; RV64IA-NEXT:    andi a0, a0, -4
6824; RV64IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
6825; RV64IA-NEXT:    srlw a0, a0, a2
6826; RV64IA-NEXT:    ret
6827  %1 = atomicrmw or i16* %a, i16 %b seq_cst
6828  ret i16 %1
6829}
6830
6831define i16 @atomicrmw_xor_i16_monotonic(i16 *%a, i16 %b) nounwind {
6832; RV32I-LABEL: atomicrmw_xor_i16_monotonic:
6833; RV32I:       # %bb.0:
6834; RV32I-NEXT:    addi sp, sp, -16
6835; RV32I-NEXT:    sw ra, 12(sp)
6836; RV32I-NEXT:    mv a2, zero
6837; RV32I-NEXT:    call __atomic_fetch_xor_2
6838; RV32I-NEXT:    lw ra, 12(sp)
6839; RV32I-NEXT:    addi sp, sp, 16
6840; RV32I-NEXT:    ret
6841;
6842; RV32IA-LABEL: atomicrmw_xor_i16_monotonic:
6843; RV32IA:       # %bb.0:
6844; RV32IA-NEXT:    lui a2, 16
6845; RV32IA-NEXT:    addi a2, a2, -1
6846; RV32IA-NEXT:    and a1, a1, a2
6847; RV32IA-NEXT:    slli a2, a0, 3
6848; RV32IA-NEXT:    andi a2, a2, 24
6849; RV32IA-NEXT:    sll a1, a1, a2
6850; RV32IA-NEXT:    andi a0, a0, -4
6851; RV32IA-NEXT:    amoxor.w a0, a1, (a0)
6852; RV32IA-NEXT:    srl a0, a0, a2
6853; RV32IA-NEXT:    ret
6854;
6855; RV64I-LABEL: atomicrmw_xor_i16_monotonic:
6856; RV64I:       # %bb.0:
6857; RV64I-NEXT:    addi sp, sp, -16
6858; RV64I-NEXT:    sd ra, 8(sp)
6859; RV64I-NEXT:    mv a2, zero
6860; RV64I-NEXT:    call __atomic_fetch_xor_2
6861; RV64I-NEXT:    ld ra, 8(sp)
6862; RV64I-NEXT:    addi sp, sp, 16
6863; RV64I-NEXT:    ret
6864;
6865; RV64IA-LABEL: atomicrmw_xor_i16_monotonic:
6866; RV64IA:       # %bb.0:
6867; RV64IA-NEXT:    lui a2, 16
6868; RV64IA-NEXT:    addiw a2, a2, -1
6869; RV64IA-NEXT:    and a1, a1, a2
6870; RV64IA-NEXT:    slli a2, a0, 3
6871; RV64IA-NEXT:    andi a2, a2, 24
6872; RV64IA-NEXT:    sllw a1, a1, a2
6873; RV64IA-NEXT:    andi a0, a0, -4
6874; RV64IA-NEXT:    amoxor.w a0, a1, (a0)
6875; RV64IA-NEXT:    srlw a0, a0, a2
6876; RV64IA-NEXT:    ret
6877  %1 = atomicrmw xor i16* %a, i16 %b monotonic
6878  ret i16 %1
6879}
6880
6881define i16 @atomicrmw_xor_i16_acquire(i16 *%a, i16 %b) nounwind {
6882; RV32I-LABEL: atomicrmw_xor_i16_acquire:
6883; RV32I:       # %bb.0:
6884; RV32I-NEXT:    addi sp, sp, -16
6885; RV32I-NEXT:    sw ra, 12(sp)
6886; RV32I-NEXT:    addi a2, zero, 2
6887; RV32I-NEXT:    call __atomic_fetch_xor_2
6888; RV32I-NEXT:    lw ra, 12(sp)
6889; RV32I-NEXT:    addi sp, sp, 16
6890; RV32I-NEXT:    ret
6891;
6892; RV32IA-LABEL: atomicrmw_xor_i16_acquire:
6893; RV32IA:       # %bb.0:
6894; RV32IA-NEXT:    lui a2, 16
6895; RV32IA-NEXT:    addi a2, a2, -1
6896; RV32IA-NEXT:    and a1, a1, a2
6897; RV32IA-NEXT:    slli a2, a0, 3
6898; RV32IA-NEXT:    andi a2, a2, 24
6899; RV32IA-NEXT:    sll a1, a1, a2
6900; RV32IA-NEXT:    andi a0, a0, -4
6901; RV32IA-NEXT:    amoxor.w.aq a0, a1, (a0)
6902; RV32IA-NEXT:    srl a0, a0, a2
6903; RV32IA-NEXT:    ret
6904;
6905; RV64I-LABEL: atomicrmw_xor_i16_acquire:
6906; RV64I:       # %bb.0:
6907; RV64I-NEXT:    addi sp, sp, -16
6908; RV64I-NEXT:    sd ra, 8(sp)
6909; RV64I-NEXT:    addi a2, zero, 2
6910; RV64I-NEXT:    call __atomic_fetch_xor_2
6911; RV64I-NEXT:    ld ra, 8(sp)
6912; RV64I-NEXT:    addi sp, sp, 16
6913; RV64I-NEXT:    ret
6914;
6915; RV64IA-LABEL: atomicrmw_xor_i16_acquire:
6916; RV64IA:       # %bb.0:
6917; RV64IA-NEXT:    lui a2, 16
6918; RV64IA-NEXT:    addiw a2, a2, -1
6919; RV64IA-NEXT:    and a1, a1, a2
6920; RV64IA-NEXT:    slli a2, a0, 3
6921; RV64IA-NEXT:    andi a2, a2, 24
6922; RV64IA-NEXT:    sllw a1, a1, a2
6923; RV64IA-NEXT:    andi a0, a0, -4
6924; RV64IA-NEXT:    amoxor.w.aq a0, a1, (a0)
6925; RV64IA-NEXT:    srlw a0, a0, a2
6926; RV64IA-NEXT:    ret
6927  %1 = atomicrmw xor i16* %a, i16 %b acquire
6928  ret i16 %1
6929}
6930
6931define i16 @atomicrmw_xor_i16_release(i16 *%a, i16 %b) nounwind {
6932; RV32I-LABEL: atomicrmw_xor_i16_release:
6933; RV32I:       # %bb.0:
6934; RV32I-NEXT:    addi sp, sp, -16
6935; RV32I-NEXT:    sw ra, 12(sp)
6936; RV32I-NEXT:    addi a2, zero, 3
6937; RV32I-NEXT:    call __atomic_fetch_xor_2
6938; RV32I-NEXT:    lw ra, 12(sp)
6939; RV32I-NEXT:    addi sp, sp, 16
6940; RV32I-NEXT:    ret
6941;
6942; RV32IA-LABEL: atomicrmw_xor_i16_release:
6943; RV32IA:       # %bb.0:
6944; RV32IA-NEXT:    lui a2, 16
6945; RV32IA-NEXT:    addi a2, a2, -1
6946; RV32IA-NEXT:    and a1, a1, a2
6947; RV32IA-NEXT:    slli a2, a0, 3
6948; RV32IA-NEXT:    andi a2, a2, 24
6949; RV32IA-NEXT:    sll a1, a1, a2
6950; RV32IA-NEXT:    andi a0, a0, -4
6951; RV32IA-NEXT:    amoxor.w.rl a0, a1, (a0)
6952; RV32IA-NEXT:    srl a0, a0, a2
6953; RV32IA-NEXT:    ret
6954;
6955; RV64I-LABEL: atomicrmw_xor_i16_release:
6956; RV64I:       # %bb.0:
6957; RV64I-NEXT:    addi sp, sp, -16
6958; RV64I-NEXT:    sd ra, 8(sp)
6959; RV64I-NEXT:    addi a2, zero, 3
6960; RV64I-NEXT:    call __atomic_fetch_xor_2
6961; RV64I-NEXT:    ld ra, 8(sp)
6962; RV64I-NEXT:    addi sp, sp, 16
6963; RV64I-NEXT:    ret
6964;
6965; RV64IA-LABEL: atomicrmw_xor_i16_release:
6966; RV64IA:       # %bb.0:
6967; RV64IA-NEXT:    lui a2, 16
6968; RV64IA-NEXT:    addiw a2, a2, -1
6969; RV64IA-NEXT:    and a1, a1, a2
6970; RV64IA-NEXT:    slli a2, a0, 3
6971; RV64IA-NEXT:    andi a2, a2, 24
6972; RV64IA-NEXT:    sllw a1, a1, a2
6973; RV64IA-NEXT:    andi a0, a0, -4
6974; RV64IA-NEXT:    amoxor.w.rl a0, a1, (a0)
6975; RV64IA-NEXT:    srlw a0, a0, a2
6976; RV64IA-NEXT:    ret
6977  %1 = atomicrmw xor i16* %a, i16 %b release
6978  ret i16 %1
6979}
6980
6981define i16 @atomicrmw_xor_i16_acq_rel(i16 *%a, i16 %b) nounwind {
6982; RV32I-LABEL: atomicrmw_xor_i16_acq_rel:
6983; RV32I:       # %bb.0:
6984; RV32I-NEXT:    addi sp, sp, -16
6985; RV32I-NEXT:    sw ra, 12(sp)
6986; RV32I-NEXT:    addi a2, zero, 4
6987; RV32I-NEXT:    call __atomic_fetch_xor_2
6988; RV32I-NEXT:    lw ra, 12(sp)
6989; RV32I-NEXT:    addi sp, sp, 16
6990; RV32I-NEXT:    ret
6991;
6992; RV32IA-LABEL: atomicrmw_xor_i16_acq_rel:
6993; RV32IA:       # %bb.0:
6994; RV32IA-NEXT:    lui a2, 16
6995; RV32IA-NEXT:    addi a2, a2, -1
6996; RV32IA-NEXT:    and a1, a1, a2
6997; RV32IA-NEXT:    slli a2, a0, 3
6998; RV32IA-NEXT:    andi a2, a2, 24
6999; RV32IA-NEXT:    sll a1, a1, a2
7000; RV32IA-NEXT:    andi a0, a0, -4
7001; RV32IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
7002; RV32IA-NEXT:    srl a0, a0, a2
7003; RV32IA-NEXT:    ret
7004;
7005; RV64I-LABEL: atomicrmw_xor_i16_acq_rel:
7006; RV64I:       # %bb.0:
7007; RV64I-NEXT:    addi sp, sp, -16
7008; RV64I-NEXT:    sd ra, 8(sp)
7009; RV64I-NEXT:    addi a2, zero, 4
7010; RV64I-NEXT:    call __atomic_fetch_xor_2
7011; RV64I-NEXT:    ld ra, 8(sp)
7012; RV64I-NEXT:    addi sp, sp, 16
7013; RV64I-NEXT:    ret
7014;
7015; RV64IA-LABEL: atomicrmw_xor_i16_acq_rel:
7016; RV64IA:       # %bb.0:
7017; RV64IA-NEXT:    lui a2, 16
7018; RV64IA-NEXT:    addiw a2, a2, -1
7019; RV64IA-NEXT:    and a1, a1, a2
7020; RV64IA-NEXT:    slli a2, a0, 3
7021; RV64IA-NEXT:    andi a2, a2, 24
7022; RV64IA-NEXT:    sllw a1, a1, a2
7023; RV64IA-NEXT:    andi a0, a0, -4
7024; RV64IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
7025; RV64IA-NEXT:    srlw a0, a0, a2
7026; RV64IA-NEXT:    ret
7027  %1 = atomicrmw xor i16* %a, i16 %b acq_rel
7028  ret i16 %1
7029}
7030
7031define i16 @atomicrmw_xor_i16_seq_cst(i16 *%a, i16 %b) nounwind {
7032; RV32I-LABEL: atomicrmw_xor_i16_seq_cst:
7033; RV32I:       # %bb.0:
7034; RV32I-NEXT:    addi sp, sp, -16
7035; RV32I-NEXT:    sw ra, 12(sp)
7036; RV32I-NEXT:    addi a2, zero, 5
7037; RV32I-NEXT:    call __atomic_fetch_xor_2
7038; RV32I-NEXT:    lw ra, 12(sp)
7039; RV32I-NEXT:    addi sp, sp, 16
7040; RV32I-NEXT:    ret
7041;
7042; RV32IA-LABEL: atomicrmw_xor_i16_seq_cst:
7043; RV32IA:       # %bb.0:
7044; RV32IA-NEXT:    lui a2, 16
7045; RV32IA-NEXT:    addi a2, a2, -1
7046; RV32IA-NEXT:    and a1, a1, a2
7047; RV32IA-NEXT:    slli a2, a0, 3
7048; RV32IA-NEXT:    andi a2, a2, 24
7049; RV32IA-NEXT:    sll a1, a1, a2
7050; RV32IA-NEXT:    andi a0, a0, -4
7051; RV32IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
7052; RV32IA-NEXT:    srl a0, a0, a2
7053; RV32IA-NEXT:    ret
7054;
7055; RV64I-LABEL: atomicrmw_xor_i16_seq_cst:
7056; RV64I:       # %bb.0:
7057; RV64I-NEXT:    addi sp, sp, -16
7058; RV64I-NEXT:    sd ra, 8(sp)
7059; RV64I-NEXT:    addi a2, zero, 5
7060; RV64I-NEXT:    call __atomic_fetch_xor_2
7061; RV64I-NEXT:    ld ra, 8(sp)
7062; RV64I-NEXT:    addi sp, sp, 16
7063; RV64I-NEXT:    ret
7064;
7065; RV64IA-LABEL: atomicrmw_xor_i16_seq_cst:
7066; RV64IA:       # %bb.0:
7067; RV64IA-NEXT:    lui a2, 16
7068; RV64IA-NEXT:    addiw a2, a2, -1
7069; RV64IA-NEXT:    and a1, a1, a2
7070; RV64IA-NEXT:    slli a2, a0, 3
7071; RV64IA-NEXT:    andi a2, a2, 24
7072; RV64IA-NEXT:    sllw a1, a1, a2
7073; RV64IA-NEXT:    andi a0, a0, -4
7074; RV64IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
7075; RV64IA-NEXT:    srlw a0, a0, a2
7076; RV64IA-NEXT:    ret
7077  %1 = atomicrmw xor i16* %a, i16 %b seq_cst
7078  ret i16 %1
7079}
7080
7081define i16 @atomicrmw_max_i16_monotonic(i16 *%a, i16 %b) nounwind {
7082; RV32I-LABEL: atomicrmw_max_i16_monotonic:
7083; RV32I:       # %bb.0:
7084; RV32I-NEXT:    addi sp, sp, -32
7085; RV32I-NEXT:    sw ra, 28(sp)
7086; RV32I-NEXT:    sw s0, 24(sp)
7087; RV32I-NEXT:    sw s1, 20(sp)
7088; RV32I-NEXT:    sw s2, 16(sp)
7089; RV32I-NEXT:    sw s3, 12(sp)
7090; RV32I-NEXT:    mv s2, a1
7091; RV32I-NEXT:    mv s1, a0
7092; RV32I-NEXT:    lhu a0, 0(a0)
7093; RV32I-NEXT:    slli a1, a1, 16
7094; RV32I-NEXT:    srai s0, a1, 16
7095; RV32I-NEXT:    addi s3, sp, 10
7096; RV32I-NEXT:  .LBB90_1: # %atomicrmw.start
7097; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
7098; RV32I-NEXT:    slli a1, a0, 16
7099; RV32I-NEXT:    srai a1, a1, 16
7100; RV32I-NEXT:    mv a2, a0
7101; RV32I-NEXT:    blt s0, a1, .LBB90_3
7102; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
7103; RV32I-NEXT:    # in Loop: Header=BB90_1 Depth=1
7104; RV32I-NEXT:    mv a2, s2
7105; RV32I-NEXT:  .LBB90_3: # %atomicrmw.start
7106; RV32I-NEXT:    # in Loop: Header=BB90_1 Depth=1
7107; RV32I-NEXT:    sh a0, 10(sp)
7108; RV32I-NEXT:    mv a0, s1
7109; RV32I-NEXT:    mv a1, s3
7110; RV32I-NEXT:    mv a3, zero
7111; RV32I-NEXT:    mv a4, zero
7112; RV32I-NEXT:    call __atomic_compare_exchange_2
7113; RV32I-NEXT:    mv a1, a0
7114; RV32I-NEXT:    lh a0, 10(sp)
7115; RV32I-NEXT:    beqz a1, .LBB90_1
7116; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
7117; RV32I-NEXT:    lw s3, 12(sp)
7118; RV32I-NEXT:    lw s2, 16(sp)
7119; RV32I-NEXT:    lw s1, 20(sp)
7120; RV32I-NEXT:    lw s0, 24(sp)
7121; RV32I-NEXT:    lw ra, 28(sp)
7122; RV32I-NEXT:    addi sp, sp, 32
7123; RV32I-NEXT:    ret
7124;
7125; RV32IA-LABEL: atomicrmw_max_i16_monotonic:
7126; RV32IA:       # %bb.0:
7127; RV32IA-NEXT:    slli a2, a0, 3
7128; RV32IA-NEXT:    andi a2, a2, 24
7129; RV32IA-NEXT:    addi a3, zero, 16
7130; RV32IA-NEXT:    sub a6, a3, a2
7131; RV32IA-NEXT:    lui a4, 16
7132; RV32IA-NEXT:    addi a4, a4, -1
7133; RV32IA-NEXT:    sll a7, a4, a2
7134; RV32IA-NEXT:    slli a1, a1, 16
7135; RV32IA-NEXT:    srai a1, a1, 16
7136; RV32IA-NEXT:    sll a1, a1, a2
7137; RV32IA-NEXT:    andi a0, a0, -4
7138; RV32IA-NEXT:  .LBB90_1: # =>This Inner Loop Header: Depth=1
7139; RV32IA-NEXT:    lr.w a5, (a0)
7140; RV32IA-NEXT:    and a4, a5, a7
7141; RV32IA-NEXT:    mv a3, a5
7142; RV32IA-NEXT:    sll a4, a4, a6
7143; RV32IA-NEXT:    sra a4, a4, a6
7144; RV32IA-NEXT:    bge a4, a1, .LBB90_3
7145; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB90_1 Depth=1
7146; RV32IA-NEXT:    xor a3, a5, a1
7147; RV32IA-NEXT:    and a3, a3, a7
7148; RV32IA-NEXT:    xor a3, a5, a3
7149; RV32IA-NEXT:  .LBB90_3: # in Loop: Header=BB90_1 Depth=1
7150; RV32IA-NEXT:    sc.w a3, a3, (a0)
7151; RV32IA-NEXT:    bnez a3, .LBB90_1
7152; RV32IA-NEXT:  # %bb.4:
7153; RV32IA-NEXT:    srl a0, a5, a2
7154; RV32IA-NEXT:    ret
7155;
7156; RV64I-LABEL: atomicrmw_max_i16_monotonic:
7157; RV64I:       # %bb.0:
7158; RV64I-NEXT:    addi sp, sp, -48
7159; RV64I-NEXT:    sd ra, 40(sp)
7160; RV64I-NEXT:    sd s0, 32(sp)
7161; RV64I-NEXT:    sd s1, 24(sp)
7162; RV64I-NEXT:    sd s2, 16(sp)
7163; RV64I-NEXT:    sd s3, 8(sp)
7164; RV64I-NEXT:    mv s2, a1
7165; RV64I-NEXT:    mv s1, a0
7166; RV64I-NEXT:    lhu a0, 0(a0)
7167; RV64I-NEXT:    slli a1, a1, 48
7168; RV64I-NEXT:    srai s0, a1, 48
7169; RV64I-NEXT:    addi s3, sp, 6
7170; RV64I-NEXT:  .LBB90_1: # %atomicrmw.start
7171; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
7172; RV64I-NEXT:    slli a1, a0, 48
7173; RV64I-NEXT:    srai a1, a1, 48
7174; RV64I-NEXT:    mv a2, a0
7175; RV64I-NEXT:    blt s0, a1, .LBB90_3
7176; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
7177; RV64I-NEXT:    # in Loop: Header=BB90_1 Depth=1
7178; RV64I-NEXT:    mv a2, s2
7179; RV64I-NEXT:  .LBB90_3: # %atomicrmw.start
7180; RV64I-NEXT:    # in Loop: Header=BB90_1 Depth=1
7181; RV64I-NEXT:    sh a0, 6(sp)
7182; RV64I-NEXT:    mv a0, s1
7183; RV64I-NEXT:    mv a1, s3
7184; RV64I-NEXT:    mv a3, zero
7185; RV64I-NEXT:    mv a4, zero
7186; RV64I-NEXT:    call __atomic_compare_exchange_2
7187; RV64I-NEXT:    mv a1, a0
7188; RV64I-NEXT:    lh a0, 6(sp)
7189; RV64I-NEXT:    beqz a1, .LBB90_1
7190; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
7191; RV64I-NEXT:    ld s3, 8(sp)
7192; RV64I-NEXT:    ld s2, 16(sp)
7193; RV64I-NEXT:    ld s1, 24(sp)
7194; RV64I-NEXT:    ld s0, 32(sp)
7195; RV64I-NEXT:    ld ra, 40(sp)
7196; RV64I-NEXT:    addi sp, sp, 48
7197; RV64I-NEXT:    ret
7198;
7199; RV64IA-LABEL: atomicrmw_max_i16_monotonic:
7200; RV64IA:       # %bb.0:
7201; RV64IA-NEXT:    slli a2, a0, 3
7202; RV64IA-NEXT:    andi a2, a2, 24
7203; RV64IA-NEXT:    addi a3, zero, 48
7204; RV64IA-NEXT:    sub a6, a3, a2
7205; RV64IA-NEXT:    lui a4, 16
7206; RV64IA-NEXT:    addiw a4, a4, -1
7207; RV64IA-NEXT:    sllw a7, a4, a2
7208; RV64IA-NEXT:    slli a1, a1, 48
7209; RV64IA-NEXT:    srai a1, a1, 48
7210; RV64IA-NEXT:    sllw a1, a1, a2
7211; RV64IA-NEXT:    andi a0, a0, -4
7212; RV64IA-NEXT:  .LBB90_1: # =>This Inner Loop Header: Depth=1
7213; RV64IA-NEXT:    lr.w a5, (a0)
7214; RV64IA-NEXT:    and a4, a5, a7
7215; RV64IA-NEXT:    mv a3, a5
7216; RV64IA-NEXT:    sll a4, a4, a6
7217; RV64IA-NEXT:    sra a4, a4, a6
7218; RV64IA-NEXT:    bge a4, a1, .LBB90_3
7219; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB90_1 Depth=1
7220; RV64IA-NEXT:    xor a3, a5, a1
7221; RV64IA-NEXT:    and a3, a3, a7
7222; RV64IA-NEXT:    xor a3, a5, a3
7223; RV64IA-NEXT:  .LBB90_3: # in Loop: Header=BB90_1 Depth=1
7224; RV64IA-NEXT:    sc.w a3, a3, (a0)
7225; RV64IA-NEXT:    bnez a3, .LBB90_1
7226; RV64IA-NEXT:  # %bb.4:
7227; RV64IA-NEXT:    srlw a0, a5, a2
7228; RV64IA-NEXT:    ret
7229  %1 = atomicrmw max i16* %a, i16 %b monotonic
7230  ret i16 %1
7231}
7232
7233define i16 @atomicrmw_max_i16_acquire(i16 *%a, i16 %b) nounwind {
7234; RV32I-LABEL: atomicrmw_max_i16_acquire:
7235; RV32I:       # %bb.0:
7236; RV32I-NEXT:    addi sp, sp, -32
7237; RV32I-NEXT:    sw ra, 28(sp)
7238; RV32I-NEXT:    sw s0, 24(sp)
7239; RV32I-NEXT:    sw s1, 20(sp)
7240; RV32I-NEXT:    sw s2, 16(sp)
7241; RV32I-NEXT:    sw s3, 12(sp)
7242; RV32I-NEXT:    mv s2, a1
7243; RV32I-NEXT:    mv s1, a0
7244; RV32I-NEXT:    lhu a0, 0(a0)
7245; RV32I-NEXT:    slli a1, a1, 16
7246; RV32I-NEXT:    srai s0, a1, 16
7247; RV32I-NEXT:    addi s3, sp, 10
7248; RV32I-NEXT:  .LBB91_1: # %atomicrmw.start
7249; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
7250; RV32I-NEXT:    slli a1, a0, 16
7251; RV32I-NEXT:    srai a1, a1, 16
7252; RV32I-NEXT:    mv a2, a0
7253; RV32I-NEXT:    blt s0, a1, .LBB91_3
7254; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
7255; RV32I-NEXT:    # in Loop: Header=BB91_1 Depth=1
7256; RV32I-NEXT:    mv a2, s2
7257; RV32I-NEXT:  .LBB91_3: # %atomicrmw.start
7258; RV32I-NEXT:    # in Loop: Header=BB91_1 Depth=1
7259; RV32I-NEXT:    sh a0, 10(sp)
7260; RV32I-NEXT:    mv a0, s1
7261; RV32I-NEXT:    mv a1, s3
7262; RV32I-NEXT:    addi a3, zero, 2
7263; RV32I-NEXT:    addi a4, zero, 2
7264; RV32I-NEXT:    call __atomic_compare_exchange_2
7265; RV32I-NEXT:    mv a1, a0
7266; RV32I-NEXT:    lh a0, 10(sp)
7267; RV32I-NEXT:    beqz a1, .LBB91_1
7268; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
7269; RV32I-NEXT:    lw s3, 12(sp)
7270; RV32I-NEXT:    lw s2, 16(sp)
7271; RV32I-NEXT:    lw s1, 20(sp)
7272; RV32I-NEXT:    lw s0, 24(sp)
7273; RV32I-NEXT:    lw ra, 28(sp)
7274; RV32I-NEXT:    addi sp, sp, 32
7275; RV32I-NEXT:    ret
7276;
7277; RV32IA-LABEL: atomicrmw_max_i16_acquire:
7278; RV32IA:       # %bb.0:
7279; RV32IA-NEXT:    slli a2, a0, 3
7280; RV32IA-NEXT:    andi a2, a2, 24
7281; RV32IA-NEXT:    addi a3, zero, 16
7282; RV32IA-NEXT:    sub a6, a3, a2
7283; RV32IA-NEXT:    lui a4, 16
7284; RV32IA-NEXT:    addi a4, a4, -1
7285; RV32IA-NEXT:    sll a7, a4, a2
7286; RV32IA-NEXT:    slli a1, a1, 16
7287; RV32IA-NEXT:    srai a1, a1, 16
7288; RV32IA-NEXT:    sll a1, a1, a2
7289; RV32IA-NEXT:    andi a0, a0, -4
7290; RV32IA-NEXT:  .LBB91_1: # =>This Inner Loop Header: Depth=1
7291; RV32IA-NEXT:    lr.w.aq a5, (a0)
7292; RV32IA-NEXT:    and a4, a5, a7
7293; RV32IA-NEXT:    mv a3, a5
7294; RV32IA-NEXT:    sll a4, a4, a6
7295; RV32IA-NEXT:    sra a4, a4, a6
7296; RV32IA-NEXT:    bge a4, a1, .LBB91_3
7297; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB91_1 Depth=1
7298; RV32IA-NEXT:    xor a3, a5, a1
7299; RV32IA-NEXT:    and a3, a3, a7
7300; RV32IA-NEXT:    xor a3, a5, a3
7301; RV32IA-NEXT:  .LBB91_3: # in Loop: Header=BB91_1 Depth=1
7302; RV32IA-NEXT:    sc.w a3, a3, (a0)
7303; RV32IA-NEXT:    bnez a3, .LBB91_1
7304; RV32IA-NEXT:  # %bb.4:
7305; RV32IA-NEXT:    srl a0, a5, a2
7306; RV32IA-NEXT:    ret
7307;
7308; RV64I-LABEL: atomicrmw_max_i16_acquire:
7309; RV64I:       # %bb.0:
7310; RV64I-NEXT:    addi sp, sp, -48
7311; RV64I-NEXT:    sd ra, 40(sp)
7312; RV64I-NEXT:    sd s0, 32(sp)
7313; RV64I-NEXT:    sd s1, 24(sp)
7314; RV64I-NEXT:    sd s2, 16(sp)
7315; RV64I-NEXT:    sd s3, 8(sp)
7316; RV64I-NEXT:    mv s2, a1
7317; RV64I-NEXT:    mv s1, a0
7318; RV64I-NEXT:    lhu a0, 0(a0)
7319; RV64I-NEXT:    slli a1, a1, 48
7320; RV64I-NEXT:    srai s0, a1, 48
7321; RV64I-NEXT:    addi s3, sp, 6
7322; RV64I-NEXT:  .LBB91_1: # %atomicrmw.start
7323; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
7324; RV64I-NEXT:    slli a1, a0, 48
7325; RV64I-NEXT:    srai a1, a1, 48
7326; RV64I-NEXT:    mv a2, a0
7327; RV64I-NEXT:    blt s0, a1, .LBB91_3
7328; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
7329; RV64I-NEXT:    # in Loop: Header=BB91_1 Depth=1
7330; RV64I-NEXT:    mv a2, s2
7331; RV64I-NEXT:  .LBB91_3: # %atomicrmw.start
7332; RV64I-NEXT:    # in Loop: Header=BB91_1 Depth=1
7333; RV64I-NEXT:    sh a0, 6(sp)
7334; RV64I-NEXT:    mv a0, s1
7335; RV64I-NEXT:    mv a1, s3
7336; RV64I-NEXT:    addi a3, zero, 2
7337; RV64I-NEXT:    addi a4, zero, 2
7338; RV64I-NEXT:    call __atomic_compare_exchange_2
7339; RV64I-NEXT:    mv a1, a0
7340; RV64I-NEXT:    lh a0, 6(sp)
7341; RV64I-NEXT:    beqz a1, .LBB91_1
7342; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
7343; RV64I-NEXT:    ld s3, 8(sp)
7344; RV64I-NEXT:    ld s2, 16(sp)
7345; RV64I-NEXT:    ld s1, 24(sp)
7346; RV64I-NEXT:    ld s0, 32(sp)
7347; RV64I-NEXT:    ld ra, 40(sp)
7348; RV64I-NEXT:    addi sp, sp, 48
7349; RV64I-NEXT:    ret
7350;
7351; RV64IA-LABEL: atomicrmw_max_i16_acquire:
7352; RV64IA:       # %bb.0:
7353; RV64IA-NEXT:    slli a2, a0, 3
7354; RV64IA-NEXT:    andi a2, a2, 24
7355; RV64IA-NEXT:    addi a3, zero, 48
7356; RV64IA-NEXT:    sub a6, a3, a2
7357; RV64IA-NEXT:    lui a4, 16
7358; RV64IA-NEXT:    addiw a4, a4, -1
7359; RV64IA-NEXT:    sllw a7, a4, a2
7360; RV64IA-NEXT:    slli a1, a1, 48
7361; RV64IA-NEXT:    srai a1, a1, 48
7362; RV64IA-NEXT:    sllw a1, a1, a2
7363; RV64IA-NEXT:    andi a0, a0, -4
7364; RV64IA-NEXT:  .LBB91_1: # =>This Inner Loop Header: Depth=1
7365; RV64IA-NEXT:    lr.w.aq a5, (a0)
7366; RV64IA-NEXT:    and a4, a5, a7
7367; RV64IA-NEXT:    mv a3, a5
7368; RV64IA-NEXT:    sll a4, a4, a6
7369; RV64IA-NEXT:    sra a4, a4, a6
7370; RV64IA-NEXT:    bge a4, a1, .LBB91_3
7371; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB91_1 Depth=1
7372; RV64IA-NEXT:    xor a3, a5, a1
7373; RV64IA-NEXT:    and a3, a3, a7
7374; RV64IA-NEXT:    xor a3, a5, a3
7375; RV64IA-NEXT:  .LBB91_3: # in Loop: Header=BB91_1 Depth=1
7376; RV64IA-NEXT:    sc.w a3, a3, (a0)
7377; RV64IA-NEXT:    bnez a3, .LBB91_1
7378; RV64IA-NEXT:  # %bb.4:
7379; RV64IA-NEXT:    srlw a0, a5, a2
7380; RV64IA-NEXT:    ret
7381  %1 = atomicrmw max i16* %a, i16 %b acquire
7382  ret i16 %1
7383}
7384
7385define i16 @atomicrmw_max_i16_release(i16 *%a, i16 %b) nounwind {
7386; RV32I-LABEL: atomicrmw_max_i16_release:
7387; RV32I:       # %bb.0:
7388; RV32I-NEXT:    addi sp, sp, -32
7389; RV32I-NEXT:    sw ra, 28(sp)
7390; RV32I-NEXT:    sw s0, 24(sp)
7391; RV32I-NEXT:    sw s1, 20(sp)
7392; RV32I-NEXT:    sw s2, 16(sp)
7393; RV32I-NEXT:    sw s3, 12(sp)
7394; RV32I-NEXT:    mv s2, a1
7395; RV32I-NEXT:    mv s1, a0
7396; RV32I-NEXT:    lhu a0, 0(a0)
7397; RV32I-NEXT:    slli a1, a1, 16
7398; RV32I-NEXT:    srai s0, a1, 16
7399; RV32I-NEXT:    addi s3, sp, 10
7400; RV32I-NEXT:  .LBB92_1: # %atomicrmw.start
7401; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
7402; RV32I-NEXT:    slli a1, a0, 16
7403; RV32I-NEXT:    srai a1, a1, 16
7404; RV32I-NEXT:    mv a2, a0
7405; RV32I-NEXT:    blt s0, a1, .LBB92_3
7406; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
7407; RV32I-NEXT:    # in Loop: Header=BB92_1 Depth=1
7408; RV32I-NEXT:    mv a2, s2
7409; RV32I-NEXT:  .LBB92_3: # %atomicrmw.start
7410; RV32I-NEXT:    # in Loop: Header=BB92_1 Depth=1
7411; RV32I-NEXT:    sh a0, 10(sp)
7412; RV32I-NEXT:    mv a0, s1
7413; RV32I-NEXT:    mv a1, s3
7414; RV32I-NEXT:    addi a3, zero, 3
7415; RV32I-NEXT:    mv a4, zero
7416; RV32I-NEXT:    call __atomic_compare_exchange_2
7417; RV32I-NEXT:    mv a1, a0
7418; RV32I-NEXT:    lh a0, 10(sp)
7419; RV32I-NEXT:    beqz a1, .LBB92_1
7420; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
7421; RV32I-NEXT:    lw s3, 12(sp)
7422; RV32I-NEXT:    lw s2, 16(sp)
7423; RV32I-NEXT:    lw s1, 20(sp)
7424; RV32I-NEXT:    lw s0, 24(sp)
7425; RV32I-NEXT:    lw ra, 28(sp)
7426; RV32I-NEXT:    addi sp, sp, 32
7427; RV32I-NEXT:    ret
7428;
7429; RV32IA-LABEL: atomicrmw_max_i16_release:
7430; RV32IA:       # %bb.0:
7431; RV32IA-NEXT:    slli a2, a0, 3
7432; RV32IA-NEXT:    andi a2, a2, 24
7433; RV32IA-NEXT:    addi a3, zero, 16
7434; RV32IA-NEXT:    sub a6, a3, a2
7435; RV32IA-NEXT:    lui a4, 16
7436; RV32IA-NEXT:    addi a4, a4, -1
7437; RV32IA-NEXT:    sll a7, a4, a2
7438; RV32IA-NEXT:    slli a1, a1, 16
7439; RV32IA-NEXT:    srai a1, a1, 16
7440; RV32IA-NEXT:    sll a1, a1, a2
7441; RV32IA-NEXT:    andi a0, a0, -4
7442; RV32IA-NEXT:  .LBB92_1: # =>This Inner Loop Header: Depth=1
7443; RV32IA-NEXT:    lr.w a5, (a0)
7444; RV32IA-NEXT:    and a4, a5, a7
7445; RV32IA-NEXT:    mv a3, a5
7446; RV32IA-NEXT:    sll a4, a4, a6
7447; RV32IA-NEXT:    sra a4, a4, a6
7448; RV32IA-NEXT:    bge a4, a1, .LBB92_3
7449; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB92_1 Depth=1
7450; RV32IA-NEXT:    xor a3, a5, a1
7451; RV32IA-NEXT:    and a3, a3, a7
7452; RV32IA-NEXT:    xor a3, a5, a3
7453; RV32IA-NEXT:  .LBB92_3: # in Loop: Header=BB92_1 Depth=1
7454; RV32IA-NEXT:    sc.w.rl a3, a3, (a0)
7455; RV32IA-NEXT:    bnez a3, .LBB92_1
7456; RV32IA-NEXT:  # %bb.4:
7457; RV32IA-NEXT:    srl a0, a5, a2
7458; RV32IA-NEXT:    ret
7459;
7460; RV64I-LABEL: atomicrmw_max_i16_release:
7461; RV64I:       # %bb.0:
7462; RV64I-NEXT:    addi sp, sp, -48
7463; RV64I-NEXT:    sd ra, 40(sp)
7464; RV64I-NEXT:    sd s0, 32(sp)
7465; RV64I-NEXT:    sd s1, 24(sp)
7466; RV64I-NEXT:    sd s2, 16(sp)
7467; RV64I-NEXT:    sd s3, 8(sp)
7468; RV64I-NEXT:    mv s2, a1
7469; RV64I-NEXT:    mv s1, a0
7470; RV64I-NEXT:    lhu a0, 0(a0)
7471; RV64I-NEXT:    slli a1, a1, 48
7472; RV64I-NEXT:    srai s0, a1, 48
7473; RV64I-NEXT:    addi s3, sp, 6
7474; RV64I-NEXT:  .LBB92_1: # %atomicrmw.start
7475; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
7476; RV64I-NEXT:    slli a1, a0, 48
7477; RV64I-NEXT:    srai a1, a1, 48
7478; RV64I-NEXT:    mv a2, a0
7479; RV64I-NEXT:    blt s0, a1, .LBB92_3
7480; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
7481; RV64I-NEXT:    # in Loop: Header=BB92_1 Depth=1
7482; RV64I-NEXT:    mv a2, s2
7483; RV64I-NEXT:  .LBB92_3: # %atomicrmw.start
7484; RV64I-NEXT:    # in Loop: Header=BB92_1 Depth=1
7485; RV64I-NEXT:    sh a0, 6(sp)
7486; RV64I-NEXT:    mv a0, s1
7487; RV64I-NEXT:    mv a1, s3
7488; RV64I-NEXT:    addi a3, zero, 3
7489; RV64I-NEXT:    mv a4, zero
7490; RV64I-NEXT:    call __atomic_compare_exchange_2
7491; RV64I-NEXT:    mv a1, a0
7492; RV64I-NEXT:    lh a0, 6(sp)
7493; RV64I-NEXT:    beqz a1, .LBB92_1
7494; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
7495; RV64I-NEXT:    ld s3, 8(sp)
7496; RV64I-NEXT:    ld s2, 16(sp)
7497; RV64I-NEXT:    ld s1, 24(sp)
7498; RV64I-NEXT:    ld s0, 32(sp)
7499; RV64I-NEXT:    ld ra, 40(sp)
7500; RV64I-NEXT:    addi sp, sp, 48
7501; RV64I-NEXT:    ret
7502;
7503; RV64IA-LABEL: atomicrmw_max_i16_release:
7504; RV64IA:       # %bb.0:
7505; RV64IA-NEXT:    slli a2, a0, 3
7506; RV64IA-NEXT:    andi a2, a2, 24
7507; RV64IA-NEXT:    addi a3, zero, 48
7508; RV64IA-NEXT:    sub a6, a3, a2
7509; RV64IA-NEXT:    lui a4, 16
7510; RV64IA-NEXT:    addiw a4, a4, -1
7511; RV64IA-NEXT:    sllw a7, a4, a2
7512; RV64IA-NEXT:    slli a1, a1, 48
7513; RV64IA-NEXT:    srai a1, a1, 48
7514; RV64IA-NEXT:    sllw a1, a1, a2
7515; RV64IA-NEXT:    andi a0, a0, -4
7516; RV64IA-NEXT:  .LBB92_1: # =>This Inner Loop Header: Depth=1
7517; RV64IA-NEXT:    lr.w a5, (a0)
7518; RV64IA-NEXT:    and a4, a5, a7
7519; RV64IA-NEXT:    mv a3, a5
7520; RV64IA-NEXT:    sll a4, a4, a6
7521; RV64IA-NEXT:    sra a4, a4, a6
7522; RV64IA-NEXT:    bge a4, a1, .LBB92_3
7523; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB92_1 Depth=1
7524; RV64IA-NEXT:    xor a3, a5, a1
7525; RV64IA-NEXT:    and a3, a3, a7
7526; RV64IA-NEXT:    xor a3, a5, a3
7527; RV64IA-NEXT:  .LBB92_3: # in Loop: Header=BB92_1 Depth=1
7528; RV64IA-NEXT:    sc.w.rl a3, a3, (a0)
7529; RV64IA-NEXT:    bnez a3, .LBB92_1
7530; RV64IA-NEXT:  # %bb.4:
7531; RV64IA-NEXT:    srlw a0, a5, a2
7532; RV64IA-NEXT:    ret
7533  %1 = atomicrmw max i16* %a, i16 %b release
7534  ret i16 %1
7535}
7536
7537define i16 @atomicrmw_max_i16_acq_rel(i16 *%a, i16 %b) nounwind {
7538; RV32I-LABEL: atomicrmw_max_i16_acq_rel:
7539; RV32I:       # %bb.0:
7540; RV32I-NEXT:    addi sp, sp, -32
7541; RV32I-NEXT:    sw ra, 28(sp)
7542; RV32I-NEXT:    sw s0, 24(sp)
7543; RV32I-NEXT:    sw s1, 20(sp)
7544; RV32I-NEXT:    sw s2, 16(sp)
7545; RV32I-NEXT:    sw s3, 12(sp)
7546; RV32I-NEXT:    mv s2, a1
7547; RV32I-NEXT:    mv s1, a0
7548; RV32I-NEXT:    lhu a0, 0(a0)
7549; RV32I-NEXT:    slli a1, a1, 16
7550; RV32I-NEXT:    srai s0, a1, 16
7551; RV32I-NEXT:    addi s3, sp, 10
7552; RV32I-NEXT:  .LBB93_1: # %atomicrmw.start
7553; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
7554; RV32I-NEXT:    slli a1, a0, 16
7555; RV32I-NEXT:    srai a1, a1, 16
7556; RV32I-NEXT:    mv a2, a0
7557; RV32I-NEXT:    blt s0, a1, .LBB93_3
7558; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
7559; RV32I-NEXT:    # in Loop: Header=BB93_1 Depth=1
7560; RV32I-NEXT:    mv a2, s2
7561; RV32I-NEXT:  .LBB93_3: # %atomicrmw.start
7562; RV32I-NEXT:    # in Loop: Header=BB93_1 Depth=1
7563; RV32I-NEXT:    sh a0, 10(sp)
7564; RV32I-NEXT:    mv a0, s1
7565; RV32I-NEXT:    mv a1, s3
7566; RV32I-NEXT:    addi a3, zero, 4
7567; RV32I-NEXT:    addi a4, zero, 2
7568; RV32I-NEXT:    call __atomic_compare_exchange_2
7569; RV32I-NEXT:    mv a1, a0
7570; RV32I-NEXT:    lh a0, 10(sp)
7571; RV32I-NEXT:    beqz a1, .LBB93_1
7572; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
7573; RV32I-NEXT:    lw s3, 12(sp)
7574; RV32I-NEXT:    lw s2, 16(sp)
7575; RV32I-NEXT:    lw s1, 20(sp)
7576; RV32I-NEXT:    lw s0, 24(sp)
7577; RV32I-NEXT:    lw ra, 28(sp)
7578; RV32I-NEXT:    addi sp, sp, 32
7579; RV32I-NEXT:    ret
7580;
7581; RV32IA-LABEL: atomicrmw_max_i16_acq_rel:
7582; RV32IA:       # %bb.0:
7583; RV32IA-NEXT:    slli a2, a0, 3
7584; RV32IA-NEXT:    andi a2, a2, 24
7585; RV32IA-NEXT:    addi a3, zero, 16
7586; RV32IA-NEXT:    sub a6, a3, a2
7587; RV32IA-NEXT:    lui a4, 16
7588; RV32IA-NEXT:    addi a4, a4, -1
7589; RV32IA-NEXT:    sll a7, a4, a2
7590; RV32IA-NEXT:    slli a1, a1, 16
7591; RV32IA-NEXT:    srai a1, a1, 16
7592; RV32IA-NEXT:    sll a1, a1, a2
7593; RV32IA-NEXT:    andi a0, a0, -4
7594; RV32IA-NEXT:  .LBB93_1: # =>This Inner Loop Header: Depth=1
7595; RV32IA-NEXT:    lr.w.aq a5, (a0)
7596; RV32IA-NEXT:    and a4, a5, a7
7597; RV32IA-NEXT:    mv a3, a5
7598; RV32IA-NEXT:    sll a4, a4, a6
7599; RV32IA-NEXT:    sra a4, a4, a6
7600; RV32IA-NEXT:    bge a4, a1, .LBB93_3
7601; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB93_1 Depth=1
7602; RV32IA-NEXT:    xor a3, a5, a1
7603; RV32IA-NEXT:    and a3, a3, a7
7604; RV32IA-NEXT:    xor a3, a5, a3
7605; RV32IA-NEXT:  .LBB93_3: # in Loop: Header=BB93_1 Depth=1
7606; RV32IA-NEXT:    sc.w.rl a3, a3, (a0)
7607; RV32IA-NEXT:    bnez a3, .LBB93_1
7608; RV32IA-NEXT:  # %bb.4:
7609; RV32IA-NEXT:    srl a0, a5, a2
7610; RV32IA-NEXT:    ret
7611;
7612; RV64I-LABEL: atomicrmw_max_i16_acq_rel:
7613; RV64I:       # %bb.0:
7614; RV64I-NEXT:    addi sp, sp, -48
7615; RV64I-NEXT:    sd ra, 40(sp)
7616; RV64I-NEXT:    sd s0, 32(sp)
7617; RV64I-NEXT:    sd s1, 24(sp)
7618; RV64I-NEXT:    sd s2, 16(sp)
7619; RV64I-NEXT:    sd s3, 8(sp)
7620; RV64I-NEXT:    mv s2, a1
7621; RV64I-NEXT:    mv s1, a0
7622; RV64I-NEXT:    lhu a0, 0(a0)
7623; RV64I-NEXT:    slli a1, a1, 48
7624; RV64I-NEXT:    srai s0, a1, 48
7625; RV64I-NEXT:    addi s3, sp, 6
7626; RV64I-NEXT:  .LBB93_1: # %atomicrmw.start
7627; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
7628; RV64I-NEXT:    slli a1, a0, 48
7629; RV64I-NEXT:    srai a1, a1, 48
7630; RV64I-NEXT:    mv a2, a0
7631; RV64I-NEXT:    blt s0, a1, .LBB93_3
7632; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
7633; RV64I-NEXT:    # in Loop: Header=BB93_1 Depth=1
7634; RV64I-NEXT:    mv a2, s2
7635; RV64I-NEXT:  .LBB93_3: # %atomicrmw.start
7636; RV64I-NEXT:    # in Loop: Header=BB93_1 Depth=1
7637; RV64I-NEXT:    sh a0, 6(sp)
7638; RV64I-NEXT:    mv a0, s1
7639; RV64I-NEXT:    mv a1, s3
7640; RV64I-NEXT:    addi a3, zero, 4
7641; RV64I-NEXT:    addi a4, zero, 2
7642; RV64I-NEXT:    call __atomic_compare_exchange_2
7643; RV64I-NEXT:    mv a1, a0
7644; RV64I-NEXT:    lh a0, 6(sp)
7645; RV64I-NEXT:    beqz a1, .LBB93_1
7646; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
7647; RV64I-NEXT:    ld s3, 8(sp)
7648; RV64I-NEXT:    ld s2, 16(sp)
7649; RV64I-NEXT:    ld s1, 24(sp)
7650; RV64I-NEXT:    ld s0, 32(sp)
7651; RV64I-NEXT:    ld ra, 40(sp)
7652; RV64I-NEXT:    addi sp, sp, 48
7653; RV64I-NEXT:    ret
7654;
7655; RV64IA-LABEL: atomicrmw_max_i16_acq_rel:
7656; RV64IA:       # %bb.0:
7657; RV64IA-NEXT:    slli a2, a0, 3
7658; RV64IA-NEXT:    andi a2, a2, 24
7659; RV64IA-NEXT:    addi a3, zero, 48
7660; RV64IA-NEXT:    sub a6, a3, a2
7661; RV64IA-NEXT:    lui a4, 16
7662; RV64IA-NEXT:    addiw a4, a4, -1
7663; RV64IA-NEXT:    sllw a7, a4, a2
7664; RV64IA-NEXT:    slli a1, a1, 48
7665; RV64IA-NEXT:    srai a1, a1, 48
7666; RV64IA-NEXT:    sllw a1, a1, a2
7667; RV64IA-NEXT:    andi a0, a0, -4
7668; RV64IA-NEXT:  .LBB93_1: # =>This Inner Loop Header: Depth=1
7669; RV64IA-NEXT:    lr.w.aq a5, (a0)
7670; RV64IA-NEXT:    and a4, a5, a7
7671; RV64IA-NEXT:    mv a3, a5
7672; RV64IA-NEXT:    sll a4, a4, a6
7673; RV64IA-NEXT:    sra a4, a4, a6
7674; RV64IA-NEXT:    bge a4, a1, .LBB93_3
7675; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB93_1 Depth=1
7676; RV64IA-NEXT:    xor a3, a5, a1
7677; RV64IA-NEXT:    and a3, a3, a7
7678; RV64IA-NEXT:    xor a3, a5, a3
7679; RV64IA-NEXT:  .LBB93_3: # in Loop: Header=BB93_1 Depth=1
7680; RV64IA-NEXT:    sc.w.rl a3, a3, (a0)
7681; RV64IA-NEXT:    bnez a3, .LBB93_1
7682; RV64IA-NEXT:  # %bb.4:
7683; RV64IA-NEXT:    srlw a0, a5, a2
7684; RV64IA-NEXT:    ret
7685  %1 = atomicrmw max i16* %a, i16 %b acq_rel
7686  ret i16 %1
7687}
7688
7689define i16 @atomicrmw_max_i16_seq_cst(i16 *%a, i16 %b) nounwind {
7690; RV32I-LABEL: atomicrmw_max_i16_seq_cst:
7691; RV32I:       # %bb.0:
7692; RV32I-NEXT:    addi sp, sp, -32
7693; RV32I-NEXT:    sw ra, 28(sp)
7694; RV32I-NEXT:    sw s0, 24(sp)
7695; RV32I-NEXT:    sw s1, 20(sp)
7696; RV32I-NEXT:    sw s2, 16(sp)
7697; RV32I-NEXT:    sw s3, 12(sp)
7698; RV32I-NEXT:    mv s2, a1
7699; RV32I-NEXT:    mv s1, a0
7700; RV32I-NEXT:    lhu a0, 0(a0)
7701; RV32I-NEXT:    slli a1, a1, 16
7702; RV32I-NEXT:    srai s0, a1, 16
7703; RV32I-NEXT:    addi s3, sp, 10
7704; RV32I-NEXT:  .LBB94_1: # %atomicrmw.start
7705; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
7706; RV32I-NEXT:    slli a1, a0, 16
7707; RV32I-NEXT:    srai a1, a1, 16
7708; RV32I-NEXT:    mv a2, a0
7709; RV32I-NEXT:    blt s0, a1, .LBB94_3
7710; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
7711; RV32I-NEXT:    # in Loop: Header=BB94_1 Depth=1
7712; RV32I-NEXT:    mv a2, s2
7713; RV32I-NEXT:  .LBB94_3: # %atomicrmw.start
7714; RV32I-NEXT:    # in Loop: Header=BB94_1 Depth=1
7715; RV32I-NEXT:    sh a0, 10(sp)
7716; RV32I-NEXT:    mv a0, s1
7717; RV32I-NEXT:    mv a1, s3
7718; RV32I-NEXT:    addi a3, zero, 5
7719; RV32I-NEXT:    addi a4, zero, 5
7720; RV32I-NEXT:    call __atomic_compare_exchange_2
7721; RV32I-NEXT:    mv a1, a0
7722; RV32I-NEXT:    lh a0, 10(sp)
7723; RV32I-NEXT:    beqz a1, .LBB94_1
7724; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
7725; RV32I-NEXT:    lw s3, 12(sp)
7726; RV32I-NEXT:    lw s2, 16(sp)
7727; RV32I-NEXT:    lw s1, 20(sp)
7728; RV32I-NEXT:    lw s0, 24(sp)
7729; RV32I-NEXT:    lw ra, 28(sp)
7730; RV32I-NEXT:    addi sp, sp, 32
7731; RV32I-NEXT:    ret
7732;
7733; RV32IA-LABEL: atomicrmw_max_i16_seq_cst:
7734; RV32IA:       # %bb.0:
7735; RV32IA-NEXT:    slli a2, a0, 3
7736; RV32IA-NEXT:    andi a2, a2, 24
7737; RV32IA-NEXT:    addi a3, zero, 16
7738; RV32IA-NEXT:    sub a6, a3, a2
7739; RV32IA-NEXT:    lui a4, 16
7740; RV32IA-NEXT:    addi a4, a4, -1
7741; RV32IA-NEXT:    sll a7, a4, a2
7742; RV32IA-NEXT:    slli a1, a1, 16
7743; RV32IA-NEXT:    srai a1, a1, 16
7744; RV32IA-NEXT:    sll a1, a1, a2
7745; RV32IA-NEXT:    andi a0, a0, -4
7746; RV32IA-NEXT:  .LBB94_1: # =>This Inner Loop Header: Depth=1
7747; RV32IA-NEXT:    lr.w.aqrl a5, (a0)
7748; RV32IA-NEXT:    and a4, a5, a7
7749; RV32IA-NEXT:    mv a3, a5
7750; RV32IA-NEXT:    sll a4, a4, a6
7751; RV32IA-NEXT:    sra a4, a4, a6
7752; RV32IA-NEXT:    bge a4, a1, .LBB94_3
7753; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB94_1 Depth=1
7754; RV32IA-NEXT:    xor a3, a5, a1
7755; RV32IA-NEXT:    and a3, a3, a7
7756; RV32IA-NEXT:    xor a3, a5, a3
7757; RV32IA-NEXT:  .LBB94_3: # in Loop: Header=BB94_1 Depth=1
7758; RV32IA-NEXT:    sc.w.aqrl a3, a3, (a0)
7759; RV32IA-NEXT:    bnez a3, .LBB94_1
7760; RV32IA-NEXT:  # %bb.4:
7761; RV32IA-NEXT:    srl a0, a5, a2
7762; RV32IA-NEXT:    ret
7763;
7764; RV64I-LABEL: atomicrmw_max_i16_seq_cst:
7765; RV64I:       # %bb.0:
7766; RV64I-NEXT:    addi sp, sp, -48
7767; RV64I-NEXT:    sd ra, 40(sp)
7768; RV64I-NEXT:    sd s0, 32(sp)
7769; RV64I-NEXT:    sd s1, 24(sp)
7770; RV64I-NEXT:    sd s2, 16(sp)
7771; RV64I-NEXT:    sd s3, 8(sp)
7772; RV64I-NEXT:    mv s2, a1
7773; RV64I-NEXT:    mv s1, a0
7774; RV64I-NEXT:    lhu a0, 0(a0)
7775; RV64I-NEXT:    slli a1, a1, 48
7776; RV64I-NEXT:    srai s0, a1, 48
7777; RV64I-NEXT:    addi s3, sp, 6
7778; RV64I-NEXT:  .LBB94_1: # %atomicrmw.start
7779; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
7780; RV64I-NEXT:    slli a1, a0, 48
7781; RV64I-NEXT:    srai a1, a1, 48
7782; RV64I-NEXT:    mv a2, a0
7783; RV64I-NEXT:    blt s0, a1, .LBB94_3
7784; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
7785; RV64I-NEXT:    # in Loop: Header=BB94_1 Depth=1
7786; RV64I-NEXT:    mv a2, s2
7787; RV64I-NEXT:  .LBB94_3: # %atomicrmw.start
7788; RV64I-NEXT:    # in Loop: Header=BB94_1 Depth=1
7789; RV64I-NEXT:    sh a0, 6(sp)
7790; RV64I-NEXT:    mv a0, s1
7791; RV64I-NEXT:    mv a1, s3
7792; RV64I-NEXT:    addi a3, zero, 5
7793; RV64I-NEXT:    addi a4, zero, 5
7794; RV64I-NEXT:    call __atomic_compare_exchange_2
7795; RV64I-NEXT:    mv a1, a0
7796; RV64I-NEXT:    lh a0, 6(sp)
7797; RV64I-NEXT:    beqz a1, .LBB94_1
7798; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
7799; RV64I-NEXT:    ld s3, 8(sp)
7800; RV64I-NEXT:    ld s2, 16(sp)
7801; RV64I-NEXT:    ld s1, 24(sp)
7802; RV64I-NEXT:    ld s0, 32(sp)
7803; RV64I-NEXT:    ld ra, 40(sp)
7804; RV64I-NEXT:    addi sp, sp, 48
7805; RV64I-NEXT:    ret
7806;
7807; RV64IA-LABEL: atomicrmw_max_i16_seq_cst:
7808; RV64IA:       # %bb.0:
7809; RV64IA-NEXT:    slli a2, a0, 3
7810; RV64IA-NEXT:    andi a2, a2, 24
7811; RV64IA-NEXT:    addi a3, zero, 48
7812; RV64IA-NEXT:    sub a6, a3, a2
7813; RV64IA-NEXT:    lui a4, 16
7814; RV64IA-NEXT:    addiw a4, a4, -1
7815; RV64IA-NEXT:    sllw a7, a4, a2
7816; RV64IA-NEXT:    slli a1, a1, 48
7817; RV64IA-NEXT:    srai a1, a1, 48
7818; RV64IA-NEXT:    sllw a1, a1, a2
7819; RV64IA-NEXT:    andi a0, a0, -4
7820; RV64IA-NEXT:  .LBB94_1: # =>This Inner Loop Header: Depth=1
7821; RV64IA-NEXT:    lr.w.aqrl a5, (a0)
7822; RV64IA-NEXT:    and a4, a5, a7
7823; RV64IA-NEXT:    mv a3, a5
7824; RV64IA-NEXT:    sll a4, a4, a6
7825; RV64IA-NEXT:    sra a4, a4, a6
7826; RV64IA-NEXT:    bge a4, a1, .LBB94_3
7827; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB94_1 Depth=1
7828; RV64IA-NEXT:    xor a3, a5, a1
7829; RV64IA-NEXT:    and a3, a3, a7
7830; RV64IA-NEXT:    xor a3, a5, a3
7831; RV64IA-NEXT:  .LBB94_3: # in Loop: Header=BB94_1 Depth=1
7832; RV64IA-NEXT:    sc.w.aqrl a3, a3, (a0)
7833; RV64IA-NEXT:    bnez a3, .LBB94_1
7834; RV64IA-NEXT:  # %bb.4:
7835; RV64IA-NEXT:    srlw a0, a5, a2
7836; RV64IA-NEXT:    ret
7837  %1 = atomicrmw max i16* %a, i16 %b seq_cst
7838  ret i16 %1
7839}
7840
7841define i16 @atomicrmw_min_i16_monotonic(i16 *%a, i16 %b) nounwind {
7842; RV32I-LABEL: atomicrmw_min_i16_monotonic:
7843; RV32I:       # %bb.0:
7844; RV32I-NEXT:    addi sp, sp, -32
7845; RV32I-NEXT:    sw ra, 28(sp)
7846; RV32I-NEXT:    sw s0, 24(sp)
7847; RV32I-NEXT:    sw s1, 20(sp)
7848; RV32I-NEXT:    sw s2, 16(sp)
7849; RV32I-NEXT:    sw s3, 12(sp)
7850; RV32I-NEXT:    mv s2, a1
7851; RV32I-NEXT:    mv s1, a0
7852; RV32I-NEXT:    lhu a0, 0(a0)
7853; RV32I-NEXT:    slli a1, a1, 16
7854; RV32I-NEXT:    srai s0, a1, 16
7855; RV32I-NEXT:    addi s3, sp, 10
7856; RV32I-NEXT:  .LBB95_1: # %atomicrmw.start
7857; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
7858; RV32I-NEXT:    slli a1, a0, 16
7859; RV32I-NEXT:    srai a1, a1, 16
7860; RV32I-NEXT:    mv a2, a0
7861; RV32I-NEXT:    bge s0, a1, .LBB95_3
7862; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
7863; RV32I-NEXT:    # in Loop: Header=BB95_1 Depth=1
7864; RV32I-NEXT:    mv a2, s2
7865; RV32I-NEXT:  .LBB95_3: # %atomicrmw.start
7866; RV32I-NEXT:    # in Loop: Header=BB95_1 Depth=1
7867; RV32I-NEXT:    sh a0, 10(sp)
7868; RV32I-NEXT:    mv a0, s1
7869; RV32I-NEXT:    mv a1, s3
7870; RV32I-NEXT:    mv a3, zero
7871; RV32I-NEXT:    mv a4, zero
7872; RV32I-NEXT:    call __atomic_compare_exchange_2
7873; RV32I-NEXT:    mv a1, a0
7874; RV32I-NEXT:    lh a0, 10(sp)
7875; RV32I-NEXT:    beqz a1, .LBB95_1
7876; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
7877; RV32I-NEXT:    lw s3, 12(sp)
7878; RV32I-NEXT:    lw s2, 16(sp)
7879; RV32I-NEXT:    lw s1, 20(sp)
7880; RV32I-NEXT:    lw s0, 24(sp)
7881; RV32I-NEXT:    lw ra, 28(sp)
7882; RV32I-NEXT:    addi sp, sp, 32
7883; RV32I-NEXT:    ret
7884;
7885; RV32IA-LABEL: atomicrmw_min_i16_monotonic:
7886; RV32IA:       # %bb.0:
7887; RV32IA-NEXT:    slli a2, a0, 3
7888; RV32IA-NEXT:    andi a2, a2, 24
7889; RV32IA-NEXT:    addi a3, zero, 16
7890; RV32IA-NEXT:    sub a6, a3, a2
7891; RV32IA-NEXT:    lui a4, 16
7892; RV32IA-NEXT:    addi a4, a4, -1
7893; RV32IA-NEXT:    sll a7, a4, a2
7894; RV32IA-NEXT:    slli a1, a1, 16
7895; RV32IA-NEXT:    srai a1, a1, 16
7896; RV32IA-NEXT:    sll a1, a1, a2
7897; RV32IA-NEXT:    andi a0, a0, -4
7898; RV32IA-NEXT:  .LBB95_1: # =>This Inner Loop Header: Depth=1
7899; RV32IA-NEXT:    lr.w a5, (a0)
7900; RV32IA-NEXT:    and a4, a5, a7
7901; RV32IA-NEXT:    mv a3, a5
7902; RV32IA-NEXT:    sll a4, a4, a6
7903; RV32IA-NEXT:    sra a4, a4, a6
7904; RV32IA-NEXT:    bge a1, a4, .LBB95_3
7905; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB95_1 Depth=1
7906; RV32IA-NEXT:    xor a3, a5, a1
7907; RV32IA-NEXT:    and a3, a3, a7
7908; RV32IA-NEXT:    xor a3, a5, a3
7909; RV32IA-NEXT:  .LBB95_3: # in Loop: Header=BB95_1 Depth=1
7910; RV32IA-NEXT:    sc.w a3, a3, (a0)
7911; RV32IA-NEXT:    bnez a3, .LBB95_1
7912; RV32IA-NEXT:  # %bb.4:
7913; RV32IA-NEXT:    srl a0, a5, a2
7914; RV32IA-NEXT:    ret
7915;
7916; RV64I-LABEL: atomicrmw_min_i16_monotonic:
7917; RV64I:       # %bb.0:
7918; RV64I-NEXT:    addi sp, sp, -48
7919; RV64I-NEXT:    sd ra, 40(sp)
7920; RV64I-NEXT:    sd s0, 32(sp)
7921; RV64I-NEXT:    sd s1, 24(sp)
7922; RV64I-NEXT:    sd s2, 16(sp)
7923; RV64I-NEXT:    sd s3, 8(sp)
7924; RV64I-NEXT:    mv s2, a1
7925; RV64I-NEXT:    mv s1, a0
7926; RV64I-NEXT:    lhu a0, 0(a0)
7927; RV64I-NEXT:    slli a1, a1, 48
7928; RV64I-NEXT:    srai s0, a1, 48
7929; RV64I-NEXT:    addi s3, sp, 6
7930; RV64I-NEXT:  .LBB95_1: # %atomicrmw.start
7931; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
7932; RV64I-NEXT:    slli a1, a0, 48
7933; RV64I-NEXT:    srai a1, a1, 48
7934; RV64I-NEXT:    mv a2, a0
7935; RV64I-NEXT:    bge s0, a1, .LBB95_3
7936; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
7937; RV64I-NEXT:    # in Loop: Header=BB95_1 Depth=1
7938; RV64I-NEXT:    mv a2, s2
7939; RV64I-NEXT:  .LBB95_3: # %atomicrmw.start
7940; RV64I-NEXT:    # in Loop: Header=BB95_1 Depth=1
7941; RV64I-NEXT:    sh a0, 6(sp)
7942; RV64I-NEXT:    mv a0, s1
7943; RV64I-NEXT:    mv a1, s3
7944; RV64I-NEXT:    mv a3, zero
7945; RV64I-NEXT:    mv a4, zero
7946; RV64I-NEXT:    call __atomic_compare_exchange_2
7947; RV64I-NEXT:    mv a1, a0
7948; RV64I-NEXT:    lh a0, 6(sp)
7949; RV64I-NEXT:    beqz a1, .LBB95_1
7950; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
7951; RV64I-NEXT:    ld s3, 8(sp)
7952; RV64I-NEXT:    ld s2, 16(sp)
7953; RV64I-NEXT:    ld s1, 24(sp)
7954; RV64I-NEXT:    ld s0, 32(sp)
7955; RV64I-NEXT:    ld ra, 40(sp)
7956; RV64I-NEXT:    addi sp, sp, 48
7957; RV64I-NEXT:    ret
7958;
7959; RV64IA-LABEL: atomicrmw_min_i16_monotonic:
7960; RV64IA:       # %bb.0:
7961; RV64IA-NEXT:    slli a2, a0, 3
7962; RV64IA-NEXT:    andi a2, a2, 24
7963; RV64IA-NEXT:    addi a3, zero, 48
7964; RV64IA-NEXT:    sub a6, a3, a2
7965; RV64IA-NEXT:    lui a4, 16
7966; RV64IA-NEXT:    addiw a4, a4, -1
7967; RV64IA-NEXT:    sllw a7, a4, a2
7968; RV64IA-NEXT:    slli a1, a1, 48
7969; RV64IA-NEXT:    srai a1, a1, 48
7970; RV64IA-NEXT:    sllw a1, a1, a2
7971; RV64IA-NEXT:    andi a0, a0, -4
7972; RV64IA-NEXT:  .LBB95_1: # =>This Inner Loop Header: Depth=1
7973; RV64IA-NEXT:    lr.w a5, (a0)
7974; RV64IA-NEXT:    and a4, a5, a7
7975; RV64IA-NEXT:    mv a3, a5
7976; RV64IA-NEXT:    sll a4, a4, a6
7977; RV64IA-NEXT:    sra a4, a4, a6
7978; RV64IA-NEXT:    bge a1, a4, .LBB95_3
7979; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB95_1 Depth=1
7980; RV64IA-NEXT:    xor a3, a5, a1
7981; RV64IA-NEXT:    and a3, a3, a7
7982; RV64IA-NEXT:    xor a3, a5, a3
7983; RV64IA-NEXT:  .LBB95_3: # in Loop: Header=BB95_1 Depth=1
7984; RV64IA-NEXT:    sc.w a3, a3, (a0)
7985; RV64IA-NEXT:    bnez a3, .LBB95_1
7986; RV64IA-NEXT:  # %bb.4:
7987; RV64IA-NEXT:    srlw a0, a5, a2
7988; RV64IA-NEXT:    ret
7989  %1 = atomicrmw min i16* %a, i16 %b monotonic
7990  ret i16 %1
7991}
7992
7993define i16 @atomicrmw_min_i16_acquire(i16 *%a, i16 %b) nounwind {
7994; RV32I-LABEL: atomicrmw_min_i16_acquire:
7995; RV32I:       # %bb.0:
7996; RV32I-NEXT:    addi sp, sp, -32
7997; RV32I-NEXT:    sw ra, 28(sp)
7998; RV32I-NEXT:    sw s0, 24(sp)
7999; RV32I-NEXT:    sw s1, 20(sp)
8000; RV32I-NEXT:    sw s2, 16(sp)
8001; RV32I-NEXT:    sw s3, 12(sp)
8002; RV32I-NEXT:    mv s2, a1
8003; RV32I-NEXT:    mv s1, a0
8004; RV32I-NEXT:    lhu a0, 0(a0)
8005; RV32I-NEXT:    slli a1, a1, 16
8006; RV32I-NEXT:    srai s0, a1, 16
8007; RV32I-NEXT:    addi s3, sp, 10
8008; RV32I-NEXT:  .LBB96_1: # %atomicrmw.start
8009; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
8010; RV32I-NEXT:    slli a1, a0, 16
8011; RV32I-NEXT:    srai a1, a1, 16
8012; RV32I-NEXT:    mv a2, a0
8013; RV32I-NEXT:    bge s0, a1, .LBB96_3
8014; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
8015; RV32I-NEXT:    # in Loop: Header=BB96_1 Depth=1
8016; RV32I-NEXT:    mv a2, s2
8017; RV32I-NEXT:  .LBB96_3: # %atomicrmw.start
8018; RV32I-NEXT:    # in Loop: Header=BB96_1 Depth=1
8019; RV32I-NEXT:    sh a0, 10(sp)
8020; RV32I-NEXT:    mv a0, s1
8021; RV32I-NEXT:    mv a1, s3
8022; RV32I-NEXT:    addi a3, zero, 2
8023; RV32I-NEXT:    addi a4, zero, 2
8024; RV32I-NEXT:    call __atomic_compare_exchange_2
8025; RV32I-NEXT:    mv a1, a0
8026; RV32I-NEXT:    lh a0, 10(sp)
8027; RV32I-NEXT:    beqz a1, .LBB96_1
8028; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
8029; RV32I-NEXT:    lw s3, 12(sp)
8030; RV32I-NEXT:    lw s2, 16(sp)
8031; RV32I-NEXT:    lw s1, 20(sp)
8032; RV32I-NEXT:    lw s0, 24(sp)
8033; RV32I-NEXT:    lw ra, 28(sp)
8034; RV32I-NEXT:    addi sp, sp, 32
8035; RV32I-NEXT:    ret
8036;
8037; RV32IA-LABEL: atomicrmw_min_i16_acquire:
8038; RV32IA:       # %bb.0:
8039; RV32IA-NEXT:    slli a2, a0, 3
8040; RV32IA-NEXT:    andi a2, a2, 24
8041; RV32IA-NEXT:    addi a3, zero, 16
8042; RV32IA-NEXT:    sub a6, a3, a2
8043; RV32IA-NEXT:    lui a4, 16
8044; RV32IA-NEXT:    addi a4, a4, -1
8045; RV32IA-NEXT:    sll a7, a4, a2
8046; RV32IA-NEXT:    slli a1, a1, 16
8047; RV32IA-NEXT:    srai a1, a1, 16
8048; RV32IA-NEXT:    sll a1, a1, a2
8049; RV32IA-NEXT:    andi a0, a0, -4
8050; RV32IA-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
8051; RV32IA-NEXT:    lr.w.aq a5, (a0)
8052; RV32IA-NEXT:    and a4, a5, a7
8053; RV32IA-NEXT:    mv a3, a5
8054; RV32IA-NEXT:    sll a4, a4, a6
8055; RV32IA-NEXT:    sra a4, a4, a6
8056; RV32IA-NEXT:    bge a1, a4, .LBB96_3
8057; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB96_1 Depth=1
8058; RV32IA-NEXT:    xor a3, a5, a1
8059; RV32IA-NEXT:    and a3, a3, a7
8060; RV32IA-NEXT:    xor a3, a5, a3
8061; RV32IA-NEXT:  .LBB96_3: # in Loop: Header=BB96_1 Depth=1
8062; RV32IA-NEXT:    sc.w a3, a3, (a0)
8063; RV32IA-NEXT:    bnez a3, .LBB96_1
8064; RV32IA-NEXT:  # %bb.4:
8065; RV32IA-NEXT:    srl a0, a5, a2
8066; RV32IA-NEXT:    ret
8067;
8068; RV64I-LABEL: atomicrmw_min_i16_acquire:
8069; RV64I:       # %bb.0:
8070; RV64I-NEXT:    addi sp, sp, -48
8071; RV64I-NEXT:    sd ra, 40(sp)
8072; RV64I-NEXT:    sd s0, 32(sp)
8073; RV64I-NEXT:    sd s1, 24(sp)
8074; RV64I-NEXT:    sd s2, 16(sp)
8075; RV64I-NEXT:    sd s3, 8(sp)
8076; RV64I-NEXT:    mv s2, a1
8077; RV64I-NEXT:    mv s1, a0
8078; RV64I-NEXT:    lhu a0, 0(a0)
8079; RV64I-NEXT:    slli a1, a1, 48
8080; RV64I-NEXT:    srai s0, a1, 48
8081; RV64I-NEXT:    addi s3, sp, 6
8082; RV64I-NEXT:  .LBB96_1: # %atomicrmw.start
8083; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
8084; RV64I-NEXT:    slli a1, a0, 48
8085; RV64I-NEXT:    srai a1, a1, 48
8086; RV64I-NEXT:    mv a2, a0
8087; RV64I-NEXT:    bge s0, a1, .LBB96_3
8088; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
8089; RV64I-NEXT:    # in Loop: Header=BB96_1 Depth=1
8090; RV64I-NEXT:    mv a2, s2
8091; RV64I-NEXT:  .LBB96_3: # %atomicrmw.start
8092; RV64I-NEXT:    # in Loop: Header=BB96_1 Depth=1
8093; RV64I-NEXT:    sh a0, 6(sp)
8094; RV64I-NEXT:    mv a0, s1
8095; RV64I-NEXT:    mv a1, s3
8096; RV64I-NEXT:    addi a3, zero, 2
8097; RV64I-NEXT:    addi a4, zero, 2
8098; RV64I-NEXT:    call __atomic_compare_exchange_2
8099; RV64I-NEXT:    mv a1, a0
8100; RV64I-NEXT:    lh a0, 6(sp)
8101; RV64I-NEXT:    beqz a1, .LBB96_1
8102; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
8103; RV64I-NEXT:    ld s3, 8(sp)
8104; RV64I-NEXT:    ld s2, 16(sp)
8105; RV64I-NEXT:    ld s1, 24(sp)
8106; RV64I-NEXT:    ld s0, 32(sp)
8107; RV64I-NEXT:    ld ra, 40(sp)
8108; RV64I-NEXT:    addi sp, sp, 48
8109; RV64I-NEXT:    ret
8110;
8111; RV64IA-LABEL: atomicrmw_min_i16_acquire:
8112; RV64IA:       # %bb.0:
8113; RV64IA-NEXT:    slli a2, a0, 3
8114; RV64IA-NEXT:    andi a2, a2, 24
8115; RV64IA-NEXT:    addi a3, zero, 48
8116; RV64IA-NEXT:    sub a6, a3, a2
8117; RV64IA-NEXT:    lui a4, 16
8118; RV64IA-NEXT:    addiw a4, a4, -1
8119; RV64IA-NEXT:    sllw a7, a4, a2
8120; RV64IA-NEXT:    slli a1, a1, 48
8121; RV64IA-NEXT:    srai a1, a1, 48
8122; RV64IA-NEXT:    sllw a1, a1, a2
8123; RV64IA-NEXT:    andi a0, a0, -4
8124; RV64IA-NEXT:  .LBB96_1: # =>This Inner Loop Header: Depth=1
8125; RV64IA-NEXT:    lr.w.aq a5, (a0)
8126; RV64IA-NEXT:    and a4, a5, a7
8127; RV64IA-NEXT:    mv a3, a5
8128; RV64IA-NEXT:    sll a4, a4, a6
8129; RV64IA-NEXT:    sra a4, a4, a6
8130; RV64IA-NEXT:    bge a1, a4, .LBB96_3
8131; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB96_1 Depth=1
8132; RV64IA-NEXT:    xor a3, a5, a1
8133; RV64IA-NEXT:    and a3, a3, a7
8134; RV64IA-NEXT:    xor a3, a5, a3
8135; RV64IA-NEXT:  .LBB96_3: # in Loop: Header=BB96_1 Depth=1
8136; RV64IA-NEXT:    sc.w a3, a3, (a0)
8137; RV64IA-NEXT:    bnez a3, .LBB96_1
8138; RV64IA-NEXT:  # %bb.4:
8139; RV64IA-NEXT:    srlw a0, a5, a2
8140; RV64IA-NEXT:    ret
8141  %1 = atomicrmw min i16* %a, i16 %b acquire
8142  ret i16 %1
8143}
8144
8145define i16 @atomicrmw_min_i16_release(i16 *%a, i16 %b) nounwind {
8146; RV32I-LABEL: atomicrmw_min_i16_release:
8147; RV32I:       # %bb.0:
8148; RV32I-NEXT:    addi sp, sp, -32
8149; RV32I-NEXT:    sw ra, 28(sp)
8150; RV32I-NEXT:    sw s0, 24(sp)
8151; RV32I-NEXT:    sw s1, 20(sp)
8152; RV32I-NEXT:    sw s2, 16(sp)
8153; RV32I-NEXT:    sw s3, 12(sp)
8154; RV32I-NEXT:    mv s2, a1
8155; RV32I-NEXT:    mv s1, a0
8156; RV32I-NEXT:    lhu a0, 0(a0)
8157; RV32I-NEXT:    slli a1, a1, 16
8158; RV32I-NEXT:    srai s0, a1, 16
8159; RV32I-NEXT:    addi s3, sp, 10
8160; RV32I-NEXT:  .LBB97_1: # %atomicrmw.start
8161; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
8162; RV32I-NEXT:    slli a1, a0, 16
8163; RV32I-NEXT:    srai a1, a1, 16
8164; RV32I-NEXT:    mv a2, a0
8165; RV32I-NEXT:    bge s0, a1, .LBB97_3
8166; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
8167; RV32I-NEXT:    # in Loop: Header=BB97_1 Depth=1
8168; RV32I-NEXT:    mv a2, s2
8169; RV32I-NEXT:  .LBB97_3: # %atomicrmw.start
8170; RV32I-NEXT:    # in Loop: Header=BB97_1 Depth=1
8171; RV32I-NEXT:    sh a0, 10(sp)
8172; RV32I-NEXT:    mv a0, s1
8173; RV32I-NEXT:    mv a1, s3
8174; RV32I-NEXT:    addi a3, zero, 3
8175; RV32I-NEXT:    mv a4, zero
8176; RV32I-NEXT:    call __atomic_compare_exchange_2
8177; RV32I-NEXT:    mv a1, a0
8178; RV32I-NEXT:    lh a0, 10(sp)
8179; RV32I-NEXT:    beqz a1, .LBB97_1
8180; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
8181; RV32I-NEXT:    lw s3, 12(sp)
8182; RV32I-NEXT:    lw s2, 16(sp)
8183; RV32I-NEXT:    lw s1, 20(sp)
8184; RV32I-NEXT:    lw s0, 24(sp)
8185; RV32I-NEXT:    lw ra, 28(sp)
8186; RV32I-NEXT:    addi sp, sp, 32
8187; RV32I-NEXT:    ret
8188;
8189; RV32IA-LABEL: atomicrmw_min_i16_release:
8190; RV32IA:       # %bb.0:
8191; RV32IA-NEXT:    slli a2, a0, 3
8192; RV32IA-NEXT:    andi a2, a2, 24
8193; RV32IA-NEXT:    addi a3, zero, 16
8194; RV32IA-NEXT:    sub a6, a3, a2
8195; RV32IA-NEXT:    lui a4, 16
8196; RV32IA-NEXT:    addi a4, a4, -1
8197; RV32IA-NEXT:    sll a7, a4, a2
8198; RV32IA-NEXT:    slli a1, a1, 16
8199; RV32IA-NEXT:    srai a1, a1, 16
8200; RV32IA-NEXT:    sll a1, a1, a2
8201; RV32IA-NEXT:    andi a0, a0, -4
8202; RV32IA-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
8203; RV32IA-NEXT:    lr.w a5, (a0)
8204; RV32IA-NEXT:    and a4, a5, a7
8205; RV32IA-NEXT:    mv a3, a5
8206; RV32IA-NEXT:    sll a4, a4, a6
8207; RV32IA-NEXT:    sra a4, a4, a6
8208; RV32IA-NEXT:    bge a1, a4, .LBB97_3
8209; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB97_1 Depth=1
8210; RV32IA-NEXT:    xor a3, a5, a1
8211; RV32IA-NEXT:    and a3, a3, a7
8212; RV32IA-NEXT:    xor a3, a5, a3
8213; RV32IA-NEXT:  .LBB97_3: # in Loop: Header=BB97_1 Depth=1
8214; RV32IA-NEXT:    sc.w.rl a3, a3, (a0)
8215; RV32IA-NEXT:    bnez a3, .LBB97_1
8216; RV32IA-NEXT:  # %bb.4:
8217; RV32IA-NEXT:    srl a0, a5, a2
8218; RV32IA-NEXT:    ret
8219;
8220; RV64I-LABEL: atomicrmw_min_i16_release:
8221; RV64I:       # %bb.0:
8222; RV64I-NEXT:    addi sp, sp, -48
8223; RV64I-NEXT:    sd ra, 40(sp)
8224; RV64I-NEXT:    sd s0, 32(sp)
8225; RV64I-NEXT:    sd s1, 24(sp)
8226; RV64I-NEXT:    sd s2, 16(sp)
8227; RV64I-NEXT:    sd s3, 8(sp)
8228; RV64I-NEXT:    mv s2, a1
8229; RV64I-NEXT:    mv s1, a0
8230; RV64I-NEXT:    lhu a0, 0(a0)
8231; RV64I-NEXT:    slli a1, a1, 48
8232; RV64I-NEXT:    srai s0, a1, 48
8233; RV64I-NEXT:    addi s3, sp, 6
8234; RV64I-NEXT:  .LBB97_1: # %atomicrmw.start
8235; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
8236; RV64I-NEXT:    slli a1, a0, 48
8237; RV64I-NEXT:    srai a1, a1, 48
8238; RV64I-NEXT:    mv a2, a0
8239; RV64I-NEXT:    bge s0, a1, .LBB97_3
8240; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
8241; RV64I-NEXT:    # in Loop: Header=BB97_1 Depth=1
8242; RV64I-NEXT:    mv a2, s2
8243; RV64I-NEXT:  .LBB97_3: # %atomicrmw.start
8244; RV64I-NEXT:    # in Loop: Header=BB97_1 Depth=1
8245; RV64I-NEXT:    sh a0, 6(sp)
8246; RV64I-NEXT:    mv a0, s1
8247; RV64I-NEXT:    mv a1, s3
8248; RV64I-NEXT:    addi a3, zero, 3
8249; RV64I-NEXT:    mv a4, zero
8250; RV64I-NEXT:    call __atomic_compare_exchange_2
8251; RV64I-NEXT:    mv a1, a0
8252; RV64I-NEXT:    lh a0, 6(sp)
8253; RV64I-NEXT:    beqz a1, .LBB97_1
8254; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
8255; RV64I-NEXT:    ld s3, 8(sp)
8256; RV64I-NEXT:    ld s2, 16(sp)
8257; RV64I-NEXT:    ld s1, 24(sp)
8258; RV64I-NEXT:    ld s0, 32(sp)
8259; RV64I-NEXT:    ld ra, 40(sp)
8260; RV64I-NEXT:    addi sp, sp, 48
8261; RV64I-NEXT:    ret
8262;
8263; RV64IA-LABEL: atomicrmw_min_i16_release:
8264; RV64IA:       # %bb.0:
8265; RV64IA-NEXT:    slli a2, a0, 3
8266; RV64IA-NEXT:    andi a2, a2, 24
8267; RV64IA-NEXT:    addi a3, zero, 48
8268; RV64IA-NEXT:    sub a6, a3, a2
8269; RV64IA-NEXT:    lui a4, 16
8270; RV64IA-NEXT:    addiw a4, a4, -1
8271; RV64IA-NEXT:    sllw a7, a4, a2
8272; RV64IA-NEXT:    slli a1, a1, 48
8273; RV64IA-NEXT:    srai a1, a1, 48
8274; RV64IA-NEXT:    sllw a1, a1, a2
8275; RV64IA-NEXT:    andi a0, a0, -4
8276; RV64IA-NEXT:  .LBB97_1: # =>This Inner Loop Header: Depth=1
8277; RV64IA-NEXT:    lr.w a5, (a0)
8278; RV64IA-NEXT:    and a4, a5, a7
8279; RV64IA-NEXT:    mv a3, a5
8280; RV64IA-NEXT:    sll a4, a4, a6
8281; RV64IA-NEXT:    sra a4, a4, a6
8282; RV64IA-NEXT:    bge a1, a4, .LBB97_3
8283; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB97_1 Depth=1
8284; RV64IA-NEXT:    xor a3, a5, a1
8285; RV64IA-NEXT:    and a3, a3, a7
8286; RV64IA-NEXT:    xor a3, a5, a3
8287; RV64IA-NEXT:  .LBB97_3: # in Loop: Header=BB97_1 Depth=1
8288; RV64IA-NEXT:    sc.w.rl a3, a3, (a0)
8289; RV64IA-NEXT:    bnez a3, .LBB97_1
8290; RV64IA-NEXT:  # %bb.4:
8291; RV64IA-NEXT:    srlw a0, a5, a2
8292; RV64IA-NEXT:    ret
8293  %1 = atomicrmw min i16* %a, i16 %b release
8294  ret i16 %1
8295}
8296
8297define i16 @atomicrmw_min_i16_acq_rel(i16 *%a, i16 %b) nounwind {
8298; RV32I-LABEL: atomicrmw_min_i16_acq_rel:
8299; RV32I:       # %bb.0:
8300; RV32I-NEXT:    addi sp, sp, -32
8301; RV32I-NEXT:    sw ra, 28(sp)
8302; RV32I-NEXT:    sw s0, 24(sp)
8303; RV32I-NEXT:    sw s1, 20(sp)
8304; RV32I-NEXT:    sw s2, 16(sp)
8305; RV32I-NEXT:    sw s3, 12(sp)
8306; RV32I-NEXT:    mv s2, a1
8307; RV32I-NEXT:    mv s1, a0
8308; RV32I-NEXT:    lhu a0, 0(a0)
8309; RV32I-NEXT:    slli a1, a1, 16
8310; RV32I-NEXT:    srai s0, a1, 16
8311; RV32I-NEXT:    addi s3, sp, 10
8312; RV32I-NEXT:  .LBB98_1: # %atomicrmw.start
8313; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
8314; RV32I-NEXT:    slli a1, a0, 16
8315; RV32I-NEXT:    srai a1, a1, 16
8316; RV32I-NEXT:    mv a2, a0
8317; RV32I-NEXT:    bge s0, a1, .LBB98_3
8318; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
8319; RV32I-NEXT:    # in Loop: Header=BB98_1 Depth=1
8320; RV32I-NEXT:    mv a2, s2
8321; RV32I-NEXT:  .LBB98_3: # %atomicrmw.start
8322; RV32I-NEXT:    # in Loop: Header=BB98_1 Depth=1
8323; RV32I-NEXT:    sh a0, 10(sp)
8324; RV32I-NEXT:    mv a0, s1
8325; RV32I-NEXT:    mv a1, s3
8326; RV32I-NEXT:    addi a3, zero, 4
8327; RV32I-NEXT:    addi a4, zero, 2
8328; RV32I-NEXT:    call __atomic_compare_exchange_2
8329; RV32I-NEXT:    mv a1, a0
8330; RV32I-NEXT:    lh a0, 10(sp)
8331; RV32I-NEXT:    beqz a1, .LBB98_1
8332; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
8333; RV32I-NEXT:    lw s3, 12(sp)
8334; RV32I-NEXT:    lw s2, 16(sp)
8335; RV32I-NEXT:    lw s1, 20(sp)
8336; RV32I-NEXT:    lw s0, 24(sp)
8337; RV32I-NEXT:    lw ra, 28(sp)
8338; RV32I-NEXT:    addi sp, sp, 32
8339; RV32I-NEXT:    ret
8340;
8341; RV32IA-LABEL: atomicrmw_min_i16_acq_rel:
8342; RV32IA:       # %bb.0:
8343; RV32IA-NEXT:    slli a2, a0, 3
8344; RV32IA-NEXT:    andi a2, a2, 24
8345; RV32IA-NEXT:    addi a3, zero, 16
8346; RV32IA-NEXT:    sub a6, a3, a2
8347; RV32IA-NEXT:    lui a4, 16
8348; RV32IA-NEXT:    addi a4, a4, -1
8349; RV32IA-NEXT:    sll a7, a4, a2
8350; RV32IA-NEXT:    slli a1, a1, 16
8351; RV32IA-NEXT:    srai a1, a1, 16
8352; RV32IA-NEXT:    sll a1, a1, a2
8353; RV32IA-NEXT:    andi a0, a0, -4
8354; RV32IA-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
8355; RV32IA-NEXT:    lr.w.aq a5, (a0)
8356; RV32IA-NEXT:    and a4, a5, a7
8357; RV32IA-NEXT:    mv a3, a5
8358; RV32IA-NEXT:    sll a4, a4, a6
8359; RV32IA-NEXT:    sra a4, a4, a6
8360; RV32IA-NEXT:    bge a1, a4, .LBB98_3
8361; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB98_1 Depth=1
8362; RV32IA-NEXT:    xor a3, a5, a1
8363; RV32IA-NEXT:    and a3, a3, a7
8364; RV32IA-NEXT:    xor a3, a5, a3
8365; RV32IA-NEXT:  .LBB98_3: # in Loop: Header=BB98_1 Depth=1
8366; RV32IA-NEXT:    sc.w.rl a3, a3, (a0)
8367; RV32IA-NEXT:    bnez a3, .LBB98_1
8368; RV32IA-NEXT:  # %bb.4:
8369; RV32IA-NEXT:    srl a0, a5, a2
8370; RV32IA-NEXT:    ret
8371;
8372; RV64I-LABEL: atomicrmw_min_i16_acq_rel:
8373; RV64I:       # %bb.0:
8374; RV64I-NEXT:    addi sp, sp, -48
8375; RV64I-NEXT:    sd ra, 40(sp)
8376; RV64I-NEXT:    sd s0, 32(sp)
8377; RV64I-NEXT:    sd s1, 24(sp)
8378; RV64I-NEXT:    sd s2, 16(sp)
8379; RV64I-NEXT:    sd s3, 8(sp)
8380; RV64I-NEXT:    mv s2, a1
8381; RV64I-NEXT:    mv s1, a0
8382; RV64I-NEXT:    lhu a0, 0(a0)
8383; RV64I-NEXT:    slli a1, a1, 48
8384; RV64I-NEXT:    srai s0, a1, 48
8385; RV64I-NEXT:    addi s3, sp, 6
8386; RV64I-NEXT:  .LBB98_1: # %atomicrmw.start
8387; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
8388; RV64I-NEXT:    slli a1, a0, 48
8389; RV64I-NEXT:    srai a1, a1, 48
8390; RV64I-NEXT:    mv a2, a0
8391; RV64I-NEXT:    bge s0, a1, .LBB98_3
8392; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
8393; RV64I-NEXT:    # in Loop: Header=BB98_1 Depth=1
8394; RV64I-NEXT:    mv a2, s2
8395; RV64I-NEXT:  .LBB98_3: # %atomicrmw.start
8396; RV64I-NEXT:    # in Loop: Header=BB98_1 Depth=1
8397; RV64I-NEXT:    sh a0, 6(sp)
8398; RV64I-NEXT:    mv a0, s1
8399; RV64I-NEXT:    mv a1, s3
8400; RV64I-NEXT:    addi a3, zero, 4
8401; RV64I-NEXT:    addi a4, zero, 2
8402; RV64I-NEXT:    call __atomic_compare_exchange_2
8403; RV64I-NEXT:    mv a1, a0
8404; RV64I-NEXT:    lh a0, 6(sp)
8405; RV64I-NEXT:    beqz a1, .LBB98_1
8406; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
8407; RV64I-NEXT:    ld s3, 8(sp)
8408; RV64I-NEXT:    ld s2, 16(sp)
8409; RV64I-NEXT:    ld s1, 24(sp)
8410; RV64I-NEXT:    ld s0, 32(sp)
8411; RV64I-NEXT:    ld ra, 40(sp)
8412; RV64I-NEXT:    addi sp, sp, 48
8413; RV64I-NEXT:    ret
8414;
8415; RV64IA-LABEL: atomicrmw_min_i16_acq_rel:
8416; RV64IA:       # %bb.0:
8417; RV64IA-NEXT:    slli a2, a0, 3
8418; RV64IA-NEXT:    andi a2, a2, 24
8419; RV64IA-NEXT:    addi a3, zero, 48
8420; RV64IA-NEXT:    sub a6, a3, a2
8421; RV64IA-NEXT:    lui a4, 16
8422; RV64IA-NEXT:    addiw a4, a4, -1
8423; RV64IA-NEXT:    sllw a7, a4, a2
8424; RV64IA-NEXT:    slli a1, a1, 48
8425; RV64IA-NEXT:    srai a1, a1, 48
8426; RV64IA-NEXT:    sllw a1, a1, a2
8427; RV64IA-NEXT:    andi a0, a0, -4
8428; RV64IA-NEXT:  .LBB98_1: # =>This Inner Loop Header: Depth=1
8429; RV64IA-NEXT:    lr.w.aq a5, (a0)
8430; RV64IA-NEXT:    and a4, a5, a7
8431; RV64IA-NEXT:    mv a3, a5
8432; RV64IA-NEXT:    sll a4, a4, a6
8433; RV64IA-NEXT:    sra a4, a4, a6
8434; RV64IA-NEXT:    bge a1, a4, .LBB98_3
8435; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB98_1 Depth=1
8436; RV64IA-NEXT:    xor a3, a5, a1
8437; RV64IA-NEXT:    and a3, a3, a7
8438; RV64IA-NEXT:    xor a3, a5, a3
8439; RV64IA-NEXT:  .LBB98_3: # in Loop: Header=BB98_1 Depth=1
8440; RV64IA-NEXT:    sc.w.rl a3, a3, (a0)
8441; RV64IA-NEXT:    bnez a3, .LBB98_1
8442; RV64IA-NEXT:  # %bb.4:
8443; RV64IA-NEXT:    srlw a0, a5, a2
8444; RV64IA-NEXT:    ret
8445  %1 = atomicrmw min i16* %a, i16 %b acq_rel
8446  ret i16 %1
8447}
8448
8449define i16 @atomicrmw_min_i16_seq_cst(i16 *%a, i16 %b) nounwind {
8450; RV32I-LABEL: atomicrmw_min_i16_seq_cst:
8451; RV32I:       # %bb.0:
8452; RV32I-NEXT:    addi sp, sp, -32
8453; RV32I-NEXT:    sw ra, 28(sp)
8454; RV32I-NEXT:    sw s0, 24(sp)
8455; RV32I-NEXT:    sw s1, 20(sp)
8456; RV32I-NEXT:    sw s2, 16(sp)
8457; RV32I-NEXT:    sw s3, 12(sp)
8458; RV32I-NEXT:    mv s2, a1
8459; RV32I-NEXT:    mv s1, a0
8460; RV32I-NEXT:    lhu a0, 0(a0)
8461; RV32I-NEXT:    slli a1, a1, 16
8462; RV32I-NEXT:    srai s0, a1, 16
8463; RV32I-NEXT:    addi s3, sp, 10
8464; RV32I-NEXT:  .LBB99_1: # %atomicrmw.start
8465; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
8466; RV32I-NEXT:    slli a1, a0, 16
8467; RV32I-NEXT:    srai a1, a1, 16
8468; RV32I-NEXT:    mv a2, a0
8469; RV32I-NEXT:    bge s0, a1, .LBB99_3
8470; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
8471; RV32I-NEXT:    # in Loop: Header=BB99_1 Depth=1
8472; RV32I-NEXT:    mv a2, s2
8473; RV32I-NEXT:  .LBB99_3: # %atomicrmw.start
8474; RV32I-NEXT:    # in Loop: Header=BB99_1 Depth=1
8475; RV32I-NEXT:    sh a0, 10(sp)
8476; RV32I-NEXT:    mv a0, s1
8477; RV32I-NEXT:    mv a1, s3
8478; RV32I-NEXT:    addi a3, zero, 5
8479; RV32I-NEXT:    addi a4, zero, 5
8480; RV32I-NEXT:    call __atomic_compare_exchange_2
8481; RV32I-NEXT:    mv a1, a0
8482; RV32I-NEXT:    lh a0, 10(sp)
8483; RV32I-NEXT:    beqz a1, .LBB99_1
8484; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
8485; RV32I-NEXT:    lw s3, 12(sp)
8486; RV32I-NEXT:    lw s2, 16(sp)
8487; RV32I-NEXT:    lw s1, 20(sp)
8488; RV32I-NEXT:    lw s0, 24(sp)
8489; RV32I-NEXT:    lw ra, 28(sp)
8490; RV32I-NEXT:    addi sp, sp, 32
8491; RV32I-NEXT:    ret
8492;
8493; RV32IA-LABEL: atomicrmw_min_i16_seq_cst:
8494; RV32IA:       # %bb.0:
8495; RV32IA-NEXT:    slli a2, a0, 3
8496; RV32IA-NEXT:    andi a2, a2, 24
8497; RV32IA-NEXT:    addi a3, zero, 16
8498; RV32IA-NEXT:    sub a6, a3, a2
8499; RV32IA-NEXT:    lui a4, 16
8500; RV32IA-NEXT:    addi a4, a4, -1
8501; RV32IA-NEXT:    sll a7, a4, a2
8502; RV32IA-NEXT:    slli a1, a1, 16
8503; RV32IA-NEXT:    srai a1, a1, 16
8504; RV32IA-NEXT:    sll a1, a1, a2
8505; RV32IA-NEXT:    andi a0, a0, -4
8506; RV32IA-NEXT:  .LBB99_1: # =>This Inner Loop Header: Depth=1
8507; RV32IA-NEXT:    lr.w.aqrl a5, (a0)
8508; RV32IA-NEXT:    and a4, a5, a7
8509; RV32IA-NEXT:    mv a3, a5
8510; RV32IA-NEXT:    sll a4, a4, a6
8511; RV32IA-NEXT:    sra a4, a4, a6
8512; RV32IA-NEXT:    bge a1, a4, .LBB99_3
8513; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB99_1 Depth=1
8514; RV32IA-NEXT:    xor a3, a5, a1
8515; RV32IA-NEXT:    and a3, a3, a7
8516; RV32IA-NEXT:    xor a3, a5, a3
8517; RV32IA-NEXT:  .LBB99_3: # in Loop: Header=BB99_1 Depth=1
8518; RV32IA-NEXT:    sc.w.aqrl a3, a3, (a0)
8519; RV32IA-NEXT:    bnez a3, .LBB99_1
8520; RV32IA-NEXT:  # %bb.4:
8521; RV32IA-NEXT:    srl a0, a5, a2
8522; RV32IA-NEXT:    ret
8523;
8524; RV64I-LABEL: atomicrmw_min_i16_seq_cst:
8525; RV64I:       # %bb.0:
8526; RV64I-NEXT:    addi sp, sp, -48
8527; RV64I-NEXT:    sd ra, 40(sp)
8528; RV64I-NEXT:    sd s0, 32(sp)
8529; RV64I-NEXT:    sd s1, 24(sp)
8530; RV64I-NEXT:    sd s2, 16(sp)
8531; RV64I-NEXT:    sd s3, 8(sp)
8532; RV64I-NEXT:    mv s2, a1
8533; RV64I-NEXT:    mv s1, a0
8534; RV64I-NEXT:    lhu a0, 0(a0)
8535; RV64I-NEXT:    slli a1, a1, 48
8536; RV64I-NEXT:    srai s0, a1, 48
8537; RV64I-NEXT:    addi s3, sp, 6
8538; RV64I-NEXT:  .LBB99_1: # %atomicrmw.start
8539; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
8540; RV64I-NEXT:    slli a1, a0, 48
8541; RV64I-NEXT:    srai a1, a1, 48
8542; RV64I-NEXT:    mv a2, a0
8543; RV64I-NEXT:    bge s0, a1, .LBB99_3
8544; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
8545; RV64I-NEXT:    # in Loop: Header=BB99_1 Depth=1
8546; RV64I-NEXT:    mv a2, s2
8547; RV64I-NEXT:  .LBB99_3: # %atomicrmw.start
8548; RV64I-NEXT:    # in Loop: Header=BB99_1 Depth=1
8549; RV64I-NEXT:    sh a0, 6(sp)
8550; RV64I-NEXT:    mv a0, s1
8551; RV64I-NEXT:    mv a1, s3
8552; RV64I-NEXT:    addi a3, zero, 5
8553; RV64I-NEXT:    addi a4, zero, 5
8554; RV64I-NEXT:    call __atomic_compare_exchange_2
8555; RV64I-NEXT:    mv a1, a0
8556; RV64I-NEXT:    lh a0, 6(sp)
8557; RV64I-NEXT:    beqz a1, .LBB99_1
8558; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
8559; RV64I-NEXT:    ld s3, 8(sp)
8560; RV64I-NEXT:    ld s2, 16(sp)
8561; RV64I-NEXT:    ld s1, 24(sp)
8562; RV64I-NEXT:    ld s0, 32(sp)
8563; RV64I-NEXT:    ld ra, 40(sp)
8564; RV64I-NEXT:    addi sp, sp, 48
8565; RV64I-NEXT:    ret
8566;
8567; RV64IA-LABEL: atomicrmw_min_i16_seq_cst:
8568; RV64IA:       # %bb.0:
8569; RV64IA-NEXT:    slli a2, a0, 3
8570; RV64IA-NEXT:    andi a2, a2, 24
8571; RV64IA-NEXT:    addi a3, zero, 48
8572; RV64IA-NEXT:    sub a6, a3, a2
8573; RV64IA-NEXT:    lui a4, 16
8574; RV64IA-NEXT:    addiw a4, a4, -1
8575; RV64IA-NEXT:    sllw a7, a4, a2
8576; RV64IA-NEXT:    slli a1, a1, 48
8577; RV64IA-NEXT:    srai a1, a1, 48
8578; RV64IA-NEXT:    sllw a1, a1, a2
8579; RV64IA-NEXT:    andi a0, a0, -4
8580; RV64IA-NEXT:  .LBB99_1: # =>This Inner Loop Header: Depth=1
8581; RV64IA-NEXT:    lr.w.aqrl a5, (a0)
8582; RV64IA-NEXT:    and a4, a5, a7
8583; RV64IA-NEXT:    mv a3, a5
8584; RV64IA-NEXT:    sll a4, a4, a6
8585; RV64IA-NEXT:    sra a4, a4, a6
8586; RV64IA-NEXT:    bge a1, a4, .LBB99_3
8587; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB99_1 Depth=1
8588; RV64IA-NEXT:    xor a3, a5, a1
8589; RV64IA-NEXT:    and a3, a3, a7
8590; RV64IA-NEXT:    xor a3, a5, a3
8591; RV64IA-NEXT:  .LBB99_3: # in Loop: Header=BB99_1 Depth=1
8592; RV64IA-NEXT:    sc.w.aqrl a3, a3, (a0)
8593; RV64IA-NEXT:    bnez a3, .LBB99_1
8594; RV64IA-NEXT:  # %bb.4:
8595; RV64IA-NEXT:    srlw a0, a5, a2
8596; RV64IA-NEXT:    ret
8597  %1 = atomicrmw min i16* %a, i16 %b seq_cst
8598  ret i16 %1
8599}
8600
8601define i16 @atomicrmw_umax_i16_monotonic(i16 *%a, i16 %b) nounwind {
8602; RV32I-LABEL: atomicrmw_umax_i16_monotonic:
8603; RV32I:       # %bb.0:
8604; RV32I-NEXT:    addi sp, sp, -32
8605; RV32I-NEXT:    sw ra, 28(sp)
8606; RV32I-NEXT:    sw s0, 24(sp)
8607; RV32I-NEXT:    sw s1, 20(sp)
8608; RV32I-NEXT:    sw s2, 16(sp)
8609; RV32I-NEXT:    sw s3, 12(sp)
8610; RV32I-NEXT:    sw s4, 8(sp)
8611; RV32I-NEXT:    mv s2, a1
8612; RV32I-NEXT:    mv s4, a0
8613; RV32I-NEXT:    lhu a0, 0(a0)
8614; RV32I-NEXT:    lui a1, 16
8615; RV32I-NEXT:    addi s0, a1, -1
8616; RV32I-NEXT:    and s1, s2, s0
8617; RV32I-NEXT:    addi s3, sp, 6
8618; RV32I-NEXT:  .LBB100_1: # %atomicrmw.start
8619; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
8620; RV32I-NEXT:    and a1, a0, s0
8621; RV32I-NEXT:    mv a2, a0
8622; RV32I-NEXT:    bltu s1, a1, .LBB100_3
8623; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
8624; RV32I-NEXT:    # in Loop: Header=BB100_1 Depth=1
8625; RV32I-NEXT:    mv a2, s2
8626; RV32I-NEXT:  .LBB100_3: # %atomicrmw.start
8627; RV32I-NEXT:    # in Loop: Header=BB100_1 Depth=1
8628; RV32I-NEXT:    sh a0, 6(sp)
8629; RV32I-NEXT:    mv a0, s4
8630; RV32I-NEXT:    mv a1, s3
8631; RV32I-NEXT:    mv a3, zero
8632; RV32I-NEXT:    mv a4, zero
8633; RV32I-NEXT:    call __atomic_compare_exchange_2
8634; RV32I-NEXT:    mv a1, a0
8635; RV32I-NEXT:    lh a0, 6(sp)
8636; RV32I-NEXT:    beqz a1, .LBB100_1
8637; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
8638; RV32I-NEXT:    lw s4, 8(sp)
8639; RV32I-NEXT:    lw s3, 12(sp)
8640; RV32I-NEXT:    lw s2, 16(sp)
8641; RV32I-NEXT:    lw s1, 20(sp)
8642; RV32I-NEXT:    lw s0, 24(sp)
8643; RV32I-NEXT:    lw ra, 28(sp)
8644; RV32I-NEXT:    addi sp, sp, 32
8645; RV32I-NEXT:    ret
8646;
8647; RV32IA-LABEL: atomicrmw_umax_i16_monotonic:
8648; RV32IA:       # %bb.0:
8649; RV32IA-NEXT:    lui a2, 16
8650; RV32IA-NEXT:    addi a2, a2, -1
8651; RV32IA-NEXT:    and a1, a1, a2
8652; RV32IA-NEXT:    slli a3, a0, 3
8653; RV32IA-NEXT:    andi a3, a3, 24
8654; RV32IA-NEXT:    sll a6, a2, a3
8655; RV32IA-NEXT:    sll a1, a1, a3
8656; RV32IA-NEXT:    andi a0, a0, -4
8657; RV32IA-NEXT:  .LBB100_1: # =>This Inner Loop Header: Depth=1
8658; RV32IA-NEXT:    lr.w a4, (a0)
8659; RV32IA-NEXT:    and a2, a4, a6
8660; RV32IA-NEXT:    mv a5, a4
8661; RV32IA-NEXT:    bgeu a2, a1, .LBB100_3
8662; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB100_1 Depth=1
8663; RV32IA-NEXT:    xor a5, a4, a1
8664; RV32IA-NEXT:    and a5, a5, a6
8665; RV32IA-NEXT:    xor a5, a4, a5
8666; RV32IA-NEXT:  .LBB100_3: # in Loop: Header=BB100_1 Depth=1
8667; RV32IA-NEXT:    sc.w a5, a5, (a0)
8668; RV32IA-NEXT:    bnez a5, .LBB100_1
8669; RV32IA-NEXT:  # %bb.4:
8670; RV32IA-NEXT:    srl a0, a4, a3
8671; RV32IA-NEXT:    ret
8672;
8673; RV64I-LABEL: atomicrmw_umax_i16_monotonic:
8674; RV64I:       # %bb.0:
8675; RV64I-NEXT:    addi sp, sp, -64
8676; RV64I-NEXT:    sd ra, 56(sp)
8677; RV64I-NEXT:    sd s0, 48(sp)
8678; RV64I-NEXT:    sd s1, 40(sp)
8679; RV64I-NEXT:    sd s2, 32(sp)
8680; RV64I-NEXT:    sd s3, 24(sp)
8681; RV64I-NEXT:    sd s4, 16(sp)
8682; RV64I-NEXT:    mv s2, a1
8683; RV64I-NEXT:    mv s4, a0
8684; RV64I-NEXT:    lhu a0, 0(a0)
8685; RV64I-NEXT:    lui a1, 16
8686; RV64I-NEXT:    addiw s0, a1, -1
8687; RV64I-NEXT:    and s1, s2, s0
8688; RV64I-NEXT:    addi s3, sp, 14
8689; RV64I-NEXT:  .LBB100_1: # %atomicrmw.start
8690; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
8691; RV64I-NEXT:    and a1, a0, s0
8692; RV64I-NEXT:    mv a2, a0
8693; RV64I-NEXT:    bltu s1, a1, .LBB100_3
8694; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
8695; RV64I-NEXT:    # in Loop: Header=BB100_1 Depth=1
8696; RV64I-NEXT:    mv a2, s2
8697; RV64I-NEXT:  .LBB100_3: # %atomicrmw.start
8698; RV64I-NEXT:    # in Loop: Header=BB100_1 Depth=1
8699; RV64I-NEXT:    sh a0, 14(sp)
8700; RV64I-NEXT:    mv a0, s4
8701; RV64I-NEXT:    mv a1, s3
8702; RV64I-NEXT:    mv a3, zero
8703; RV64I-NEXT:    mv a4, zero
8704; RV64I-NEXT:    call __atomic_compare_exchange_2
8705; RV64I-NEXT:    mv a1, a0
8706; RV64I-NEXT:    lh a0, 14(sp)
8707; RV64I-NEXT:    beqz a1, .LBB100_1
8708; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
8709; RV64I-NEXT:    ld s4, 16(sp)
8710; RV64I-NEXT:    ld s3, 24(sp)
8711; RV64I-NEXT:    ld s2, 32(sp)
8712; RV64I-NEXT:    ld s1, 40(sp)
8713; RV64I-NEXT:    ld s0, 48(sp)
8714; RV64I-NEXT:    ld ra, 56(sp)
8715; RV64I-NEXT:    addi sp, sp, 64
8716; RV64I-NEXT:    ret
8717;
8718; RV64IA-LABEL: atomicrmw_umax_i16_monotonic:
8719; RV64IA:       # %bb.0:
8720; RV64IA-NEXT:    lui a2, 16
8721; RV64IA-NEXT:    addiw a2, a2, -1
8722; RV64IA-NEXT:    and a1, a1, a2
8723; RV64IA-NEXT:    slli a3, a0, 3
8724; RV64IA-NEXT:    andi a3, a3, 24
8725; RV64IA-NEXT:    sllw a6, a2, a3
8726; RV64IA-NEXT:    sllw a1, a1, a3
8727; RV64IA-NEXT:    andi a0, a0, -4
8728; RV64IA-NEXT:  .LBB100_1: # =>This Inner Loop Header: Depth=1
8729; RV64IA-NEXT:    lr.w a4, (a0)
8730; RV64IA-NEXT:    and a2, a4, a6
8731; RV64IA-NEXT:    mv a5, a4
8732; RV64IA-NEXT:    bgeu a2, a1, .LBB100_3
8733; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB100_1 Depth=1
8734; RV64IA-NEXT:    xor a5, a4, a1
8735; RV64IA-NEXT:    and a5, a5, a6
8736; RV64IA-NEXT:    xor a5, a4, a5
8737; RV64IA-NEXT:  .LBB100_3: # in Loop: Header=BB100_1 Depth=1
8738; RV64IA-NEXT:    sc.w a5, a5, (a0)
8739; RV64IA-NEXT:    bnez a5, .LBB100_1
8740; RV64IA-NEXT:  # %bb.4:
8741; RV64IA-NEXT:    srlw a0, a4, a3
8742; RV64IA-NEXT:    ret
8743  %1 = atomicrmw umax i16* %a, i16 %b monotonic
8744  ret i16 %1
8745}
8746
8747define i16 @atomicrmw_umax_i16_acquire(i16 *%a, i16 %b) nounwind {
8748; RV32I-LABEL: atomicrmw_umax_i16_acquire:
8749; RV32I:       # %bb.0:
8750; RV32I-NEXT:    addi sp, sp, -32
8751; RV32I-NEXT:    sw ra, 28(sp)
8752; RV32I-NEXT:    sw s0, 24(sp)
8753; RV32I-NEXT:    sw s1, 20(sp)
8754; RV32I-NEXT:    sw s2, 16(sp)
8755; RV32I-NEXT:    sw s3, 12(sp)
8756; RV32I-NEXT:    sw s4, 8(sp)
8757; RV32I-NEXT:    mv s2, a1
8758; RV32I-NEXT:    mv s4, a0
8759; RV32I-NEXT:    lhu a0, 0(a0)
8760; RV32I-NEXT:    lui a1, 16
8761; RV32I-NEXT:    addi s0, a1, -1
8762; RV32I-NEXT:    and s1, s2, s0
8763; RV32I-NEXT:    addi s3, sp, 6
8764; RV32I-NEXT:  .LBB101_1: # %atomicrmw.start
8765; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
8766; RV32I-NEXT:    and a1, a0, s0
8767; RV32I-NEXT:    mv a2, a0
8768; RV32I-NEXT:    bltu s1, a1, .LBB101_3
8769; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
8770; RV32I-NEXT:    # in Loop: Header=BB101_1 Depth=1
8771; RV32I-NEXT:    mv a2, s2
8772; RV32I-NEXT:  .LBB101_3: # %atomicrmw.start
8773; RV32I-NEXT:    # in Loop: Header=BB101_1 Depth=1
8774; RV32I-NEXT:    sh a0, 6(sp)
8775; RV32I-NEXT:    mv a0, s4
8776; RV32I-NEXT:    mv a1, s3
8777; RV32I-NEXT:    addi a3, zero, 2
8778; RV32I-NEXT:    addi a4, zero, 2
8779; RV32I-NEXT:    call __atomic_compare_exchange_2
8780; RV32I-NEXT:    mv a1, a0
8781; RV32I-NEXT:    lh a0, 6(sp)
8782; RV32I-NEXT:    beqz a1, .LBB101_1
8783; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
8784; RV32I-NEXT:    lw s4, 8(sp)
8785; RV32I-NEXT:    lw s3, 12(sp)
8786; RV32I-NEXT:    lw s2, 16(sp)
8787; RV32I-NEXT:    lw s1, 20(sp)
8788; RV32I-NEXT:    lw s0, 24(sp)
8789; RV32I-NEXT:    lw ra, 28(sp)
8790; RV32I-NEXT:    addi sp, sp, 32
8791; RV32I-NEXT:    ret
8792;
8793; RV32IA-LABEL: atomicrmw_umax_i16_acquire:
8794; RV32IA:       # %bb.0:
8795; RV32IA-NEXT:    lui a2, 16
8796; RV32IA-NEXT:    addi a2, a2, -1
8797; RV32IA-NEXT:    and a1, a1, a2
8798; RV32IA-NEXT:    slli a3, a0, 3
8799; RV32IA-NEXT:    andi a3, a3, 24
8800; RV32IA-NEXT:    sll a6, a2, a3
8801; RV32IA-NEXT:    sll a1, a1, a3
8802; RV32IA-NEXT:    andi a0, a0, -4
8803; RV32IA-NEXT:  .LBB101_1: # =>This Inner Loop Header: Depth=1
8804; RV32IA-NEXT:    lr.w.aq a4, (a0)
8805; RV32IA-NEXT:    and a2, a4, a6
8806; RV32IA-NEXT:    mv a5, a4
8807; RV32IA-NEXT:    bgeu a2, a1, .LBB101_3
8808; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB101_1 Depth=1
8809; RV32IA-NEXT:    xor a5, a4, a1
8810; RV32IA-NEXT:    and a5, a5, a6
8811; RV32IA-NEXT:    xor a5, a4, a5
8812; RV32IA-NEXT:  .LBB101_3: # in Loop: Header=BB101_1 Depth=1
8813; RV32IA-NEXT:    sc.w a5, a5, (a0)
8814; RV32IA-NEXT:    bnez a5, .LBB101_1
8815; RV32IA-NEXT:  # %bb.4:
8816; RV32IA-NEXT:    srl a0, a4, a3
8817; RV32IA-NEXT:    ret
8818;
8819; RV64I-LABEL: atomicrmw_umax_i16_acquire:
8820; RV64I:       # %bb.0:
8821; RV64I-NEXT:    addi sp, sp, -64
8822; RV64I-NEXT:    sd ra, 56(sp)
8823; RV64I-NEXT:    sd s0, 48(sp)
8824; RV64I-NEXT:    sd s1, 40(sp)
8825; RV64I-NEXT:    sd s2, 32(sp)
8826; RV64I-NEXT:    sd s3, 24(sp)
8827; RV64I-NEXT:    sd s4, 16(sp)
8828; RV64I-NEXT:    mv s2, a1
8829; RV64I-NEXT:    mv s4, a0
8830; RV64I-NEXT:    lhu a0, 0(a0)
8831; RV64I-NEXT:    lui a1, 16
8832; RV64I-NEXT:    addiw s0, a1, -1
8833; RV64I-NEXT:    and s1, s2, s0
8834; RV64I-NEXT:    addi s3, sp, 14
8835; RV64I-NEXT:  .LBB101_1: # %atomicrmw.start
8836; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
8837; RV64I-NEXT:    and a1, a0, s0
8838; RV64I-NEXT:    mv a2, a0
8839; RV64I-NEXT:    bltu s1, a1, .LBB101_3
8840; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
8841; RV64I-NEXT:    # in Loop: Header=BB101_1 Depth=1
8842; RV64I-NEXT:    mv a2, s2
8843; RV64I-NEXT:  .LBB101_3: # %atomicrmw.start
8844; RV64I-NEXT:    # in Loop: Header=BB101_1 Depth=1
8845; RV64I-NEXT:    sh a0, 14(sp)
8846; RV64I-NEXT:    mv a0, s4
8847; RV64I-NEXT:    mv a1, s3
8848; RV64I-NEXT:    addi a3, zero, 2
8849; RV64I-NEXT:    addi a4, zero, 2
8850; RV64I-NEXT:    call __atomic_compare_exchange_2
8851; RV64I-NEXT:    mv a1, a0
8852; RV64I-NEXT:    lh a0, 14(sp)
8853; RV64I-NEXT:    beqz a1, .LBB101_1
8854; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
8855; RV64I-NEXT:    ld s4, 16(sp)
8856; RV64I-NEXT:    ld s3, 24(sp)
8857; RV64I-NEXT:    ld s2, 32(sp)
8858; RV64I-NEXT:    ld s1, 40(sp)
8859; RV64I-NEXT:    ld s0, 48(sp)
8860; RV64I-NEXT:    ld ra, 56(sp)
8861; RV64I-NEXT:    addi sp, sp, 64
8862; RV64I-NEXT:    ret
8863;
8864; RV64IA-LABEL: atomicrmw_umax_i16_acquire:
8865; RV64IA:       # %bb.0:
8866; RV64IA-NEXT:    lui a2, 16
8867; RV64IA-NEXT:    addiw a2, a2, -1
8868; RV64IA-NEXT:    and a1, a1, a2
8869; RV64IA-NEXT:    slli a3, a0, 3
8870; RV64IA-NEXT:    andi a3, a3, 24
8871; RV64IA-NEXT:    sllw a6, a2, a3
8872; RV64IA-NEXT:    sllw a1, a1, a3
8873; RV64IA-NEXT:    andi a0, a0, -4
8874; RV64IA-NEXT:  .LBB101_1: # =>This Inner Loop Header: Depth=1
8875; RV64IA-NEXT:    lr.w.aq a4, (a0)
8876; RV64IA-NEXT:    and a2, a4, a6
8877; RV64IA-NEXT:    mv a5, a4
8878; RV64IA-NEXT:    bgeu a2, a1, .LBB101_3
8879; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB101_1 Depth=1
8880; RV64IA-NEXT:    xor a5, a4, a1
8881; RV64IA-NEXT:    and a5, a5, a6
8882; RV64IA-NEXT:    xor a5, a4, a5
8883; RV64IA-NEXT:  .LBB101_3: # in Loop: Header=BB101_1 Depth=1
8884; RV64IA-NEXT:    sc.w a5, a5, (a0)
8885; RV64IA-NEXT:    bnez a5, .LBB101_1
8886; RV64IA-NEXT:  # %bb.4:
8887; RV64IA-NEXT:    srlw a0, a4, a3
8888; RV64IA-NEXT:    ret
8889  %1 = atomicrmw umax i16* %a, i16 %b acquire
8890  ret i16 %1
8891}
8892
8893define i16 @atomicrmw_umax_i16_release(i16 *%a, i16 %b) nounwind {
8894; RV32I-LABEL: atomicrmw_umax_i16_release:
8895; RV32I:       # %bb.0:
8896; RV32I-NEXT:    addi sp, sp, -32
8897; RV32I-NEXT:    sw ra, 28(sp)
8898; RV32I-NEXT:    sw s0, 24(sp)
8899; RV32I-NEXT:    sw s1, 20(sp)
8900; RV32I-NEXT:    sw s2, 16(sp)
8901; RV32I-NEXT:    sw s3, 12(sp)
8902; RV32I-NEXT:    sw s4, 8(sp)
8903; RV32I-NEXT:    mv s2, a1
8904; RV32I-NEXT:    mv s4, a0
8905; RV32I-NEXT:    lhu a0, 0(a0)
8906; RV32I-NEXT:    lui a1, 16
8907; RV32I-NEXT:    addi s0, a1, -1
8908; RV32I-NEXT:    and s1, s2, s0
8909; RV32I-NEXT:    addi s3, sp, 6
8910; RV32I-NEXT:  .LBB102_1: # %atomicrmw.start
8911; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
8912; RV32I-NEXT:    and a1, a0, s0
8913; RV32I-NEXT:    mv a2, a0
8914; RV32I-NEXT:    bltu s1, a1, .LBB102_3
8915; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
8916; RV32I-NEXT:    # in Loop: Header=BB102_1 Depth=1
8917; RV32I-NEXT:    mv a2, s2
8918; RV32I-NEXT:  .LBB102_3: # %atomicrmw.start
8919; RV32I-NEXT:    # in Loop: Header=BB102_1 Depth=1
8920; RV32I-NEXT:    sh a0, 6(sp)
8921; RV32I-NEXT:    mv a0, s4
8922; RV32I-NEXT:    mv a1, s3
8923; RV32I-NEXT:    addi a3, zero, 3
8924; RV32I-NEXT:    mv a4, zero
8925; RV32I-NEXT:    call __atomic_compare_exchange_2
8926; RV32I-NEXT:    mv a1, a0
8927; RV32I-NEXT:    lh a0, 6(sp)
8928; RV32I-NEXT:    beqz a1, .LBB102_1
8929; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
8930; RV32I-NEXT:    lw s4, 8(sp)
8931; RV32I-NEXT:    lw s3, 12(sp)
8932; RV32I-NEXT:    lw s2, 16(sp)
8933; RV32I-NEXT:    lw s1, 20(sp)
8934; RV32I-NEXT:    lw s0, 24(sp)
8935; RV32I-NEXT:    lw ra, 28(sp)
8936; RV32I-NEXT:    addi sp, sp, 32
8937; RV32I-NEXT:    ret
8938;
8939; RV32IA-LABEL: atomicrmw_umax_i16_release:
8940; RV32IA:       # %bb.0:
8941; RV32IA-NEXT:    lui a2, 16
8942; RV32IA-NEXT:    addi a2, a2, -1
8943; RV32IA-NEXT:    and a1, a1, a2
8944; RV32IA-NEXT:    slli a3, a0, 3
8945; RV32IA-NEXT:    andi a3, a3, 24
8946; RV32IA-NEXT:    sll a6, a2, a3
8947; RV32IA-NEXT:    sll a1, a1, a3
8948; RV32IA-NEXT:    andi a0, a0, -4
8949; RV32IA-NEXT:  .LBB102_1: # =>This Inner Loop Header: Depth=1
8950; RV32IA-NEXT:    lr.w a4, (a0)
8951; RV32IA-NEXT:    and a2, a4, a6
8952; RV32IA-NEXT:    mv a5, a4
8953; RV32IA-NEXT:    bgeu a2, a1, .LBB102_3
8954; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB102_1 Depth=1
8955; RV32IA-NEXT:    xor a5, a4, a1
8956; RV32IA-NEXT:    and a5, a5, a6
8957; RV32IA-NEXT:    xor a5, a4, a5
8958; RV32IA-NEXT:  .LBB102_3: # in Loop: Header=BB102_1 Depth=1
8959; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
8960; RV32IA-NEXT:    bnez a5, .LBB102_1
8961; RV32IA-NEXT:  # %bb.4:
8962; RV32IA-NEXT:    srl a0, a4, a3
8963; RV32IA-NEXT:    ret
8964;
8965; RV64I-LABEL: atomicrmw_umax_i16_release:
8966; RV64I:       # %bb.0:
8967; RV64I-NEXT:    addi sp, sp, -64
8968; RV64I-NEXT:    sd ra, 56(sp)
8969; RV64I-NEXT:    sd s0, 48(sp)
8970; RV64I-NEXT:    sd s1, 40(sp)
8971; RV64I-NEXT:    sd s2, 32(sp)
8972; RV64I-NEXT:    sd s3, 24(sp)
8973; RV64I-NEXT:    sd s4, 16(sp)
8974; RV64I-NEXT:    mv s2, a1
8975; RV64I-NEXT:    mv s4, a0
8976; RV64I-NEXT:    lhu a0, 0(a0)
8977; RV64I-NEXT:    lui a1, 16
8978; RV64I-NEXT:    addiw s0, a1, -1
8979; RV64I-NEXT:    and s1, s2, s0
8980; RV64I-NEXT:    addi s3, sp, 14
8981; RV64I-NEXT:  .LBB102_1: # %atomicrmw.start
8982; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
8983; RV64I-NEXT:    and a1, a0, s0
8984; RV64I-NEXT:    mv a2, a0
8985; RV64I-NEXT:    bltu s1, a1, .LBB102_3
8986; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
8987; RV64I-NEXT:    # in Loop: Header=BB102_1 Depth=1
8988; RV64I-NEXT:    mv a2, s2
8989; RV64I-NEXT:  .LBB102_3: # %atomicrmw.start
8990; RV64I-NEXT:    # in Loop: Header=BB102_1 Depth=1
8991; RV64I-NEXT:    sh a0, 14(sp)
8992; RV64I-NEXT:    mv a0, s4
8993; RV64I-NEXT:    mv a1, s3
8994; RV64I-NEXT:    addi a3, zero, 3
8995; RV64I-NEXT:    mv a4, zero
8996; RV64I-NEXT:    call __atomic_compare_exchange_2
8997; RV64I-NEXT:    mv a1, a0
8998; RV64I-NEXT:    lh a0, 14(sp)
8999; RV64I-NEXT:    beqz a1, .LBB102_1
9000; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
9001; RV64I-NEXT:    ld s4, 16(sp)
9002; RV64I-NEXT:    ld s3, 24(sp)
9003; RV64I-NEXT:    ld s2, 32(sp)
9004; RV64I-NEXT:    ld s1, 40(sp)
9005; RV64I-NEXT:    ld s0, 48(sp)
9006; RV64I-NEXT:    ld ra, 56(sp)
9007; RV64I-NEXT:    addi sp, sp, 64
9008; RV64I-NEXT:    ret
9009;
9010; RV64IA-LABEL: atomicrmw_umax_i16_release:
9011; RV64IA:       # %bb.0:
9012; RV64IA-NEXT:    lui a2, 16
9013; RV64IA-NEXT:    addiw a2, a2, -1
9014; RV64IA-NEXT:    and a1, a1, a2
9015; RV64IA-NEXT:    slli a3, a0, 3
9016; RV64IA-NEXT:    andi a3, a3, 24
9017; RV64IA-NEXT:    sllw a6, a2, a3
9018; RV64IA-NEXT:    sllw a1, a1, a3
9019; RV64IA-NEXT:    andi a0, a0, -4
9020; RV64IA-NEXT:  .LBB102_1: # =>This Inner Loop Header: Depth=1
9021; RV64IA-NEXT:    lr.w a4, (a0)
9022; RV64IA-NEXT:    and a2, a4, a6
9023; RV64IA-NEXT:    mv a5, a4
9024; RV64IA-NEXT:    bgeu a2, a1, .LBB102_3
9025; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB102_1 Depth=1
9026; RV64IA-NEXT:    xor a5, a4, a1
9027; RV64IA-NEXT:    and a5, a5, a6
9028; RV64IA-NEXT:    xor a5, a4, a5
9029; RV64IA-NEXT:  .LBB102_3: # in Loop: Header=BB102_1 Depth=1
9030; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
9031; RV64IA-NEXT:    bnez a5, .LBB102_1
9032; RV64IA-NEXT:  # %bb.4:
9033; RV64IA-NEXT:    srlw a0, a4, a3
9034; RV64IA-NEXT:    ret
9035  %1 = atomicrmw umax i16* %a, i16 %b release
9036  ret i16 %1
9037}
9038
9039define i16 @atomicrmw_umax_i16_acq_rel(i16 *%a, i16 %b) nounwind {
9040; RV32I-LABEL: atomicrmw_umax_i16_acq_rel:
9041; RV32I:       # %bb.0:
9042; RV32I-NEXT:    addi sp, sp, -32
9043; RV32I-NEXT:    sw ra, 28(sp)
9044; RV32I-NEXT:    sw s0, 24(sp)
9045; RV32I-NEXT:    sw s1, 20(sp)
9046; RV32I-NEXT:    sw s2, 16(sp)
9047; RV32I-NEXT:    sw s3, 12(sp)
9048; RV32I-NEXT:    sw s4, 8(sp)
9049; RV32I-NEXT:    mv s2, a1
9050; RV32I-NEXT:    mv s4, a0
9051; RV32I-NEXT:    lhu a0, 0(a0)
9052; RV32I-NEXT:    lui a1, 16
9053; RV32I-NEXT:    addi s0, a1, -1
9054; RV32I-NEXT:    and s1, s2, s0
9055; RV32I-NEXT:    addi s3, sp, 6
9056; RV32I-NEXT:  .LBB103_1: # %atomicrmw.start
9057; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
9058; RV32I-NEXT:    and a1, a0, s0
9059; RV32I-NEXT:    mv a2, a0
9060; RV32I-NEXT:    bltu s1, a1, .LBB103_3
9061; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
9062; RV32I-NEXT:    # in Loop: Header=BB103_1 Depth=1
9063; RV32I-NEXT:    mv a2, s2
9064; RV32I-NEXT:  .LBB103_3: # %atomicrmw.start
9065; RV32I-NEXT:    # in Loop: Header=BB103_1 Depth=1
9066; RV32I-NEXT:    sh a0, 6(sp)
9067; RV32I-NEXT:    mv a0, s4
9068; RV32I-NEXT:    mv a1, s3
9069; RV32I-NEXT:    addi a3, zero, 4
9070; RV32I-NEXT:    addi a4, zero, 2
9071; RV32I-NEXT:    call __atomic_compare_exchange_2
9072; RV32I-NEXT:    mv a1, a0
9073; RV32I-NEXT:    lh a0, 6(sp)
9074; RV32I-NEXT:    beqz a1, .LBB103_1
9075; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
9076; RV32I-NEXT:    lw s4, 8(sp)
9077; RV32I-NEXT:    lw s3, 12(sp)
9078; RV32I-NEXT:    lw s2, 16(sp)
9079; RV32I-NEXT:    lw s1, 20(sp)
9080; RV32I-NEXT:    lw s0, 24(sp)
9081; RV32I-NEXT:    lw ra, 28(sp)
9082; RV32I-NEXT:    addi sp, sp, 32
9083; RV32I-NEXT:    ret
9084;
9085; RV32IA-LABEL: atomicrmw_umax_i16_acq_rel:
9086; RV32IA:       # %bb.0:
9087; RV32IA-NEXT:    lui a2, 16
9088; RV32IA-NEXT:    addi a2, a2, -1
9089; RV32IA-NEXT:    and a1, a1, a2
9090; RV32IA-NEXT:    slli a3, a0, 3
9091; RV32IA-NEXT:    andi a3, a3, 24
9092; RV32IA-NEXT:    sll a6, a2, a3
9093; RV32IA-NEXT:    sll a1, a1, a3
9094; RV32IA-NEXT:    andi a0, a0, -4
9095; RV32IA-NEXT:  .LBB103_1: # =>This Inner Loop Header: Depth=1
9096; RV32IA-NEXT:    lr.w.aq a4, (a0)
9097; RV32IA-NEXT:    and a2, a4, a6
9098; RV32IA-NEXT:    mv a5, a4
9099; RV32IA-NEXT:    bgeu a2, a1, .LBB103_3
9100; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB103_1 Depth=1
9101; RV32IA-NEXT:    xor a5, a4, a1
9102; RV32IA-NEXT:    and a5, a5, a6
9103; RV32IA-NEXT:    xor a5, a4, a5
9104; RV32IA-NEXT:  .LBB103_3: # in Loop: Header=BB103_1 Depth=1
9105; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
9106; RV32IA-NEXT:    bnez a5, .LBB103_1
9107; RV32IA-NEXT:  # %bb.4:
9108; RV32IA-NEXT:    srl a0, a4, a3
9109; RV32IA-NEXT:    ret
9110;
9111; RV64I-LABEL: atomicrmw_umax_i16_acq_rel:
9112; RV64I:       # %bb.0:
9113; RV64I-NEXT:    addi sp, sp, -64
9114; RV64I-NEXT:    sd ra, 56(sp)
9115; RV64I-NEXT:    sd s0, 48(sp)
9116; RV64I-NEXT:    sd s1, 40(sp)
9117; RV64I-NEXT:    sd s2, 32(sp)
9118; RV64I-NEXT:    sd s3, 24(sp)
9119; RV64I-NEXT:    sd s4, 16(sp)
9120; RV64I-NEXT:    mv s2, a1
9121; RV64I-NEXT:    mv s4, a0
9122; RV64I-NEXT:    lhu a0, 0(a0)
9123; RV64I-NEXT:    lui a1, 16
9124; RV64I-NEXT:    addiw s0, a1, -1
9125; RV64I-NEXT:    and s1, s2, s0
9126; RV64I-NEXT:    addi s3, sp, 14
9127; RV64I-NEXT:  .LBB103_1: # %atomicrmw.start
9128; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
9129; RV64I-NEXT:    and a1, a0, s0
9130; RV64I-NEXT:    mv a2, a0
9131; RV64I-NEXT:    bltu s1, a1, .LBB103_3
9132; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
9133; RV64I-NEXT:    # in Loop: Header=BB103_1 Depth=1
9134; RV64I-NEXT:    mv a2, s2
9135; RV64I-NEXT:  .LBB103_3: # %atomicrmw.start
9136; RV64I-NEXT:    # in Loop: Header=BB103_1 Depth=1
9137; RV64I-NEXT:    sh a0, 14(sp)
9138; RV64I-NEXT:    mv a0, s4
9139; RV64I-NEXT:    mv a1, s3
9140; RV64I-NEXT:    addi a3, zero, 4
9141; RV64I-NEXT:    addi a4, zero, 2
9142; RV64I-NEXT:    call __atomic_compare_exchange_2
9143; RV64I-NEXT:    mv a1, a0
9144; RV64I-NEXT:    lh a0, 14(sp)
9145; RV64I-NEXT:    beqz a1, .LBB103_1
9146; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
9147; RV64I-NEXT:    ld s4, 16(sp)
9148; RV64I-NEXT:    ld s3, 24(sp)
9149; RV64I-NEXT:    ld s2, 32(sp)
9150; RV64I-NEXT:    ld s1, 40(sp)
9151; RV64I-NEXT:    ld s0, 48(sp)
9152; RV64I-NEXT:    ld ra, 56(sp)
9153; RV64I-NEXT:    addi sp, sp, 64
9154; RV64I-NEXT:    ret
9155;
9156; RV64IA-LABEL: atomicrmw_umax_i16_acq_rel:
9157; RV64IA:       # %bb.0:
9158; RV64IA-NEXT:    lui a2, 16
9159; RV64IA-NEXT:    addiw a2, a2, -1
9160; RV64IA-NEXT:    and a1, a1, a2
9161; RV64IA-NEXT:    slli a3, a0, 3
9162; RV64IA-NEXT:    andi a3, a3, 24
9163; RV64IA-NEXT:    sllw a6, a2, a3
9164; RV64IA-NEXT:    sllw a1, a1, a3
9165; RV64IA-NEXT:    andi a0, a0, -4
9166; RV64IA-NEXT:  .LBB103_1: # =>This Inner Loop Header: Depth=1
9167; RV64IA-NEXT:    lr.w.aq a4, (a0)
9168; RV64IA-NEXT:    and a2, a4, a6
9169; RV64IA-NEXT:    mv a5, a4
9170; RV64IA-NEXT:    bgeu a2, a1, .LBB103_3
9171; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB103_1 Depth=1
9172; RV64IA-NEXT:    xor a5, a4, a1
9173; RV64IA-NEXT:    and a5, a5, a6
9174; RV64IA-NEXT:    xor a5, a4, a5
9175; RV64IA-NEXT:  .LBB103_3: # in Loop: Header=BB103_1 Depth=1
9176; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
9177; RV64IA-NEXT:    bnez a5, .LBB103_1
9178; RV64IA-NEXT:  # %bb.4:
9179; RV64IA-NEXT:    srlw a0, a4, a3
9180; RV64IA-NEXT:    ret
9181  %1 = atomicrmw umax i16* %a, i16 %b acq_rel
9182  ret i16 %1
9183}
9184
9185define i16 @atomicrmw_umax_i16_seq_cst(i16 *%a, i16 %b) nounwind {
9186; RV32I-LABEL: atomicrmw_umax_i16_seq_cst:
9187; RV32I:       # %bb.0:
9188; RV32I-NEXT:    addi sp, sp, -32
9189; RV32I-NEXT:    sw ra, 28(sp)
9190; RV32I-NEXT:    sw s0, 24(sp)
9191; RV32I-NEXT:    sw s1, 20(sp)
9192; RV32I-NEXT:    sw s2, 16(sp)
9193; RV32I-NEXT:    sw s3, 12(sp)
9194; RV32I-NEXT:    sw s4, 8(sp)
9195; RV32I-NEXT:    mv s2, a1
9196; RV32I-NEXT:    mv s4, a0
9197; RV32I-NEXT:    lhu a0, 0(a0)
9198; RV32I-NEXT:    lui a1, 16
9199; RV32I-NEXT:    addi s0, a1, -1
9200; RV32I-NEXT:    and s1, s2, s0
9201; RV32I-NEXT:    addi s3, sp, 6
9202; RV32I-NEXT:  .LBB104_1: # %atomicrmw.start
9203; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
9204; RV32I-NEXT:    and a1, a0, s0
9205; RV32I-NEXT:    mv a2, a0
9206; RV32I-NEXT:    bltu s1, a1, .LBB104_3
9207; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
9208; RV32I-NEXT:    # in Loop: Header=BB104_1 Depth=1
9209; RV32I-NEXT:    mv a2, s2
9210; RV32I-NEXT:  .LBB104_3: # %atomicrmw.start
9211; RV32I-NEXT:    # in Loop: Header=BB104_1 Depth=1
9212; RV32I-NEXT:    sh a0, 6(sp)
9213; RV32I-NEXT:    mv a0, s4
9214; RV32I-NEXT:    mv a1, s3
9215; RV32I-NEXT:    addi a3, zero, 5
9216; RV32I-NEXT:    addi a4, zero, 5
9217; RV32I-NEXT:    call __atomic_compare_exchange_2
9218; RV32I-NEXT:    mv a1, a0
9219; RV32I-NEXT:    lh a0, 6(sp)
9220; RV32I-NEXT:    beqz a1, .LBB104_1
9221; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
9222; RV32I-NEXT:    lw s4, 8(sp)
9223; RV32I-NEXT:    lw s3, 12(sp)
9224; RV32I-NEXT:    lw s2, 16(sp)
9225; RV32I-NEXT:    lw s1, 20(sp)
9226; RV32I-NEXT:    lw s0, 24(sp)
9227; RV32I-NEXT:    lw ra, 28(sp)
9228; RV32I-NEXT:    addi sp, sp, 32
9229; RV32I-NEXT:    ret
9230;
9231; RV32IA-LABEL: atomicrmw_umax_i16_seq_cst:
9232; RV32IA:       # %bb.0:
9233; RV32IA-NEXT:    lui a2, 16
9234; RV32IA-NEXT:    addi a2, a2, -1
9235; RV32IA-NEXT:    and a1, a1, a2
9236; RV32IA-NEXT:    slli a3, a0, 3
9237; RV32IA-NEXT:    andi a3, a3, 24
9238; RV32IA-NEXT:    sll a6, a2, a3
9239; RV32IA-NEXT:    sll a1, a1, a3
9240; RV32IA-NEXT:    andi a0, a0, -4
9241; RV32IA-NEXT:  .LBB104_1: # =>This Inner Loop Header: Depth=1
9242; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
9243; RV32IA-NEXT:    and a2, a4, a6
9244; RV32IA-NEXT:    mv a5, a4
9245; RV32IA-NEXT:    bgeu a2, a1, .LBB104_3
9246; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB104_1 Depth=1
9247; RV32IA-NEXT:    xor a5, a4, a1
9248; RV32IA-NEXT:    and a5, a5, a6
9249; RV32IA-NEXT:    xor a5, a4, a5
9250; RV32IA-NEXT:  .LBB104_3: # in Loop: Header=BB104_1 Depth=1
9251; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
9252; RV32IA-NEXT:    bnez a5, .LBB104_1
9253; RV32IA-NEXT:  # %bb.4:
9254; RV32IA-NEXT:    srl a0, a4, a3
9255; RV32IA-NEXT:    ret
9256;
9257; RV64I-LABEL: atomicrmw_umax_i16_seq_cst:
9258; RV64I:       # %bb.0:
9259; RV64I-NEXT:    addi sp, sp, -64
9260; RV64I-NEXT:    sd ra, 56(sp)
9261; RV64I-NEXT:    sd s0, 48(sp)
9262; RV64I-NEXT:    sd s1, 40(sp)
9263; RV64I-NEXT:    sd s2, 32(sp)
9264; RV64I-NEXT:    sd s3, 24(sp)
9265; RV64I-NEXT:    sd s4, 16(sp)
9266; RV64I-NEXT:    mv s2, a1
9267; RV64I-NEXT:    mv s4, a0
9268; RV64I-NEXT:    lhu a0, 0(a0)
9269; RV64I-NEXT:    lui a1, 16
9270; RV64I-NEXT:    addiw s0, a1, -1
9271; RV64I-NEXT:    and s1, s2, s0
9272; RV64I-NEXT:    addi s3, sp, 14
9273; RV64I-NEXT:  .LBB104_1: # %atomicrmw.start
9274; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
9275; RV64I-NEXT:    and a1, a0, s0
9276; RV64I-NEXT:    mv a2, a0
9277; RV64I-NEXT:    bltu s1, a1, .LBB104_3
9278; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
9279; RV64I-NEXT:    # in Loop: Header=BB104_1 Depth=1
9280; RV64I-NEXT:    mv a2, s2
9281; RV64I-NEXT:  .LBB104_3: # %atomicrmw.start
9282; RV64I-NEXT:    # in Loop: Header=BB104_1 Depth=1
9283; RV64I-NEXT:    sh a0, 14(sp)
9284; RV64I-NEXT:    mv a0, s4
9285; RV64I-NEXT:    mv a1, s3
9286; RV64I-NEXT:    addi a3, zero, 5
9287; RV64I-NEXT:    addi a4, zero, 5
9288; RV64I-NEXT:    call __atomic_compare_exchange_2
9289; RV64I-NEXT:    mv a1, a0
9290; RV64I-NEXT:    lh a0, 14(sp)
9291; RV64I-NEXT:    beqz a1, .LBB104_1
9292; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
9293; RV64I-NEXT:    ld s4, 16(sp)
9294; RV64I-NEXT:    ld s3, 24(sp)
9295; RV64I-NEXT:    ld s2, 32(sp)
9296; RV64I-NEXT:    ld s1, 40(sp)
9297; RV64I-NEXT:    ld s0, 48(sp)
9298; RV64I-NEXT:    ld ra, 56(sp)
9299; RV64I-NEXT:    addi sp, sp, 64
9300; RV64I-NEXT:    ret
9301;
9302; RV64IA-LABEL: atomicrmw_umax_i16_seq_cst:
9303; RV64IA:       # %bb.0:
9304; RV64IA-NEXT:    lui a2, 16
9305; RV64IA-NEXT:    addiw a2, a2, -1
9306; RV64IA-NEXT:    and a1, a1, a2
9307; RV64IA-NEXT:    slli a3, a0, 3
9308; RV64IA-NEXT:    andi a3, a3, 24
9309; RV64IA-NEXT:    sllw a6, a2, a3
9310; RV64IA-NEXT:    sllw a1, a1, a3
9311; RV64IA-NEXT:    andi a0, a0, -4
9312; RV64IA-NEXT:  .LBB104_1: # =>This Inner Loop Header: Depth=1
9313; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
9314; RV64IA-NEXT:    and a2, a4, a6
9315; RV64IA-NEXT:    mv a5, a4
9316; RV64IA-NEXT:    bgeu a2, a1, .LBB104_3
9317; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB104_1 Depth=1
9318; RV64IA-NEXT:    xor a5, a4, a1
9319; RV64IA-NEXT:    and a5, a5, a6
9320; RV64IA-NEXT:    xor a5, a4, a5
9321; RV64IA-NEXT:  .LBB104_3: # in Loop: Header=BB104_1 Depth=1
9322; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
9323; RV64IA-NEXT:    bnez a5, .LBB104_1
9324; RV64IA-NEXT:  # %bb.4:
9325; RV64IA-NEXT:    srlw a0, a4, a3
9326; RV64IA-NEXT:    ret
9327  %1 = atomicrmw umax i16* %a, i16 %b seq_cst
9328  ret i16 %1
9329}
9330
9331define i16 @atomicrmw_umin_i16_monotonic(i16 *%a, i16 %b) nounwind {
9332; RV32I-LABEL: atomicrmw_umin_i16_monotonic:
9333; RV32I:       # %bb.0:
9334; RV32I-NEXT:    addi sp, sp, -32
9335; RV32I-NEXT:    sw ra, 28(sp)
9336; RV32I-NEXT:    sw s0, 24(sp)
9337; RV32I-NEXT:    sw s1, 20(sp)
9338; RV32I-NEXT:    sw s2, 16(sp)
9339; RV32I-NEXT:    sw s3, 12(sp)
9340; RV32I-NEXT:    sw s4, 8(sp)
9341; RV32I-NEXT:    mv s2, a1
9342; RV32I-NEXT:    mv s4, a0
9343; RV32I-NEXT:    lhu a0, 0(a0)
9344; RV32I-NEXT:    lui a1, 16
9345; RV32I-NEXT:    addi s0, a1, -1
9346; RV32I-NEXT:    and s1, s2, s0
9347; RV32I-NEXT:    addi s3, sp, 6
9348; RV32I-NEXT:  .LBB105_1: # %atomicrmw.start
9349; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
9350; RV32I-NEXT:    and a1, a0, s0
9351; RV32I-NEXT:    mv a2, a0
9352; RV32I-NEXT:    bgeu s1, a1, .LBB105_3
9353; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
9354; RV32I-NEXT:    # in Loop: Header=BB105_1 Depth=1
9355; RV32I-NEXT:    mv a2, s2
9356; RV32I-NEXT:  .LBB105_3: # %atomicrmw.start
9357; RV32I-NEXT:    # in Loop: Header=BB105_1 Depth=1
9358; RV32I-NEXT:    sh a0, 6(sp)
9359; RV32I-NEXT:    mv a0, s4
9360; RV32I-NEXT:    mv a1, s3
9361; RV32I-NEXT:    mv a3, zero
9362; RV32I-NEXT:    mv a4, zero
9363; RV32I-NEXT:    call __atomic_compare_exchange_2
9364; RV32I-NEXT:    mv a1, a0
9365; RV32I-NEXT:    lh a0, 6(sp)
9366; RV32I-NEXT:    beqz a1, .LBB105_1
9367; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
9368; RV32I-NEXT:    lw s4, 8(sp)
9369; RV32I-NEXT:    lw s3, 12(sp)
9370; RV32I-NEXT:    lw s2, 16(sp)
9371; RV32I-NEXT:    lw s1, 20(sp)
9372; RV32I-NEXT:    lw s0, 24(sp)
9373; RV32I-NEXT:    lw ra, 28(sp)
9374; RV32I-NEXT:    addi sp, sp, 32
9375; RV32I-NEXT:    ret
9376;
9377; RV32IA-LABEL: atomicrmw_umin_i16_monotonic:
9378; RV32IA:       # %bb.0:
9379; RV32IA-NEXT:    lui a2, 16
9380; RV32IA-NEXT:    addi a2, a2, -1
9381; RV32IA-NEXT:    and a1, a1, a2
9382; RV32IA-NEXT:    slli a3, a0, 3
9383; RV32IA-NEXT:    andi a3, a3, 24
9384; RV32IA-NEXT:    sll a6, a2, a3
9385; RV32IA-NEXT:    sll a1, a1, a3
9386; RV32IA-NEXT:    andi a0, a0, -4
9387; RV32IA-NEXT:  .LBB105_1: # =>This Inner Loop Header: Depth=1
9388; RV32IA-NEXT:    lr.w a4, (a0)
9389; RV32IA-NEXT:    and a2, a4, a6
9390; RV32IA-NEXT:    mv a5, a4
9391; RV32IA-NEXT:    bgeu a1, a2, .LBB105_3
9392; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB105_1 Depth=1
9393; RV32IA-NEXT:    xor a5, a4, a1
9394; RV32IA-NEXT:    and a5, a5, a6
9395; RV32IA-NEXT:    xor a5, a4, a5
9396; RV32IA-NEXT:  .LBB105_3: # in Loop: Header=BB105_1 Depth=1
9397; RV32IA-NEXT:    sc.w a5, a5, (a0)
9398; RV32IA-NEXT:    bnez a5, .LBB105_1
9399; RV32IA-NEXT:  # %bb.4:
9400; RV32IA-NEXT:    srl a0, a4, a3
9401; RV32IA-NEXT:    ret
9402;
9403; RV64I-LABEL: atomicrmw_umin_i16_monotonic:
9404; RV64I:       # %bb.0:
9405; RV64I-NEXT:    addi sp, sp, -64
9406; RV64I-NEXT:    sd ra, 56(sp)
9407; RV64I-NEXT:    sd s0, 48(sp)
9408; RV64I-NEXT:    sd s1, 40(sp)
9409; RV64I-NEXT:    sd s2, 32(sp)
9410; RV64I-NEXT:    sd s3, 24(sp)
9411; RV64I-NEXT:    sd s4, 16(sp)
9412; RV64I-NEXT:    mv s2, a1
9413; RV64I-NEXT:    mv s4, a0
9414; RV64I-NEXT:    lhu a0, 0(a0)
9415; RV64I-NEXT:    lui a1, 16
9416; RV64I-NEXT:    addiw s0, a1, -1
9417; RV64I-NEXT:    and s1, s2, s0
9418; RV64I-NEXT:    addi s3, sp, 14
9419; RV64I-NEXT:  .LBB105_1: # %atomicrmw.start
9420; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
9421; RV64I-NEXT:    and a1, a0, s0
9422; RV64I-NEXT:    mv a2, a0
9423; RV64I-NEXT:    bgeu s1, a1, .LBB105_3
9424; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
9425; RV64I-NEXT:    # in Loop: Header=BB105_1 Depth=1
9426; RV64I-NEXT:    mv a2, s2
9427; RV64I-NEXT:  .LBB105_3: # %atomicrmw.start
9428; RV64I-NEXT:    # in Loop: Header=BB105_1 Depth=1
9429; RV64I-NEXT:    sh a0, 14(sp)
9430; RV64I-NEXT:    mv a0, s4
9431; RV64I-NEXT:    mv a1, s3
9432; RV64I-NEXT:    mv a3, zero
9433; RV64I-NEXT:    mv a4, zero
9434; RV64I-NEXT:    call __atomic_compare_exchange_2
9435; RV64I-NEXT:    mv a1, a0
9436; RV64I-NEXT:    lh a0, 14(sp)
9437; RV64I-NEXT:    beqz a1, .LBB105_1
9438; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
9439; RV64I-NEXT:    ld s4, 16(sp)
9440; RV64I-NEXT:    ld s3, 24(sp)
9441; RV64I-NEXT:    ld s2, 32(sp)
9442; RV64I-NEXT:    ld s1, 40(sp)
9443; RV64I-NEXT:    ld s0, 48(sp)
9444; RV64I-NEXT:    ld ra, 56(sp)
9445; RV64I-NEXT:    addi sp, sp, 64
9446; RV64I-NEXT:    ret
9447;
9448; RV64IA-LABEL: atomicrmw_umin_i16_monotonic:
9449; RV64IA:       # %bb.0:
9450; RV64IA-NEXT:    lui a2, 16
9451; RV64IA-NEXT:    addiw a2, a2, -1
9452; RV64IA-NEXT:    and a1, a1, a2
9453; RV64IA-NEXT:    slli a3, a0, 3
9454; RV64IA-NEXT:    andi a3, a3, 24
9455; RV64IA-NEXT:    sllw a6, a2, a3
9456; RV64IA-NEXT:    sllw a1, a1, a3
9457; RV64IA-NEXT:    andi a0, a0, -4
9458; RV64IA-NEXT:  .LBB105_1: # =>This Inner Loop Header: Depth=1
9459; RV64IA-NEXT:    lr.w a4, (a0)
9460; RV64IA-NEXT:    and a2, a4, a6
9461; RV64IA-NEXT:    mv a5, a4
9462; RV64IA-NEXT:    bgeu a1, a2, .LBB105_3
9463; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB105_1 Depth=1
9464; RV64IA-NEXT:    xor a5, a4, a1
9465; RV64IA-NEXT:    and a5, a5, a6
9466; RV64IA-NEXT:    xor a5, a4, a5
9467; RV64IA-NEXT:  .LBB105_3: # in Loop: Header=BB105_1 Depth=1
9468; RV64IA-NEXT:    sc.w a5, a5, (a0)
9469; RV64IA-NEXT:    bnez a5, .LBB105_1
9470; RV64IA-NEXT:  # %bb.4:
9471; RV64IA-NEXT:    srlw a0, a4, a3
9472; RV64IA-NEXT:    ret
9473  %1 = atomicrmw umin i16* %a, i16 %b monotonic
9474  ret i16 %1
9475}
9476
9477define i16 @atomicrmw_umin_i16_acquire(i16 *%a, i16 %b) nounwind {
9478; RV32I-LABEL: atomicrmw_umin_i16_acquire:
9479; RV32I:       # %bb.0:
9480; RV32I-NEXT:    addi sp, sp, -32
9481; RV32I-NEXT:    sw ra, 28(sp)
9482; RV32I-NEXT:    sw s0, 24(sp)
9483; RV32I-NEXT:    sw s1, 20(sp)
9484; RV32I-NEXT:    sw s2, 16(sp)
9485; RV32I-NEXT:    sw s3, 12(sp)
9486; RV32I-NEXT:    sw s4, 8(sp)
9487; RV32I-NEXT:    mv s2, a1
9488; RV32I-NEXT:    mv s4, a0
9489; RV32I-NEXT:    lhu a0, 0(a0)
9490; RV32I-NEXT:    lui a1, 16
9491; RV32I-NEXT:    addi s0, a1, -1
9492; RV32I-NEXT:    and s1, s2, s0
9493; RV32I-NEXT:    addi s3, sp, 6
9494; RV32I-NEXT:  .LBB106_1: # %atomicrmw.start
9495; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
9496; RV32I-NEXT:    and a1, a0, s0
9497; RV32I-NEXT:    mv a2, a0
9498; RV32I-NEXT:    bgeu s1, a1, .LBB106_3
9499; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
9500; RV32I-NEXT:    # in Loop: Header=BB106_1 Depth=1
9501; RV32I-NEXT:    mv a2, s2
9502; RV32I-NEXT:  .LBB106_3: # %atomicrmw.start
9503; RV32I-NEXT:    # in Loop: Header=BB106_1 Depth=1
9504; RV32I-NEXT:    sh a0, 6(sp)
9505; RV32I-NEXT:    mv a0, s4
9506; RV32I-NEXT:    mv a1, s3
9507; RV32I-NEXT:    addi a3, zero, 2
9508; RV32I-NEXT:    addi a4, zero, 2
9509; RV32I-NEXT:    call __atomic_compare_exchange_2
9510; RV32I-NEXT:    mv a1, a0
9511; RV32I-NEXT:    lh a0, 6(sp)
9512; RV32I-NEXT:    beqz a1, .LBB106_1
9513; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
9514; RV32I-NEXT:    lw s4, 8(sp)
9515; RV32I-NEXT:    lw s3, 12(sp)
9516; RV32I-NEXT:    lw s2, 16(sp)
9517; RV32I-NEXT:    lw s1, 20(sp)
9518; RV32I-NEXT:    lw s0, 24(sp)
9519; RV32I-NEXT:    lw ra, 28(sp)
9520; RV32I-NEXT:    addi sp, sp, 32
9521; RV32I-NEXT:    ret
9522;
9523; RV32IA-LABEL: atomicrmw_umin_i16_acquire:
9524; RV32IA:       # %bb.0:
9525; RV32IA-NEXT:    lui a2, 16
9526; RV32IA-NEXT:    addi a2, a2, -1
9527; RV32IA-NEXT:    and a1, a1, a2
9528; RV32IA-NEXT:    slli a3, a0, 3
9529; RV32IA-NEXT:    andi a3, a3, 24
9530; RV32IA-NEXT:    sll a6, a2, a3
9531; RV32IA-NEXT:    sll a1, a1, a3
9532; RV32IA-NEXT:    andi a0, a0, -4
9533; RV32IA-NEXT:  .LBB106_1: # =>This Inner Loop Header: Depth=1
9534; RV32IA-NEXT:    lr.w.aq a4, (a0)
9535; RV32IA-NEXT:    and a2, a4, a6
9536; RV32IA-NEXT:    mv a5, a4
9537; RV32IA-NEXT:    bgeu a1, a2, .LBB106_3
9538; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB106_1 Depth=1
9539; RV32IA-NEXT:    xor a5, a4, a1
9540; RV32IA-NEXT:    and a5, a5, a6
9541; RV32IA-NEXT:    xor a5, a4, a5
9542; RV32IA-NEXT:  .LBB106_3: # in Loop: Header=BB106_1 Depth=1
9543; RV32IA-NEXT:    sc.w a5, a5, (a0)
9544; RV32IA-NEXT:    bnez a5, .LBB106_1
9545; RV32IA-NEXT:  # %bb.4:
9546; RV32IA-NEXT:    srl a0, a4, a3
9547; RV32IA-NEXT:    ret
9548;
9549; RV64I-LABEL: atomicrmw_umin_i16_acquire:
9550; RV64I:       # %bb.0:
9551; RV64I-NEXT:    addi sp, sp, -64
9552; RV64I-NEXT:    sd ra, 56(sp)
9553; RV64I-NEXT:    sd s0, 48(sp)
9554; RV64I-NEXT:    sd s1, 40(sp)
9555; RV64I-NEXT:    sd s2, 32(sp)
9556; RV64I-NEXT:    sd s3, 24(sp)
9557; RV64I-NEXT:    sd s4, 16(sp)
9558; RV64I-NEXT:    mv s2, a1
9559; RV64I-NEXT:    mv s4, a0
9560; RV64I-NEXT:    lhu a0, 0(a0)
9561; RV64I-NEXT:    lui a1, 16
9562; RV64I-NEXT:    addiw s0, a1, -1
9563; RV64I-NEXT:    and s1, s2, s0
9564; RV64I-NEXT:    addi s3, sp, 14
9565; RV64I-NEXT:  .LBB106_1: # %atomicrmw.start
9566; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
9567; RV64I-NEXT:    and a1, a0, s0
9568; RV64I-NEXT:    mv a2, a0
9569; RV64I-NEXT:    bgeu s1, a1, .LBB106_3
9570; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
9571; RV64I-NEXT:    # in Loop: Header=BB106_1 Depth=1
9572; RV64I-NEXT:    mv a2, s2
9573; RV64I-NEXT:  .LBB106_3: # %atomicrmw.start
9574; RV64I-NEXT:    # in Loop: Header=BB106_1 Depth=1
9575; RV64I-NEXT:    sh a0, 14(sp)
9576; RV64I-NEXT:    mv a0, s4
9577; RV64I-NEXT:    mv a1, s3
9578; RV64I-NEXT:    addi a3, zero, 2
9579; RV64I-NEXT:    addi a4, zero, 2
9580; RV64I-NEXT:    call __atomic_compare_exchange_2
9581; RV64I-NEXT:    mv a1, a0
9582; RV64I-NEXT:    lh a0, 14(sp)
9583; RV64I-NEXT:    beqz a1, .LBB106_1
9584; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
9585; RV64I-NEXT:    ld s4, 16(sp)
9586; RV64I-NEXT:    ld s3, 24(sp)
9587; RV64I-NEXT:    ld s2, 32(sp)
9588; RV64I-NEXT:    ld s1, 40(sp)
9589; RV64I-NEXT:    ld s0, 48(sp)
9590; RV64I-NEXT:    ld ra, 56(sp)
9591; RV64I-NEXT:    addi sp, sp, 64
9592; RV64I-NEXT:    ret
9593;
9594; RV64IA-LABEL: atomicrmw_umin_i16_acquire:
9595; RV64IA:       # %bb.0:
9596; RV64IA-NEXT:    lui a2, 16
9597; RV64IA-NEXT:    addiw a2, a2, -1
9598; RV64IA-NEXT:    and a1, a1, a2
9599; RV64IA-NEXT:    slli a3, a0, 3
9600; RV64IA-NEXT:    andi a3, a3, 24
9601; RV64IA-NEXT:    sllw a6, a2, a3
9602; RV64IA-NEXT:    sllw a1, a1, a3
9603; RV64IA-NEXT:    andi a0, a0, -4
9604; RV64IA-NEXT:  .LBB106_1: # =>This Inner Loop Header: Depth=1
9605; RV64IA-NEXT:    lr.w.aq a4, (a0)
9606; RV64IA-NEXT:    and a2, a4, a6
9607; RV64IA-NEXT:    mv a5, a4
9608; RV64IA-NEXT:    bgeu a1, a2, .LBB106_3
9609; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB106_1 Depth=1
9610; RV64IA-NEXT:    xor a5, a4, a1
9611; RV64IA-NEXT:    and a5, a5, a6
9612; RV64IA-NEXT:    xor a5, a4, a5
9613; RV64IA-NEXT:  .LBB106_3: # in Loop: Header=BB106_1 Depth=1
9614; RV64IA-NEXT:    sc.w a5, a5, (a0)
9615; RV64IA-NEXT:    bnez a5, .LBB106_1
9616; RV64IA-NEXT:  # %bb.4:
9617; RV64IA-NEXT:    srlw a0, a4, a3
9618; RV64IA-NEXT:    ret
9619  %1 = atomicrmw umin i16* %a, i16 %b acquire
9620  ret i16 %1
9621}
9622
9623define i16 @atomicrmw_umin_i16_release(i16 *%a, i16 %b) nounwind {
9624; RV32I-LABEL: atomicrmw_umin_i16_release:
9625; RV32I:       # %bb.0:
9626; RV32I-NEXT:    addi sp, sp, -32
9627; RV32I-NEXT:    sw ra, 28(sp)
9628; RV32I-NEXT:    sw s0, 24(sp)
9629; RV32I-NEXT:    sw s1, 20(sp)
9630; RV32I-NEXT:    sw s2, 16(sp)
9631; RV32I-NEXT:    sw s3, 12(sp)
9632; RV32I-NEXT:    sw s4, 8(sp)
9633; RV32I-NEXT:    mv s2, a1
9634; RV32I-NEXT:    mv s4, a0
9635; RV32I-NEXT:    lhu a0, 0(a0)
9636; RV32I-NEXT:    lui a1, 16
9637; RV32I-NEXT:    addi s0, a1, -1
9638; RV32I-NEXT:    and s1, s2, s0
9639; RV32I-NEXT:    addi s3, sp, 6
9640; RV32I-NEXT:  .LBB107_1: # %atomicrmw.start
9641; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
9642; RV32I-NEXT:    and a1, a0, s0
9643; RV32I-NEXT:    mv a2, a0
9644; RV32I-NEXT:    bgeu s1, a1, .LBB107_3
9645; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
9646; RV32I-NEXT:    # in Loop: Header=BB107_1 Depth=1
9647; RV32I-NEXT:    mv a2, s2
9648; RV32I-NEXT:  .LBB107_3: # %atomicrmw.start
9649; RV32I-NEXT:    # in Loop: Header=BB107_1 Depth=1
9650; RV32I-NEXT:    sh a0, 6(sp)
9651; RV32I-NEXT:    mv a0, s4
9652; RV32I-NEXT:    mv a1, s3
9653; RV32I-NEXT:    addi a3, zero, 3
9654; RV32I-NEXT:    mv a4, zero
9655; RV32I-NEXT:    call __atomic_compare_exchange_2
9656; RV32I-NEXT:    mv a1, a0
9657; RV32I-NEXT:    lh a0, 6(sp)
9658; RV32I-NEXT:    beqz a1, .LBB107_1
9659; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
9660; RV32I-NEXT:    lw s4, 8(sp)
9661; RV32I-NEXT:    lw s3, 12(sp)
9662; RV32I-NEXT:    lw s2, 16(sp)
9663; RV32I-NEXT:    lw s1, 20(sp)
9664; RV32I-NEXT:    lw s0, 24(sp)
9665; RV32I-NEXT:    lw ra, 28(sp)
9666; RV32I-NEXT:    addi sp, sp, 32
9667; RV32I-NEXT:    ret
9668;
9669; RV32IA-LABEL: atomicrmw_umin_i16_release:
9670; RV32IA:       # %bb.0:
9671; RV32IA-NEXT:    lui a2, 16
9672; RV32IA-NEXT:    addi a2, a2, -1
9673; RV32IA-NEXT:    and a1, a1, a2
9674; RV32IA-NEXT:    slli a3, a0, 3
9675; RV32IA-NEXT:    andi a3, a3, 24
9676; RV32IA-NEXT:    sll a6, a2, a3
9677; RV32IA-NEXT:    sll a1, a1, a3
9678; RV32IA-NEXT:    andi a0, a0, -4
9679; RV32IA-NEXT:  .LBB107_1: # =>This Inner Loop Header: Depth=1
9680; RV32IA-NEXT:    lr.w a4, (a0)
9681; RV32IA-NEXT:    and a2, a4, a6
9682; RV32IA-NEXT:    mv a5, a4
9683; RV32IA-NEXT:    bgeu a1, a2, .LBB107_3
9684; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB107_1 Depth=1
9685; RV32IA-NEXT:    xor a5, a4, a1
9686; RV32IA-NEXT:    and a5, a5, a6
9687; RV32IA-NEXT:    xor a5, a4, a5
9688; RV32IA-NEXT:  .LBB107_3: # in Loop: Header=BB107_1 Depth=1
9689; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
9690; RV32IA-NEXT:    bnez a5, .LBB107_1
9691; RV32IA-NEXT:  # %bb.4:
9692; RV32IA-NEXT:    srl a0, a4, a3
9693; RV32IA-NEXT:    ret
9694;
9695; RV64I-LABEL: atomicrmw_umin_i16_release:
9696; RV64I:       # %bb.0:
9697; RV64I-NEXT:    addi sp, sp, -64
9698; RV64I-NEXT:    sd ra, 56(sp)
9699; RV64I-NEXT:    sd s0, 48(sp)
9700; RV64I-NEXT:    sd s1, 40(sp)
9701; RV64I-NEXT:    sd s2, 32(sp)
9702; RV64I-NEXT:    sd s3, 24(sp)
9703; RV64I-NEXT:    sd s4, 16(sp)
9704; RV64I-NEXT:    mv s2, a1
9705; RV64I-NEXT:    mv s4, a0
9706; RV64I-NEXT:    lhu a0, 0(a0)
9707; RV64I-NEXT:    lui a1, 16
9708; RV64I-NEXT:    addiw s0, a1, -1
9709; RV64I-NEXT:    and s1, s2, s0
9710; RV64I-NEXT:    addi s3, sp, 14
9711; RV64I-NEXT:  .LBB107_1: # %atomicrmw.start
9712; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
9713; RV64I-NEXT:    and a1, a0, s0
9714; RV64I-NEXT:    mv a2, a0
9715; RV64I-NEXT:    bgeu s1, a1, .LBB107_3
9716; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
9717; RV64I-NEXT:    # in Loop: Header=BB107_1 Depth=1
9718; RV64I-NEXT:    mv a2, s2
9719; RV64I-NEXT:  .LBB107_3: # %atomicrmw.start
9720; RV64I-NEXT:    # in Loop: Header=BB107_1 Depth=1
9721; RV64I-NEXT:    sh a0, 14(sp)
9722; RV64I-NEXT:    mv a0, s4
9723; RV64I-NEXT:    mv a1, s3
9724; RV64I-NEXT:    addi a3, zero, 3
9725; RV64I-NEXT:    mv a4, zero
9726; RV64I-NEXT:    call __atomic_compare_exchange_2
9727; RV64I-NEXT:    mv a1, a0
9728; RV64I-NEXT:    lh a0, 14(sp)
9729; RV64I-NEXT:    beqz a1, .LBB107_1
9730; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
9731; RV64I-NEXT:    ld s4, 16(sp)
9732; RV64I-NEXT:    ld s3, 24(sp)
9733; RV64I-NEXT:    ld s2, 32(sp)
9734; RV64I-NEXT:    ld s1, 40(sp)
9735; RV64I-NEXT:    ld s0, 48(sp)
9736; RV64I-NEXT:    ld ra, 56(sp)
9737; RV64I-NEXT:    addi sp, sp, 64
9738; RV64I-NEXT:    ret
9739;
9740; RV64IA-LABEL: atomicrmw_umin_i16_release:
9741; RV64IA:       # %bb.0:
9742; RV64IA-NEXT:    lui a2, 16
9743; RV64IA-NEXT:    addiw a2, a2, -1
9744; RV64IA-NEXT:    and a1, a1, a2
9745; RV64IA-NEXT:    slli a3, a0, 3
9746; RV64IA-NEXT:    andi a3, a3, 24
9747; RV64IA-NEXT:    sllw a6, a2, a3
9748; RV64IA-NEXT:    sllw a1, a1, a3
9749; RV64IA-NEXT:    andi a0, a0, -4
9750; RV64IA-NEXT:  .LBB107_1: # =>This Inner Loop Header: Depth=1
9751; RV64IA-NEXT:    lr.w a4, (a0)
9752; RV64IA-NEXT:    and a2, a4, a6
9753; RV64IA-NEXT:    mv a5, a4
9754; RV64IA-NEXT:    bgeu a1, a2, .LBB107_3
9755; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB107_1 Depth=1
9756; RV64IA-NEXT:    xor a5, a4, a1
9757; RV64IA-NEXT:    and a5, a5, a6
9758; RV64IA-NEXT:    xor a5, a4, a5
9759; RV64IA-NEXT:  .LBB107_3: # in Loop: Header=BB107_1 Depth=1
9760; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
9761; RV64IA-NEXT:    bnez a5, .LBB107_1
9762; RV64IA-NEXT:  # %bb.4:
9763; RV64IA-NEXT:    srlw a0, a4, a3
9764; RV64IA-NEXT:    ret
9765  %1 = atomicrmw umin i16* %a, i16 %b release
9766  ret i16 %1
9767}
9768
9769define i16 @atomicrmw_umin_i16_acq_rel(i16 *%a, i16 %b) nounwind {
9770; RV32I-LABEL: atomicrmw_umin_i16_acq_rel:
9771; RV32I:       # %bb.0:
9772; RV32I-NEXT:    addi sp, sp, -32
9773; RV32I-NEXT:    sw ra, 28(sp)
9774; RV32I-NEXT:    sw s0, 24(sp)
9775; RV32I-NEXT:    sw s1, 20(sp)
9776; RV32I-NEXT:    sw s2, 16(sp)
9777; RV32I-NEXT:    sw s3, 12(sp)
9778; RV32I-NEXT:    sw s4, 8(sp)
9779; RV32I-NEXT:    mv s2, a1
9780; RV32I-NEXT:    mv s4, a0
9781; RV32I-NEXT:    lhu a0, 0(a0)
9782; RV32I-NEXT:    lui a1, 16
9783; RV32I-NEXT:    addi s0, a1, -1
9784; RV32I-NEXT:    and s1, s2, s0
9785; RV32I-NEXT:    addi s3, sp, 6
9786; RV32I-NEXT:  .LBB108_1: # %atomicrmw.start
9787; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
9788; RV32I-NEXT:    and a1, a0, s0
9789; RV32I-NEXT:    mv a2, a0
9790; RV32I-NEXT:    bgeu s1, a1, .LBB108_3
9791; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
9792; RV32I-NEXT:    # in Loop: Header=BB108_1 Depth=1
9793; RV32I-NEXT:    mv a2, s2
9794; RV32I-NEXT:  .LBB108_3: # %atomicrmw.start
9795; RV32I-NEXT:    # in Loop: Header=BB108_1 Depth=1
9796; RV32I-NEXT:    sh a0, 6(sp)
9797; RV32I-NEXT:    mv a0, s4
9798; RV32I-NEXT:    mv a1, s3
9799; RV32I-NEXT:    addi a3, zero, 4
9800; RV32I-NEXT:    addi a4, zero, 2
9801; RV32I-NEXT:    call __atomic_compare_exchange_2
9802; RV32I-NEXT:    mv a1, a0
9803; RV32I-NEXT:    lh a0, 6(sp)
9804; RV32I-NEXT:    beqz a1, .LBB108_1
9805; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
9806; RV32I-NEXT:    lw s4, 8(sp)
9807; RV32I-NEXT:    lw s3, 12(sp)
9808; RV32I-NEXT:    lw s2, 16(sp)
9809; RV32I-NEXT:    lw s1, 20(sp)
9810; RV32I-NEXT:    lw s0, 24(sp)
9811; RV32I-NEXT:    lw ra, 28(sp)
9812; RV32I-NEXT:    addi sp, sp, 32
9813; RV32I-NEXT:    ret
9814;
9815; RV32IA-LABEL: atomicrmw_umin_i16_acq_rel:
9816; RV32IA:       # %bb.0:
9817; RV32IA-NEXT:    lui a2, 16
9818; RV32IA-NEXT:    addi a2, a2, -1
9819; RV32IA-NEXT:    and a1, a1, a2
9820; RV32IA-NEXT:    slli a3, a0, 3
9821; RV32IA-NEXT:    andi a3, a3, 24
9822; RV32IA-NEXT:    sll a6, a2, a3
9823; RV32IA-NEXT:    sll a1, a1, a3
9824; RV32IA-NEXT:    andi a0, a0, -4
9825; RV32IA-NEXT:  .LBB108_1: # =>This Inner Loop Header: Depth=1
9826; RV32IA-NEXT:    lr.w.aq a4, (a0)
9827; RV32IA-NEXT:    and a2, a4, a6
9828; RV32IA-NEXT:    mv a5, a4
9829; RV32IA-NEXT:    bgeu a1, a2, .LBB108_3
9830; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB108_1 Depth=1
9831; RV32IA-NEXT:    xor a5, a4, a1
9832; RV32IA-NEXT:    and a5, a5, a6
9833; RV32IA-NEXT:    xor a5, a4, a5
9834; RV32IA-NEXT:  .LBB108_3: # in Loop: Header=BB108_1 Depth=1
9835; RV32IA-NEXT:    sc.w.rl a5, a5, (a0)
9836; RV32IA-NEXT:    bnez a5, .LBB108_1
9837; RV32IA-NEXT:  # %bb.4:
9838; RV32IA-NEXT:    srl a0, a4, a3
9839; RV32IA-NEXT:    ret
9840;
9841; RV64I-LABEL: atomicrmw_umin_i16_acq_rel:
9842; RV64I:       # %bb.0:
9843; RV64I-NEXT:    addi sp, sp, -64
9844; RV64I-NEXT:    sd ra, 56(sp)
9845; RV64I-NEXT:    sd s0, 48(sp)
9846; RV64I-NEXT:    sd s1, 40(sp)
9847; RV64I-NEXT:    sd s2, 32(sp)
9848; RV64I-NEXT:    sd s3, 24(sp)
9849; RV64I-NEXT:    sd s4, 16(sp)
9850; RV64I-NEXT:    mv s2, a1
9851; RV64I-NEXT:    mv s4, a0
9852; RV64I-NEXT:    lhu a0, 0(a0)
9853; RV64I-NEXT:    lui a1, 16
9854; RV64I-NEXT:    addiw s0, a1, -1
9855; RV64I-NEXT:    and s1, s2, s0
9856; RV64I-NEXT:    addi s3, sp, 14
9857; RV64I-NEXT:  .LBB108_1: # %atomicrmw.start
9858; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
9859; RV64I-NEXT:    and a1, a0, s0
9860; RV64I-NEXT:    mv a2, a0
9861; RV64I-NEXT:    bgeu s1, a1, .LBB108_3
9862; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
9863; RV64I-NEXT:    # in Loop: Header=BB108_1 Depth=1
9864; RV64I-NEXT:    mv a2, s2
9865; RV64I-NEXT:  .LBB108_3: # %atomicrmw.start
9866; RV64I-NEXT:    # in Loop: Header=BB108_1 Depth=1
9867; RV64I-NEXT:    sh a0, 14(sp)
9868; RV64I-NEXT:    mv a0, s4
9869; RV64I-NEXT:    mv a1, s3
9870; RV64I-NEXT:    addi a3, zero, 4
9871; RV64I-NEXT:    addi a4, zero, 2
9872; RV64I-NEXT:    call __atomic_compare_exchange_2
9873; RV64I-NEXT:    mv a1, a0
9874; RV64I-NEXT:    lh a0, 14(sp)
9875; RV64I-NEXT:    beqz a1, .LBB108_1
9876; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
9877; RV64I-NEXT:    ld s4, 16(sp)
9878; RV64I-NEXT:    ld s3, 24(sp)
9879; RV64I-NEXT:    ld s2, 32(sp)
9880; RV64I-NEXT:    ld s1, 40(sp)
9881; RV64I-NEXT:    ld s0, 48(sp)
9882; RV64I-NEXT:    ld ra, 56(sp)
9883; RV64I-NEXT:    addi sp, sp, 64
9884; RV64I-NEXT:    ret
9885;
9886; RV64IA-LABEL: atomicrmw_umin_i16_acq_rel:
9887; RV64IA:       # %bb.0:
9888; RV64IA-NEXT:    lui a2, 16
9889; RV64IA-NEXT:    addiw a2, a2, -1
9890; RV64IA-NEXT:    and a1, a1, a2
9891; RV64IA-NEXT:    slli a3, a0, 3
9892; RV64IA-NEXT:    andi a3, a3, 24
9893; RV64IA-NEXT:    sllw a6, a2, a3
9894; RV64IA-NEXT:    sllw a1, a1, a3
9895; RV64IA-NEXT:    andi a0, a0, -4
9896; RV64IA-NEXT:  .LBB108_1: # =>This Inner Loop Header: Depth=1
9897; RV64IA-NEXT:    lr.w.aq a4, (a0)
9898; RV64IA-NEXT:    and a2, a4, a6
9899; RV64IA-NEXT:    mv a5, a4
9900; RV64IA-NEXT:    bgeu a1, a2, .LBB108_3
9901; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB108_1 Depth=1
9902; RV64IA-NEXT:    xor a5, a4, a1
9903; RV64IA-NEXT:    and a5, a5, a6
9904; RV64IA-NEXT:    xor a5, a4, a5
9905; RV64IA-NEXT:  .LBB108_3: # in Loop: Header=BB108_1 Depth=1
9906; RV64IA-NEXT:    sc.w.rl a5, a5, (a0)
9907; RV64IA-NEXT:    bnez a5, .LBB108_1
9908; RV64IA-NEXT:  # %bb.4:
9909; RV64IA-NEXT:    srlw a0, a4, a3
9910; RV64IA-NEXT:    ret
9911  %1 = atomicrmw umin i16* %a, i16 %b acq_rel
9912  ret i16 %1
9913}
9914
9915define i16 @atomicrmw_umin_i16_seq_cst(i16 *%a, i16 %b) nounwind {
9916; RV32I-LABEL: atomicrmw_umin_i16_seq_cst:
9917; RV32I:       # %bb.0:
9918; RV32I-NEXT:    addi sp, sp, -32
9919; RV32I-NEXT:    sw ra, 28(sp)
9920; RV32I-NEXT:    sw s0, 24(sp)
9921; RV32I-NEXT:    sw s1, 20(sp)
9922; RV32I-NEXT:    sw s2, 16(sp)
9923; RV32I-NEXT:    sw s3, 12(sp)
9924; RV32I-NEXT:    sw s4, 8(sp)
9925; RV32I-NEXT:    mv s2, a1
9926; RV32I-NEXT:    mv s4, a0
9927; RV32I-NEXT:    lhu a0, 0(a0)
9928; RV32I-NEXT:    lui a1, 16
9929; RV32I-NEXT:    addi s0, a1, -1
9930; RV32I-NEXT:    and s1, s2, s0
9931; RV32I-NEXT:    addi s3, sp, 6
9932; RV32I-NEXT:  .LBB109_1: # %atomicrmw.start
9933; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
9934; RV32I-NEXT:    and a1, a0, s0
9935; RV32I-NEXT:    mv a2, a0
9936; RV32I-NEXT:    bgeu s1, a1, .LBB109_3
9937; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
9938; RV32I-NEXT:    # in Loop: Header=BB109_1 Depth=1
9939; RV32I-NEXT:    mv a2, s2
9940; RV32I-NEXT:  .LBB109_3: # %atomicrmw.start
9941; RV32I-NEXT:    # in Loop: Header=BB109_1 Depth=1
9942; RV32I-NEXT:    sh a0, 6(sp)
9943; RV32I-NEXT:    mv a0, s4
9944; RV32I-NEXT:    mv a1, s3
9945; RV32I-NEXT:    addi a3, zero, 5
9946; RV32I-NEXT:    addi a4, zero, 5
9947; RV32I-NEXT:    call __atomic_compare_exchange_2
9948; RV32I-NEXT:    mv a1, a0
9949; RV32I-NEXT:    lh a0, 6(sp)
9950; RV32I-NEXT:    beqz a1, .LBB109_1
9951; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
9952; RV32I-NEXT:    lw s4, 8(sp)
9953; RV32I-NEXT:    lw s3, 12(sp)
9954; RV32I-NEXT:    lw s2, 16(sp)
9955; RV32I-NEXT:    lw s1, 20(sp)
9956; RV32I-NEXT:    lw s0, 24(sp)
9957; RV32I-NEXT:    lw ra, 28(sp)
9958; RV32I-NEXT:    addi sp, sp, 32
9959; RV32I-NEXT:    ret
9960;
9961; RV32IA-LABEL: atomicrmw_umin_i16_seq_cst:
9962; RV32IA:       # %bb.0:
9963; RV32IA-NEXT:    lui a2, 16
9964; RV32IA-NEXT:    addi a2, a2, -1
9965; RV32IA-NEXT:    and a1, a1, a2
9966; RV32IA-NEXT:    slli a3, a0, 3
9967; RV32IA-NEXT:    andi a3, a3, 24
9968; RV32IA-NEXT:    sll a6, a2, a3
9969; RV32IA-NEXT:    sll a1, a1, a3
9970; RV32IA-NEXT:    andi a0, a0, -4
9971; RV32IA-NEXT:  .LBB109_1: # =>This Inner Loop Header: Depth=1
9972; RV32IA-NEXT:    lr.w.aqrl a4, (a0)
9973; RV32IA-NEXT:    and a2, a4, a6
9974; RV32IA-NEXT:    mv a5, a4
9975; RV32IA-NEXT:    bgeu a1, a2, .LBB109_3
9976; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB109_1 Depth=1
9977; RV32IA-NEXT:    xor a5, a4, a1
9978; RV32IA-NEXT:    and a5, a5, a6
9979; RV32IA-NEXT:    xor a5, a4, a5
9980; RV32IA-NEXT:  .LBB109_3: # in Loop: Header=BB109_1 Depth=1
9981; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a0)
9982; RV32IA-NEXT:    bnez a5, .LBB109_1
9983; RV32IA-NEXT:  # %bb.4:
9984; RV32IA-NEXT:    srl a0, a4, a3
9985; RV32IA-NEXT:    ret
9986;
9987; RV64I-LABEL: atomicrmw_umin_i16_seq_cst:
9988; RV64I:       # %bb.0:
9989; RV64I-NEXT:    addi sp, sp, -64
9990; RV64I-NEXT:    sd ra, 56(sp)
9991; RV64I-NEXT:    sd s0, 48(sp)
9992; RV64I-NEXT:    sd s1, 40(sp)
9993; RV64I-NEXT:    sd s2, 32(sp)
9994; RV64I-NEXT:    sd s3, 24(sp)
9995; RV64I-NEXT:    sd s4, 16(sp)
9996; RV64I-NEXT:    mv s2, a1
9997; RV64I-NEXT:    mv s4, a0
9998; RV64I-NEXT:    lhu a0, 0(a0)
9999; RV64I-NEXT:    lui a1, 16
10000; RV64I-NEXT:    addiw s0, a1, -1
10001; RV64I-NEXT:    and s1, s2, s0
10002; RV64I-NEXT:    addi s3, sp, 14
10003; RV64I-NEXT:  .LBB109_1: # %atomicrmw.start
10004; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
10005; RV64I-NEXT:    and a1, a0, s0
10006; RV64I-NEXT:    mv a2, a0
10007; RV64I-NEXT:    bgeu s1, a1, .LBB109_3
10008; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
10009; RV64I-NEXT:    # in Loop: Header=BB109_1 Depth=1
10010; RV64I-NEXT:    mv a2, s2
10011; RV64I-NEXT:  .LBB109_3: # %atomicrmw.start
10012; RV64I-NEXT:    # in Loop: Header=BB109_1 Depth=1
10013; RV64I-NEXT:    sh a0, 14(sp)
10014; RV64I-NEXT:    mv a0, s4
10015; RV64I-NEXT:    mv a1, s3
10016; RV64I-NEXT:    addi a3, zero, 5
10017; RV64I-NEXT:    addi a4, zero, 5
10018; RV64I-NEXT:    call __atomic_compare_exchange_2
10019; RV64I-NEXT:    mv a1, a0
10020; RV64I-NEXT:    lh a0, 14(sp)
10021; RV64I-NEXT:    beqz a1, .LBB109_1
10022; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
10023; RV64I-NEXT:    ld s4, 16(sp)
10024; RV64I-NEXT:    ld s3, 24(sp)
10025; RV64I-NEXT:    ld s2, 32(sp)
10026; RV64I-NEXT:    ld s1, 40(sp)
10027; RV64I-NEXT:    ld s0, 48(sp)
10028; RV64I-NEXT:    ld ra, 56(sp)
10029; RV64I-NEXT:    addi sp, sp, 64
10030; RV64I-NEXT:    ret
10031;
10032; RV64IA-LABEL: atomicrmw_umin_i16_seq_cst:
10033; RV64IA:       # %bb.0:
10034; RV64IA-NEXT:    lui a2, 16
10035; RV64IA-NEXT:    addiw a2, a2, -1
10036; RV64IA-NEXT:    and a1, a1, a2
10037; RV64IA-NEXT:    slli a3, a0, 3
10038; RV64IA-NEXT:    andi a3, a3, 24
10039; RV64IA-NEXT:    sllw a6, a2, a3
10040; RV64IA-NEXT:    sllw a1, a1, a3
10041; RV64IA-NEXT:    andi a0, a0, -4
10042; RV64IA-NEXT:  .LBB109_1: # =>This Inner Loop Header: Depth=1
10043; RV64IA-NEXT:    lr.w.aqrl a4, (a0)
10044; RV64IA-NEXT:    and a2, a4, a6
10045; RV64IA-NEXT:    mv a5, a4
10046; RV64IA-NEXT:    bgeu a1, a2, .LBB109_3
10047; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB109_1 Depth=1
10048; RV64IA-NEXT:    xor a5, a4, a1
10049; RV64IA-NEXT:    and a5, a5, a6
10050; RV64IA-NEXT:    xor a5, a4, a5
10051; RV64IA-NEXT:  .LBB109_3: # in Loop: Header=BB109_1 Depth=1
10052; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a0)
10053; RV64IA-NEXT:    bnez a5, .LBB109_1
10054; RV64IA-NEXT:  # %bb.4:
10055; RV64IA-NEXT:    srlw a0, a4, a3
10056; RV64IA-NEXT:    ret
10057  %1 = atomicrmw umin i16* %a, i16 %b seq_cst
10058  ret i16 %1
10059}
10060
10061define i32 @atomicrmw_xchg_i32_monotonic(i32* %a, i32 %b) {
10062; RV32I-LABEL: atomicrmw_xchg_i32_monotonic:
10063; RV32I:       # %bb.0:
10064; RV32I-NEXT:    addi sp, sp, -16
10065; RV32I-NEXT:    sw ra, 12(sp)
10066; RV32I-NEXT:    mv a2, zero
10067; RV32I-NEXT:    call __atomic_exchange_4
10068; RV32I-NEXT:    lw ra, 12(sp)
10069; RV32I-NEXT:    addi sp, sp, 16
10070; RV32I-NEXT:    ret
10071;
10072; RV32IA-LABEL: atomicrmw_xchg_i32_monotonic:
10073; RV32IA:       # %bb.0:
10074; RV32IA-NEXT:    amoswap.w a0, a1, (a0)
10075; RV32IA-NEXT:    ret
10076;
10077; RV64I-LABEL: atomicrmw_xchg_i32_monotonic:
10078; RV64I:       # %bb.0:
10079; RV64I-NEXT:    addi sp, sp, -16
10080; RV64I-NEXT:    sd ra, 8(sp)
10081; RV64I-NEXT:    mv a2, zero
10082; RV64I-NEXT:    call __atomic_exchange_4
10083; RV64I-NEXT:    ld ra, 8(sp)
10084; RV64I-NEXT:    addi sp, sp, 16
10085; RV64I-NEXT:    ret
10086;
10087; RV64IA-LABEL: atomicrmw_xchg_i32_monotonic:
10088; RV64IA:       # %bb.0:
10089; RV64IA-NEXT:    amoswap.w a0, a1, (a0)
10090; RV64IA-NEXT:    ret
10091  %1 = atomicrmw xchg i32* %a, i32 %b monotonic
10092  ret i32 %1
10093}
10094
10095define i32 @atomicrmw_xchg_i32_acquire(i32* %a, i32 %b) {
10096; RV32I-LABEL: atomicrmw_xchg_i32_acquire:
10097; RV32I:       # %bb.0:
10098; RV32I-NEXT:    addi sp, sp, -16
10099; RV32I-NEXT:    sw ra, 12(sp)
10100; RV32I-NEXT:    addi a2, zero, 2
10101; RV32I-NEXT:    call __atomic_exchange_4
10102; RV32I-NEXT:    lw ra, 12(sp)
10103; RV32I-NEXT:    addi sp, sp, 16
10104; RV32I-NEXT:    ret
10105;
10106; RV32IA-LABEL: atomicrmw_xchg_i32_acquire:
10107; RV32IA:       # %bb.0:
10108; RV32IA-NEXT:    amoswap.w.aq a0, a1, (a0)
10109; RV32IA-NEXT:    ret
10110;
10111; RV64I-LABEL: atomicrmw_xchg_i32_acquire:
10112; RV64I:       # %bb.0:
10113; RV64I-NEXT:    addi sp, sp, -16
10114; RV64I-NEXT:    sd ra, 8(sp)
10115; RV64I-NEXT:    addi a2, zero, 2
10116; RV64I-NEXT:    call __atomic_exchange_4
10117; RV64I-NEXT:    ld ra, 8(sp)
10118; RV64I-NEXT:    addi sp, sp, 16
10119; RV64I-NEXT:    ret
10120;
10121; RV64IA-LABEL: atomicrmw_xchg_i32_acquire:
10122; RV64IA:       # %bb.0:
10123; RV64IA-NEXT:    amoswap.w.aq a0, a1, (a0)
10124; RV64IA-NEXT:    ret
10125  %1 = atomicrmw xchg i32* %a, i32 %b acquire
10126  ret i32 %1
10127}
10128
10129define i32 @atomicrmw_xchg_i32_release(i32* %a, i32 %b) {
10130; RV32I-LABEL: atomicrmw_xchg_i32_release:
10131; RV32I:       # %bb.0:
10132; RV32I-NEXT:    addi sp, sp, -16
10133; RV32I-NEXT:    sw ra, 12(sp)
10134; RV32I-NEXT:    addi a2, zero, 3
10135; RV32I-NEXT:    call __atomic_exchange_4
10136; RV32I-NEXT:    lw ra, 12(sp)
10137; RV32I-NEXT:    addi sp, sp, 16
10138; RV32I-NEXT:    ret
10139;
10140; RV32IA-LABEL: atomicrmw_xchg_i32_release:
10141; RV32IA:       # %bb.0:
10142; RV32IA-NEXT:    amoswap.w.rl a0, a1, (a0)
10143; RV32IA-NEXT:    ret
10144;
10145; RV64I-LABEL: atomicrmw_xchg_i32_release:
10146; RV64I:       # %bb.0:
10147; RV64I-NEXT:    addi sp, sp, -16
10148; RV64I-NEXT:    sd ra, 8(sp)
10149; RV64I-NEXT:    addi a2, zero, 3
10150; RV64I-NEXT:    call __atomic_exchange_4
10151; RV64I-NEXT:    ld ra, 8(sp)
10152; RV64I-NEXT:    addi sp, sp, 16
10153; RV64I-NEXT:    ret
10154;
10155; RV64IA-LABEL: atomicrmw_xchg_i32_release:
10156; RV64IA:       # %bb.0:
10157; RV64IA-NEXT:    amoswap.w.rl a0, a1, (a0)
10158; RV64IA-NEXT:    ret
10159  %1 = atomicrmw xchg i32* %a, i32 %b release
10160  ret i32 %1
10161}
10162
10163define i32 @atomicrmw_xchg_i32_acq_rel(i32* %a, i32 %b) {
10164; RV32I-LABEL: atomicrmw_xchg_i32_acq_rel:
10165; RV32I:       # %bb.0:
10166; RV32I-NEXT:    addi sp, sp, -16
10167; RV32I-NEXT:    sw ra, 12(sp)
10168; RV32I-NEXT:    addi a2, zero, 4
10169; RV32I-NEXT:    call __atomic_exchange_4
10170; RV32I-NEXT:    lw ra, 12(sp)
10171; RV32I-NEXT:    addi sp, sp, 16
10172; RV32I-NEXT:    ret
10173;
10174; RV32IA-LABEL: atomicrmw_xchg_i32_acq_rel:
10175; RV32IA:       # %bb.0:
10176; RV32IA-NEXT:    amoswap.w.aqrl a0, a1, (a0)
10177; RV32IA-NEXT:    ret
10178;
10179; RV64I-LABEL: atomicrmw_xchg_i32_acq_rel:
10180; RV64I:       # %bb.0:
10181; RV64I-NEXT:    addi sp, sp, -16
10182; RV64I-NEXT:    sd ra, 8(sp)
10183; RV64I-NEXT:    addi a2, zero, 4
10184; RV64I-NEXT:    call __atomic_exchange_4
10185; RV64I-NEXT:    ld ra, 8(sp)
10186; RV64I-NEXT:    addi sp, sp, 16
10187; RV64I-NEXT:    ret
10188;
10189; RV64IA-LABEL: atomicrmw_xchg_i32_acq_rel:
10190; RV64IA:       # %bb.0:
10191; RV64IA-NEXT:    amoswap.w.aqrl a0, a1, (a0)
10192; RV64IA-NEXT:    ret
10193  %1 = atomicrmw xchg i32* %a, i32 %b acq_rel
10194  ret i32 %1
10195}
10196
10197define i32 @atomicrmw_xchg_i32_seq_cst(i32* %a, i32 %b) {
10198; RV32I-LABEL: atomicrmw_xchg_i32_seq_cst:
10199; RV32I:       # %bb.0:
10200; RV32I-NEXT:    addi sp, sp, -16
10201; RV32I-NEXT:    sw ra, 12(sp)
10202; RV32I-NEXT:    addi a2, zero, 5
10203; RV32I-NEXT:    call __atomic_exchange_4
10204; RV32I-NEXT:    lw ra, 12(sp)
10205; RV32I-NEXT:    addi sp, sp, 16
10206; RV32I-NEXT:    ret
10207;
10208; RV32IA-LABEL: atomicrmw_xchg_i32_seq_cst:
10209; RV32IA:       # %bb.0:
10210; RV32IA-NEXT:    amoswap.w.aqrl a0, a1, (a0)
10211; RV32IA-NEXT:    ret
10212;
10213; RV64I-LABEL: atomicrmw_xchg_i32_seq_cst:
10214; RV64I:       # %bb.0:
10215; RV64I-NEXT:    addi sp, sp, -16
10216; RV64I-NEXT:    sd ra, 8(sp)
10217; RV64I-NEXT:    addi a2, zero, 5
10218; RV64I-NEXT:    call __atomic_exchange_4
10219; RV64I-NEXT:    ld ra, 8(sp)
10220; RV64I-NEXT:    addi sp, sp, 16
10221; RV64I-NEXT:    ret
10222;
10223; RV64IA-LABEL: atomicrmw_xchg_i32_seq_cst:
10224; RV64IA:       # %bb.0:
10225; RV64IA-NEXT:    amoswap.w.aqrl a0, a1, (a0)
10226; RV64IA-NEXT:    ret
10227  %1 = atomicrmw xchg i32* %a, i32 %b seq_cst
10228  ret i32 %1
10229}
10230
10231define i32 @atomicrmw_add_i32_monotonic(i32 *%a, i32 %b) nounwind {
10232; RV32I-LABEL: atomicrmw_add_i32_monotonic:
10233; RV32I:       # %bb.0:
10234; RV32I-NEXT:    addi sp, sp, -16
10235; RV32I-NEXT:    sw ra, 12(sp)
10236; RV32I-NEXT:    mv a2, zero
10237; RV32I-NEXT:    call __atomic_fetch_add_4
10238; RV32I-NEXT:    lw ra, 12(sp)
10239; RV32I-NEXT:    addi sp, sp, 16
10240; RV32I-NEXT:    ret
10241;
10242; RV32IA-LABEL: atomicrmw_add_i32_monotonic:
10243; RV32IA:       # %bb.0:
10244; RV32IA-NEXT:    amoadd.w a0, a1, (a0)
10245; RV32IA-NEXT:    ret
10246;
10247; RV64I-LABEL: atomicrmw_add_i32_monotonic:
10248; RV64I:       # %bb.0:
10249; RV64I-NEXT:    addi sp, sp, -16
10250; RV64I-NEXT:    sd ra, 8(sp)
10251; RV64I-NEXT:    mv a2, zero
10252; RV64I-NEXT:    call __atomic_fetch_add_4
10253; RV64I-NEXT:    ld ra, 8(sp)
10254; RV64I-NEXT:    addi sp, sp, 16
10255; RV64I-NEXT:    ret
10256;
10257; RV64IA-LABEL: atomicrmw_add_i32_monotonic:
10258; RV64IA:       # %bb.0:
10259; RV64IA-NEXT:    amoadd.w a0, a1, (a0)
10260; RV64IA-NEXT:    ret
10261  %1 = atomicrmw add i32* %a, i32 %b monotonic
10262  ret i32 %1
10263}
10264
10265define i32 @atomicrmw_add_i32_acquire(i32 *%a, i32 %b) nounwind {
10266; RV32I-LABEL: atomicrmw_add_i32_acquire:
10267; RV32I:       # %bb.0:
10268; RV32I-NEXT:    addi sp, sp, -16
10269; RV32I-NEXT:    sw ra, 12(sp)
10270; RV32I-NEXT:    addi a2, zero, 2
10271; RV32I-NEXT:    call __atomic_fetch_add_4
10272; RV32I-NEXT:    lw ra, 12(sp)
10273; RV32I-NEXT:    addi sp, sp, 16
10274; RV32I-NEXT:    ret
10275;
10276; RV32IA-LABEL: atomicrmw_add_i32_acquire:
10277; RV32IA:       # %bb.0:
10278; RV32IA-NEXT:    amoadd.w.aq a0, a1, (a0)
10279; RV32IA-NEXT:    ret
10280;
10281; RV64I-LABEL: atomicrmw_add_i32_acquire:
10282; RV64I:       # %bb.0:
10283; RV64I-NEXT:    addi sp, sp, -16
10284; RV64I-NEXT:    sd ra, 8(sp)
10285; RV64I-NEXT:    addi a2, zero, 2
10286; RV64I-NEXT:    call __atomic_fetch_add_4
10287; RV64I-NEXT:    ld ra, 8(sp)
10288; RV64I-NEXT:    addi sp, sp, 16
10289; RV64I-NEXT:    ret
10290;
10291; RV64IA-LABEL: atomicrmw_add_i32_acquire:
10292; RV64IA:       # %bb.0:
10293; RV64IA-NEXT:    amoadd.w.aq a0, a1, (a0)
10294; RV64IA-NEXT:    ret
10295  %1 = atomicrmw add i32* %a, i32 %b acquire
10296  ret i32 %1
10297}
10298
10299define i32 @atomicrmw_add_i32_release(i32 *%a, i32 %b) nounwind {
10300; RV32I-LABEL: atomicrmw_add_i32_release:
10301; RV32I:       # %bb.0:
10302; RV32I-NEXT:    addi sp, sp, -16
10303; RV32I-NEXT:    sw ra, 12(sp)
10304; RV32I-NEXT:    addi a2, zero, 3
10305; RV32I-NEXT:    call __atomic_fetch_add_4
10306; RV32I-NEXT:    lw ra, 12(sp)
10307; RV32I-NEXT:    addi sp, sp, 16
10308; RV32I-NEXT:    ret
10309;
10310; RV32IA-LABEL: atomicrmw_add_i32_release:
10311; RV32IA:       # %bb.0:
10312; RV32IA-NEXT:    amoadd.w.rl a0, a1, (a0)
10313; RV32IA-NEXT:    ret
10314;
10315; RV64I-LABEL: atomicrmw_add_i32_release:
10316; RV64I:       # %bb.0:
10317; RV64I-NEXT:    addi sp, sp, -16
10318; RV64I-NEXT:    sd ra, 8(sp)
10319; RV64I-NEXT:    addi a2, zero, 3
10320; RV64I-NEXT:    call __atomic_fetch_add_4
10321; RV64I-NEXT:    ld ra, 8(sp)
10322; RV64I-NEXT:    addi sp, sp, 16
10323; RV64I-NEXT:    ret
10324;
10325; RV64IA-LABEL: atomicrmw_add_i32_release:
10326; RV64IA:       # %bb.0:
10327; RV64IA-NEXT:    amoadd.w.rl a0, a1, (a0)
10328; RV64IA-NEXT:    ret
10329  %1 = atomicrmw add i32* %a, i32 %b release
10330  ret i32 %1
10331}
10332
10333define i32 @atomicrmw_add_i32_acq_rel(i32 *%a, i32 %b) nounwind {
10334; RV32I-LABEL: atomicrmw_add_i32_acq_rel:
10335; RV32I:       # %bb.0:
10336; RV32I-NEXT:    addi sp, sp, -16
10337; RV32I-NEXT:    sw ra, 12(sp)
10338; RV32I-NEXT:    addi a2, zero, 4
10339; RV32I-NEXT:    call __atomic_fetch_add_4
10340; RV32I-NEXT:    lw ra, 12(sp)
10341; RV32I-NEXT:    addi sp, sp, 16
10342; RV32I-NEXT:    ret
10343;
10344; RV32IA-LABEL: atomicrmw_add_i32_acq_rel:
10345; RV32IA:       # %bb.0:
10346; RV32IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
10347; RV32IA-NEXT:    ret
10348;
10349; RV64I-LABEL: atomicrmw_add_i32_acq_rel:
10350; RV64I:       # %bb.0:
10351; RV64I-NEXT:    addi sp, sp, -16
10352; RV64I-NEXT:    sd ra, 8(sp)
10353; RV64I-NEXT:    addi a2, zero, 4
10354; RV64I-NEXT:    call __atomic_fetch_add_4
10355; RV64I-NEXT:    ld ra, 8(sp)
10356; RV64I-NEXT:    addi sp, sp, 16
10357; RV64I-NEXT:    ret
10358;
10359; RV64IA-LABEL: atomicrmw_add_i32_acq_rel:
10360; RV64IA:       # %bb.0:
10361; RV64IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
10362; RV64IA-NEXT:    ret
10363  %1 = atomicrmw add i32* %a, i32 %b acq_rel
10364  ret i32 %1
10365}
10366
10367define i32 @atomicrmw_add_i32_seq_cst(i32 *%a, i32 %b) nounwind {
10368; RV32I-LABEL: atomicrmw_add_i32_seq_cst:
10369; RV32I:       # %bb.0:
10370; RV32I-NEXT:    addi sp, sp, -16
10371; RV32I-NEXT:    sw ra, 12(sp)
10372; RV32I-NEXT:    addi a2, zero, 5
10373; RV32I-NEXT:    call __atomic_fetch_add_4
10374; RV32I-NEXT:    lw ra, 12(sp)
10375; RV32I-NEXT:    addi sp, sp, 16
10376; RV32I-NEXT:    ret
10377;
10378; RV32IA-LABEL: atomicrmw_add_i32_seq_cst:
10379; RV32IA:       # %bb.0:
10380; RV32IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
10381; RV32IA-NEXT:    ret
10382;
10383; RV64I-LABEL: atomicrmw_add_i32_seq_cst:
10384; RV64I:       # %bb.0:
10385; RV64I-NEXT:    addi sp, sp, -16
10386; RV64I-NEXT:    sd ra, 8(sp)
10387; RV64I-NEXT:    addi a2, zero, 5
10388; RV64I-NEXT:    call __atomic_fetch_add_4
10389; RV64I-NEXT:    ld ra, 8(sp)
10390; RV64I-NEXT:    addi sp, sp, 16
10391; RV64I-NEXT:    ret
10392;
10393; RV64IA-LABEL: atomicrmw_add_i32_seq_cst:
10394; RV64IA:       # %bb.0:
10395; RV64IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
10396; RV64IA-NEXT:    ret
10397  %1 = atomicrmw add i32* %a, i32 %b seq_cst
10398  ret i32 %1
10399}
10400
10401define i32 @atomicrmw_sub_i32_monotonic(i32* %a, i32 %b) {
10402; RV32I-LABEL: atomicrmw_sub_i32_monotonic:
10403; RV32I:       # %bb.0:
10404; RV32I-NEXT:    addi sp, sp, -16
10405; RV32I-NEXT:    sw ra, 12(sp)
10406; RV32I-NEXT:    mv a2, zero
10407; RV32I-NEXT:    call __atomic_fetch_sub_4
10408; RV32I-NEXT:    lw ra, 12(sp)
10409; RV32I-NEXT:    addi sp, sp, 16
10410; RV32I-NEXT:    ret
10411;
10412; RV32IA-LABEL: atomicrmw_sub_i32_monotonic:
10413; RV32IA:       # %bb.0:
10414; RV32IA-NEXT:    neg a1, a1
10415; RV32IA-NEXT:    amoadd.w a0, a1, (a0)
10416; RV32IA-NEXT:    ret
10417;
10418; RV64I-LABEL: atomicrmw_sub_i32_monotonic:
10419; RV64I:       # %bb.0:
10420; RV64I-NEXT:    addi sp, sp, -16
10421; RV64I-NEXT:    sd ra, 8(sp)
10422; RV64I-NEXT:    mv a2, zero
10423; RV64I-NEXT:    call __atomic_fetch_sub_4
10424; RV64I-NEXT:    ld ra, 8(sp)
10425; RV64I-NEXT:    addi sp, sp, 16
10426; RV64I-NEXT:    ret
10427;
10428; RV64IA-LABEL: atomicrmw_sub_i32_monotonic:
10429; RV64IA:       # %bb.0:
10430; RV64IA-NEXT:    neg a1, a1
10431; RV64IA-NEXT:    amoadd.w a0, a1, (a0)
10432; RV64IA-NEXT:    ret
10433  %1 = atomicrmw sub i32* %a, i32 %b monotonic
10434  ret i32 %1
10435}
10436
10437define i32 @atomicrmw_sub_i32_acquire(i32* %a, i32 %b) {
10438; RV32I-LABEL: atomicrmw_sub_i32_acquire:
10439; RV32I:       # %bb.0:
10440; RV32I-NEXT:    addi sp, sp, -16
10441; RV32I-NEXT:    sw ra, 12(sp)
10442; RV32I-NEXT:    addi a2, zero, 2
10443; RV32I-NEXT:    call __atomic_fetch_sub_4
10444; RV32I-NEXT:    lw ra, 12(sp)
10445; RV32I-NEXT:    addi sp, sp, 16
10446; RV32I-NEXT:    ret
10447;
10448; RV32IA-LABEL: atomicrmw_sub_i32_acquire:
10449; RV32IA:       # %bb.0:
10450; RV32IA-NEXT:    neg a1, a1
10451; RV32IA-NEXT:    amoadd.w.aq a0, a1, (a0)
10452; RV32IA-NEXT:    ret
10453;
10454; RV64I-LABEL: atomicrmw_sub_i32_acquire:
10455; RV64I:       # %bb.0:
10456; RV64I-NEXT:    addi sp, sp, -16
10457; RV64I-NEXT:    sd ra, 8(sp)
10458; RV64I-NEXT:    addi a2, zero, 2
10459; RV64I-NEXT:    call __atomic_fetch_sub_4
10460; RV64I-NEXT:    ld ra, 8(sp)
10461; RV64I-NEXT:    addi sp, sp, 16
10462; RV64I-NEXT:    ret
10463;
10464; RV64IA-LABEL: atomicrmw_sub_i32_acquire:
10465; RV64IA:       # %bb.0:
10466; RV64IA-NEXT:    neg a1, a1
10467; RV64IA-NEXT:    amoadd.w.aq a0, a1, (a0)
10468; RV64IA-NEXT:    ret
10469  %1 = atomicrmw sub i32* %a, i32 %b acquire
10470  ret i32 %1
10471}
10472
10473define i32 @atomicrmw_sub_i32_release(i32* %a, i32 %b) {
10474; RV32I-LABEL: atomicrmw_sub_i32_release:
10475; RV32I:       # %bb.0:
10476; RV32I-NEXT:    addi sp, sp, -16
10477; RV32I-NEXT:    sw ra, 12(sp)
10478; RV32I-NEXT:    addi a2, zero, 3
10479; RV32I-NEXT:    call __atomic_fetch_sub_4
10480; RV32I-NEXT:    lw ra, 12(sp)
10481; RV32I-NEXT:    addi sp, sp, 16
10482; RV32I-NEXT:    ret
10483;
10484; RV32IA-LABEL: atomicrmw_sub_i32_release:
10485; RV32IA:       # %bb.0:
10486; RV32IA-NEXT:    neg a1, a1
10487; RV32IA-NEXT:    amoadd.w.rl a0, a1, (a0)
10488; RV32IA-NEXT:    ret
10489;
10490; RV64I-LABEL: atomicrmw_sub_i32_release:
10491; RV64I:       # %bb.0:
10492; RV64I-NEXT:    addi sp, sp, -16
10493; RV64I-NEXT:    sd ra, 8(sp)
10494; RV64I-NEXT:    addi a2, zero, 3
10495; RV64I-NEXT:    call __atomic_fetch_sub_4
10496; RV64I-NEXT:    ld ra, 8(sp)
10497; RV64I-NEXT:    addi sp, sp, 16
10498; RV64I-NEXT:    ret
10499;
10500; RV64IA-LABEL: atomicrmw_sub_i32_release:
10501; RV64IA:       # %bb.0:
10502; RV64IA-NEXT:    neg a1, a1
10503; RV64IA-NEXT:    amoadd.w.rl a0, a1, (a0)
10504; RV64IA-NEXT:    ret
10505  %1 = atomicrmw sub i32* %a, i32 %b release
10506  ret i32 %1
10507}
10508
10509define i32 @atomicrmw_sub_i32_acq_rel(i32* %a, i32 %b) {
10510; RV32I-LABEL: atomicrmw_sub_i32_acq_rel:
10511; RV32I:       # %bb.0:
10512; RV32I-NEXT:    addi sp, sp, -16
10513; RV32I-NEXT:    sw ra, 12(sp)
10514; RV32I-NEXT:    addi a2, zero, 4
10515; RV32I-NEXT:    call __atomic_fetch_sub_4
10516; RV32I-NEXT:    lw ra, 12(sp)
10517; RV32I-NEXT:    addi sp, sp, 16
10518; RV32I-NEXT:    ret
10519;
10520; RV32IA-LABEL: atomicrmw_sub_i32_acq_rel:
10521; RV32IA:       # %bb.0:
10522; RV32IA-NEXT:    neg a1, a1
10523; RV32IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
10524; RV32IA-NEXT:    ret
10525;
10526; RV64I-LABEL: atomicrmw_sub_i32_acq_rel:
10527; RV64I:       # %bb.0:
10528; RV64I-NEXT:    addi sp, sp, -16
10529; RV64I-NEXT:    sd ra, 8(sp)
10530; RV64I-NEXT:    addi a2, zero, 4
10531; RV64I-NEXT:    call __atomic_fetch_sub_4
10532; RV64I-NEXT:    ld ra, 8(sp)
10533; RV64I-NEXT:    addi sp, sp, 16
10534; RV64I-NEXT:    ret
10535;
10536; RV64IA-LABEL: atomicrmw_sub_i32_acq_rel:
10537; RV64IA:       # %bb.0:
10538; RV64IA-NEXT:    neg a1, a1
10539; RV64IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
10540; RV64IA-NEXT:    ret
10541  %1 = atomicrmw sub i32* %a, i32 %b acq_rel
10542  ret i32 %1
10543}
10544
10545define i32 @atomicrmw_sub_i32_seq_cst(i32* %a, i32 %b) {
10546; RV32I-LABEL: atomicrmw_sub_i32_seq_cst:
10547; RV32I:       # %bb.0:
10548; RV32I-NEXT:    addi sp, sp, -16
10549; RV32I-NEXT:    sw ra, 12(sp)
10550; RV32I-NEXT:    addi a2, zero, 5
10551; RV32I-NEXT:    call __atomic_fetch_sub_4
10552; RV32I-NEXT:    lw ra, 12(sp)
10553; RV32I-NEXT:    addi sp, sp, 16
10554; RV32I-NEXT:    ret
10555;
10556; RV32IA-LABEL: atomicrmw_sub_i32_seq_cst:
10557; RV32IA:       # %bb.0:
10558; RV32IA-NEXT:    neg a1, a1
10559; RV32IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
10560; RV32IA-NEXT:    ret
10561;
10562; RV64I-LABEL: atomicrmw_sub_i32_seq_cst:
10563; RV64I:       # %bb.0:
10564; RV64I-NEXT:    addi sp, sp, -16
10565; RV64I-NEXT:    sd ra, 8(sp)
10566; RV64I-NEXT:    addi a2, zero, 5
10567; RV64I-NEXT:    call __atomic_fetch_sub_4
10568; RV64I-NEXT:    ld ra, 8(sp)
10569; RV64I-NEXT:    addi sp, sp, 16
10570; RV64I-NEXT:    ret
10571;
10572; RV64IA-LABEL: atomicrmw_sub_i32_seq_cst:
10573; RV64IA:       # %bb.0:
10574; RV64IA-NEXT:    neg a1, a1
10575; RV64IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
10576; RV64IA-NEXT:    ret
10577  %1 = atomicrmw sub i32* %a, i32 %b seq_cst
10578  ret i32 %1
10579}
10580
10581define i32 @atomicrmw_and_i32_monotonic(i32 *%a, i32 %b) nounwind {
10582; RV32I-LABEL: atomicrmw_and_i32_monotonic:
10583; RV32I:       # %bb.0:
10584; RV32I-NEXT:    addi sp, sp, -16
10585; RV32I-NEXT:    sw ra, 12(sp)
10586; RV32I-NEXT:    mv a2, zero
10587; RV32I-NEXT:    call __atomic_fetch_and_4
10588; RV32I-NEXT:    lw ra, 12(sp)
10589; RV32I-NEXT:    addi sp, sp, 16
10590; RV32I-NEXT:    ret
10591;
10592; RV32IA-LABEL: atomicrmw_and_i32_monotonic:
10593; RV32IA:       # %bb.0:
10594; RV32IA-NEXT:    amoand.w a0, a1, (a0)
10595; RV32IA-NEXT:    ret
10596;
10597; RV64I-LABEL: atomicrmw_and_i32_monotonic:
10598; RV64I:       # %bb.0:
10599; RV64I-NEXT:    addi sp, sp, -16
10600; RV64I-NEXT:    sd ra, 8(sp)
10601; RV64I-NEXT:    mv a2, zero
10602; RV64I-NEXT:    call __atomic_fetch_and_4
10603; RV64I-NEXT:    ld ra, 8(sp)
10604; RV64I-NEXT:    addi sp, sp, 16
10605; RV64I-NEXT:    ret
10606;
10607; RV64IA-LABEL: atomicrmw_and_i32_monotonic:
10608; RV64IA:       # %bb.0:
10609; RV64IA-NEXT:    amoand.w a0, a1, (a0)
10610; RV64IA-NEXT:    ret
10611  %1 = atomicrmw and i32* %a, i32 %b monotonic
10612  ret i32 %1
10613}
10614
10615define i32 @atomicrmw_and_i32_acquire(i32 *%a, i32 %b) nounwind {
10616; RV32I-LABEL: atomicrmw_and_i32_acquire:
10617; RV32I:       # %bb.0:
10618; RV32I-NEXT:    addi sp, sp, -16
10619; RV32I-NEXT:    sw ra, 12(sp)
10620; RV32I-NEXT:    addi a2, zero, 2
10621; RV32I-NEXT:    call __atomic_fetch_and_4
10622; RV32I-NEXT:    lw ra, 12(sp)
10623; RV32I-NEXT:    addi sp, sp, 16
10624; RV32I-NEXT:    ret
10625;
10626; RV32IA-LABEL: atomicrmw_and_i32_acquire:
10627; RV32IA:       # %bb.0:
10628; RV32IA-NEXT:    amoand.w.aq a0, a1, (a0)
10629; RV32IA-NEXT:    ret
10630;
10631; RV64I-LABEL: atomicrmw_and_i32_acquire:
10632; RV64I:       # %bb.0:
10633; RV64I-NEXT:    addi sp, sp, -16
10634; RV64I-NEXT:    sd ra, 8(sp)
10635; RV64I-NEXT:    addi a2, zero, 2
10636; RV64I-NEXT:    call __atomic_fetch_and_4
10637; RV64I-NEXT:    ld ra, 8(sp)
10638; RV64I-NEXT:    addi sp, sp, 16
10639; RV64I-NEXT:    ret
10640;
10641; RV64IA-LABEL: atomicrmw_and_i32_acquire:
10642; RV64IA:       # %bb.0:
10643; RV64IA-NEXT:    amoand.w.aq a0, a1, (a0)
10644; RV64IA-NEXT:    ret
10645  %1 = atomicrmw and i32* %a, i32 %b acquire
10646  ret i32 %1
10647}
10648
10649define i32 @atomicrmw_and_i32_release(i32 *%a, i32 %b) nounwind {
10650; RV32I-LABEL: atomicrmw_and_i32_release:
10651; RV32I:       # %bb.0:
10652; RV32I-NEXT:    addi sp, sp, -16
10653; RV32I-NEXT:    sw ra, 12(sp)
10654; RV32I-NEXT:    addi a2, zero, 3
10655; RV32I-NEXT:    call __atomic_fetch_and_4
10656; RV32I-NEXT:    lw ra, 12(sp)
10657; RV32I-NEXT:    addi sp, sp, 16
10658; RV32I-NEXT:    ret
10659;
10660; RV32IA-LABEL: atomicrmw_and_i32_release:
10661; RV32IA:       # %bb.0:
10662; RV32IA-NEXT:    amoand.w.rl a0, a1, (a0)
10663; RV32IA-NEXT:    ret
10664;
10665; RV64I-LABEL: atomicrmw_and_i32_release:
10666; RV64I:       # %bb.0:
10667; RV64I-NEXT:    addi sp, sp, -16
10668; RV64I-NEXT:    sd ra, 8(sp)
10669; RV64I-NEXT:    addi a2, zero, 3
10670; RV64I-NEXT:    call __atomic_fetch_and_4
10671; RV64I-NEXT:    ld ra, 8(sp)
10672; RV64I-NEXT:    addi sp, sp, 16
10673; RV64I-NEXT:    ret
10674;
10675; RV64IA-LABEL: atomicrmw_and_i32_release:
10676; RV64IA:       # %bb.0:
10677; RV64IA-NEXT:    amoand.w.rl a0, a1, (a0)
10678; RV64IA-NEXT:    ret
10679  %1 = atomicrmw and i32* %a, i32 %b release
10680  ret i32 %1
10681}
10682
10683define i32 @atomicrmw_and_i32_acq_rel(i32 *%a, i32 %b) nounwind {
10684; RV32I-LABEL: atomicrmw_and_i32_acq_rel:
10685; RV32I:       # %bb.0:
10686; RV32I-NEXT:    addi sp, sp, -16
10687; RV32I-NEXT:    sw ra, 12(sp)
10688; RV32I-NEXT:    addi a2, zero, 4
10689; RV32I-NEXT:    call __atomic_fetch_and_4
10690; RV32I-NEXT:    lw ra, 12(sp)
10691; RV32I-NEXT:    addi sp, sp, 16
10692; RV32I-NEXT:    ret
10693;
10694; RV32IA-LABEL: atomicrmw_and_i32_acq_rel:
10695; RV32IA:       # %bb.0:
10696; RV32IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
10697; RV32IA-NEXT:    ret
10698;
10699; RV64I-LABEL: atomicrmw_and_i32_acq_rel:
10700; RV64I:       # %bb.0:
10701; RV64I-NEXT:    addi sp, sp, -16
10702; RV64I-NEXT:    sd ra, 8(sp)
10703; RV64I-NEXT:    addi a2, zero, 4
10704; RV64I-NEXT:    call __atomic_fetch_and_4
10705; RV64I-NEXT:    ld ra, 8(sp)
10706; RV64I-NEXT:    addi sp, sp, 16
10707; RV64I-NEXT:    ret
10708;
10709; RV64IA-LABEL: atomicrmw_and_i32_acq_rel:
10710; RV64IA:       # %bb.0:
10711; RV64IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
10712; RV64IA-NEXT:    ret
10713  %1 = atomicrmw and i32* %a, i32 %b acq_rel
10714  ret i32 %1
10715}
10716
10717define i32 @atomicrmw_and_i32_seq_cst(i32 *%a, i32 %b) nounwind {
10718; RV32I-LABEL: atomicrmw_and_i32_seq_cst:
10719; RV32I:       # %bb.0:
10720; RV32I-NEXT:    addi sp, sp, -16
10721; RV32I-NEXT:    sw ra, 12(sp)
10722; RV32I-NEXT:    addi a2, zero, 5
10723; RV32I-NEXT:    call __atomic_fetch_and_4
10724; RV32I-NEXT:    lw ra, 12(sp)
10725; RV32I-NEXT:    addi sp, sp, 16
10726; RV32I-NEXT:    ret
10727;
10728; RV32IA-LABEL: atomicrmw_and_i32_seq_cst:
10729; RV32IA:       # %bb.0:
10730; RV32IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
10731; RV32IA-NEXT:    ret
10732;
10733; RV64I-LABEL: atomicrmw_and_i32_seq_cst:
10734; RV64I:       # %bb.0:
10735; RV64I-NEXT:    addi sp, sp, -16
10736; RV64I-NEXT:    sd ra, 8(sp)
10737; RV64I-NEXT:    addi a2, zero, 5
10738; RV64I-NEXT:    call __atomic_fetch_and_4
10739; RV64I-NEXT:    ld ra, 8(sp)
10740; RV64I-NEXT:    addi sp, sp, 16
10741; RV64I-NEXT:    ret
10742;
10743; RV64IA-LABEL: atomicrmw_and_i32_seq_cst:
10744; RV64IA:       # %bb.0:
10745; RV64IA-NEXT:    amoand.w.aqrl a0, a1, (a0)
10746; RV64IA-NEXT:    ret
10747  %1 = atomicrmw and i32* %a, i32 %b seq_cst
10748  ret i32 %1
10749}
10750
10751define i32 @atomicrmw_nand_i32_monotonic(i32* %a, i32 %b) {
10752; RV32I-LABEL: atomicrmw_nand_i32_monotonic:
10753; RV32I:       # %bb.0:
10754; RV32I-NEXT:    addi sp, sp, -16
10755; RV32I-NEXT:    sw ra, 12(sp)
10756; RV32I-NEXT:    mv a2, zero
10757; RV32I-NEXT:    call __atomic_fetch_nand_4
10758; RV32I-NEXT:    lw ra, 12(sp)
10759; RV32I-NEXT:    addi sp, sp, 16
10760; RV32I-NEXT:    ret
10761;
10762; RV32IA-LABEL: atomicrmw_nand_i32_monotonic:
10763; RV32IA:       # %bb.0:
10764; RV32IA-NEXT:  .LBB130_1: # =>This Inner Loop Header: Depth=1
10765; RV32IA-NEXT:    lr.w a2, (a0)
10766; RV32IA-NEXT:    and a3, a2, a1
10767; RV32IA-NEXT:    not a3, a3
10768; RV32IA-NEXT:    sc.w a3, a3, (a0)
10769; RV32IA-NEXT:    bnez a3, .LBB130_1
10770; RV32IA-NEXT:  # %bb.2:
10771; RV32IA-NEXT:    mv a0, a2
10772; RV32IA-NEXT:    ret
10773;
10774; RV64I-LABEL: atomicrmw_nand_i32_monotonic:
10775; RV64I:       # %bb.0:
10776; RV64I-NEXT:    addi sp, sp, -16
10777; RV64I-NEXT:    sd ra, 8(sp)
10778; RV64I-NEXT:    mv a2, zero
10779; RV64I-NEXT:    call __atomic_fetch_nand_4
10780; RV64I-NEXT:    ld ra, 8(sp)
10781; RV64I-NEXT:    addi sp, sp, 16
10782; RV64I-NEXT:    ret
10783;
10784; RV64IA-LABEL: atomicrmw_nand_i32_monotonic:
10785; RV64IA:       # %bb.0:
10786; RV64IA-NEXT:  .LBB130_1: # =>This Inner Loop Header: Depth=1
10787; RV64IA-NEXT:    lr.w a2, (a0)
10788; RV64IA-NEXT:    and a3, a2, a1
10789; RV64IA-NEXT:    not a3, a3
10790; RV64IA-NEXT:    sc.w a3, a3, (a0)
10791; RV64IA-NEXT:    bnez a3, .LBB130_1
10792; RV64IA-NEXT:  # %bb.2:
10793; RV64IA-NEXT:    mv a0, a2
10794; RV64IA-NEXT:    ret
10795  %1 = atomicrmw nand i32* %a, i32 %b monotonic
10796  ret i32 %1
10797}
10798
10799define i32 @atomicrmw_nand_i32_acquire(i32* %a, i32 %b) {
10800; RV32I-LABEL: atomicrmw_nand_i32_acquire:
10801; RV32I:       # %bb.0:
10802; RV32I-NEXT:    addi sp, sp, -16
10803; RV32I-NEXT:    sw ra, 12(sp)
10804; RV32I-NEXT:    addi a2, zero, 2
10805; RV32I-NEXT:    call __atomic_fetch_nand_4
10806; RV32I-NEXT:    lw ra, 12(sp)
10807; RV32I-NEXT:    addi sp, sp, 16
10808; RV32I-NEXT:    ret
10809;
10810; RV32IA-LABEL: atomicrmw_nand_i32_acquire:
10811; RV32IA:       # %bb.0:
10812; RV32IA-NEXT:  .LBB131_1: # =>This Inner Loop Header: Depth=1
10813; RV32IA-NEXT:    lr.w.aq a2, (a0)
10814; RV32IA-NEXT:    and a3, a2, a1
10815; RV32IA-NEXT:    not a3, a3
10816; RV32IA-NEXT:    sc.w a3, a3, (a0)
10817; RV32IA-NEXT:    bnez a3, .LBB131_1
10818; RV32IA-NEXT:  # %bb.2:
10819; RV32IA-NEXT:    mv a0, a2
10820; RV32IA-NEXT:    ret
10821;
10822; RV64I-LABEL: atomicrmw_nand_i32_acquire:
10823; RV64I:       # %bb.0:
10824; RV64I-NEXT:    addi sp, sp, -16
10825; RV64I-NEXT:    sd ra, 8(sp)
10826; RV64I-NEXT:    addi a2, zero, 2
10827; RV64I-NEXT:    call __atomic_fetch_nand_4
10828; RV64I-NEXT:    ld ra, 8(sp)
10829; RV64I-NEXT:    addi sp, sp, 16
10830; RV64I-NEXT:    ret
10831;
10832; RV64IA-LABEL: atomicrmw_nand_i32_acquire:
10833; RV64IA:       # %bb.0:
10834; RV64IA-NEXT:  .LBB131_1: # =>This Inner Loop Header: Depth=1
10835; RV64IA-NEXT:    lr.w.aq a2, (a0)
10836; RV64IA-NEXT:    and a3, a2, a1
10837; RV64IA-NEXT:    not a3, a3
10838; RV64IA-NEXT:    sc.w a3, a3, (a0)
10839; RV64IA-NEXT:    bnez a3, .LBB131_1
10840; RV64IA-NEXT:  # %bb.2:
10841; RV64IA-NEXT:    mv a0, a2
10842; RV64IA-NEXT:    ret
10843  %1 = atomicrmw nand i32* %a, i32 %b acquire
10844  ret i32 %1
10845}
10846
10847define i32 @atomicrmw_nand_i32_release(i32* %a, i32 %b) {
10848; RV32I-LABEL: atomicrmw_nand_i32_release:
10849; RV32I:       # %bb.0:
10850; RV32I-NEXT:    addi sp, sp, -16
10851; RV32I-NEXT:    sw ra, 12(sp)
10852; RV32I-NEXT:    addi a2, zero, 3
10853; RV32I-NEXT:    call __atomic_fetch_nand_4
10854; RV32I-NEXT:    lw ra, 12(sp)
10855; RV32I-NEXT:    addi sp, sp, 16
10856; RV32I-NEXT:    ret
10857;
10858; RV32IA-LABEL: atomicrmw_nand_i32_release:
10859; RV32IA:       # %bb.0:
10860; RV32IA-NEXT:  .LBB132_1: # =>This Inner Loop Header: Depth=1
10861; RV32IA-NEXT:    lr.w a2, (a0)
10862; RV32IA-NEXT:    and a3, a2, a1
10863; RV32IA-NEXT:    not a3, a3
10864; RV32IA-NEXT:    sc.w.rl a3, a3, (a0)
10865; RV32IA-NEXT:    bnez a3, .LBB132_1
10866; RV32IA-NEXT:  # %bb.2:
10867; RV32IA-NEXT:    mv a0, a2
10868; RV32IA-NEXT:    ret
10869;
10870; RV64I-LABEL: atomicrmw_nand_i32_release:
10871; RV64I:       # %bb.0:
10872; RV64I-NEXT:    addi sp, sp, -16
10873; RV64I-NEXT:    sd ra, 8(sp)
10874; RV64I-NEXT:    addi a2, zero, 3
10875; RV64I-NEXT:    call __atomic_fetch_nand_4
10876; RV64I-NEXT:    ld ra, 8(sp)
10877; RV64I-NEXT:    addi sp, sp, 16
10878; RV64I-NEXT:    ret
10879;
10880; RV64IA-LABEL: atomicrmw_nand_i32_release:
10881; RV64IA:       # %bb.0:
10882; RV64IA-NEXT:  .LBB132_1: # =>This Inner Loop Header: Depth=1
10883; RV64IA-NEXT:    lr.w a2, (a0)
10884; RV64IA-NEXT:    and a3, a2, a1
10885; RV64IA-NEXT:    not a3, a3
10886; RV64IA-NEXT:    sc.w.rl a3, a3, (a0)
10887; RV64IA-NEXT:    bnez a3, .LBB132_1
10888; RV64IA-NEXT:  # %bb.2:
10889; RV64IA-NEXT:    mv a0, a2
10890; RV64IA-NEXT:    ret
10891  %1 = atomicrmw nand i32* %a, i32 %b release
10892  ret i32 %1
10893}
10894
10895define i32 @atomicrmw_nand_i32_acq_rel(i32* %a, i32 %b) {
10896; RV32I-LABEL: atomicrmw_nand_i32_acq_rel:
10897; RV32I:       # %bb.0:
10898; RV32I-NEXT:    addi sp, sp, -16
10899; RV32I-NEXT:    sw ra, 12(sp)
10900; RV32I-NEXT:    addi a2, zero, 4
10901; RV32I-NEXT:    call __atomic_fetch_nand_4
10902; RV32I-NEXT:    lw ra, 12(sp)
10903; RV32I-NEXT:    addi sp, sp, 16
10904; RV32I-NEXT:    ret
10905;
10906; RV32IA-LABEL: atomicrmw_nand_i32_acq_rel:
10907; RV32IA:       # %bb.0:
10908; RV32IA-NEXT:  .LBB133_1: # =>This Inner Loop Header: Depth=1
10909; RV32IA-NEXT:    lr.w.aq a2, (a0)
10910; RV32IA-NEXT:    and a3, a2, a1
10911; RV32IA-NEXT:    not a3, a3
10912; RV32IA-NEXT:    sc.w.rl a3, a3, (a0)
10913; RV32IA-NEXT:    bnez a3, .LBB133_1
10914; RV32IA-NEXT:  # %bb.2:
10915; RV32IA-NEXT:    mv a0, a2
10916; RV32IA-NEXT:    ret
10917;
10918; RV64I-LABEL: atomicrmw_nand_i32_acq_rel:
10919; RV64I:       # %bb.0:
10920; RV64I-NEXT:    addi sp, sp, -16
10921; RV64I-NEXT:    sd ra, 8(sp)
10922; RV64I-NEXT:    addi a2, zero, 4
10923; RV64I-NEXT:    call __atomic_fetch_nand_4
10924; RV64I-NEXT:    ld ra, 8(sp)
10925; RV64I-NEXT:    addi sp, sp, 16
10926; RV64I-NEXT:    ret
10927;
10928; RV64IA-LABEL: atomicrmw_nand_i32_acq_rel:
10929; RV64IA:       # %bb.0:
10930; RV64IA-NEXT:  .LBB133_1: # =>This Inner Loop Header: Depth=1
10931; RV64IA-NEXT:    lr.w.aq a2, (a0)
10932; RV64IA-NEXT:    and a3, a2, a1
10933; RV64IA-NEXT:    not a3, a3
10934; RV64IA-NEXT:    sc.w.rl a3, a3, (a0)
10935; RV64IA-NEXT:    bnez a3, .LBB133_1
10936; RV64IA-NEXT:  # %bb.2:
10937; RV64IA-NEXT:    mv a0, a2
10938; RV64IA-NEXT:    ret
10939  %1 = atomicrmw nand i32* %a, i32 %b acq_rel
10940  ret i32 %1
10941}
10942
10943define i32 @atomicrmw_nand_i32_seq_cst(i32* %a, i32 %b) {
10944; RV32I-LABEL: atomicrmw_nand_i32_seq_cst:
10945; RV32I:       # %bb.0:
10946; RV32I-NEXT:    addi sp, sp, -16
10947; RV32I-NEXT:    sw ra, 12(sp)
10948; RV32I-NEXT:    addi a2, zero, 5
10949; RV32I-NEXT:    call __atomic_fetch_nand_4
10950; RV32I-NEXT:    lw ra, 12(sp)
10951; RV32I-NEXT:    addi sp, sp, 16
10952; RV32I-NEXT:    ret
10953;
10954; RV32IA-LABEL: atomicrmw_nand_i32_seq_cst:
10955; RV32IA:       # %bb.0:
10956; RV32IA-NEXT:  .LBB134_1: # =>This Inner Loop Header: Depth=1
10957; RV32IA-NEXT:    lr.w.aqrl a2, (a0)
10958; RV32IA-NEXT:    and a3, a2, a1
10959; RV32IA-NEXT:    not a3, a3
10960; RV32IA-NEXT:    sc.w.aqrl a3, a3, (a0)
10961; RV32IA-NEXT:    bnez a3, .LBB134_1
10962; RV32IA-NEXT:  # %bb.2:
10963; RV32IA-NEXT:    mv a0, a2
10964; RV32IA-NEXT:    ret
10965;
10966; RV64I-LABEL: atomicrmw_nand_i32_seq_cst:
10967; RV64I:       # %bb.0:
10968; RV64I-NEXT:    addi sp, sp, -16
10969; RV64I-NEXT:    sd ra, 8(sp)
10970; RV64I-NEXT:    addi a2, zero, 5
10971; RV64I-NEXT:    call __atomic_fetch_nand_4
10972; RV64I-NEXT:    ld ra, 8(sp)
10973; RV64I-NEXT:    addi sp, sp, 16
10974; RV64I-NEXT:    ret
10975;
10976; RV64IA-LABEL: atomicrmw_nand_i32_seq_cst:
10977; RV64IA:       # %bb.0:
10978; RV64IA-NEXT:  .LBB134_1: # =>This Inner Loop Header: Depth=1
10979; RV64IA-NEXT:    lr.w.aqrl a2, (a0)
10980; RV64IA-NEXT:    and a3, a2, a1
10981; RV64IA-NEXT:    not a3, a3
10982; RV64IA-NEXT:    sc.w.aqrl a3, a3, (a0)
10983; RV64IA-NEXT:    bnez a3, .LBB134_1
10984; RV64IA-NEXT:  # %bb.2:
10985; RV64IA-NEXT:    mv a0, a2
10986; RV64IA-NEXT:    ret
10987  %1 = atomicrmw nand i32* %a, i32 %b seq_cst
10988  ret i32 %1
10989}
10990
10991define i32 @atomicrmw_or_i32_monotonic(i32 *%a, i32 %b) nounwind {
10992; RV32I-LABEL: atomicrmw_or_i32_monotonic:
10993; RV32I:       # %bb.0:
10994; RV32I-NEXT:    addi sp, sp, -16
10995; RV32I-NEXT:    sw ra, 12(sp)
10996; RV32I-NEXT:    mv a2, zero
10997; RV32I-NEXT:    call __atomic_fetch_or_4
10998; RV32I-NEXT:    lw ra, 12(sp)
10999; RV32I-NEXT:    addi sp, sp, 16
11000; RV32I-NEXT:    ret
11001;
11002; RV32IA-LABEL: atomicrmw_or_i32_monotonic:
11003; RV32IA:       # %bb.0:
11004; RV32IA-NEXT:    amoor.w a0, a1, (a0)
11005; RV32IA-NEXT:    ret
11006;
11007; RV64I-LABEL: atomicrmw_or_i32_monotonic:
11008; RV64I:       # %bb.0:
11009; RV64I-NEXT:    addi sp, sp, -16
11010; RV64I-NEXT:    sd ra, 8(sp)
11011; RV64I-NEXT:    mv a2, zero
11012; RV64I-NEXT:    call __atomic_fetch_or_4
11013; RV64I-NEXT:    ld ra, 8(sp)
11014; RV64I-NEXT:    addi sp, sp, 16
11015; RV64I-NEXT:    ret
11016;
11017; RV64IA-LABEL: atomicrmw_or_i32_monotonic:
11018; RV64IA:       # %bb.0:
11019; RV64IA-NEXT:    amoor.w a0, a1, (a0)
11020; RV64IA-NEXT:    ret
11021  %1 = atomicrmw or i32* %a, i32 %b monotonic
11022  ret i32 %1
11023}
11024
11025define i32 @atomicrmw_or_i32_acquire(i32 *%a, i32 %b) nounwind {
11026; RV32I-LABEL: atomicrmw_or_i32_acquire:
11027; RV32I:       # %bb.0:
11028; RV32I-NEXT:    addi sp, sp, -16
11029; RV32I-NEXT:    sw ra, 12(sp)
11030; RV32I-NEXT:    addi a2, zero, 2
11031; RV32I-NEXT:    call __atomic_fetch_or_4
11032; RV32I-NEXT:    lw ra, 12(sp)
11033; RV32I-NEXT:    addi sp, sp, 16
11034; RV32I-NEXT:    ret
11035;
11036; RV32IA-LABEL: atomicrmw_or_i32_acquire:
11037; RV32IA:       # %bb.0:
11038; RV32IA-NEXT:    amoor.w.aq a0, a1, (a0)
11039; RV32IA-NEXT:    ret
11040;
11041; RV64I-LABEL: atomicrmw_or_i32_acquire:
11042; RV64I:       # %bb.0:
11043; RV64I-NEXT:    addi sp, sp, -16
11044; RV64I-NEXT:    sd ra, 8(sp)
11045; RV64I-NEXT:    addi a2, zero, 2
11046; RV64I-NEXT:    call __atomic_fetch_or_4
11047; RV64I-NEXT:    ld ra, 8(sp)
11048; RV64I-NEXT:    addi sp, sp, 16
11049; RV64I-NEXT:    ret
11050;
11051; RV64IA-LABEL: atomicrmw_or_i32_acquire:
11052; RV64IA:       # %bb.0:
11053; RV64IA-NEXT:    amoor.w.aq a0, a1, (a0)
11054; RV64IA-NEXT:    ret
11055  %1 = atomicrmw or i32* %a, i32 %b acquire
11056  ret i32 %1
11057}
11058
11059define i32 @atomicrmw_or_i32_release(i32 *%a, i32 %b) nounwind {
11060; RV32I-LABEL: atomicrmw_or_i32_release:
11061; RV32I:       # %bb.0:
11062; RV32I-NEXT:    addi sp, sp, -16
11063; RV32I-NEXT:    sw ra, 12(sp)
11064; RV32I-NEXT:    addi a2, zero, 3
11065; RV32I-NEXT:    call __atomic_fetch_or_4
11066; RV32I-NEXT:    lw ra, 12(sp)
11067; RV32I-NEXT:    addi sp, sp, 16
11068; RV32I-NEXT:    ret
11069;
11070; RV32IA-LABEL: atomicrmw_or_i32_release:
11071; RV32IA:       # %bb.0:
11072; RV32IA-NEXT:    amoor.w.rl a0, a1, (a0)
11073; RV32IA-NEXT:    ret
11074;
11075; RV64I-LABEL: atomicrmw_or_i32_release:
11076; RV64I:       # %bb.0:
11077; RV64I-NEXT:    addi sp, sp, -16
11078; RV64I-NEXT:    sd ra, 8(sp)
11079; RV64I-NEXT:    addi a2, zero, 3
11080; RV64I-NEXT:    call __atomic_fetch_or_4
11081; RV64I-NEXT:    ld ra, 8(sp)
11082; RV64I-NEXT:    addi sp, sp, 16
11083; RV64I-NEXT:    ret
11084;
11085; RV64IA-LABEL: atomicrmw_or_i32_release:
11086; RV64IA:       # %bb.0:
11087; RV64IA-NEXT:    amoor.w.rl a0, a1, (a0)
11088; RV64IA-NEXT:    ret
11089  %1 = atomicrmw or i32* %a, i32 %b release
11090  ret i32 %1
11091}
11092
11093define i32 @atomicrmw_or_i32_acq_rel(i32 *%a, i32 %b) nounwind {
11094; RV32I-LABEL: atomicrmw_or_i32_acq_rel:
11095; RV32I:       # %bb.0:
11096; RV32I-NEXT:    addi sp, sp, -16
11097; RV32I-NEXT:    sw ra, 12(sp)
11098; RV32I-NEXT:    addi a2, zero, 4
11099; RV32I-NEXT:    call __atomic_fetch_or_4
11100; RV32I-NEXT:    lw ra, 12(sp)
11101; RV32I-NEXT:    addi sp, sp, 16
11102; RV32I-NEXT:    ret
11103;
11104; RV32IA-LABEL: atomicrmw_or_i32_acq_rel:
11105; RV32IA:       # %bb.0:
11106; RV32IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
11107; RV32IA-NEXT:    ret
11108;
11109; RV64I-LABEL: atomicrmw_or_i32_acq_rel:
11110; RV64I:       # %bb.0:
11111; RV64I-NEXT:    addi sp, sp, -16
11112; RV64I-NEXT:    sd ra, 8(sp)
11113; RV64I-NEXT:    addi a2, zero, 4
11114; RV64I-NEXT:    call __atomic_fetch_or_4
11115; RV64I-NEXT:    ld ra, 8(sp)
11116; RV64I-NEXT:    addi sp, sp, 16
11117; RV64I-NEXT:    ret
11118;
11119; RV64IA-LABEL: atomicrmw_or_i32_acq_rel:
11120; RV64IA:       # %bb.0:
11121; RV64IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
11122; RV64IA-NEXT:    ret
11123  %1 = atomicrmw or i32* %a, i32 %b acq_rel
11124  ret i32 %1
11125}
11126
11127define i32 @atomicrmw_or_i32_seq_cst(i32 *%a, i32 %b) nounwind {
11128; RV32I-LABEL: atomicrmw_or_i32_seq_cst:
11129; RV32I:       # %bb.0:
11130; RV32I-NEXT:    addi sp, sp, -16
11131; RV32I-NEXT:    sw ra, 12(sp)
11132; RV32I-NEXT:    addi a2, zero, 5
11133; RV32I-NEXT:    call __atomic_fetch_or_4
11134; RV32I-NEXT:    lw ra, 12(sp)
11135; RV32I-NEXT:    addi sp, sp, 16
11136; RV32I-NEXT:    ret
11137;
11138; RV32IA-LABEL: atomicrmw_or_i32_seq_cst:
11139; RV32IA:       # %bb.0:
11140; RV32IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
11141; RV32IA-NEXT:    ret
11142;
11143; RV64I-LABEL: atomicrmw_or_i32_seq_cst:
11144; RV64I:       # %bb.0:
11145; RV64I-NEXT:    addi sp, sp, -16
11146; RV64I-NEXT:    sd ra, 8(sp)
11147; RV64I-NEXT:    addi a2, zero, 5
11148; RV64I-NEXT:    call __atomic_fetch_or_4
11149; RV64I-NEXT:    ld ra, 8(sp)
11150; RV64I-NEXT:    addi sp, sp, 16
11151; RV64I-NEXT:    ret
11152;
11153; RV64IA-LABEL: atomicrmw_or_i32_seq_cst:
11154; RV64IA:       # %bb.0:
11155; RV64IA-NEXT:    amoor.w.aqrl a0, a1, (a0)
11156; RV64IA-NEXT:    ret
11157  %1 = atomicrmw or i32* %a, i32 %b seq_cst
11158  ret i32 %1
11159}
11160
11161define i32 @atomicrmw_xor_i32_monotonic(i32 *%a, i32 %b) nounwind {
11162; RV32I-LABEL: atomicrmw_xor_i32_monotonic:
11163; RV32I:       # %bb.0:
11164; RV32I-NEXT:    addi sp, sp, -16
11165; RV32I-NEXT:    sw ra, 12(sp)
11166; RV32I-NEXT:    mv a2, zero
11167; RV32I-NEXT:    call __atomic_fetch_xor_4
11168; RV32I-NEXT:    lw ra, 12(sp)
11169; RV32I-NEXT:    addi sp, sp, 16
11170; RV32I-NEXT:    ret
11171;
11172; RV32IA-LABEL: atomicrmw_xor_i32_monotonic:
11173; RV32IA:       # %bb.0:
11174; RV32IA-NEXT:    amoxor.w a0, a1, (a0)
11175; RV32IA-NEXT:    ret
11176;
11177; RV64I-LABEL: atomicrmw_xor_i32_monotonic:
11178; RV64I:       # %bb.0:
11179; RV64I-NEXT:    addi sp, sp, -16
11180; RV64I-NEXT:    sd ra, 8(sp)
11181; RV64I-NEXT:    mv a2, zero
11182; RV64I-NEXT:    call __atomic_fetch_xor_4
11183; RV64I-NEXT:    ld ra, 8(sp)
11184; RV64I-NEXT:    addi sp, sp, 16
11185; RV64I-NEXT:    ret
11186;
11187; RV64IA-LABEL: atomicrmw_xor_i32_monotonic:
11188; RV64IA:       # %bb.0:
11189; RV64IA-NEXT:    amoxor.w a0, a1, (a0)
11190; RV64IA-NEXT:    ret
11191  %1 = atomicrmw xor i32* %a, i32 %b monotonic
11192  ret i32 %1
11193}
11194
11195define i32 @atomicrmw_xor_i32_acquire(i32 *%a, i32 %b) nounwind {
11196; RV32I-LABEL: atomicrmw_xor_i32_acquire:
11197; RV32I:       # %bb.0:
11198; RV32I-NEXT:    addi sp, sp, -16
11199; RV32I-NEXT:    sw ra, 12(sp)
11200; RV32I-NEXT:    addi a2, zero, 2
11201; RV32I-NEXT:    call __atomic_fetch_xor_4
11202; RV32I-NEXT:    lw ra, 12(sp)
11203; RV32I-NEXT:    addi sp, sp, 16
11204; RV32I-NEXT:    ret
11205;
11206; RV32IA-LABEL: atomicrmw_xor_i32_acquire:
11207; RV32IA:       # %bb.0:
11208; RV32IA-NEXT:    amoxor.w.aq a0, a1, (a0)
11209; RV32IA-NEXT:    ret
11210;
11211; RV64I-LABEL: atomicrmw_xor_i32_acquire:
11212; RV64I:       # %bb.0:
11213; RV64I-NEXT:    addi sp, sp, -16
11214; RV64I-NEXT:    sd ra, 8(sp)
11215; RV64I-NEXT:    addi a2, zero, 2
11216; RV64I-NEXT:    call __atomic_fetch_xor_4
11217; RV64I-NEXT:    ld ra, 8(sp)
11218; RV64I-NEXT:    addi sp, sp, 16
11219; RV64I-NEXT:    ret
11220;
11221; RV64IA-LABEL: atomicrmw_xor_i32_acquire:
11222; RV64IA:       # %bb.0:
11223; RV64IA-NEXT:    amoxor.w.aq a0, a1, (a0)
11224; RV64IA-NEXT:    ret
11225  %1 = atomicrmw xor i32* %a, i32 %b acquire
11226  ret i32 %1
11227}
11228
11229define i32 @atomicrmw_xor_i32_release(i32 *%a, i32 %b) nounwind {
11230; RV32I-LABEL: atomicrmw_xor_i32_release:
11231; RV32I:       # %bb.0:
11232; RV32I-NEXT:    addi sp, sp, -16
11233; RV32I-NEXT:    sw ra, 12(sp)
11234; RV32I-NEXT:    addi a2, zero, 3
11235; RV32I-NEXT:    call __atomic_fetch_xor_4
11236; RV32I-NEXT:    lw ra, 12(sp)
11237; RV32I-NEXT:    addi sp, sp, 16
11238; RV32I-NEXT:    ret
11239;
11240; RV32IA-LABEL: atomicrmw_xor_i32_release:
11241; RV32IA:       # %bb.0:
11242; RV32IA-NEXT:    amoxor.w.rl a0, a1, (a0)
11243; RV32IA-NEXT:    ret
11244;
11245; RV64I-LABEL: atomicrmw_xor_i32_release:
11246; RV64I:       # %bb.0:
11247; RV64I-NEXT:    addi sp, sp, -16
11248; RV64I-NEXT:    sd ra, 8(sp)
11249; RV64I-NEXT:    addi a2, zero, 3
11250; RV64I-NEXT:    call __atomic_fetch_xor_4
11251; RV64I-NEXT:    ld ra, 8(sp)
11252; RV64I-NEXT:    addi sp, sp, 16
11253; RV64I-NEXT:    ret
11254;
11255; RV64IA-LABEL: atomicrmw_xor_i32_release:
11256; RV64IA:       # %bb.0:
11257; RV64IA-NEXT:    amoxor.w.rl a0, a1, (a0)
11258; RV64IA-NEXT:    ret
11259  %1 = atomicrmw xor i32* %a, i32 %b release
11260  ret i32 %1
11261}
11262
11263define i32 @atomicrmw_xor_i32_acq_rel(i32 *%a, i32 %b) nounwind {
11264; RV32I-LABEL: atomicrmw_xor_i32_acq_rel:
11265; RV32I:       # %bb.0:
11266; RV32I-NEXT:    addi sp, sp, -16
11267; RV32I-NEXT:    sw ra, 12(sp)
11268; RV32I-NEXT:    addi a2, zero, 4
11269; RV32I-NEXT:    call __atomic_fetch_xor_4
11270; RV32I-NEXT:    lw ra, 12(sp)
11271; RV32I-NEXT:    addi sp, sp, 16
11272; RV32I-NEXT:    ret
11273;
11274; RV32IA-LABEL: atomicrmw_xor_i32_acq_rel:
11275; RV32IA:       # %bb.0:
11276; RV32IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
11277; RV32IA-NEXT:    ret
11278;
11279; RV64I-LABEL: atomicrmw_xor_i32_acq_rel:
11280; RV64I:       # %bb.0:
11281; RV64I-NEXT:    addi sp, sp, -16
11282; RV64I-NEXT:    sd ra, 8(sp)
11283; RV64I-NEXT:    addi a2, zero, 4
11284; RV64I-NEXT:    call __atomic_fetch_xor_4
11285; RV64I-NEXT:    ld ra, 8(sp)
11286; RV64I-NEXT:    addi sp, sp, 16
11287; RV64I-NEXT:    ret
11288;
11289; RV64IA-LABEL: atomicrmw_xor_i32_acq_rel:
11290; RV64IA:       # %bb.0:
11291; RV64IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
11292; RV64IA-NEXT:    ret
11293  %1 = atomicrmw xor i32* %a, i32 %b acq_rel
11294  ret i32 %1
11295}
11296
11297define i32 @atomicrmw_xor_i32_seq_cst(i32 *%a, i32 %b) nounwind {
11298; RV32I-LABEL: atomicrmw_xor_i32_seq_cst:
11299; RV32I:       # %bb.0:
11300; RV32I-NEXT:    addi sp, sp, -16
11301; RV32I-NEXT:    sw ra, 12(sp)
11302; RV32I-NEXT:    addi a2, zero, 5
11303; RV32I-NEXT:    call __atomic_fetch_xor_4
11304; RV32I-NEXT:    lw ra, 12(sp)
11305; RV32I-NEXT:    addi sp, sp, 16
11306; RV32I-NEXT:    ret
11307;
11308; RV32IA-LABEL: atomicrmw_xor_i32_seq_cst:
11309; RV32IA:       # %bb.0:
11310; RV32IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
11311; RV32IA-NEXT:    ret
11312;
11313; RV64I-LABEL: atomicrmw_xor_i32_seq_cst:
11314; RV64I:       # %bb.0:
11315; RV64I-NEXT:    addi sp, sp, -16
11316; RV64I-NEXT:    sd ra, 8(sp)
11317; RV64I-NEXT:    addi a2, zero, 5
11318; RV64I-NEXT:    call __atomic_fetch_xor_4
11319; RV64I-NEXT:    ld ra, 8(sp)
11320; RV64I-NEXT:    addi sp, sp, 16
11321; RV64I-NEXT:    ret
11322;
11323; RV64IA-LABEL: atomicrmw_xor_i32_seq_cst:
11324; RV64IA:       # %bb.0:
11325; RV64IA-NEXT:    amoxor.w.aqrl a0, a1, (a0)
11326; RV64IA-NEXT:    ret
11327  %1 = atomicrmw xor i32* %a, i32 %b seq_cst
11328  ret i32 %1
11329}
11330
11331define i32 @atomicrmw_max_i32_monotonic(i32 *%a, i32 %b) nounwind {
11332; RV32I-LABEL: atomicrmw_max_i32_monotonic:
11333; RV32I:       # %bb.0:
11334; RV32I-NEXT:    addi sp, sp, -32
11335; RV32I-NEXT:    sw ra, 28(sp)
11336; RV32I-NEXT:    sw s0, 24(sp)
11337; RV32I-NEXT:    sw s1, 20(sp)
11338; RV32I-NEXT:    sw s2, 16(sp)
11339; RV32I-NEXT:    mv s0, a1
11340; RV32I-NEXT:    mv s1, a0
11341; RV32I-NEXT:    lw a2, 0(a0)
11342; RV32I-NEXT:    addi s2, sp, 12
11343; RV32I-NEXT:  .LBB145_1: # %atomicrmw.start
11344; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
11345; RV32I-NEXT:    sw a2, 12(sp)
11346; RV32I-NEXT:    blt s0, a2, .LBB145_3
11347; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
11348; RV32I-NEXT:    # in Loop: Header=BB145_1 Depth=1
11349; RV32I-NEXT:    mv a2, s0
11350; RV32I-NEXT:  .LBB145_3: # %atomicrmw.start
11351; RV32I-NEXT:    # in Loop: Header=BB145_1 Depth=1
11352; RV32I-NEXT:    mv a0, s1
11353; RV32I-NEXT:    mv a1, s2
11354; RV32I-NEXT:    mv a3, zero
11355; RV32I-NEXT:    mv a4, zero
11356; RV32I-NEXT:    call __atomic_compare_exchange_4
11357; RV32I-NEXT:    lw a2, 12(sp)
11358; RV32I-NEXT:    beqz a0, .LBB145_1
11359; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
11360; RV32I-NEXT:    mv a0, a2
11361; RV32I-NEXT:    lw s2, 16(sp)
11362; RV32I-NEXT:    lw s1, 20(sp)
11363; RV32I-NEXT:    lw s0, 24(sp)
11364; RV32I-NEXT:    lw ra, 28(sp)
11365; RV32I-NEXT:    addi sp, sp, 32
11366; RV32I-NEXT:    ret
11367;
11368; RV32IA-LABEL: atomicrmw_max_i32_monotonic:
11369; RV32IA:       # %bb.0:
11370; RV32IA-NEXT:    amomax.w a0, a1, (a0)
11371; RV32IA-NEXT:    ret
11372;
11373; RV64I-LABEL: atomicrmw_max_i32_monotonic:
11374; RV64I:       # %bb.0:
11375; RV64I-NEXT:    addi sp, sp, -48
11376; RV64I-NEXT:    sd ra, 40(sp)
11377; RV64I-NEXT:    sd s0, 32(sp)
11378; RV64I-NEXT:    sd s1, 24(sp)
11379; RV64I-NEXT:    sd s2, 16(sp)
11380; RV64I-NEXT:    sd s3, 8(sp)
11381; RV64I-NEXT:    mv s2, a1
11382; RV64I-NEXT:    mv s1, a0
11383; RV64I-NEXT:    lwu a0, 0(a0)
11384; RV64I-NEXT:    sext.w s0, a1
11385; RV64I-NEXT:    addi s3, sp, 4
11386; RV64I-NEXT:  .LBB145_1: # %atomicrmw.start
11387; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
11388; RV64I-NEXT:    sext.w a1, a0
11389; RV64I-NEXT:    mv a2, a0
11390; RV64I-NEXT:    blt s0, a1, .LBB145_3
11391; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
11392; RV64I-NEXT:    # in Loop: Header=BB145_1 Depth=1
11393; RV64I-NEXT:    mv a2, s2
11394; RV64I-NEXT:  .LBB145_3: # %atomicrmw.start
11395; RV64I-NEXT:    # in Loop: Header=BB145_1 Depth=1
11396; RV64I-NEXT:    sw a0, 4(sp)
11397; RV64I-NEXT:    mv a0, s1
11398; RV64I-NEXT:    mv a1, s3
11399; RV64I-NEXT:    mv a3, zero
11400; RV64I-NEXT:    mv a4, zero
11401; RV64I-NEXT:    call __atomic_compare_exchange_4
11402; RV64I-NEXT:    mv a1, a0
11403; RV64I-NEXT:    lw a0, 4(sp)
11404; RV64I-NEXT:    beqz a1, .LBB145_1
11405; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
11406; RV64I-NEXT:    ld s3, 8(sp)
11407; RV64I-NEXT:    ld s2, 16(sp)
11408; RV64I-NEXT:    ld s1, 24(sp)
11409; RV64I-NEXT:    ld s0, 32(sp)
11410; RV64I-NEXT:    ld ra, 40(sp)
11411; RV64I-NEXT:    addi sp, sp, 48
11412; RV64I-NEXT:    ret
11413;
11414; RV64IA-LABEL: atomicrmw_max_i32_monotonic:
11415; RV64IA:       # %bb.0:
11416; RV64IA-NEXT:    amomax.w a0, a1, (a0)
11417; RV64IA-NEXT:    ret
11418  %1 = atomicrmw max i32* %a, i32 %b monotonic
11419  ret i32 %1
11420}
11421
11422define i32 @atomicrmw_max_i32_acquire(i32 *%a, i32 %b) nounwind {
11423; RV32I-LABEL: atomicrmw_max_i32_acquire:
11424; RV32I:       # %bb.0:
11425; RV32I-NEXT:    addi sp, sp, -32
11426; RV32I-NEXT:    sw ra, 28(sp)
11427; RV32I-NEXT:    sw s0, 24(sp)
11428; RV32I-NEXT:    sw s1, 20(sp)
11429; RV32I-NEXT:    sw s2, 16(sp)
11430; RV32I-NEXT:    mv s0, a1
11431; RV32I-NEXT:    mv s1, a0
11432; RV32I-NEXT:    lw a2, 0(a0)
11433; RV32I-NEXT:    addi s2, sp, 12
11434; RV32I-NEXT:  .LBB146_1: # %atomicrmw.start
11435; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
11436; RV32I-NEXT:    sw a2, 12(sp)
11437; RV32I-NEXT:    blt s0, a2, .LBB146_3
11438; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
11439; RV32I-NEXT:    # in Loop: Header=BB146_1 Depth=1
11440; RV32I-NEXT:    mv a2, s0
11441; RV32I-NEXT:  .LBB146_3: # %atomicrmw.start
11442; RV32I-NEXT:    # in Loop: Header=BB146_1 Depth=1
11443; RV32I-NEXT:    mv a0, s1
11444; RV32I-NEXT:    mv a1, s2
11445; RV32I-NEXT:    addi a3, zero, 2
11446; RV32I-NEXT:    addi a4, zero, 2
11447; RV32I-NEXT:    call __atomic_compare_exchange_4
11448; RV32I-NEXT:    lw a2, 12(sp)
11449; RV32I-NEXT:    beqz a0, .LBB146_1
11450; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
11451; RV32I-NEXT:    mv a0, a2
11452; RV32I-NEXT:    lw s2, 16(sp)
11453; RV32I-NEXT:    lw s1, 20(sp)
11454; RV32I-NEXT:    lw s0, 24(sp)
11455; RV32I-NEXT:    lw ra, 28(sp)
11456; RV32I-NEXT:    addi sp, sp, 32
11457; RV32I-NEXT:    ret
11458;
11459; RV32IA-LABEL: atomicrmw_max_i32_acquire:
11460; RV32IA:       # %bb.0:
11461; RV32IA-NEXT:    amomax.w.aq a0, a1, (a0)
11462; RV32IA-NEXT:    ret
11463;
11464; RV64I-LABEL: atomicrmw_max_i32_acquire:
11465; RV64I:       # %bb.0:
11466; RV64I-NEXT:    addi sp, sp, -48
11467; RV64I-NEXT:    sd ra, 40(sp)
11468; RV64I-NEXT:    sd s0, 32(sp)
11469; RV64I-NEXT:    sd s1, 24(sp)
11470; RV64I-NEXT:    sd s2, 16(sp)
11471; RV64I-NEXT:    sd s3, 8(sp)
11472; RV64I-NEXT:    mv s2, a1
11473; RV64I-NEXT:    mv s1, a0
11474; RV64I-NEXT:    lwu a0, 0(a0)
11475; RV64I-NEXT:    sext.w s0, a1
11476; RV64I-NEXT:    addi s3, sp, 4
11477; RV64I-NEXT:  .LBB146_1: # %atomicrmw.start
11478; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
11479; RV64I-NEXT:    sext.w a1, a0
11480; RV64I-NEXT:    mv a2, a0
11481; RV64I-NEXT:    blt s0, a1, .LBB146_3
11482; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
11483; RV64I-NEXT:    # in Loop: Header=BB146_1 Depth=1
11484; RV64I-NEXT:    mv a2, s2
11485; RV64I-NEXT:  .LBB146_3: # %atomicrmw.start
11486; RV64I-NEXT:    # in Loop: Header=BB146_1 Depth=1
11487; RV64I-NEXT:    sw a0, 4(sp)
11488; RV64I-NEXT:    mv a0, s1
11489; RV64I-NEXT:    mv a1, s3
11490; RV64I-NEXT:    addi a3, zero, 2
11491; RV64I-NEXT:    addi a4, zero, 2
11492; RV64I-NEXT:    call __atomic_compare_exchange_4
11493; RV64I-NEXT:    mv a1, a0
11494; RV64I-NEXT:    lw a0, 4(sp)
11495; RV64I-NEXT:    beqz a1, .LBB146_1
11496; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
11497; RV64I-NEXT:    ld s3, 8(sp)
11498; RV64I-NEXT:    ld s2, 16(sp)
11499; RV64I-NEXT:    ld s1, 24(sp)
11500; RV64I-NEXT:    ld s0, 32(sp)
11501; RV64I-NEXT:    ld ra, 40(sp)
11502; RV64I-NEXT:    addi sp, sp, 48
11503; RV64I-NEXT:    ret
11504;
11505; RV64IA-LABEL: atomicrmw_max_i32_acquire:
11506; RV64IA:       # %bb.0:
11507; RV64IA-NEXT:    amomax.w.aq a0, a1, (a0)
11508; RV64IA-NEXT:    ret
11509  %1 = atomicrmw max i32* %a, i32 %b acquire
11510  ret i32 %1
11511}
11512
11513define i32 @atomicrmw_max_i32_release(i32 *%a, i32 %b) nounwind {
11514; RV32I-LABEL: atomicrmw_max_i32_release:
11515; RV32I:       # %bb.0:
11516; RV32I-NEXT:    addi sp, sp, -32
11517; RV32I-NEXT:    sw ra, 28(sp)
11518; RV32I-NEXT:    sw s0, 24(sp)
11519; RV32I-NEXT:    sw s1, 20(sp)
11520; RV32I-NEXT:    sw s2, 16(sp)
11521; RV32I-NEXT:    mv s0, a1
11522; RV32I-NEXT:    mv s1, a0
11523; RV32I-NEXT:    lw a2, 0(a0)
11524; RV32I-NEXT:    addi s2, sp, 12
11525; RV32I-NEXT:  .LBB147_1: # %atomicrmw.start
11526; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
11527; RV32I-NEXT:    sw a2, 12(sp)
11528; RV32I-NEXT:    blt s0, a2, .LBB147_3
11529; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
11530; RV32I-NEXT:    # in Loop: Header=BB147_1 Depth=1
11531; RV32I-NEXT:    mv a2, s0
11532; RV32I-NEXT:  .LBB147_3: # %atomicrmw.start
11533; RV32I-NEXT:    # in Loop: Header=BB147_1 Depth=1
11534; RV32I-NEXT:    mv a0, s1
11535; RV32I-NEXT:    mv a1, s2
11536; RV32I-NEXT:    addi a3, zero, 3
11537; RV32I-NEXT:    mv a4, zero
11538; RV32I-NEXT:    call __atomic_compare_exchange_4
11539; RV32I-NEXT:    lw a2, 12(sp)
11540; RV32I-NEXT:    beqz a0, .LBB147_1
11541; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
11542; RV32I-NEXT:    mv a0, a2
11543; RV32I-NEXT:    lw s2, 16(sp)
11544; RV32I-NEXT:    lw s1, 20(sp)
11545; RV32I-NEXT:    lw s0, 24(sp)
11546; RV32I-NEXT:    lw ra, 28(sp)
11547; RV32I-NEXT:    addi sp, sp, 32
11548; RV32I-NEXT:    ret
11549;
11550; RV32IA-LABEL: atomicrmw_max_i32_release:
11551; RV32IA:       # %bb.0:
11552; RV32IA-NEXT:    amomax.w.rl a0, a1, (a0)
11553; RV32IA-NEXT:    ret
11554;
11555; RV64I-LABEL: atomicrmw_max_i32_release:
11556; RV64I:       # %bb.0:
11557; RV64I-NEXT:    addi sp, sp, -48
11558; RV64I-NEXT:    sd ra, 40(sp)
11559; RV64I-NEXT:    sd s0, 32(sp)
11560; RV64I-NEXT:    sd s1, 24(sp)
11561; RV64I-NEXT:    sd s2, 16(sp)
11562; RV64I-NEXT:    sd s3, 8(sp)
11563; RV64I-NEXT:    mv s2, a1
11564; RV64I-NEXT:    mv s1, a0
11565; RV64I-NEXT:    lwu a0, 0(a0)
11566; RV64I-NEXT:    sext.w s0, a1
11567; RV64I-NEXT:    addi s3, sp, 4
11568; RV64I-NEXT:  .LBB147_1: # %atomicrmw.start
11569; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
11570; RV64I-NEXT:    sext.w a1, a0
11571; RV64I-NEXT:    mv a2, a0
11572; RV64I-NEXT:    blt s0, a1, .LBB147_3
11573; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
11574; RV64I-NEXT:    # in Loop: Header=BB147_1 Depth=1
11575; RV64I-NEXT:    mv a2, s2
11576; RV64I-NEXT:  .LBB147_3: # %atomicrmw.start
11577; RV64I-NEXT:    # in Loop: Header=BB147_1 Depth=1
11578; RV64I-NEXT:    sw a0, 4(sp)
11579; RV64I-NEXT:    mv a0, s1
11580; RV64I-NEXT:    mv a1, s3
11581; RV64I-NEXT:    addi a3, zero, 3
11582; RV64I-NEXT:    mv a4, zero
11583; RV64I-NEXT:    call __atomic_compare_exchange_4
11584; RV64I-NEXT:    mv a1, a0
11585; RV64I-NEXT:    lw a0, 4(sp)
11586; RV64I-NEXT:    beqz a1, .LBB147_1
11587; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
11588; RV64I-NEXT:    ld s3, 8(sp)
11589; RV64I-NEXT:    ld s2, 16(sp)
11590; RV64I-NEXT:    ld s1, 24(sp)
11591; RV64I-NEXT:    ld s0, 32(sp)
11592; RV64I-NEXT:    ld ra, 40(sp)
11593; RV64I-NEXT:    addi sp, sp, 48
11594; RV64I-NEXT:    ret
11595;
11596; RV64IA-LABEL: atomicrmw_max_i32_release:
11597; RV64IA:       # %bb.0:
11598; RV64IA-NEXT:    amomax.w.rl a0, a1, (a0)
11599; RV64IA-NEXT:    ret
11600  %1 = atomicrmw max i32* %a, i32 %b release
11601  ret i32 %1
11602}
11603
11604define i32 @atomicrmw_max_i32_acq_rel(i32 *%a, i32 %b) nounwind {
11605; RV32I-LABEL: atomicrmw_max_i32_acq_rel:
11606; RV32I:       # %bb.0:
11607; RV32I-NEXT:    addi sp, sp, -32
11608; RV32I-NEXT:    sw ra, 28(sp)
11609; RV32I-NEXT:    sw s0, 24(sp)
11610; RV32I-NEXT:    sw s1, 20(sp)
11611; RV32I-NEXT:    sw s2, 16(sp)
11612; RV32I-NEXT:    mv s0, a1
11613; RV32I-NEXT:    mv s1, a0
11614; RV32I-NEXT:    lw a2, 0(a0)
11615; RV32I-NEXT:    addi s2, sp, 12
11616; RV32I-NEXT:  .LBB148_1: # %atomicrmw.start
11617; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
11618; RV32I-NEXT:    sw a2, 12(sp)
11619; RV32I-NEXT:    blt s0, a2, .LBB148_3
11620; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
11621; RV32I-NEXT:    # in Loop: Header=BB148_1 Depth=1
11622; RV32I-NEXT:    mv a2, s0
11623; RV32I-NEXT:  .LBB148_3: # %atomicrmw.start
11624; RV32I-NEXT:    # in Loop: Header=BB148_1 Depth=1
11625; RV32I-NEXT:    mv a0, s1
11626; RV32I-NEXT:    mv a1, s2
11627; RV32I-NEXT:    addi a3, zero, 4
11628; RV32I-NEXT:    addi a4, zero, 2
11629; RV32I-NEXT:    call __atomic_compare_exchange_4
11630; RV32I-NEXT:    lw a2, 12(sp)
11631; RV32I-NEXT:    beqz a0, .LBB148_1
11632; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
11633; RV32I-NEXT:    mv a0, a2
11634; RV32I-NEXT:    lw s2, 16(sp)
11635; RV32I-NEXT:    lw s1, 20(sp)
11636; RV32I-NEXT:    lw s0, 24(sp)
11637; RV32I-NEXT:    lw ra, 28(sp)
11638; RV32I-NEXT:    addi sp, sp, 32
11639; RV32I-NEXT:    ret
11640;
11641; RV32IA-LABEL: atomicrmw_max_i32_acq_rel:
11642; RV32IA:       # %bb.0:
11643; RV32IA-NEXT:    amomax.w.aqrl a0, a1, (a0)
11644; RV32IA-NEXT:    ret
11645;
11646; RV64I-LABEL: atomicrmw_max_i32_acq_rel:
11647; RV64I:       # %bb.0:
11648; RV64I-NEXT:    addi sp, sp, -48
11649; RV64I-NEXT:    sd ra, 40(sp)
11650; RV64I-NEXT:    sd s0, 32(sp)
11651; RV64I-NEXT:    sd s1, 24(sp)
11652; RV64I-NEXT:    sd s2, 16(sp)
11653; RV64I-NEXT:    sd s3, 8(sp)
11654; RV64I-NEXT:    mv s2, a1
11655; RV64I-NEXT:    mv s1, a0
11656; RV64I-NEXT:    lwu a0, 0(a0)
11657; RV64I-NEXT:    sext.w s0, a1
11658; RV64I-NEXT:    addi s3, sp, 4
11659; RV64I-NEXT:  .LBB148_1: # %atomicrmw.start
11660; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
11661; RV64I-NEXT:    sext.w a1, a0
11662; RV64I-NEXT:    mv a2, a0
11663; RV64I-NEXT:    blt s0, a1, .LBB148_3
11664; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
11665; RV64I-NEXT:    # in Loop: Header=BB148_1 Depth=1
11666; RV64I-NEXT:    mv a2, s2
11667; RV64I-NEXT:  .LBB148_3: # %atomicrmw.start
11668; RV64I-NEXT:    # in Loop: Header=BB148_1 Depth=1
11669; RV64I-NEXT:    sw a0, 4(sp)
11670; RV64I-NEXT:    mv a0, s1
11671; RV64I-NEXT:    mv a1, s3
11672; RV64I-NEXT:    addi a3, zero, 4
11673; RV64I-NEXT:    addi a4, zero, 2
11674; RV64I-NEXT:    call __atomic_compare_exchange_4
11675; RV64I-NEXT:    mv a1, a0
11676; RV64I-NEXT:    lw a0, 4(sp)
11677; RV64I-NEXT:    beqz a1, .LBB148_1
11678; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
11679; RV64I-NEXT:    ld s3, 8(sp)
11680; RV64I-NEXT:    ld s2, 16(sp)
11681; RV64I-NEXT:    ld s1, 24(sp)
11682; RV64I-NEXT:    ld s0, 32(sp)
11683; RV64I-NEXT:    ld ra, 40(sp)
11684; RV64I-NEXT:    addi sp, sp, 48
11685; RV64I-NEXT:    ret
11686;
11687; RV64IA-LABEL: atomicrmw_max_i32_acq_rel:
11688; RV64IA:       # %bb.0:
11689; RV64IA-NEXT:    amomax.w.aqrl a0, a1, (a0)
11690; RV64IA-NEXT:    ret
11691  %1 = atomicrmw max i32* %a, i32 %b acq_rel
11692  ret i32 %1
11693}
11694
11695define i32 @atomicrmw_max_i32_seq_cst(i32 *%a, i32 %b) nounwind {
11696; RV32I-LABEL: atomicrmw_max_i32_seq_cst:
11697; RV32I:       # %bb.0:
11698; RV32I-NEXT:    addi sp, sp, -32
11699; RV32I-NEXT:    sw ra, 28(sp)
11700; RV32I-NEXT:    sw s0, 24(sp)
11701; RV32I-NEXT:    sw s1, 20(sp)
11702; RV32I-NEXT:    sw s2, 16(sp)
11703; RV32I-NEXT:    mv s0, a1
11704; RV32I-NEXT:    mv s1, a0
11705; RV32I-NEXT:    lw a2, 0(a0)
11706; RV32I-NEXT:    addi s2, sp, 12
11707; RV32I-NEXT:  .LBB149_1: # %atomicrmw.start
11708; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
11709; RV32I-NEXT:    sw a2, 12(sp)
11710; RV32I-NEXT:    blt s0, a2, .LBB149_3
11711; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
11712; RV32I-NEXT:    # in Loop: Header=BB149_1 Depth=1
11713; RV32I-NEXT:    mv a2, s0
11714; RV32I-NEXT:  .LBB149_3: # %atomicrmw.start
11715; RV32I-NEXT:    # in Loop: Header=BB149_1 Depth=1
11716; RV32I-NEXT:    mv a0, s1
11717; RV32I-NEXT:    mv a1, s2
11718; RV32I-NEXT:    addi a3, zero, 5
11719; RV32I-NEXT:    addi a4, zero, 5
11720; RV32I-NEXT:    call __atomic_compare_exchange_4
11721; RV32I-NEXT:    lw a2, 12(sp)
11722; RV32I-NEXT:    beqz a0, .LBB149_1
11723; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
11724; RV32I-NEXT:    mv a0, a2
11725; RV32I-NEXT:    lw s2, 16(sp)
11726; RV32I-NEXT:    lw s1, 20(sp)
11727; RV32I-NEXT:    lw s0, 24(sp)
11728; RV32I-NEXT:    lw ra, 28(sp)
11729; RV32I-NEXT:    addi sp, sp, 32
11730; RV32I-NEXT:    ret
11731;
11732; RV32IA-LABEL: atomicrmw_max_i32_seq_cst:
11733; RV32IA:       # %bb.0:
11734; RV32IA-NEXT:    amomax.w.aqrl a0, a1, (a0)
11735; RV32IA-NEXT:    ret
11736;
11737; RV64I-LABEL: atomicrmw_max_i32_seq_cst:
11738; RV64I:       # %bb.0:
11739; RV64I-NEXT:    addi sp, sp, -48
11740; RV64I-NEXT:    sd ra, 40(sp)
11741; RV64I-NEXT:    sd s0, 32(sp)
11742; RV64I-NEXT:    sd s1, 24(sp)
11743; RV64I-NEXT:    sd s2, 16(sp)
11744; RV64I-NEXT:    sd s3, 8(sp)
11745; RV64I-NEXT:    mv s2, a1
11746; RV64I-NEXT:    mv s1, a0
11747; RV64I-NEXT:    lwu a0, 0(a0)
11748; RV64I-NEXT:    sext.w s0, a1
11749; RV64I-NEXT:    addi s3, sp, 4
11750; RV64I-NEXT:  .LBB149_1: # %atomicrmw.start
11751; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
11752; RV64I-NEXT:    sext.w a1, a0
11753; RV64I-NEXT:    mv a2, a0
11754; RV64I-NEXT:    blt s0, a1, .LBB149_3
11755; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
11756; RV64I-NEXT:    # in Loop: Header=BB149_1 Depth=1
11757; RV64I-NEXT:    mv a2, s2
11758; RV64I-NEXT:  .LBB149_3: # %atomicrmw.start
11759; RV64I-NEXT:    # in Loop: Header=BB149_1 Depth=1
11760; RV64I-NEXT:    sw a0, 4(sp)
11761; RV64I-NEXT:    mv a0, s1
11762; RV64I-NEXT:    mv a1, s3
11763; RV64I-NEXT:    addi a3, zero, 5
11764; RV64I-NEXT:    addi a4, zero, 5
11765; RV64I-NEXT:    call __atomic_compare_exchange_4
11766; RV64I-NEXT:    mv a1, a0
11767; RV64I-NEXT:    lw a0, 4(sp)
11768; RV64I-NEXT:    beqz a1, .LBB149_1
11769; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
11770; RV64I-NEXT:    ld s3, 8(sp)
11771; RV64I-NEXT:    ld s2, 16(sp)
11772; RV64I-NEXT:    ld s1, 24(sp)
11773; RV64I-NEXT:    ld s0, 32(sp)
11774; RV64I-NEXT:    ld ra, 40(sp)
11775; RV64I-NEXT:    addi sp, sp, 48
11776; RV64I-NEXT:    ret
11777;
11778; RV64IA-LABEL: atomicrmw_max_i32_seq_cst:
11779; RV64IA:       # %bb.0:
11780; RV64IA-NEXT:    amomax.w.aqrl a0, a1, (a0)
11781; RV64IA-NEXT:    ret
11782  %1 = atomicrmw max i32* %a, i32 %b seq_cst
11783  ret i32 %1
11784}
11785
11786define i32 @atomicrmw_min_i32_monotonic(i32 *%a, i32 %b) nounwind {
11787; RV32I-LABEL: atomicrmw_min_i32_monotonic:
11788; RV32I:       # %bb.0:
11789; RV32I-NEXT:    addi sp, sp, -32
11790; RV32I-NEXT:    sw ra, 28(sp)
11791; RV32I-NEXT:    sw s0, 24(sp)
11792; RV32I-NEXT:    sw s1, 20(sp)
11793; RV32I-NEXT:    sw s2, 16(sp)
11794; RV32I-NEXT:    mv s0, a1
11795; RV32I-NEXT:    mv s1, a0
11796; RV32I-NEXT:    lw a2, 0(a0)
11797; RV32I-NEXT:    addi s2, sp, 12
11798; RV32I-NEXT:  .LBB150_1: # %atomicrmw.start
11799; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
11800; RV32I-NEXT:    sw a2, 12(sp)
11801; RV32I-NEXT:    bge s0, a2, .LBB150_3
11802; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
11803; RV32I-NEXT:    # in Loop: Header=BB150_1 Depth=1
11804; RV32I-NEXT:    mv a2, s0
11805; RV32I-NEXT:  .LBB150_3: # %atomicrmw.start
11806; RV32I-NEXT:    # in Loop: Header=BB150_1 Depth=1
11807; RV32I-NEXT:    mv a0, s1
11808; RV32I-NEXT:    mv a1, s2
11809; RV32I-NEXT:    mv a3, zero
11810; RV32I-NEXT:    mv a4, zero
11811; RV32I-NEXT:    call __atomic_compare_exchange_4
11812; RV32I-NEXT:    lw a2, 12(sp)
11813; RV32I-NEXT:    beqz a0, .LBB150_1
11814; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
11815; RV32I-NEXT:    mv a0, a2
11816; RV32I-NEXT:    lw s2, 16(sp)
11817; RV32I-NEXT:    lw s1, 20(sp)
11818; RV32I-NEXT:    lw s0, 24(sp)
11819; RV32I-NEXT:    lw ra, 28(sp)
11820; RV32I-NEXT:    addi sp, sp, 32
11821; RV32I-NEXT:    ret
11822;
11823; RV32IA-LABEL: atomicrmw_min_i32_monotonic:
11824; RV32IA:       # %bb.0:
11825; RV32IA-NEXT:    amomin.w a0, a1, (a0)
11826; RV32IA-NEXT:    ret
11827;
11828; RV64I-LABEL: atomicrmw_min_i32_monotonic:
11829; RV64I:       # %bb.0:
11830; RV64I-NEXT:    addi sp, sp, -48
11831; RV64I-NEXT:    sd ra, 40(sp)
11832; RV64I-NEXT:    sd s0, 32(sp)
11833; RV64I-NEXT:    sd s1, 24(sp)
11834; RV64I-NEXT:    sd s2, 16(sp)
11835; RV64I-NEXT:    sd s3, 8(sp)
11836; RV64I-NEXT:    mv s2, a1
11837; RV64I-NEXT:    mv s1, a0
11838; RV64I-NEXT:    lwu a0, 0(a0)
11839; RV64I-NEXT:    sext.w s0, a1
11840; RV64I-NEXT:    addi s3, sp, 4
11841; RV64I-NEXT:  .LBB150_1: # %atomicrmw.start
11842; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
11843; RV64I-NEXT:    sext.w a1, a0
11844; RV64I-NEXT:    mv a2, a0
11845; RV64I-NEXT:    bge s0, a1, .LBB150_3
11846; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
11847; RV64I-NEXT:    # in Loop: Header=BB150_1 Depth=1
11848; RV64I-NEXT:    mv a2, s2
11849; RV64I-NEXT:  .LBB150_3: # %atomicrmw.start
11850; RV64I-NEXT:    # in Loop: Header=BB150_1 Depth=1
11851; RV64I-NEXT:    sw a0, 4(sp)
11852; RV64I-NEXT:    mv a0, s1
11853; RV64I-NEXT:    mv a1, s3
11854; RV64I-NEXT:    mv a3, zero
11855; RV64I-NEXT:    mv a4, zero
11856; RV64I-NEXT:    call __atomic_compare_exchange_4
11857; RV64I-NEXT:    mv a1, a0
11858; RV64I-NEXT:    lw a0, 4(sp)
11859; RV64I-NEXT:    beqz a1, .LBB150_1
11860; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
11861; RV64I-NEXT:    ld s3, 8(sp)
11862; RV64I-NEXT:    ld s2, 16(sp)
11863; RV64I-NEXT:    ld s1, 24(sp)
11864; RV64I-NEXT:    ld s0, 32(sp)
11865; RV64I-NEXT:    ld ra, 40(sp)
11866; RV64I-NEXT:    addi sp, sp, 48
11867; RV64I-NEXT:    ret
11868;
11869; RV64IA-LABEL: atomicrmw_min_i32_monotonic:
11870; RV64IA:       # %bb.0:
11871; RV64IA-NEXT:    amomin.w a0, a1, (a0)
11872; RV64IA-NEXT:    ret
11873  %1 = atomicrmw min i32* %a, i32 %b monotonic
11874  ret i32 %1
11875}
11876
11877define i32 @atomicrmw_min_i32_acquire(i32 *%a, i32 %b) nounwind {
11878; RV32I-LABEL: atomicrmw_min_i32_acquire:
11879; RV32I:       # %bb.0:
11880; RV32I-NEXT:    addi sp, sp, -32
11881; RV32I-NEXT:    sw ra, 28(sp)
11882; RV32I-NEXT:    sw s0, 24(sp)
11883; RV32I-NEXT:    sw s1, 20(sp)
11884; RV32I-NEXT:    sw s2, 16(sp)
11885; RV32I-NEXT:    mv s0, a1
11886; RV32I-NEXT:    mv s1, a0
11887; RV32I-NEXT:    lw a2, 0(a0)
11888; RV32I-NEXT:    addi s2, sp, 12
11889; RV32I-NEXT:  .LBB151_1: # %atomicrmw.start
11890; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
11891; RV32I-NEXT:    sw a2, 12(sp)
11892; RV32I-NEXT:    bge s0, a2, .LBB151_3
11893; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
11894; RV32I-NEXT:    # in Loop: Header=BB151_1 Depth=1
11895; RV32I-NEXT:    mv a2, s0
11896; RV32I-NEXT:  .LBB151_3: # %atomicrmw.start
11897; RV32I-NEXT:    # in Loop: Header=BB151_1 Depth=1
11898; RV32I-NEXT:    mv a0, s1
11899; RV32I-NEXT:    mv a1, s2
11900; RV32I-NEXT:    addi a3, zero, 2
11901; RV32I-NEXT:    addi a4, zero, 2
11902; RV32I-NEXT:    call __atomic_compare_exchange_4
11903; RV32I-NEXT:    lw a2, 12(sp)
11904; RV32I-NEXT:    beqz a0, .LBB151_1
11905; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
11906; RV32I-NEXT:    mv a0, a2
11907; RV32I-NEXT:    lw s2, 16(sp)
11908; RV32I-NEXT:    lw s1, 20(sp)
11909; RV32I-NEXT:    lw s0, 24(sp)
11910; RV32I-NEXT:    lw ra, 28(sp)
11911; RV32I-NEXT:    addi sp, sp, 32
11912; RV32I-NEXT:    ret
11913;
11914; RV32IA-LABEL: atomicrmw_min_i32_acquire:
11915; RV32IA:       # %bb.0:
11916; RV32IA-NEXT:    amomin.w.aq a0, a1, (a0)
11917; RV32IA-NEXT:    ret
11918;
11919; RV64I-LABEL: atomicrmw_min_i32_acquire:
11920; RV64I:       # %bb.0:
11921; RV64I-NEXT:    addi sp, sp, -48
11922; RV64I-NEXT:    sd ra, 40(sp)
11923; RV64I-NEXT:    sd s0, 32(sp)
11924; RV64I-NEXT:    sd s1, 24(sp)
11925; RV64I-NEXT:    sd s2, 16(sp)
11926; RV64I-NEXT:    sd s3, 8(sp)
11927; RV64I-NEXT:    mv s2, a1
11928; RV64I-NEXT:    mv s1, a0
11929; RV64I-NEXT:    lwu a0, 0(a0)
11930; RV64I-NEXT:    sext.w s0, a1
11931; RV64I-NEXT:    addi s3, sp, 4
11932; RV64I-NEXT:  .LBB151_1: # %atomicrmw.start
11933; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
11934; RV64I-NEXT:    sext.w a1, a0
11935; RV64I-NEXT:    mv a2, a0
11936; RV64I-NEXT:    bge s0, a1, .LBB151_3
11937; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
11938; RV64I-NEXT:    # in Loop: Header=BB151_1 Depth=1
11939; RV64I-NEXT:    mv a2, s2
11940; RV64I-NEXT:  .LBB151_3: # %atomicrmw.start
11941; RV64I-NEXT:    # in Loop: Header=BB151_1 Depth=1
11942; RV64I-NEXT:    sw a0, 4(sp)
11943; RV64I-NEXT:    mv a0, s1
11944; RV64I-NEXT:    mv a1, s3
11945; RV64I-NEXT:    addi a3, zero, 2
11946; RV64I-NEXT:    addi a4, zero, 2
11947; RV64I-NEXT:    call __atomic_compare_exchange_4
11948; RV64I-NEXT:    mv a1, a0
11949; RV64I-NEXT:    lw a0, 4(sp)
11950; RV64I-NEXT:    beqz a1, .LBB151_1
11951; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
11952; RV64I-NEXT:    ld s3, 8(sp)
11953; RV64I-NEXT:    ld s2, 16(sp)
11954; RV64I-NEXT:    ld s1, 24(sp)
11955; RV64I-NEXT:    ld s0, 32(sp)
11956; RV64I-NEXT:    ld ra, 40(sp)
11957; RV64I-NEXT:    addi sp, sp, 48
11958; RV64I-NEXT:    ret
11959;
11960; RV64IA-LABEL: atomicrmw_min_i32_acquire:
11961; RV64IA:       # %bb.0:
11962; RV64IA-NEXT:    amomin.w.aq a0, a1, (a0)
11963; RV64IA-NEXT:    ret
11964  %1 = atomicrmw min i32* %a, i32 %b acquire
11965  ret i32 %1
11966}
11967
11968define i32 @atomicrmw_min_i32_release(i32 *%a, i32 %b) nounwind {
11969; RV32I-LABEL: atomicrmw_min_i32_release:
11970; RV32I:       # %bb.0:
11971; RV32I-NEXT:    addi sp, sp, -32
11972; RV32I-NEXT:    sw ra, 28(sp)
11973; RV32I-NEXT:    sw s0, 24(sp)
11974; RV32I-NEXT:    sw s1, 20(sp)
11975; RV32I-NEXT:    sw s2, 16(sp)
11976; RV32I-NEXT:    mv s0, a1
11977; RV32I-NEXT:    mv s1, a0
11978; RV32I-NEXT:    lw a2, 0(a0)
11979; RV32I-NEXT:    addi s2, sp, 12
11980; RV32I-NEXT:  .LBB152_1: # %atomicrmw.start
11981; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
11982; RV32I-NEXT:    sw a2, 12(sp)
11983; RV32I-NEXT:    bge s0, a2, .LBB152_3
11984; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
11985; RV32I-NEXT:    # in Loop: Header=BB152_1 Depth=1
11986; RV32I-NEXT:    mv a2, s0
11987; RV32I-NEXT:  .LBB152_3: # %atomicrmw.start
11988; RV32I-NEXT:    # in Loop: Header=BB152_1 Depth=1
11989; RV32I-NEXT:    mv a0, s1
11990; RV32I-NEXT:    mv a1, s2
11991; RV32I-NEXT:    addi a3, zero, 3
11992; RV32I-NEXT:    mv a4, zero
11993; RV32I-NEXT:    call __atomic_compare_exchange_4
11994; RV32I-NEXT:    lw a2, 12(sp)
11995; RV32I-NEXT:    beqz a0, .LBB152_1
11996; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
11997; RV32I-NEXT:    mv a0, a2
11998; RV32I-NEXT:    lw s2, 16(sp)
11999; RV32I-NEXT:    lw s1, 20(sp)
12000; RV32I-NEXT:    lw s0, 24(sp)
12001; RV32I-NEXT:    lw ra, 28(sp)
12002; RV32I-NEXT:    addi sp, sp, 32
12003; RV32I-NEXT:    ret
12004;
12005; RV32IA-LABEL: atomicrmw_min_i32_release:
12006; RV32IA:       # %bb.0:
12007; RV32IA-NEXT:    amomin.w.rl a0, a1, (a0)
12008; RV32IA-NEXT:    ret
12009;
12010; RV64I-LABEL: atomicrmw_min_i32_release:
12011; RV64I:       # %bb.0:
12012; RV64I-NEXT:    addi sp, sp, -48
12013; RV64I-NEXT:    sd ra, 40(sp)
12014; RV64I-NEXT:    sd s0, 32(sp)
12015; RV64I-NEXT:    sd s1, 24(sp)
12016; RV64I-NEXT:    sd s2, 16(sp)
12017; RV64I-NEXT:    sd s3, 8(sp)
12018; RV64I-NEXT:    mv s2, a1
12019; RV64I-NEXT:    mv s1, a0
12020; RV64I-NEXT:    lwu a0, 0(a0)
12021; RV64I-NEXT:    sext.w s0, a1
12022; RV64I-NEXT:    addi s3, sp, 4
12023; RV64I-NEXT:  .LBB152_1: # %atomicrmw.start
12024; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
12025; RV64I-NEXT:    sext.w a1, a0
12026; RV64I-NEXT:    mv a2, a0
12027; RV64I-NEXT:    bge s0, a1, .LBB152_3
12028; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
12029; RV64I-NEXT:    # in Loop: Header=BB152_1 Depth=1
12030; RV64I-NEXT:    mv a2, s2
12031; RV64I-NEXT:  .LBB152_3: # %atomicrmw.start
12032; RV64I-NEXT:    # in Loop: Header=BB152_1 Depth=1
12033; RV64I-NEXT:    sw a0, 4(sp)
12034; RV64I-NEXT:    mv a0, s1
12035; RV64I-NEXT:    mv a1, s3
12036; RV64I-NEXT:    addi a3, zero, 3
12037; RV64I-NEXT:    mv a4, zero
12038; RV64I-NEXT:    call __atomic_compare_exchange_4
12039; RV64I-NEXT:    mv a1, a0
12040; RV64I-NEXT:    lw a0, 4(sp)
12041; RV64I-NEXT:    beqz a1, .LBB152_1
12042; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
12043; RV64I-NEXT:    ld s3, 8(sp)
12044; RV64I-NEXT:    ld s2, 16(sp)
12045; RV64I-NEXT:    ld s1, 24(sp)
12046; RV64I-NEXT:    ld s0, 32(sp)
12047; RV64I-NEXT:    ld ra, 40(sp)
12048; RV64I-NEXT:    addi sp, sp, 48
12049; RV64I-NEXT:    ret
12050;
12051; RV64IA-LABEL: atomicrmw_min_i32_release:
12052; RV64IA:       # %bb.0:
12053; RV64IA-NEXT:    amomin.w.rl a0, a1, (a0)
12054; RV64IA-NEXT:    ret
12055  %1 = atomicrmw min i32* %a, i32 %b release
12056  ret i32 %1
12057}
12058
12059define i32 @atomicrmw_min_i32_acq_rel(i32 *%a, i32 %b) nounwind {
12060; RV32I-LABEL: atomicrmw_min_i32_acq_rel:
12061; RV32I:       # %bb.0:
12062; RV32I-NEXT:    addi sp, sp, -32
12063; RV32I-NEXT:    sw ra, 28(sp)
12064; RV32I-NEXT:    sw s0, 24(sp)
12065; RV32I-NEXT:    sw s1, 20(sp)
12066; RV32I-NEXT:    sw s2, 16(sp)
12067; RV32I-NEXT:    mv s0, a1
12068; RV32I-NEXT:    mv s1, a0
12069; RV32I-NEXT:    lw a2, 0(a0)
12070; RV32I-NEXT:    addi s2, sp, 12
12071; RV32I-NEXT:  .LBB153_1: # %atomicrmw.start
12072; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
12073; RV32I-NEXT:    sw a2, 12(sp)
12074; RV32I-NEXT:    bge s0, a2, .LBB153_3
12075; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
12076; RV32I-NEXT:    # in Loop: Header=BB153_1 Depth=1
12077; RV32I-NEXT:    mv a2, s0
12078; RV32I-NEXT:  .LBB153_3: # %atomicrmw.start
12079; RV32I-NEXT:    # in Loop: Header=BB153_1 Depth=1
12080; RV32I-NEXT:    mv a0, s1
12081; RV32I-NEXT:    mv a1, s2
12082; RV32I-NEXT:    addi a3, zero, 4
12083; RV32I-NEXT:    addi a4, zero, 2
12084; RV32I-NEXT:    call __atomic_compare_exchange_4
12085; RV32I-NEXT:    lw a2, 12(sp)
12086; RV32I-NEXT:    beqz a0, .LBB153_1
12087; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
12088; RV32I-NEXT:    mv a0, a2
12089; RV32I-NEXT:    lw s2, 16(sp)
12090; RV32I-NEXT:    lw s1, 20(sp)
12091; RV32I-NEXT:    lw s0, 24(sp)
12092; RV32I-NEXT:    lw ra, 28(sp)
12093; RV32I-NEXT:    addi sp, sp, 32
12094; RV32I-NEXT:    ret
12095;
12096; RV32IA-LABEL: atomicrmw_min_i32_acq_rel:
12097; RV32IA:       # %bb.0:
12098; RV32IA-NEXT:    amomin.w.aqrl a0, a1, (a0)
12099; RV32IA-NEXT:    ret
12100;
12101; RV64I-LABEL: atomicrmw_min_i32_acq_rel:
12102; RV64I:       # %bb.0:
12103; RV64I-NEXT:    addi sp, sp, -48
12104; RV64I-NEXT:    sd ra, 40(sp)
12105; RV64I-NEXT:    sd s0, 32(sp)
12106; RV64I-NEXT:    sd s1, 24(sp)
12107; RV64I-NEXT:    sd s2, 16(sp)
12108; RV64I-NEXT:    sd s3, 8(sp)
12109; RV64I-NEXT:    mv s2, a1
12110; RV64I-NEXT:    mv s1, a0
12111; RV64I-NEXT:    lwu a0, 0(a0)
12112; RV64I-NEXT:    sext.w s0, a1
12113; RV64I-NEXT:    addi s3, sp, 4
12114; RV64I-NEXT:  .LBB153_1: # %atomicrmw.start
12115; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
12116; RV64I-NEXT:    sext.w a1, a0
12117; RV64I-NEXT:    mv a2, a0
12118; RV64I-NEXT:    bge s0, a1, .LBB153_3
12119; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
12120; RV64I-NEXT:    # in Loop: Header=BB153_1 Depth=1
12121; RV64I-NEXT:    mv a2, s2
12122; RV64I-NEXT:  .LBB153_3: # %atomicrmw.start
12123; RV64I-NEXT:    # in Loop: Header=BB153_1 Depth=1
12124; RV64I-NEXT:    sw a0, 4(sp)
12125; RV64I-NEXT:    mv a0, s1
12126; RV64I-NEXT:    mv a1, s3
12127; RV64I-NEXT:    addi a3, zero, 4
12128; RV64I-NEXT:    addi a4, zero, 2
12129; RV64I-NEXT:    call __atomic_compare_exchange_4
12130; RV64I-NEXT:    mv a1, a0
12131; RV64I-NEXT:    lw a0, 4(sp)
12132; RV64I-NEXT:    beqz a1, .LBB153_1
12133; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
12134; RV64I-NEXT:    ld s3, 8(sp)
12135; RV64I-NEXT:    ld s2, 16(sp)
12136; RV64I-NEXT:    ld s1, 24(sp)
12137; RV64I-NEXT:    ld s0, 32(sp)
12138; RV64I-NEXT:    ld ra, 40(sp)
12139; RV64I-NEXT:    addi sp, sp, 48
12140; RV64I-NEXT:    ret
12141;
12142; RV64IA-LABEL: atomicrmw_min_i32_acq_rel:
12143; RV64IA:       # %bb.0:
12144; RV64IA-NEXT:    amomin.w.aqrl a0, a1, (a0)
12145; RV64IA-NEXT:    ret
12146  %1 = atomicrmw min i32* %a, i32 %b acq_rel
12147  ret i32 %1
12148}
12149
12150define i32 @atomicrmw_min_i32_seq_cst(i32 *%a, i32 %b) nounwind {
12151; RV32I-LABEL: atomicrmw_min_i32_seq_cst:
12152; RV32I:       # %bb.0:
12153; RV32I-NEXT:    addi sp, sp, -32
12154; RV32I-NEXT:    sw ra, 28(sp)
12155; RV32I-NEXT:    sw s0, 24(sp)
12156; RV32I-NEXT:    sw s1, 20(sp)
12157; RV32I-NEXT:    sw s2, 16(sp)
12158; RV32I-NEXT:    mv s0, a1
12159; RV32I-NEXT:    mv s1, a0
12160; RV32I-NEXT:    lw a2, 0(a0)
12161; RV32I-NEXT:    addi s2, sp, 12
12162; RV32I-NEXT:  .LBB154_1: # %atomicrmw.start
12163; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
12164; RV32I-NEXT:    sw a2, 12(sp)
12165; RV32I-NEXT:    bge s0, a2, .LBB154_3
12166; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
12167; RV32I-NEXT:    # in Loop: Header=BB154_1 Depth=1
12168; RV32I-NEXT:    mv a2, s0
12169; RV32I-NEXT:  .LBB154_3: # %atomicrmw.start
12170; RV32I-NEXT:    # in Loop: Header=BB154_1 Depth=1
12171; RV32I-NEXT:    mv a0, s1
12172; RV32I-NEXT:    mv a1, s2
12173; RV32I-NEXT:    addi a3, zero, 5
12174; RV32I-NEXT:    addi a4, zero, 5
12175; RV32I-NEXT:    call __atomic_compare_exchange_4
12176; RV32I-NEXT:    lw a2, 12(sp)
12177; RV32I-NEXT:    beqz a0, .LBB154_1
12178; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
12179; RV32I-NEXT:    mv a0, a2
12180; RV32I-NEXT:    lw s2, 16(sp)
12181; RV32I-NEXT:    lw s1, 20(sp)
12182; RV32I-NEXT:    lw s0, 24(sp)
12183; RV32I-NEXT:    lw ra, 28(sp)
12184; RV32I-NEXT:    addi sp, sp, 32
12185; RV32I-NEXT:    ret
12186;
12187; RV32IA-LABEL: atomicrmw_min_i32_seq_cst:
12188; RV32IA:       # %bb.0:
12189; RV32IA-NEXT:    amomin.w.aqrl a0, a1, (a0)
12190; RV32IA-NEXT:    ret
12191;
12192; RV64I-LABEL: atomicrmw_min_i32_seq_cst:
12193; RV64I:       # %bb.0:
12194; RV64I-NEXT:    addi sp, sp, -48
12195; RV64I-NEXT:    sd ra, 40(sp)
12196; RV64I-NEXT:    sd s0, 32(sp)
12197; RV64I-NEXT:    sd s1, 24(sp)
12198; RV64I-NEXT:    sd s2, 16(sp)
12199; RV64I-NEXT:    sd s3, 8(sp)
12200; RV64I-NEXT:    mv s2, a1
12201; RV64I-NEXT:    mv s1, a0
12202; RV64I-NEXT:    lwu a0, 0(a0)
12203; RV64I-NEXT:    sext.w s0, a1
12204; RV64I-NEXT:    addi s3, sp, 4
12205; RV64I-NEXT:  .LBB154_1: # %atomicrmw.start
12206; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
12207; RV64I-NEXT:    sext.w a1, a0
12208; RV64I-NEXT:    mv a2, a0
12209; RV64I-NEXT:    bge s0, a1, .LBB154_3
12210; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
12211; RV64I-NEXT:    # in Loop: Header=BB154_1 Depth=1
12212; RV64I-NEXT:    mv a2, s2
12213; RV64I-NEXT:  .LBB154_3: # %atomicrmw.start
12214; RV64I-NEXT:    # in Loop: Header=BB154_1 Depth=1
12215; RV64I-NEXT:    sw a0, 4(sp)
12216; RV64I-NEXT:    mv a0, s1
12217; RV64I-NEXT:    mv a1, s3
12218; RV64I-NEXT:    addi a3, zero, 5
12219; RV64I-NEXT:    addi a4, zero, 5
12220; RV64I-NEXT:    call __atomic_compare_exchange_4
12221; RV64I-NEXT:    mv a1, a0
12222; RV64I-NEXT:    lw a0, 4(sp)
12223; RV64I-NEXT:    beqz a1, .LBB154_1
12224; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
12225; RV64I-NEXT:    ld s3, 8(sp)
12226; RV64I-NEXT:    ld s2, 16(sp)
12227; RV64I-NEXT:    ld s1, 24(sp)
12228; RV64I-NEXT:    ld s0, 32(sp)
12229; RV64I-NEXT:    ld ra, 40(sp)
12230; RV64I-NEXT:    addi sp, sp, 48
12231; RV64I-NEXT:    ret
12232;
12233; RV64IA-LABEL: atomicrmw_min_i32_seq_cst:
12234; RV64IA:       # %bb.0:
12235; RV64IA-NEXT:    amomin.w.aqrl a0, a1, (a0)
12236; RV64IA-NEXT:    ret
12237  %1 = atomicrmw min i32* %a, i32 %b seq_cst
12238  ret i32 %1
12239}
12240
12241define i32 @atomicrmw_umax_i32_monotonic(i32 *%a, i32 %b) nounwind {
12242; RV32I-LABEL: atomicrmw_umax_i32_monotonic:
12243; RV32I:       # %bb.0:
12244; RV32I-NEXT:    addi sp, sp, -32
12245; RV32I-NEXT:    sw ra, 28(sp)
12246; RV32I-NEXT:    sw s0, 24(sp)
12247; RV32I-NEXT:    sw s1, 20(sp)
12248; RV32I-NEXT:    sw s2, 16(sp)
12249; RV32I-NEXT:    mv s0, a1
12250; RV32I-NEXT:    mv s1, a0
12251; RV32I-NEXT:    lw a2, 0(a0)
12252; RV32I-NEXT:    addi s2, sp, 12
12253; RV32I-NEXT:  .LBB155_1: # %atomicrmw.start
12254; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
12255; RV32I-NEXT:    sw a2, 12(sp)
12256; RV32I-NEXT:    bltu s0, a2, .LBB155_3
12257; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
12258; RV32I-NEXT:    # in Loop: Header=BB155_1 Depth=1
12259; RV32I-NEXT:    mv a2, s0
12260; RV32I-NEXT:  .LBB155_3: # %atomicrmw.start
12261; RV32I-NEXT:    # in Loop: Header=BB155_1 Depth=1
12262; RV32I-NEXT:    mv a0, s1
12263; RV32I-NEXT:    mv a1, s2
12264; RV32I-NEXT:    mv a3, zero
12265; RV32I-NEXT:    mv a4, zero
12266; RV32I-NEXT:    call __atomic_compare_exchange_4
12267; RV32I-NEXT:    lw a2, 12(sp)
12268; RV32I-NEXT:    beqz a0, .LBB155_1
12269; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
12270; RV32I-NEXT:    mv a0, a2
12271; RV32I-NEXT:    lw s2, 16(sp)
12272; RV32I-NEXT:    lw s1, 20(sp)
12273; RV32I-NEXT:    lw s0, 24(sp)
12274; RV32I-NEXT:    lw ra, 28(sp)
12275; RV32I-NEXT:    addi sp, sp, 32
12276; RV32I-NEXT:    ret
12277;
12278; RV32IA-LABEL: atomicrmw_umax_i32_monotonic:
12279; RV32IA:       # %bb.0:
12280; RV32IA-NEXT:    amomaxu.w a0, a1, (a0)
12281; RV32IA-NEXT:    ret
12282;
12283; RV64I-LABEL: atomicrmw_umax_i32_monotonic:
12284; RV64I:       # %bb.0:
12285; RV64I-NEXT:    addi sp, sp, -48
12286; RV64I-NEXT:    sd ra, 40(sp)
12287; RV64I-NEXT:    sd s0, 32(sp)
12288; RV64I-NEXT:    sd s1, 24(sp)
12289; RV64I-NEXT:    sd s2, 16(sp)
12290; RV64I-NEXT:    sd s3, 8(sp)
12291; RV64I-NEXT:    mv s2, a1
12292; RV64I-NEXT:    mv s1, a0
12293; RV64I-NEXT:    lwu a0, 0(a0)
12294; RV64I-NEXT:    sext.w s0, a1
12295; RV64I-NEXT:    addi s3, sp, 4
12296; RV64I-NEXT:  .LBB155_1: # %atomicrmw.start
12297; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
12298; RV64I-NEXT:    sext.w a1, a0
12299; RV64I-NEXT:    mv a2, a0
12300; RV64I-NEXT:    bltu s0, a1, .LBB155_3
12301; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
12302; RV64I-NEXT:    # in Loop: Header=BB155_1 Depth=1
12303; RV64I-NEXT:    mv a2, s2
12304; RV64I-NEXT:  .LBB155_3: # %atomicrmw.start
12305; RV64I-NEXT:    # in Loop: Header=BB155_1 Depth=1
12306; RV64I-NEXT:    sw a0, 4(sp)
12307; RV64I-NEXT:    mv a0, s1
12308; RV64I-NEXT:    mv a1, s3
12309; RV64I-NEXT:    mv a3, zero
12310; RV64I-NEXT:    mv a4, zero
12311; RV64I-NEXT:    call __atomic_compare_exchange_4
12312; RV64I-NEXT:    mv a1, a0
12313; RV64I-NEXT:    lw a0, 4(sp)
12314; RV64I-NEXT:    beqz a1, .LBB155_1
12315; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
12316; RV64I-NEXT:    ld s3, 8(sp)
12317; RV64I-NEXT:    ld s2, 16(sp)
12318; RV64I-NEXT:    ld s1, 24(sp)
12319; RV64I-NEXT:    ld s0, 32(sp)
12320; RV64I-NEXT:    ld ra, 40(sp)
12321; RV64I-NEXT:    addi sp, sp, 48
12322; RV64I-NEXT:    ret
12323;
12324; RV64IA-LABEL: atomicrmw_umax_i32_monotonic:
12325; RV64IA:       # %bb.0:
12326; RV64IA-NEXT:    amomaxu.w a0, a1, (a0)
12327; RV64IA-NEXT:    ret
12328  %1 = atomicrmw umax i32* %a, i32 %b monotonic
12329  ret i32 %1
12330}
12331
12332define i32 @atomicrmw_umax_i32_acquire(i32 *%a, i32 %b) nounwind {
12333; RV32I-LABEL: atomicrmw_umax_i32_acquire:
12334; RV32I:       # %bb.0:
12335; RV32I-NEXT:    addi sp, sp, -32
12336; RV32I-NEXT:    sw ra, 28(sp)
12337; RV32I-NEXT:    sw s0, 24(sp)
12338; RV32I-NEXT:    sw s1, 20(sp)
12339; RV32I-NEXT:    sw s2, 16(sp)
12340; RV32I-NEXT:    mv s0, a1
12341; RV32I-NEXT:    mv s1, a0
12342; RV32I-NEXT:    lw a2, 0(a0)
12343; RV32I-NEXT:    addi s2, sp, 12
12344; RV32I-NEXT:  .LBB156_1: # %atomicrmw.start
12345; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
12346; RV32I-NEXT:    sw a2, 12(sp)
12347; RV32I-NEXT:    bltu s0, a2, .LBB156_3
12348; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
12349; RV32I-NEXT:    # in Loop: Header=BB156_1 Depth=1
12350; RV32I-NEXT:    mv a2, s0
12351; RV32I-NEXT:  .LBB156_3: # %atomicrmw.start
12352; RV32I-NEXT:    # in Loop: Header=BB156_1 Depth=1
12353; RV32I-NEXT:    mv a0, s1
12354; RV32I-NEXT:    mv a1, s2
12355; RV32I-NEXT:    addi a3, zero, 2
12356; RV32I-NEXT:    addi a4, zero, 2
12357; RV32I-NEXT:    call __atomic_compare_exchange_4
12358; RV32I-NEXT:    lw a2, 12(sp)
12359; RV32I-NEXT:    beqz a0, .LBB156_1
12360; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
12361; RV32I-NEXT:    mv a0, a2
12362; RV32I-NEXT:    lw s2, 16(sp)
12363; RV32I-NEXT:    lw s1, 20(sp)
12364; RV32I-NEXT:    lw s0, 24(sp)
12365; RV32I-NEXT:    lw ra, 28(sp)
12366; RV32I-NEXT:    addi sp, sp, 32
12367; RV32I-NEXT:    ret
12368;
12369; RV32IA-LABEL: atomicrmw_umax_i32_acquire:
12370; RV32IA:       # %bb.0:
12371; RV32IA-NEXT:    amomaxu.w.aq a0, a1, (a0)
12372; RV32IA-NEXT:    ret
12373;
12374; RV64I-LABEL: atomicrmw_umax_i32_acquire:
12375; RV64I:       # %bb.0:
12376; RV64I-NEXT:    addi sp, sp, -48
12377; RV64I-NEXT:    sd ra, 40(sp)
12378; RV64I-NEXT:    sd s0, 32(sp)
12379; RV64I-NEXT:    sd s1, 24(sp)
12380; RV64I-NEXT:    sd s2, 16(sp)
12381; RV64I-NEXT:    sd s3, 8(sp)
12382; RV64I-NEXT:    mv s2, a1
12383; RV64I-NEXT:    mv s1, a0
12384; RV64I-NEXT:    lwu a0, 0(a0)
12385; RV64I-NEXT:    sext.w s0, a1
12386; RV64I-NEXT:    addi s3, sp, 4
12387; RV64I-NEXT:  .LBB156_1: # %atomicrmw.start
12388; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
12389; RV64I-NEXT:    sext.w a1, a0
12390; RV64I-NEXT:    mv a2, a0
12391; RV64I-NEXT:    bltu s0, a1, .LBB156_3
12392; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
12393; RV64I-NEXT:    # in Loop: Header=BB156_1 Depth=1
12394; RV64I-NEXT:    mv a2, s2
12395; RV64I-NEXT:  .LBB156_3: # %atomicrmw.start
12396; RV64I-NEXT:    # in Loop: Header=BB156_1 Depth=1
12397; RV64I-NEXT:    sw a0, 4(sp)
12398; RV64I-NEXT:    mv a0, s1
12399; RV64I-NEXT:    mv a1, s3
12400; RV64I-NEXT:    addi a3, zero, 2
12401; RV64I-NEXT:    addi a4, zero, 2
12402; RV64I-NEXT:    call __atomic_compare_exchange_4
12403; RV64I-NEXT:    mv a1, a0
12404; RV64I-NEXT:    lw a0, 4(sp)
12405; RV64I-NEXT:    beqz a1, .LBB156_1
12406; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
12407; RV64I-NEXT:    ld s3, 8(sp)
12408; RV64I-NEXT:    ld s2, 16(sp)
12409; RV64I-NEXT:    ld s1, 24(sp)
12410; RV64I-NEXT:    ld s0, 32(sp)
12411; RV64I-NEXT:    ld ra, 40(sp)
12412; RV64I-NEXT:    addi sp, sp, 48
12413; RV64I-NEXT:    ret
12414;
12415; RV64IA-LABEL: atomicrmw_umax_i32_acquire:
12416; RV64IA:       # %bb.0:
12417; RV64IA-NEXT:    amomaxu.w.aq a0, a1, (a0)
12418; RV64IA-NEXT:    ret
12419  %1 = atomicrmw umax i32* %a, i32 %b acquire
12420  ret i32 %1
12421}
12422
12423define i32 @atomicrmw_umax_i32_release(i32 *%a, i32 %b) nounwind {
12424; RV32I-LABEL: atomicrmw_umax_i32_release:
12425; RV32I:       # %bb.0:
12426; RV32I-NEXT:    addi sp, sp, -32
12427; RV32I-NEXT:    sw ra, 28(sp)
12428; RV32I-NEXT:    sw s0, 24(sp)
12429; RV32I-NEXT:    sw s1, 20(sp)
12430; RV32I-NEXT:    sw s2, 16(sp)
12431; RV32I-NEXT:    mv s0, a1
12432; RV32I-NEXT:    mv s1, a0
12433; RV32I-NEXT:    lw a2, 0(a0)
12434; RV32I-NEXT:    addi s2, sp, 12
12435; RV32I-NEXT:  .LBB157_1: # %atomicrmw.start
12436; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
12437; RV32I-NEXT:    sw a2, 12(sp)
12438; RV32I-NEXT:    bltu s0, a2, .LBB157_3
12439; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
12440; RV32I-NEXT:    # in Loop: Header=BB157_1 Depth=1
12441; RV32I-NEXT:    mv a2, s0
12442; RV32I-NEXT:  .LBB157_3: # %atomicrmw.start
12443; RV32I-NEXT:    # in Loop: Header=BB157_1 Depth=1
12444; RV32I-NEXT:    mv a0, s1
12445; RV32I-NEXT:    mv a1, s2
12446; RV32I-NEXT:    addi a3, zero, 3
12447; RV32I-NEXT:    mv a4, zero
12448; RV32I-NEXT:    call __atomic_compare_exchange_4
12449; RV32I-NEXT:    lw a2, 12(sp)
12450; RV32I-NEXT:    beqz a0, .LBB157_1
12451; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
12452; RV32I-NEXT:    mv a0, a2
12453; RV32I-NEXT:    lw s2, 16(sp)
12454; RV32I-NEXT:    lw s1, 20(sp)
12455; RV32I-NEXT:    lw s0, 24(sp)
12456; RV32I-NEXT:    lw ra, 28(sp)
12457; RV32I-NEXT:    addi sp, sp, 32
12458; RV32I-NEXT:    ret
12459;
12460; RV32IA-LABEL: atomicrmw_umax_i32_release:
12461; RV32IA:       # %bb.0:
12462; RV32IA-NEXT:    amomaxu.w.rl a0, a1, (a0)
12463; RV32IA-NEXT:    ret
12464;
12465; RV64I-LABEL: atomicrmw_umax_i32_release:
12466; RV64I:       # %bb.0:
12467; RV64I-NEXT:    addi sp, sp, -48
12468; RV64I-NEXT:    sd ra, 40(sp)
12469; RV64I-NEXT:    sd s0, 32(sp)
12470; RV64I-NEXT:    sd s1, 24(sp)
12471; RV64I-NEXT:    sd s2, 16(sp)
12472; RV64I-NEXT:    sd s3, 8(sp)
12473; RV64I-NEXT:    mv s2, a1
12474; RV64I-NEXT:    mv s1, a0
12475; RV64I-NEXT:    lwu a0, 0(a0)
12476; RV64I-NEXT:    sext.w s0, a1
12477; RV64I-NEXT:    addi s3, sp, 4
12478; RV64I-NEXT:  .LBB157_1: # %atomicrmw.start
12479; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
12480; RV64I-NEXT:    sext.w a1, a0
12481; RV64I-NEXT:    mv a2, a0
12482; RV64I-NEXT:    bltu s0, a1, .LBB157_3
12483; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
12484; RV64I-NEXT:    # in Loop: Header=BB157_1 Depth=1
12485; RV64I-NEXT:    mv a2, s2
12486; RV64I-NEXT:  .LBB157_3: # %atomicrmw.start
12487; RV64I-NEXT:    # in Loop: Header=BB157_1 Depth=1
12488; RV64I-NEXT:    sw a0, 4(sp)
12489; RV64I-NEXT:    mv a0, s1
12490; RV64I-NEXT:    mv a1, s3
12491; RV64I-NEXT:    addi a3, zero, 3
12492; RV64I-NEXT:    mv a4, zero
12493; RV64I-NEXT:    call __atomic_compare_exchange_4
12494; RV64I-NEXT:    mv a1, a0
12495; RV64I-NEXT:    lw a0, 4(sp)
12496; RV64I-NEXT:    beqz a1, .LBB157_1
12497; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
12498; RV64I-NEXT:    ld s3, 8(sp)
12499; RV64I-NEXT:    ld s2, 16(sp)
12500; RV64I-NEXT:    ld s1, 24(sp)
12501; RV64I-NEXT:    ld s0, 32(sp)
12502; RV64I-NEXT:    ld ra, 40(sp)
12503; RV64I-NEXT:    addi sp, sp, 48
12504; RV64I-NEXT:    ret
12505;
12506; RV64IA-LABEL: atomicrmw_umax_i32_release:
12507; RV64IA:       # %bb.0:
12508; RV64IA-NEXT:    amomaxu.w.rl a0, a1, (a0)
12509; RV64IA-NEXT:    ret
12510  %1 = atomicrmw umax i32* %a, i32 %b release
12511  ret i32 %1
12512}
12513
12514define i32 @atomicrmw_umax_i32_acq_rel(i32 *%a, i32 %b) nounwind {
12515; RV32I-LABEL: atomicrmw_umax_i32_acq_rel:
12516; RV32I:       # %bb.0:
12517; RV32I-NEXT:    addi sp, sp, -32
12518; RV32I-NEXT:    sw ra, 28(sp)
12519; RV32I-NEXT:    sw s0, 24(sp)
12520; RV32I-NEXT:    sw s1, 20(sp)
12521; RV32I-NEXT:    sw s2, 16(sp)
12522; RV32I-NEXT:    mv s0, a1
12523; RV32I-NEXT:    mv s1, a0
12524; RV32I-NEXT:    lw a2, 0(a0)
12525; RV32I-NEXT:    addi s2, sp, 12
12526; RV32I-NEXT:  .LBB158_1: # %atomicrmw.start
12527; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
12528; RV32I-NEXT:    sw a2, 12(sp)
12529; RV32I-NEXT:    bltu s0, a2, .LBB158_3
12530; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
12531; RV32I-NEXT:    # in Loop: Header=BB158_1 Depth=1
12532; RV32I-NEXT:    mv a2, s0
12533; RV32I-NEXT:  .LBB158_3: # %atomicrmw.start
12534; RV32I-NEXT:    # in Loop: Header=BB158_1 Depth=1
12535; RV32I-NEXT:    mv a0, s1
12536; RV32I-NEXT:    mv a1, s2
12537; RV32I-NEXT:    addi a3, zero, 4
12538; RV32I-NEXT:    addi a4, zero, 2
12539; RV32I-NEXT:    call __atomic_compare_exchange_4
12540; RV32I-NEXT:    lw a2, 12(sp)
12541; RV32I-NEXT:    beqz a0, .LBB158_1
12542; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
12543; RV32I-NEXT:    mv a0, a2
12544; RV32I-NEXT:    lw s2, 16(sp)
12545; RV32I-NEXT:    lw s1, 20(sp)
12546; RV32I-NEXT:    lw s0, 24(sp)
12547; RV32I-NEXT:    lw ra, 28(sp)
12548; RV32I-NEXT:    addi sp, sp, 32
12549; RV32I-NEXT:    ret
12550;
12551; RV32IA-LABEL: atomicrmw_umax_i32_acq_rel:
12552; RV32IA:       # %bb.0:
12553; RV32IA-NEXT:    amomaxu.w.aqrl a0, a1, (a0)
12554; RV32IA-NEXT:    ret
12555;
12556; RV64I-LABEL: atomicrmw_umax_i32_acq_rel:
12557; RV64I:       # %bb.0:
12558; RV64I-NEXT:    addi sp, sp, -48
12559; RV64I-NEXT:    sd ra, 40(sp)
12560; RV64I-NEXT:    sd s0, 32(sp)
12561; RV64I-NEXT:    sd s1, 24(sp)
12562; RV64I-NEXT:    sd s2, 16(sp)
12563; RV64I-NEXT:    sd s3, 8(sp)
12564; RV64I-NEXT:    mv s2, a1
12565; RV64I-NEXT:    mv s1, a0
12566; RV64I-NEXT:    lwu a0, 0(a0)
12567; RV64I-NEXT:    sext.w s0, a1
12568; RV64I-NEXT:    addi s3, sp, 4
12569; RV64I-NEXT:  .LBB158_1: # %atomicrmw.start
12570; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
12571; RV64I-NEXT:    sext.w a1, a0
12572; RV64I-NEXT:    mv a2, a0
12573; RV64I-NEXT:    bltu s0, a1, .LBB158_3
12574; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
12575; RV64I-NEXT:    # in Loop: Header=BB158_1 Depth=1
12576; RV64I-NEXT:    mv a2, s2
12577; RV64I-NEXT:  .LBB158_3: # %atomicrmw.start
12578; RV64I-NEXT:    # in Loop: Header=BB158_1 Depth=1
12579; RV64I-NEXT:    sw a0, 4(sp)
12580; RV64I-NEXT:    mv a0, s1
12581; RV64I-NEXT:    mv a1, s3
12582; RV64I-NEXT:    addi a3, zero, 4
12583; RV64I-NEXT:    addi a4, zero, 2
12584; RV64I-NEXT:    call __atomic_compare_exchange_4
12585; RV64I-NEXT:    mv a1, a0
12586; RV64I-NEXT:    lw a0, 4(sp)
12587; RV64I-NEXT:    beqz a1, .LBB158_1
12588; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
12589; RV64I-NEXT:    ld s3, 8(sp)
12590; RV64I-NEXT:    ld s2, 16(sp)
12591; RV64I-NEXT:    ld s1, 24(sp)
12592; RV64I-NEXT:    ld s0, 32(sp)
12593; RV64I-NEXT:    ld ra, 40(sp)
12594; RV64I-NEXT:    addi sp, sp, 48
12595; RV64I-NEXT:    ret
12596;
12597; RV64IA-LABEL: atomicrmw_umax_i32_acq_rel:
12598; RV64IA:       # %bb.0:
12599; RV64IA-NEXT:    amomaxu.w.aqrl a0, a1, (a0)
12600; RV64IA-NEXT:    ret
12601  %1 = atomicrmw umax i32* %a, i32 %b acq_rel
12602  ret i32 %1
12603}
12604
12605define i32 @atomicrmw_umax_i32_seq_cst(i32 *%a, i32 %b) nounwind {
12606; RV32I-LABEL: atomicrmw_umax_i32_seq_cst:
12607; RV32I:       # %bb.0:
12608; RV32I-NEXT:    addi sp, sp, -32
12609; RV32I-NEXT:    sw ra, 28(sp)
12610; RV32I-NEXT:    sw s0, 24(sp)
12611; RV32I-NEXT:    sw s1, 20(sp)
12612; RV32I-NEXT:    sw s2, 16(sp)
12613; RV32I-NEXT:    mv s0, a1
12614; RV32I-NEXT:    mv s1, a0
12615; RV32I-NEXT:    lw a2, 0(a0)
12616; RV32I-NEXT:    addi s2, sp, 12
12617; RV32I-NEXT:  .LBB159_1: # %atomicrmw.start
12618; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
12619; RV32I-NEXT:    sw a2, 12(sp)
12620; RV32I-NEXT:    bltu s0, a2, .LBB159_3
12621; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
12622; RV32I-NEXT:    # in Loop: Header=BB159_1 Depth=1
12623; RV32I-NEXT:    mv a2, s0
12624; RV32I-NEXT:  .LBB159_3: # %atomicrmw.start
12625; RV32I-NEXT:    # in Loop: Header=BB159_1 Depth=1
12626; RV32I-NEXT:    mv a0, s1
12627; RV32I-NEXT:    mv a1, s2
12628; RV32I-NEXT:    addi a3, zero, 5
12629; RV32I-NEXT:    addi a4, zero, 5
12630; RV32I-NEXT:    call __atomic_compare_exchange_4
12631; RV32I-NEXT:    lw a2, 12(sp)
12632; RV32I-NEXT:    beqz a0, .LBB159_1
12633; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
12634; RV32I-NEXT:    mv a0, a2
12635; RV32I-NEXT:    lw s2, 16(sp)
12636; RV32I-NEXT:    lw s1, 20(sp)
12637; RV32I-NEXT:    lw s0, 24(sp)
12638; RV32I-NEXT:    lw ra, 28(sp)
12639; RV32I-NEXT:    addi sp, sp, 32
12640; RV32I-NEXT:    ret
12641;
12642; RV32IA-LABEL: atomicrmw_umax_i32_seq_cst:
12643; RV32IA:       # %bb.0:
12644; RV32IA-NEXT:    amomaxu.w.aqrl a0, a1, (a0)
12645; RV32IA-NEXT:    ret
12646;
12647; RV64I-LABEL: atomicrmw_umax_i32_seq_cst:
12648; RV64I:       # %bb.0:
12649; RV64I-NEXT:    addi sp, sp, -48
12650; RV64I-NEXT:    sd ra, 40(sp)
12651; RV64I-NEXT:    sd s0, 32(sp)
12652; RV64I-NEXT:    sd s1, 24(sp)
12653; RV64I-NEXT:    sd s2, 16(sp)
12654; RV64I-NEXT:    sd s3, 8(sp)
12655; RV64I-NEXT:    mv s2, a1
12656; RV64I-NEXT:    mv s1, a0
12657; RV64I-NEXT:    lwu a0, 0(a0)
12658; RV64I-NEXT:    sext.w s0, a1
12659; RV64I-NEXT:    addi s3, sp, 4
12660; RV64I-NEXT:  .LBB159_1: # %atomicrmw.start
12661; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
12662; RV64I-NEXT:    sext.w a1, a0
12663; RV64I-NEXT:    mv a2, a0
12664; RV64I-NEXT:    bltu s0, a1, .LBB159_3
12665; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
12666; RV64I-NEXT:    # in Loop: Header=BB159_1 Depth=1
12667; RV64I-NEXT:    mv a2, s2
12668; RV64I-NEXT:  .LBB159_3: # %atomicrmw.start
12669; RV64I-NEXT:    # in Loop: Header=BB159_1 Depth=1
12670; RV64I-NEXT:    sw a0, 4(sp)
12671; RV64I-NEXT:    mv a0, s1
12672; RV64I-NEXT:    mv a1, s3
12673; RV64I-NEXT:    addi a3, zero, 5
12674; RV64I-NEXT:    addi a4, zero, 5
12675; RV64I-NEXT:    call __atomic_compare_exchange_4
12676; RV64I-NEXT:    mv a1, a0
12677; RV64I-NEXT:    lw a0, 4(sp)
12678; RV64I-NEXT:    beqz a1, .LBB159_1
12679; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
12680; RV64I-NEXT:    ld s3, 8(sp)
12681; RV64I-NEXT:    ld s2, 16(sp)
12682; RV64I-NEXT:    ld s1, 24(sp)
12683; RV64I-NEXT:    ld s0, 32(sp)
12684; RV64I-NEXT:    ld ra, 40(sp)
12685; RV64I-NEXT:    addi sp, sp, 48
12686; RV64I-NEXT:    ret
12687;
12688; RV64IA-LABEL: atomicrmw_umax_i32_seq_cst:
12689; RV64IA:       # %bb.0:
12690; RV64IA-NEXT:    amomaxu.w.aqrl a0, a1, (a0)
12691; RV64IA-NEXT:    ret
12692  %1 = atomicrmw umax i32* %a, i32 %b seq_cst
12693  ret i32 %1
12694}
12695
12696define i32 @atomicrmw_umin_i32_monotonic(i32 *%a, i32 %b) nounwind {
12697; RV32I-LABEL: atomicrmw_umin_i32_monotonic:
12698; RV32I:       # %bb.0:
12699; RV32I-NEXT:    addi sp, sp, -32
12700; RV32I-NEXT:    sw ra, 28(sp)
12701; RV32I-NEXT:    sw s0, 24(sp)
12702; RV32I-NEXT:    sw s1, 20(sp)
12703; RV32I-NEXT:    sw s2, 16(sp)
12704; RV32I-NEXT:    mv s0, a1
12705; RV32I-NEXT:    mv s1, a0
12706; RV32I-NEXT:    lw a2, 0(a0)
12707; RV32I-NEXT:    addi s2, sp, 12
12708; RV32I-NEXT:  .LBB160_1: # %atomicrmw.start
12709; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
12710; RV32I-NEXT:    sw a2, 12(sp)
12711; RV32I-NEXT:    bgeu s0, a2, .LBB160_3
12712; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
12713; RV32I-NEXT:    # in Loop: Header=BB160_1 Depth=1
12714; RV32I-NEXT:    mv a2, s0
12715; RV32I-NEXT:  .LBB160_3: # %atomicrmw.start
12716; RV32I-NEXT:    # in Loop: Header=BB160_1 Depth=1
12717; RV32I-NEXT:    mv a0, s1
12718; RV32I-NEXT:    mv a1, s2
12719; RV32I-NEXT:    mv a3, zero
12720; RV32I-NEXT:    mv a4, zero
12721; RV32I-NEXT:    call __atomic_compare_exchange_4
12722; RV32I-NEXT:    lw a2, 12(sp)
12723; RV32I-NEXT:    beqz a0, .LBB160_1
12724; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
12725; RV32I-NEXT:    mv a0, a2
12726; RV32I-NEXT:    lw s2, 16(sp)
12727; RV32I-NEXT:    lw s1, 20(sp)
12728; RV32I-NEXT:    lw s0, 24(sp)
12729; RV32I-NEXT:    lw ra, 28(sp)
12730; RV32I-NEXT:    addi sp, sp, 32
12731; RV32I-NEXT:    ret
12732;
12733; RV32IA-LABEL: atomicrmw_umin_i32_monotonic:
12734; RV32IA:       # %bb.0:
12735; RV32IA-NEXT:    amominu.w a0, a1, (a0)
12736; RV32IA-NEXT:    ret
12737;
12738; RV64I-LABEL: atomicrmw_umin_i32_monotonic:
12739; RV64I:       # %bb.0:
12740; RV64I-NEXT:    addi sp, sp, -48
12741; RV64I-NEXT:    sd ra, 40(sp)
12742; RV64I-NEXT:    sd s0, 32(sp)
12743; RV64I-NEXT:    sd s1, 24(sp)
12744; RV64I-NEXT:    sd s2, 16(sp)
12745; RV64I-NEXT:    sd s3, 8(sp)
12746; RV64I-NEXT:    mv s2, a1
12747; RV64I-NEXT:    mv s1, a0
12748; RV64I-NEXT:    lwu a0, 0(a0)
12749; RV64I-NEXT:    sext.w s0, a1
12750; RV64I-NEXT:    addi s3, sp, 4
12751; RV64I-NEXT:  .LBB160_1: # %atomicrmw.start
12752; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
12753; RV64I-NEXT:    sext.w a1, a0
12754; RV64I-NEXT:    mv a2, a0
12755; RV64I-NEXT:    bgeu s0, a1, .LBB160_3
12756; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
12757; RV64I-NEXT:    # in Loop: Header=BB160_1 Depth=1
12758; RV64I-NEXT:    mv a2, s2
12759; RV64I-NEXT:  .LBB160_3: # %atomicrmw.start
12760; RV64I-NEXT:    # in Loop: Header=BB160_1 Depth=1
12761; RV64I-NEXT:    sw a0, 4(sp)
12762; RV64I-NEXT:    mv a0, s1
12763; RV64I-NEXT:    mv a1, s3
12764; RV64I-NEXT:    mv a3, zero
12765; RV64I-NEXT:    mv a4, zero
12766; RV64I-NEXT:    call __atomic_compare_exchange_4
12767; RV64I-NEXT:    mv a1, a0
12768; RV64I-NEXT:    lw a0, 4(sp)
12769; RV64I-NEXT:    beqz a1, .LBB160_1
12770; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
12771; RV64I-NEXT:    ld s3, 8(sp)
12772; RV64I-NEXT:    ld s2, 16(sp)
12773; RV64I-NEXT:    ld s1, 24(sp)
12774; RV64I-NEXT:    ld s0, 32(sp)
12775; RV64I-NEXT:    ld ra, 40(sp)
12776; RV64I-NEXT:    addi sp, sp, 48
12777; RV64I-NEXT:    ret
12778;
12779; RV64IA-LABEL: atomicrmw_umin_i32_monotonic:
12780; RV64IA:       # %bb.0:
12781; RV64IA-NEXT:    amominu.w a0, a1, (a0)
12782; RV64IA-NEXT:    ret
12783  %1 = atomicrmw umin i32* %a, i32 %b monotonic
12784  ret i32 %1
12785}
12786
12787define i32 @atomicrmw_umin_i32_acquire(i32 *%a, i32 %b) nounwind {
12788; RV32I-LABEL: atomicrmw_umin_i32_acquire:
12789; RV32I:       # %bb.0:
12790; RV32I-NEXT:    addi sp, sp, -32
12791; RV32I-NEXT:    sw ra, 28(sp)
12792; RV32I-NEXT:    sw s0, 24(sp)
12793; RV32I-NEXT:    sw s1, 20(sp)
12794; RV32I-NEXT:    sw s2, 16(sp)
12795; RV32I-NEXT:    mv s0, a1
12796; RV32I-NEXT:    mv s1, a0
12797; RV32I-NEXT:    lw a2, 0(a0)
12798; RV32I-NEXT:    addi s2, sp, 12
12799; RV32I-NEXT:  .LBB161_1: # %atomicrmw.start
12800; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
12801; RV32I-NEXT:    sw a2, 12(sp)
12802; RV32I-NEXT:    bgeu s0, a2, .LBB161_3
12803; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
12804; RV32I-NEXT:    # in Loop: Header=BB161_1 Depth=1
12805; RV32I-NEXT:    mv a2, s0
12806; RV32I-NEXT:  .LBB161_3: # %atomicrmw.start
12807; RV32I-NEXT:    # in Loop: Header=BB161_1 Depth=1
12808; RV32I-NEXT:    mv a0, s1
12809; RV32I-NEXT:    mv a1, s2
12810; RV32I-NEXT:    addi a3, zero, 2
12811; RV32I-NEXT:    addi a4, zero, 2
12812; RV32I-NEXT:    call __atomic_compare_exchange_4
12813; RV32I-NEXT:    lw a2, 12(sp)
12814; RV32I-NEXT:    beqz a0, .LBB161_1
12815; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
12816; RV32I-NEXT:    mv a0, a2
12817; RV32I-NEXT:    lw s2, 16(sp)
12818; RV32I-NEXT:    lw s1, 20(sp)
12819; RV32I-NEXT:    lw s0, 24(sp)
12820; RV32I-NEXT:    lw ra, 28(sp)
12821; RV32I-NEXT:    addi sp, sp, 32
12822; RV32I-NEXT:    ret
12823;
12824; RV32IA-LABEL: atomicrmw_umin_i32_acquire:
12825; RV32IA:       # %bb.0:
12826; RV32IA-NEXT:    amominu.w.aq a0, a1, (a0)
12827; RV32IA-NEXT:    ret
12828;
12829; RV64I-LABEL: atomicrmw_umin_i32_acquire:
12830; RV64I:       # %bb.0:
12831; RV64I-NEXT:    addi sp, sp, -48
12832; RV64I-NEXT:    sd ra, 40(sp)
12833; RV64I-NEXT:    sd s0, 32(sp)
12834; RV64I-NEXT:    sd s1, 24(sp)
12835; RV64I-NEXT:    sd s2, 16(sp)
12836; RV64I-NEXT:    sd s3, 8(sp)
12837; RV64I-NEXT:    mv s2, a1
12838; RV64I-NEXT:    mv s1, a0
12839; RV64I-NEXT:    lwu a0, 0(a0)
12840; RV64I-NEXT:    sext.w s0, a1
12841; RV64I-NEXT:    addi s3, sp, 4
12842; RV64I-NEXT:  .LBB161_1: # %atomicrmw.start
12843; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
12844; RV64I-NEXT:    sext.w a1, a0
12845; RV64I-NEXT:    mv a2, a0
12846; RV64I-NEXT:    bgeu s0, a1, .LBB161_3
12847; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
12848; RV64I-NEXT:    # in Loop: Header=BB161_1 Depth=1
12849; RV64I-NEXT:    mv a2, s2
12850; RV64I-NEXT:  .LBB161_3: # %atomicrmw.start
12851; RV64I-NEXT:    # in Loop: Header=BB161_1 Depth=1
12852; RV64I-NEXT:    sw a0, 4(sp)
12853; RV64I-NEXT:    mv a0, s1
12854; RV64I-NEXT:    mv a1, s3
12855; RV64I-NEXT:    addi a3, zero, 2
12856; RV64I-NEXT:    addi a4, zero, 2
12857; RV64I-NEXT:    call __atomic_compare_exchange_4
12858; RV64I-NEXT:    mv a1, a0
12859; RV64I-NEXT:    lw a0, 4(sp)
12860; RV64I-NEXT:    beqz a1, .LBB161_1
12861; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
12862; RV64I-NEXT:    ld s3, 8(sp)
12863; RV64I-NEXT:    ld s2, 16(sp)
12864; RV64I-NEXT:    ld s1, 24(sp)
12865; RV64I-NEXT:    ld s0, 32(sp)
12866; RV64I-NEXT:    ld ra, 40(sp)
12867; RV64I-NEXT:    addi sp, sp, 48
12868; RV64I-NEXT:    ret
12869;
12870; RV64IA-LABEL: atomicrmw_umin_i32_acquire:
12871; RV64IA:       # %bb.0:
12872; RV64IA-NEXT:    amominu.w.aq a0, a1, (a0)
12873; RV64IA-NEXT:    ret
12874  %1 = atomicrmw umin i32* %a, i32 %b acquire
12875  ret i32 %1
12876}
12877
12878define i32 @atomicrmw_umin_i32_release(i32 *%a, i32 %b) nounwind {
12879; RV32I-LABEL: atomicrmw_umin_i32_release:
12880; RV32I:       # %bb.0:
12881; RV32I-NEXT:    addi sp, sp, -32
12882; RV32I-NEXT:    sw ra, 28(sp)
12883; RV32I-NEXT:    sw s0, 24(sp)
12884; RV32I-NEXT:    sw s1, 20(sp)
12885; RV32I-NEXT:    sw s2, 16(sp)
12886; RV32I-NEXT:    mv s0, a1
12887; RV32I-NEXT:    mv s1, a0
12888; RV32I-NEXT:    lw a2, 0(a0)
12889; RV32I-NEXT:    addi s2, sp, 12
12890; RV32I-NEXT:  .LBB162_1: # %atomicrmw.start
12891; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
12892; RV32I-NEXT:    sw a2, 12(sp)
12893; RV32I-NEXT:    bgeu s0, a2, .LBB162_3
12894; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
12895; RV32I-NEXT:    # in Loop: Header=BB162_1 Depth=1
12896; RV32I-NEXT:    mv a2, s0
12897; RV32I-NEXT:  .LBB162_3: # %atomicrmw.start
12898; RV32I-NEXT:    # in Loop: Header=BB162_1 Depth=1
12899; RV32I-NEXT:    mv a0, s1
12900; RV32I-NEXT:    mv a1, s2
12901; RV32I-NEXT:    addi a3, zero, 3
12902; RV32I-NEXT:    mv a4, zero
12903; RV32I-NEXT:    call __atomic_compare_exchange_4
12904; RV32I-NEXT:    lw a2, 12(sp)
12905; RV32I-NEXT:    beqz a0, .LBB162_1
12906; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
12907; RV32I-NEXT:    mv a0, a2
12908; RV32I-NEXT:    lw s2, 16(sp)
12909; RV32I-NEXT:    lw s1, 20(sp)
12910; RV32I-NEXT:    lw s0, 24(sp)
12911; RV32I-NEXT:    lw ra, 28(sp)
12912; RV32I-NEXT:    addi sp, sp, 32
12913; RV32I-NEXT:    ret
12914;
12915; RV32IA-LABEL: atomicrmw_umin_i32_release:
12916; RV32IA:       # %bb.0:
12917; RV32IA-NEXT:    amominu.w.rl a0, a1, (a0)
12918; RV32IA-NEXT:    ret
12919;
12920; RV64I-LABEL: atomicrmw_umin_i32_release:
12921; RV64I:       # %bb.0:
12922; RV64I-NEXT:    addi sp, sp, -48
12923; RV64I-NEXT:    sd ra, 40(sp)
12924; RV64I-NEXT:    sd s0, 32(sp)
12925; RV64I-NEXT:    sd s1, 24(sp)
12926; RV64I-NEXT:    sd s2, 16(sp)
12927; RV64I-NEXT:    sd s3, 8(sp)
12928; RV64I-NEXT:    mv s2, a1
12929; RV64I-NEXT:    mv s1, a0
12930; RV64I-NEXT:    lwu a0, 0(a0)
12931; RV64I-NEXT:    sext.w s0, a1
12932; RV64I-NEXT:    addi s3, sp, 4
12933; RV64I-NEXT:  .LBB162_1: # %atomicrmw.start
12934; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
12935; RV64I-NEXT:    sext.w a1, a0
12936; RV64I-NEXT:    mv a2, a0
12937; RV64I-NEXT:    bgeu s0, a1, .LBB162_3
12938; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
12939; RV64I-NEXT:    # in Loop: Header=BB162_1 Depth=1
12940; RV64I-NEXT:    mv a2, s2
12941; RV64I-NEXT:  .LBB162_3: # %atomicrmw.start
12942; RV64I-NEXT:    # in Loop: Header=BB162_1 Depth=1
12943; RV64I-NEXT:    sw a0, 4(sp)
12944; RV64I-NEXT:    mv a0, s1
12945; RV64I-NEXT:    mv a1, s3
12946; RV64I-NEXT:    addi a3, zero, 3
12947; RV64I-NEXT:    mv a4, zero
12948; RV64I-NEXT:    call __atomic_compare_exchange_4
12949; RV64I-NEXT:    mv a1, a0
12950; RV64I-NEXT:    lw a0, 4(sp)
12951; RV64I-NEXT:    beqz a1, .LBB162_1
12952; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
12953; RV64I-NEXT:    ld s3, 8(sp)
12954; RV64I-NEXT:    ld s2, 16(sp)
12955; RV64I-NEXT:    ld s1, 24(sp)
12956; RV64I-NEXT:    ld s0, 32(sp)
12957; RV64I-NEXT:    ld ra, 40(sp)
12958; RV64I-NEXT:    addi sp, sp, 48
12959; RV64I-NEXT:    ret
12960;
12961; RV64IA-LABEL: atomicrmw_umin_i32_release:
12962; RV64IA:       # %bb.0:
12963; RV64IA-NEXT:    amominu.w.rl a0, a1, (a0)
12964; RV64IA-NEXT:    ret
12965  %1 = atomicrmw umin i32* %a, i32 %b release
12966  ret i32 %1
12967}
12968
12969define i32 @atomicrmw_umin_i32_acq_rel(i32 *%a, i32 %b) nounwind {
12970; RV32I-LABEL: atomicrmw_umin_i32_acq_rel:
12971; RV32I:       # %bb.0:
12972; RV32I-NEXT:    addi sp, sp, -32
12973; RV32I-NEXT:    sw ra, 28(sp)
12974; RV32I-NEXT:    sw s0, 24(sp)
12975; RV32I-NEXT:    sw s1, 20(sp)
12976; RV32I-NEXT:    sw s2, 16(sp)
12977; RV32I-NEXT:    mv s0, a1
12978; RV32I-NEXT:    mv s1, a0
12979; RV32I-NEXT:    lw a2, 0(a0)
12980; RV32I-NEXT:    addi s2, sp, 12
12981; RV32I-NEXT:  .LBB163_1: # %atomicrmw.start
12982; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
12983; RV32I-NEXT:    sw a2, 12(sp)
12984; RV32I-NEXT:    bgeu s0, a2, .LBB163_3
12985; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
12986; RV32I-NEXT:    # in Loop: Header=BB163_1 Depth=1
12987; RV32I-NEXT:    mv a2, s0
12988; RV32I-NEXT:  .LBB163_3: # %atomicrmw.start
12989; RV32I-NEXT:    # in Loop: Header=BB163_1 Depth=1
12990; RV32I-NEXT:    mv a0, s1
12991; RV32I-NEXT:    mv a1, s2
12992; RV32I-NEXT:    addi a3, zero, 4
12993; RV32I-NEXT:    addi a4, zero, 2
12994; RV32I-NEXT:    call __atomic_compare_exchange_4
12995; RV32I-NEXT:    lw a2, 12(sp)
12996; RV32I-NEXT:    beqz a0, .LBB163_1
12997; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
12998; RV32I-NEXT:    mv a0, a2
12999; RV32I-NEXT:    lw s2, 16(sp)
13000; RV32I-NEXT:    lw s1, 20(sp)
13001; RV32I-NEXT:    lw s0, 24(sp)
13002; RV32I-NEXT:    lw ra, 28(sp)
13003; RV32I-NEXT:    addi sp, sp, 32
13004; RV32I-NEXT:    ret
13005;
13006; RV32IA-LABEL: atomicrmw_umin_i32_acq_rel:
13007; RV32IA:       # %bb.0:
13008; RV32IA-NEXT:    amominu.w.aqrl a0, a1, (a0)
13009; RV32IA-NEXT:    ret
13010;
13011; RV64I-LABEL: atomicrmw_umin_i32_acq_rel:
13012; RV64I:       # %bb.0:
13013; RV64I-NEXT:    addi sp, sp, -48
13014; RV64I-NEXT:    sd ra, 40(sp)
13015; RV64I-NEXT:    sd s0, 32(sp)
13016; RV64I-NEXT:    sd s1, 24(sp)
13017; RV64I-NEXT:    sd s2, 16(sp)
13018; RV64I-NEXT:    sd s3, 8(sp)
13019; RV64I-NEXT:    mv s2, a1
13020; RV64I-NEXT:    mv s1, a0
13021; RV64I-NEXT:    lwu a0, 0(a0)
13022; RV64I-NEXT:    sext.w s0, a1
13023; RV64I-NEXT:    addi s3, sp, 4
13024; RV64I-NEXT:  .LBB163_1: # %atomicrmw.start
13025; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
13026; RV64I-NEXT:    sext.w a1, a0
13027; RV64I-NEXT:    mv a2, a0
13028; RV64I-NEXT:    bgeu s0, a1, .LBB163_3
13029; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
13030; RV64I-NEXT:    # in Loop: Header=BB163_1 Depth=1
13031; RV64I-NEXT:    mv a2, s2
13032; RV64I-NEXT:  .LBB163_3: # %atomicrmw.start
13033; RV64I-NEXT:    # in Loop: Header=BB163_1 Depth=1
13034; RV64I-NEXT:    sw a0, 4(sp)
13035; RV64I-NEXT:    mv a0, s1
13036; RV64I-NEXT:    mv a1, s3
13037; RV64I-NEXT:    addi a3, zero, 4
13038; RV64I-NEXT:    addi a4, zero, 2
13039; RV64I-NEXT:    call __atomic_compare_exchange_4
13040; RV64I-NEXT:    mv a1, a0
13041; RV64I-NEXT:    lw a0, 4(sp)
13042; RV64I-NEXT:    beqz a1, .LBB163_1
13043; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
13044; RV64I-NEXT:    ld s3, 8(sp)
13045; RV64I-NEXT:    ld s2, 16(sp)
13046; RV64I-NEXT:    ld s1, 24(sp)
13047; RV64I-NEXT:    ld s0, 32(sp)
13048; RV64I-NEXT:    ld ra, 40(sp)
13049; RV64I-NEXT:    addi sp, sp, 48
13050; RV64I-NEXT:    ret
13051;
13052; RV64IA-LABEL: atomicrmw_umin_i32_acq_rel:
13053; RV64IA:       # %bb.0:
13054; RV64IA-NEXT:    amominu.w.aqrl a0, a1, (a0)
13055; RV64IA-NEXT:    ret
13056  %1 = atomicrmw umin i32* %a, i32 %b acq_rel
13057  ret i32 %1
13058}
13059
13060define i32 @atomicrmw_umin_i32_seq_cst(i32 *%a, i32 %b) nounwind {
13061; RV32I-LABEL: atomicrmw_umin_i32_seq_cst:
13062; RV32I:       # %bb.0:
13063; RV32I-NEXT:    addi sp, sp, -32
13064; RV32I-NEXT:    sw ra, 28(sp)
13065; RV32I-NEXT:    sw s0, 24(sp)
13066; RV32I-NEXT:    sw s1, 20(sp)
13067; RV32I-NEXT:    sw s2, 16(sp)
13068; RV32I-NEXT:    mv s0, a1
13069; RV32I-NEXT:    mv s1, a0
13070; RV32I-NEXT:    lw a2, 0(a0)
13071; RV32I-NEXT:    addi s2, sp, 12
13072; RV32I-NEXT:  .LBB164_1: # %atomicrmw.start
13073; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
13074; RV32I-NEXT:    sw a2, 12(sp)
13075; RV32I-NEXT:    bgeu s0, a2, .LBB164_3
13076; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
13077; RV32I-NEXT:    # in Loop: Header=BB164_1 Depth=1
13078; RV32I-NEXT:    mv a2, s0
13079; RV32I-NEXT:  .LBB164_3: # %atomicrmw.start
13080; RV32I-NEXT:    # in Loop: Header=BB164_1 Depth=1
13081; RV32I-NEXT:    mv a0, s1
13082; RV32I-NEXT:    mv a1, s2
13083; RV32I-NEXT:    addi a3, zero, 5
13084; RV32I-NEXT:    addi a4, zero, 5
13085; RV32I-NEXT:    call __atomic_compare_exchange_4
13086; RV32I-NEXT:    lw a2, 12(sp)
13087; RV32I-NEXT:    beqz a0, .LBB164_1
13088; RV32I-NEXT:  # %bb.4: # %atomicrmw.end
13089; RV32I-NEXT:    mv a0, a2
13090; RV32I-NEXT:    lw s2, 16(sp)
13091; RV32I-NEXT:    lw s1, 20(sp)
13092; RV32I-NEXT:    lw s0, 24(sp)
13093; RV32I-NEXT:    lw ra, 28(sp)
13094; RV32I-NEXT:    addi sp, sp, 32
13095; RV32I-NEXT:    ret
13096;
13097; RV32IA-LABEL: atomicrmw_umin_i32_seq_cst:
13098; RV32IA:       # %bb.0:
13099; RV32IA-NEXT:    amominu.w.aqrl a0, a1, (a0)
13100; RV32IA-NEXT:    ret
13101;
13102; RV64I-LABEL: atomicrmw_umin_i32_seq_cst:
13103; RV64I:       # %bb.0:
13104; RV64I-NEXT:    addi sp, sp, -48
13105; RV64I-NEXT:    sd ra, 40(sp)
13106; RV64I-NEXT:    sd s0, 32(sp)
13107; RV64I-NEXT:    sd s1, 24(sp)
13108; RV64I-NEXT:    sd s2, 16(sp)
13109; RV64I-NEXT:    sd s3, 8(sp)
13110; RV64I-NEXT:    mv s2, a1
13111; RV64I-NEXT:    mv s1, a0
13112; RV64I-NEXT:    lwu a0, 0(a0)
13113; RV64I-NEXT:    sext.w s0, a1
13114; RV64I-NEXT:    addi s3, sp, 4
13115; RV64I-NEXT:  .LBB164_1: # %atomicrmw.start
13116; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
13117; RV64I-NEXT:    sext.w a1, a0
13118; RV64I-NEXT:    mv a2, a0
13119; RV64I-NEXT:    bgeu s0, a1, .LBB164_3
13120; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
13121; RV64I-NEXT:    # in Loop: Header=BB164_1 Depth=1
13122; RV64I-NEXT:    mv a2, s2
13123; RV64I-NEXT:  .LBB164_3: # %atomicrmw.start
13124; RV64I-NEXT:    # in Loop: Header=BB164_1 Depth=1
13125; RV64I-NEXT:    sw a0, 4(sp)
13126; RV64I-NEXT:    mv a0, s1
13127; RV64I-NEXT:    mv a1, s3
13128; RV64I-NEXT:    addi a3, zero, 5
13129; RV64I-NEXT:    addi a4, zero, 5
13130; RV64I-NEXT:    call __atomic_compare_exchange_4
13131; RV64I-NEXT:    mv a1, a0
13132; RV64I-NEXT:    lw a0, 4(sp)
13133; RV64I-NEXT:    beqz a1, .LBB164_1
13134; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
13135; RV64I-NEXT:    ld s3, 8(sp)
13136; RV64I-NEXT:    ld s2, 16(sp)
13137; RV64I-NEXT:    ld s1, 24(sp)
13138; RV64I-NEXT:    ld s0, 32(sp)
13139; RV64I-NEXT:    ld ra, 40(sp)
13140; RV64I-NEXT:    addi sp, sp, 48
13141; RV64I-NEXT:    ret
13142;
13143; RV64IA-LABEL: atomicrmw_umin_i32_seq_cst:
13144; RV64IA:       # %bb.0:
13145; RV64IA-NEXT:    amominu.w.aqrl a0, a1, (a0)
13146; RV64IA-NEXT:    ret
13147  %1 = atomicrmw umin i32* %a, i32 %b seq_cst
13148  ret i32 %1
13149}
13150
13151define i64 @atomicrmw_xchg_i64_monotonic(i64* %a, i64 %b) {
13152; RV32I-LABEL: atomicrmw_xchg_i64_monotonic:
13153; RV32I:       # %bb.0:
13154; RV32I-NEXT:    addi sp, sp, -16
13155; RV32I-NEXT:    sw ra, 12(sp)
13156; RV32I-NEXT:    mv a3, zero
13157; RV32I-NEXT:    call __atomic_exchange_8
13158; RV32I-NEXT:    lw ra, 12(sp)
13159; RV32I-NEXT:    addi sp, sp, 16
13160; RV32I-NEXT:    ret
13161;
13162; RV32IA-LABEL: atomicrmw_xchg_i64_monotonic:
13163; RV32IA:       # %bb.0:
13164; RV32IA-NEXT:    addi sp, sp, -16
13165; RV32IA-NEXT:    sw ra, 12(sp)
13166; RV32IA-NEXT:    mv a3, zero
13167; RV32IA-NEXT:    call __atomic_exchange_8
13168; RV32IA-NEXT:    lw ra, 12(sp)
13169; RV32IA-NEXT:    addi sp, sp, 16
13170; RV32IA-NEXT:    ret
13171;
13172; RV64I-LABEL: atomicrmw_xchg_i64_monotonic:
13173; RV64I:       # %bb.0:
13174; RV64I-NEXT:    addi sp, sp, -16
13175; RV64I-NEXT:    sd ra, 8(sp)
13176; RV64I-NEXT:    mv a2, zero
13177; RV64I-NEXT:    call __atomic_exchange_8
13178; RV64I-NEXT:    ld ra, 8(sp)
13179; RV64I-NEXT:    addi sp, sp, 16
13180; RV64I-NEXT:    ret
13181;
13182; RV64IA-LABEL: atomicrmw_xchg_i64_monotonic:
13183; RV64IA:       # %bb.0:
13184; RV64IA-NEXT:    amoswap.d a0, a1, (a0)
13185; RV64IA-NEXT:    ret
13186  %1 = atomicrmw xchg i64* %a, i64 %b monotonic
13187  ret i64 %1
13188}
13189
13190define i64 @atomicrmw_xchg_i64_acquire(i64* %a, i64 %b) {
13191; RV32I-LABEL: atomicrmw_xchg_i64_acquire:
13192; RV32I:       # %bb.0:
13193; RV32I-NEXT:    addi sp, sp, -16
13194; RV32I-NEXT:    sw ra, 12(sp)
13195; RV32I-NEXT:    addi a3, zero, 2
13196; RV32I-NEXT:    call __atomic_exchange_8
13197; RV32I-NEXT:    lw ra, 12(sp)
13198; RV32I-NEXT:    addi sp, sp, 16
13199; RV32I-NEXT:    ret
13200;
13201; RV32IA-LABEL: atomicrmw_xchg_i64_acquire:
13202; RV32IA:       # %bb.0:
13203; RV32IA-NEXT:    addi sp, sp, -16
13204; RV32IA-NEXT:    sw ra, 12(sp)
13205; RV32IA-NEXT:    addi a3, zero, 2
13206; RV32IA-NEXT:    call __atomic_exchange_8
13207; RV32IA-NEXT:    lw ra, 12(sp)
13208; RV32IA-NEXT:    addi sp, sp, 16
13209; RV32IA-NEXT:    ret
13210;
13211; RV64I-LABEL: atomicrmw_xchg_i64_acquire:
13212; RV64I:       # %bb.0:
13213; RV64I-NEXT:    addi sp, sp, -16
13214; RV64I-NEXT:    sd ra, 8(sp)
13215; RV64I-NEXT:    addi a2, zero, 2
13216; RV64I-NEXT:    call __atomic_exchange_8
13217; RV64I-NEXT:    ld ra, 8(sp)
13218; RV64I-NEXT:    addi sp, sp, 16
13219; RV64I-NEXT:    ret
13220;
13221; RV64IA-LABEL: atomicrmw_xchg_i64_acquire:
13222; RV64IA:       # %bb.0:
13223; RV64IA-NEXT:    amoswap.d.aq a0, a1, (a0)
13224; RV64IA-NEXT:    ret
13225  %1 = atomicrmw xchg i64* %a, i64 %b acquire
13226  ret i64 %1
13227}
13228
13229define i64 @atomicrmw_xchg_i64_release(i64* %a, i64 %b) {
13230; RV32I-LABEL: atomicrmw_xchg_i64_release:
13231; RV32I:       # %bb.0:
13232; RV32I-NEXT:    addi sp, sp, -16
13233; RV32I-NEXT:    sw ra, 12(sp)
13234; RV32I-NEXT:    addi a3, zero, 3
13235; RV32I-NEXT:    call __atomic_exchange_8
13236; RV32I-NEXT:    lw ra, 12(sp)
13237; RV32I-NEXT:    addi sp, sp, 16
13238; RV32I-NEXT:    ret
13239;
13240; RV32IA-LABEL: atomicrmw_xchg_i64_release:
13241; RV32IA:       # %bb.0:
13242; RV32IA-NEXT:    addi sp, sp, -16
13243; RV32IA-NEXT:    sw ra, 12(sp)
13244; RV32IA-NEXT:    addi a3, zero, 3
13245; RV32IA-NEXT:    call __atomic_exchange_8
13246; RV32IA-NEXT:    lw ra, 12(sp)
13247; RV32IA-NEXT:    addi sp, sp, 16
13248; RV32IA-NEXT:    ret
13249;
13250; RV64I-LABEL: atomicrmw_xchg_i64_release:
13251; RV64I:       # %bb.0:
13252; RV64I-NEXT:    addi sp, sp, -16
13253; RV64I-NEXT:    sd ra, 8(sp)
13254; RV64I-NEXT:    addi a2, zero, 3
13255; RV64I-NEXT:    call __atomic_exchange_8
13256; RV64I-NEXT:    ld ra, 8(sp)
13257; RV64I-NEXT:    addi sp, sp, 16
13258; RV64I-NEXT:    ret
13259;
13260; RV64IA-LABEL: atomicrmw_xchg_i64_release:
13261; RV64IA:       # %bb.0:
13262; RV64IA-NEXT:    amoswap.d.rl a0, a1, (a0)
13263; RV64IA-NEXT:    ret
13264  %1 = atomicrmw xchg i64* %a, i64 %b release
13265  ret i64 %1
13266}
13267
13268define i64 @atomicrmw_xchg_i64_acq_rel(i64* %a, i64 %b) {
13269; RV32I-LABEL: atomicrmw_xchg_i64_acq_rel:
13270; RV32I:       # %bb.0:
13271; RV32I-NEXT:    addi sp, sp, -16
13272; RV32I-NEXT:    sw ra, 12(sp)
13273; RV32I-NEXT:    addi a3, zero, 4
13274; RV32I-NEXT:    call __atomic_exchange_8
13275; RV32I-NEXT:    lw ra, 12(sp)
13276; RV32I-NEXT:    addi sp, sp, 16
13277; RV32I-NEXT:    ret
13278;
13279; RV32IA-LABEL: atomicrmw_xchg_i64_acq_rel:
13280; RV32IA:       # %bb.0:
13281; RV32IA-NEXT:    addi sp, sp, -16
13282; RV32IA-NEXT:    sw ra, 12(sp)
13283; RV32IA-NEXT:    addi a3, zero, 4
13284; RV32IA-NEXT:    call __atomic_exchange_8
13285; RV32IA-NEXT:    lw ra, 12(sp)
13286; RV32IA-NEXT:    addi sp, sp, 16
13287; RV32IA-NEXT:    ret
13288;
13289; RV64I-LABEL: atomicrmw_xchg_i64_acq_rel:
13290; RV64I:       # %bb.0:
13291; RV64I-NEXT:    addi sp, sp, -16
13292; RV64I-NEXT:    sd ra, 8(sp)
13293; RV64I-NEXT:    addi a2, zero, 4
13294; RV64I-NEXT:    call __atomic_exchange_8
13295; RV64I-NEXT:    ld ra, 8(sp)
13296; RV64I-NEXT:    addi sp, sp, 16
13297; RV64I-NEXT:    ret
13298;
13299; RV64IA-LABEL: atomicrmw_xchg_i64_acq_rel:
13300; RV64IA:       # %bb.0:
13301; RV64IA-NEXT:    amoswap.d.aqrl a0, a1, (a0)
13302; RV64IA-NEXT:    ret
13303  %1 = atomicrmw xchg i64* %a, i64 %b acq_rel
13304  ret i64 %1
13305}
13306
13307define i64 @atomicrmw_xchg_i64_seq_cst(i64* %a, i64 %b) {
13308; RV32I-LABEL: atomicrmw_xchg_i64_seq_cst:
13309; RV32I:       # %bb.0:
13310; RV32I-NEXT:    addi sp, sp, -16
13311; RV32I-NEXT:    sw ra, 12(sp)
13312; RV32I-NEXT:    addi a3, zero, 5
13313; RV32I-NEXT:    call __atomic_exchange_8
13314; RV32I-NEXT:    lw ra, 12(sp)
13315; RV32I-NEXT:    addi sp, sp, 16
13316; RV32I-NEXT:    ret
13317;
13318; RV32IA-LABEL: atomicrmw_xchg_i64_seq_cst:
13319; RV32IA:       # %bb.0:
13320; RV32IA-NEXT:    addi sp, sp, -16
13321; RV32IA-NEXT:    sw ra, 12(sp)
13322; RV32IA-NEXT:    addi a3, zero, 5
13323; RV32IA-NEXT:    call __atomic_exchange_8
13324; RV32IA-NEXT:    lw ra, 12(sp)
13325; RV32IA-NEXT:    addi sp, sp, 16
13326; RV32IA-NEXT:    ret
13327;
13328; RV64I-LABEL: atomicrmw_xchg_i64_seq_cst:
13329; RV64I:       # %bb.0:
13330; RV64I-NEXT:    addi sp, sp, -16
13331; RV64I-NEXT:    sd ra, 8(sp)
13332; RV64I-NEXT:    addi a2, zero, 5
13333; RV64I-NEXT:    call __atomic_exchange_8
13334; RV64I-NEXT:    ld ra, 8(sp)
13335; RV64I-NEXT:    addi sp, sp, 16
13336; RV64I-NEXT:    ret
13337;
13338; RV64IA-LABEL: atomicrmw_xchg_i64_seq_cst:
13339; RV64IA:       # %bb.0:
13340; RV64IA-NEXT:    amoswap.d.aqrl a0, a1, (a0)
13341; RV64IA-NEXT:    ret
13342  %1 = atomicrmw xchg i64* %a, i64 %b seq_cst
13343  ret i64 %1
13344}
13345
13346define i64 @atomicrmw_add_i64_monotonic(i64 *%a, i64 %b) nounwind {
13347; RV32I-LABEL: atomicrmw_add_i64_monotonic:
13348; RV32I:       # %bb.0:
13349; RV32I-NEXT:    addi sp, sp, -16
13350; RV32I-NEXT:    sw ra, 12(sp)
13351; RV32I-NEXT:    mv a3, zero
13352; RV32I-NEXT:    call __atomic_fetch_add_8
13353; RV32I-NEXT:    lw ra, 12(sp)
13354; RV32I-NEXT:    addi sp, sp, 16
13355; RV32I-NEXT:    ret
13356;
13357; RV32IA-LABEL: atomicrmw_add_i64_monotonic:
13358; RV32IA:       # %bb.0:
13359; RV32IA-NEXT:    addi sp, sp, -16
13360; RV32IA-NEXT:    sw ra, 12(sp)
13361; RV32IA-NEXT:    mv a3, zero
13362; RV32IA-NEXT:    call __atomic_fetch_add_8
13363; RV32IA-NEXT:    lw ra, 12(sp)
13364; RV32IA-NEXT:    addi sp, sp, 16
13365; RV32IA-NEXT:    ret
13366;
13367; RV64I-LABEL: atomicrmw_add_i64_monotonic:
13368; RV64I:       # %bb.0:
13369; RV64I-NEXT:    addi sp, sp, -16
13370; RV64I-NEXT:    sd ra, 8(sp)
13371; RV64I-NEXT:    mv a2, zero
13372; RV64I-NEXT:    call __atomic_fetch_add_8
13373; RV64I-NEXT:    ld ra, 8(sp)
13374; RV64I-NEXT:    addi sp, sp, 16
13375; RV64I-NEXT:    ret
13376;
13377; RV64IA-LABEL: atomicrmw_add_i64_monotonic:
13378; RV64IA:       # %bb.0:
13379; RV64IA-NEXT:    amoadd.d a0, a1, (a0)
13380; RV64IA-NEXT:    ret
13381  %1 = atomicrmw add i64* %a, i64 %b monotonic
13382  ret i64 %1
13383}
13384
13385define i64 @atomicrmw_add_i64_acquire(i64 *%a, i64 %b) nounwind {
13386; RV32I-LABEL: atomicrmw_add_i64_acquire:
13387; RV32I:       # %bb.0:
13388; RV32I-NEXT:    addi sp, sp, -16
13389; RV32I-NEXT:    sw ra, 12(sp)
13390; RV32I-NEXT:    addi a3, zero, 2
13391; RV32I-NEXT:    call __atomic_fetch_add_8
13392; RV32I-NEXT:    lw ra, 12(sp)
13393; RV32I-NEXT:    addi sp, sp, 16
13394; RV32I-NEXT:    ret
13395;
13396; RV32IA-LABEL: atomicrmw_add_i64_acquire:
13397; RV32IA:       # %bb.0:
13398; RV32IA-NEXT:    addi sp, sp, -16
13399; RV32IA-NEXT:    sw ra, 12(sp)
13400; RV32IA-NEXT:    addi a3, zero, 2
13401; RV32IA-NEXT:    call __atomic_fetch_add_8
13402; RV32IA-NEXT:    lw ra, 12(sp)
13403; RV32IA-NEXT:    addi sp, sp, 16
13404; RV32IA-NEXT:    ret
13405;
13406; RV64I-LABEL: atomicrmw_add_i64_acquire:
13407; RV64I:       # %bb.0:
13408; RV64I-NEXT:    addi sp, sp, -16
13409; RV64I-NEXT:    sd ra, 8(sp)
13410; RV64I-NEXT:    addi a2, zero, 2
13411; RV64I-NEXT:    call __atomic_fetch_add_8
13412; RV64I-NEXT:    ld ra, 8(sp)
13413; RV64I-NEXT:    addi sp, sp, 16
13414; RV64I-NEXT:    ret
13415;
13416; RV64IA-LABEL: atomicrmw_add_i64_acquire:
13417; RV64IA:       # %bb.0:
13418; RV64IA-NEXT:    amoadd.d.aq a0, a1, (a0)
13419; RV64IA-NEXT:    ret
13420  %1 = atomicrmw add i64* %a, i64 %b acquire
13421  ret i64 %1
13422}
13423
13424define i64 @atomicrmw_add_i64_release(i64 *%a, i64 %b) nounwind {
13425; RV32I-LABEL: atomicrmw_add_i64_release:
13426; RV32I:       # %bb.0:
13427; RV32I-NEXT:    addi sp, sp, -16
13428; RV32I-NEXT:    sw ra, 12(sp)
13429; RV32I-NEXT:    addi a3, zero, 3
13430; RV32I-NEXT:    call __atomic_fetch_add_8
13431; RV32I-NEXT:    lw ra, 12(sp)
13432; RV32I-NEXT:    addi sp, sp, 16
13433; RV32I-NEXT:    ret
13434;
13435; RV32IA-LABEL: atomicrmw_add_i64_release:
13436; RV32IA:       # %bb.0:
13437; RV32IA-NEXT:    addi sp, sp, -16
13438; RV32IA-NEXT:    sw ra, 12(sp)
13439; RV32IA-NEXT:    addi a3, zero, 3
13440; RV32IA-NEXT:    call __atomic_fetch_add_8
13441; RV32IA-NEXT:    lw ra, 12(sp)
13442; RV32IA-NEXT:    addi sp, sp, 16
13443; RV32IA-NEXT:    ret
13444;
13445; RV64I-LABEL: atomicrmw_add_i64_release:
13446; RV64I:       # %bb.0:
13447; RV64I-NEXT:    addi sp, sp, -16
13448; RV64I-NEXT:    sd ra, 8(sp)
13449; RV64I-NEXT:    addi a2, zero, 3
13450; RV64I-NEXT:    call __atomic_fetch_add_8
13451; RV64I-NEXT:    ld ra, 8(sp)
13452; RV64I-NEXT:    addi sp, sp, 16
13453; RV64I-NEXT:    ret
13454;
13455; RV64IA-LABEL: atomicrmw_add_i64_release:
13456; RV64IA:       # %bb.0:
13457; RV64IA-NEXT:    amoadd.d.rl a0, a1, (a0)
13458; RV64IA-NEXT:    ret
13459  %1 = atomicrmw add i64* %a, i64 %b release
13460  ret i64 %1
13461}
13462
13463define i64 @atomicrmw_add_i64_acq_rel(i64 *%a, i64 %b) nounwind {
13464; RV32I-LABEL: atomicrmw_add_i64_acq_rel:
13465; RV32I:       # %bb.0:
13466; RV32I-NEXT:    addi sp, sp, -16
13467; RV32I-NEXT:    sw ra, 12(sp)
13468; RV32I-NEXT:    addi a3, zero, 4
13469; RV32I-NEXT:    call __atomic_fetch_add_8
13470; RV32I-NEXT:    lw ra, 12(sp)
13471; RV32I-NEXT:    addi sp, sp, 16
13472; RV32I-NEXT:    ret
13473;
13474; RV32IA-LABEL: atomicrmw_add_i64_acq_rel:
13475; RV32IA:       # %bb.0:
13476; RV32IA-NEXT:    addi sp, sp, -16
13477; RV32IA-NEXT:    sw ra, 12(sp)
13478; RV32IA-NEXT:    addi a3, zero, 4
13479; RV32IA-NEXT:    call __atomic_fetch_add_8
13480; RV32IA-NEXT:    lw ra, 12(sp)
13481; RV32IA-NEXT:    addi sp, sp, 16
13482; RV32IA-NEXT:    ret
13483;
13484; RV64I-LABEL: atomicrmw_add_i64_acq_rel:
13485; RV64I:       # %bb.0:
13486; RV64I-NEXT:    addi sp, sp, -16
13487; RV64I-NEXT:    sd ra, 8(sp)
13488; RV64I-NEXT:    addi a2, zero, 4
13489; RV64I-NEXT:    call __atomic_fetch_add_8
13490; RV64I-NEXT:    ld ra, 8(sp)
13491; RV64I-NEXT:    addi sp, sp, 16
13492; RV64I-NEXT:    ret
13493;
13494; RV64IA-LABEL: atomicrmw_add_i64_acq_rel:
13495; RV64IA:       # %bb.0:
13496; RV64IA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
13497; RV64IA-NEXT:    ret
13498  %1 = atomicrmw add i64* %a, i64 %b acq_rel
13499  ret i64 %1
13500}
13501
13502define i64 @atomicrmw_add_i64_seq_cst(i64 *%a, i64 %b) nounwind {
13503; RV32I-LABEL: atomicrmw_add_i64_seq_cst:
13504; RV32I:       # %bb.0:
13505; RV32I-NEXT:    addi sp, sp, -16
13506; RV32I-NEXT:    sw ra, 12(sp)
13507; RV32I-NEXT:    addi a3, zero, 5
13508; RV32I-NEXT:    call __atomic_fetch_add_8
13509; RV32I-NEXT:    lw ra, 12(sp)
13510; RV32I-NEXT:    addi sp, sp, 16
13511; RV32I-NEXT:    ret
13512;
13513; RV32IA-LABEL: atomicrmw_add_i64_seq_cst:
13514; RV32IA:       # %bb.0:
13515; RV32IA-NEXT:    addi sp, sp, -16
13516; RV32IA-NEXT:    sw ra, 12(sp)
13517; RV32IA-NEXT:    addi a3, zero, 5
13518; RV32IA-NEXT:    call __atomic_fetch_add_8
13519; RV32IA-NEXT:    lw ra, 12(sp)
13520; RV32IA-NEXT:    addi sp, sp, 16
13521; RV32IA-NEXT:    ret
13522;
13523; RV64I-LABEL: atomicrmw_add_i64_seq_cst:
13524; RV64I:       # %bb.0:
13525; RV64I-NEXT:    addi sp, sp, -16
13526; RV64I-NEXT:    sd ra, 8(sp)
13527; RV64I-NEXT:    addi a2, zero, 5
13528; RV64I-NEXT:    call __atomic_fetch_add_8
13529; RV64I-NEXT:    ld ra, 8(sp)
13530; RV64I-NEXT:    addi sp, sp, 16
13531; RV64I-NEXT:    ret
13532;
13533; RV64IA-LABEL: atomicrmw_add_i64_seq_cst:
13534; RV64IA:       # %bb.0:
13535; RV64IA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
13536; RV64IA-NEXT:    ret
13537  %1 = atomicrmw add i64* %a, i64 %b seq_cst
13538  ret i64 %1
13539}
13540
13541define i64 @atomicrmw_sub_i64_monotonic(i64* %a, i64 %b) {
13542; RV32I-LABEL: atomicrmw_sub_i64_monotonic:
13543; RV32I:       # %bb.0:
13544; RV32I-NEXT:    addi sp, sp, -16
13545; RV32I-NEXT:    sw ra, 12(sp)
13546; RV32I-NEXT:    mv a3, zero
13547; RV32I-NEXT:    call __atomic_fetch_sub_8
13548; RV32I-NEXT:    lw ra, 12(sp)
13549; RV32I-NEXT:    addi sp, sp, 16
13550; RV32I-NEXT:    ret
13551;
13552; RV32IA-LABEL: atomicrmw_sub_i64_monotonic:
13553; RV32IA:       # %bb.0:
13554; RV32IA-NEXT:    addi sp, sp, -16
13555; RV32IA-NEXT:    sw ra, 12(sp)
13556; RV32IA-NEXT:    mv a3, zero
13557; RV32IA-NEXT:    call __atomic_fetch_sub_8
13558; RV32IA-NEXT:    lw ra, 12(sp)
13559; RV32IA-NEXT:    addi sp, sp, 16
13560; RV32IA-NEXT:    ret
13561;
13562; RV64I-LABEL: atomicrmw_sub_i64_monotonic:
13563; RV64I:       # %bb.0:
13564; RV64I-NEXT:    addi sp, sp, -16
13565; RV64I-NEXT:    sd ra, 8(sp)
13566; RV64I-NEXT:    mv a2, zero
13567; RV64I-NEXT:    call __atomic_fetch_sub_8
13568; RV64I-NEXT:    ld ra, 8(sp)
13569; RV64I-NEXT:    addi sp, sp, 16
13570; RV64I-NEXT:    ret
13571;
13572; RV64IA-LABEL: atomicrmw_sub_i64_monotonic:
13573; RV64IA:       # %bb.0:
13574; RV64IA-NEXT:    neg a1, a1
13575; RV64IA-NEXT:    amoadd.d a0, a1, (a0)
13576; RV64IA-NEXT:    ret
13577  %1 = atomicrmw sub i64* %a, i64 %b monotonic
13578  ret i64 %1
13579}
13580
13581define i64 @atomicrmw_sub_i64_acquire(i64* %a, i64 %b) {
13582; RV32I-LABEL: atomicrmw_sub_i64_acquire:
13583; RV32I:       # %bb.0:
13584; RV32I-NEXT:    addi sp, sp, -16
13585; RV32I-NEXT:    sw ra, 12(sp)
13586; RV32I-NEXT:    addi a3, zero, 2
13587; RV32I-NEXT:    call __atomic_fetch_sub_8
13588; RV32I-NEXT:    lw ra, 12(sp)
13589; RV32I-NEXT:    addi sp, sp, 16
13590; RV32I-NEXT:    ret
13591;
13592; RV32IA-LABEL: atomicrmw_sub_i64_acquire:
13593; RV32IA:       # %bb.0:
13594; RV32IA-NEXT:    addi sp, sp, -16
13595; RV32IA-NEXT:    sw ra, 12(sp)
13596; RV32IA-NEXT:    addi a3, zero, 2
13597; RV32IA-NEXT:    call __atomic_fetch_sub_8
13598; RV32IA-NEXT:    lw ra, 12(sp)
13599; RV32IA-NEXT:    addi sp, sp, 16
13600; RV32IA-NEXT:    ret
13601;
13602; RV64I-LABEL: atomicrmw_sub_i64_acquire:
13603; RV64I:       # %bb.0:
13604; RV64I-NEXT:    addi sp, sp, -16
13605; RV64I-NEXT:    sd ra, 8(sp)
13606; RV64I-NEXT:    addi a2, zero, 2
13607; RV64I-NEXT:    call __atomic_fetch_sub_8
13608; RV64I-NEXT:    ld ra, 8(sp)
13609; RV64I-NEXT:    addi sp, sp, 16
13610; RV64I-NEXT:    ret
13611;
13612; RV64IA-LABEL: atomicrmw_sub_i64_acquire:
13613; RV64IA:       # %bb.0:
13614; RV64IA-NEXT:    neg a1, a1
13615; RV64IA-NEXT:    amoadd.d.aq a0, a1, (a0)
13616; RV64IA-NEXT:    ret
13617  %1 = atomicrmw sub i64* %a, i64 %b acquire
13618  ret i64 %1
13619}
13620
13621define i64 @atomicrmw_sub_i64_release(i64* %a, i64 %b) {
13622; RV32I-LABEL: atomicrmw_sub_i64_release:
13623; RV32I:       # %bb.0:
13624; RV32I-NEXT:    addi sp, sp, -16
13625; RV32I-NEXT:    sw ra, 12(sp)
13626; RV32I-NEXT:    addi a3, zero, 3
13627; RV32I-NEXT:    call __atomic_fetch_sub_8
13628; RV32I-NEXT:    lw ra, 12(sp)
13629; RV32I-NEXT:    addi sp, sp, 16
13630; RV32I-NEXT:    ret
13631;
13632; RV32IA-LABEL: atomicrmw_sub_i64_release:
13633; RV32IA:       # %bb.0:
13634; RV32IA-NEXT:    addi sp, sp, -16
13635; RV32IA-NEXT:    sw ra, 12(sp)
13636; RV32IA-NEXT:    addi a3, zero, 3
13637; RV32IA-NEXT:    call __atomic_fetch_sub_8
13638; RV32IA-NEXT:    lw ra, 12(sp)
13639; RV32IA-NEXT:    addi sp, sp, 16
13640; RV32IA-NEXT:    ret
13641;
13642; RV64I-LABEL: atomicrmw_sub_i64_release:
13643; RV64I:       # %bb.0:
13644; RV64I-NEXT:    addi sp, sp, -16
13645; RV64I-NEXT:    sd ra, 8(sp)
13646; RV64I-NEXT:    addi a2, zero, 3
13647; RV64I-NEXT:    call __atomic_fetch_sub_8
13648; RV64I-NEXT:    ld ra, 8(sp)
13649; RV64I-NEXT:    addi sp, sp, 16
13650; RV64I-NEXT:    ret
13651;
13652; RV64IA-LABEL: atomicrmw_sub_i64_release:
13653; RV64IA:       # %bb.0:
13654; RV64IA-NEXT:    neg a1, a1
13655; RV64IA-NEXT:    amoadd.d.rl a0, a1, (a0)
13656; RV64IA-NEXT:    ret
13657  %1 = atomicrmw sub i64* %a, i64 %b release
13658  ret i64 %1
13659}
13660
13661define i64 @atomicrmw_sub_i64_acq_rel(i64* %a, i64 %b) {
13662; RV32I-LABEL: atomicrmw_sub_i64_acq_rel:
13663; RV32I:       # %bb.0:
13664; RV32I-NEXT:    addi sp, sp, -16
13665; RV32I-NEXT:    sw ra, 12(sp)
13666; RV32I-NEXT:    addi a3, zero, 4
13667; RV32I-NEXT:    call __atomic_fetch_sub_8
13668; RV32I-NEXT:    lw ra, 12(sp)
13669; RV32I-NEXT:    addi sp, sp, 16
13670; RV32I-NEXT:    ret
13671;
13672; RV32IA-LABEL: atomicrmw_sub_i64_acq_rel:
13673; RV32IA:       # %bb.0:
13674; RV32IA-NEXT:    addi sp, sp, -16
13675; RV32IA-NEXT:    sw ra, 12(sp)
13676; RV32IA-NEXT:    addi a3, zero, 4
13677; RV32IA-NEXT:    call __atomic_fetch_sub_8
13678; RV32IA-NEXT:    lw ra, 12(sp)
13679; RV32IA-NEXT:    addi sp, sp, 16
13680; RV32IA-NEXT:    ret
13681;
13682; RV64I-LABEL: atomicrmw_sub_i64_acq_rel:
13683; RV64I:       # %bb.0:
13684; RV64I-NEXT:    addi sp, sp, -16
13685; RV64I-NEXT:    sd ra, 8(sp)
13686; RV64I-NEXT:    addi a2, zero, 4
13687; RV64I-NEXT:    call __atomic_fetch_sub_8
13688; RV64I-NEXT:    ld ra, 8(sp)
13689; RV64I-NEXT:    addi sp, sp, 16
13690; RV64I-NEXT:    ret
13691;
13692; RV64IA-LABEL: atomicrmw_sub_i64_acq_rel:
13693; RV64IA:       # %bb.0:
13694; RV64IA-NEXT:    neg a1, a1
13695; RV64IA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
13696; RV64IA-NEXT:    ret
13697  %1 = atomicrmw sub i64* %a, i64 %b acq_rel
13698  ret i64 %1
13699}
13700
13701define i64 @atomicrmw_sub_i64_seq_cst(i64* %a, i64 %b) {
13702; RV32I-LABEL: atomicrmw_sub_i64_seq_cst:
13703; RV32I:       # %bb.0:
13704; RV32I-NEXT:    addi sp, sp, -16
13705; RV32I-NEXT:    sw ra, 12(sp)
13706; RV32I-NEXT:    addi a3, zero, 5
13707; RV32I-NEXT:    call __atomic_fetch_sub_8
13708; RV32I-NEXT:    lw ra, 12(sp)
13709; RV32I-NEXT:    addi sp, sp, 16
13710; RV32I-NEXT:    ret
13711;
13712; RV32IA-LABEL: atomicrmw_sub_i64_seq_cst:
13713; RV32IA:       # %bb.0:
13714; RV32IA-NEXT:    addi sp, sp, -16
13715; RV32IA-NEXT:    sw ra, 12(sp)
13716; RV32IA-NEXT:    addi a3, zero, 5
13717; RV32IA-NEXT:    call __atomic_fetch_sub_8
13718; RV32IA-NEXT:    lw ra, 12(sp)
13719; RV32IA-NEXT:    addi sp, sp, 16
13720; RV32IA-NEXT:    ret
13721;
13722; RV64I-LABEL: atomicrmw_sub_i64_seq_cst:
13723; RV64I:       # %bb.0:
13724; RV64I-NEXT:    addi sp, sp, -16
13725; RV64I-NEXT:    sd ra, 8(sp)
13726; RV64I-NEXT:    addi a2, zero, 5
13727; RV64I-NEXT:    call __atomic_fetch_sub_8
13728; RV64I-NEXT:    ld ra, 8(sp)
13729; RV64I-NEXT:    addi sp, sp, 16
13730; RV64I-NEXT:    ret
13731;
13732; RV64IA-LABEL: atomicrmw_sub_i64_seq_cst:
13733; RV64IA:       # %bb.0:
13734; RV64IA-NEXT:    neg a1, a1
13735; RV64IA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
13736; RV64IA-NEXT:    ret
13737  %1 = atomicrmw sub i64* %a, i64 %b seq_cst
13738  ret i64 %1
13739}
13740
13741define i64 @atomicrmw_and_i64_monotonic(i64 *%a, i64 %b) nounwind {
13742; RV32I-LABEL: atomicrmw_and_i64_monotonic:
13743; RV32I:       # %bb.0:
13744; RV32I-NEXT:    addi sp, sp, -16
13745; RV32I-NEXT:    sw ra, 12(sp)
13746; RV32I-NEXT:    mv a3, zero
13747; RV32I-NEXT:    call __atomic_fetch_and_8
13748; RV32I-NEXT:    lw ra, 12(sp)
13749; RV32I-NEXT:    addi sp, sp, 16
13750; RV32I-NEXT:    ret
13751;
13752; RV32IA-LABEL: atomicrmw_and_i64_monotonic:
13753; RV32IA:       # %bb.0:
13754; RV32IA-NEXT:    addi sp, sp, -16
13755; RV32IA-NEXT:    sw ra, 12(sp)
13756; RV32IA-NEXT:    mv a3, zero
13757; RV32IA-NEXT:    call __atomic_fetch_and_8
13758; RV32IA-NEXT:    lw ra, 12(sp)
13759; RV32IA-NEXT:    addi sp, sp, 16
13760; RV32IA-NEXT:    ret
13761;
13762; RV64I-LABEL: atomicrmw_and_i64_monotonic:
13763; RV64I:       # %bb.0:
13764; RV64I-NEXT:    addi sp, sp, -16
13765; RV64I-NEXT:    sd ra, 8(sp)
13766; RV64I-NEXT:    mv a2, zero
13767; RV64I-NEXT:    call __atomic_fetch_and_8
13768; RV64I-NEXT:    ld ra, 8(sp)
13769; RV64I-NEXT:    addi sp, sp, 16
13770; RV64I-NEXT:    ret
13771;
13772; RV64IA-LABEL: atomicrmw_and_i64_monotonic:
13773; RV64IA:       # %bb.0:
13774; RV64IA-NEXT:    amoand.d a0, a1, (a0)
13775; RV64IA-NEXT:    ret
13776  %1 = atomicrmw and i64* %a, i64 %b monotonic
13777  ret i64 %1
13778}
13779
13780define i64 @atomicrmw_and_i64_acquire(i64 *%a, i64 %b) nounwind {
13781; RV32I-LABEL: atomicrmw_and_i64_acquire:
13782; RV32I:       # %bb.0:
13783; RV32I-NEXT:    addi sp, sp, -16
13784; RV32I-NEXT:    sw ra, 12(sp)
13785; RV32I-NEXT:    addi a3, zero, 2
13786; RV32I-NEXT:    call __atomic_fetch_and_8
13787; RV32I-NEXT:    lw ra, 12(sp)
13788; RV32I-NEXT:    addi sp, sp, 16
13789; RV32I-NEXT:    ret
13790;
13791; RV32IA-LABEL: atomicrmw_and_i64_acquire:
13792; RV32IA:       # %bb.0:
13793; RV32IA-NEXT:    addi sp, sp, -16
13794; RV32IA-NEXT:    sw ra, 12(sp)
13795; RV32IA-NEXT:    addi a3, zero, 2
13796; RV32IA-NEXT:    call __atomic_fetch_and_8
13797; RV32IA-NEXT:    lw ra, 12(sp)
13798; RV32IA-NEXT:    addi sp, sp, 16
13799; RV32IA-NEXT:    ret
13800;
13801; RV64I-LABEL: atomicrmw_and_i64_acquire:
13802; RV64I:       # %bb.0:
13803; RV64I-NEXT:    addi sp, sp, -16
13804; RV64I-NEXT:    sd ra, 8(sp)
13805; RV64I-NEXT:    addi a2, zero, 2
13806; RV64I-NEXT:    call __atomic_fetch_and_8
13807; RV64I-NEXT:    ld ra, 8(sp)
13808; RV64I-NEXT:    addi sp, sp, 16
13809; RV64I-NEXT:    ret
13810;
13811; RV64IA-LABEL: atomicrmw_and_i64_acquire:
13812; RV64IA:       # %bb.0:
13813; RV64IA-NEXT:    amoand.d.aq a0, a1, (a0)
13814; RV64IA-NEXT:    ret
13815  %1 = atomicrmw and i64* %a, i64 %b acquire
13816  ret i64 %1
13817}
13818
13819define i64 @atomicrmw_and_i64_release(i64 *%a, i64 %b) nounwind {
13820; RV32I-LABEL: atomicrmw_and_i64_release:
13821; RV32I:       # %bb.0:
13822; RV32I-NEXT:    addi sp, sp, -16
13823; RV32I-NEXT:    sw ra, 12(sp)
13824; RV32I-NEXT:    addi a3, zero, 3
13825; RV32I-NEXT:    call __atomic_fetch_and_8
13826; RV32I-NEXT:    lw ra, 12(sp)
13827; RV32I-NEXT:    addi sp, sp, 16
13828; RV32I-NEXT:    ret
13829;
13830; RV32IA-LABEL: atomicrmw_and_i64_release:
13831; RV32IA:       # %bb.0:
13832; RV32IA-NEXT:    addi sp, sp, -16
13833; RV32IA-NEXT:    sw ra, 12(sp)
13834; RV32IA-NEXT:    addi a3, zero, 3
13835; RV32IA-NEXT:    call __atomic_fetch_and_8
13836; RV32IA-NEXT:    lw ra, 12(sp)
13837; RV32IA-NEXT:    addi sp, sp, 16
13838; RV32IA-NEXT:    ret
13839;
13840; RV64I-LABEL: atomicrmw_and_i64_release:
13841; RV64I:       # %bb.0:
13842; RV64I-NEXT:    addi sp, sp, -16
13843; RV64I-NEXT:    sd ra, 8(sp)
13844; RV64I-NEXT:    addi a2, zero, 3
13845; RV64I-NEXT:    call __atomic_fetch_and_8
13846; RV64I-NEXT:    ld ra, 8(sp)
13847; RV64I-NEXT:    addi sp, sp, 16
13848; RV64I-NEXT:    ret
13849;
13850; RV64IA-LABEL: atomicrmw_and_i64_release:
13851; RV64IA:       # %bb.0:
13852; RV64IA-NEXT:    amoand.d.rl a0, a1, (a0)
13853; RV64IA-NEXT:    ret
13854  %1 = atomicrmw and i64* %a, i64 %b release
13855  ret i64 %1
13856}
13857
13858define i64 @atomicrmw_and_i64_acq_rel(i64 *%a, i64 %b) nounwind {
13859; RV32I-LABEL: atomicrmw_and_i64_acq_rel:
13860; RV32I:       # %bb.0:
13861; RV32I-NEXT:    addi sp, sp, -16
13862; RV32I-NEXT:    sw ra, 12(sp)
13863; RV32I-NEXT:    addi a3, zero, 4
13864; RV32I-NEXT:    call __atomic_fetch_and_8
13865; RV32I-NEXT:    lw ra, 12(sp)
13866; RV32I-NEXT:    addi sp, sp, 16
13867; RV32I-NEXT:    ret
13868;
13869; RV32IA-LABEL: atomicrmw_and_i64_acq_rel:
13870; RV32IA:       # %bb.0:
13871; RV32IA-NEXT:    addi sp, sp, -16
13872; RV32IA-NEXT:    sw ra, 12(sp)
13873; RV32IA-NEXT:    addi a3, zero, 4
13874; RV32IA-NEXT:    call __atomic_fetch_and_8
13875; RV32IA-NEXT:    lw ra, 12(sp)
13876; RV32IA-NEXT:    addi sp, sp, 16
13877; RV32IA-NEXT:    ret
13878;
13879; RV64I-LABEL: atomicrmw_and_i64_acq_rel:
13880; RV64I:       # %bb.0:
13881; RV64I-NEXT:    addi sp, sp, -16
13882; RV64I-NEXT:    sd ra, 8(sp)
13883; RV64I-NEXT:    addi a2, zero, 4
13884; RV64I-NEXT:    call __atomic_fetch_and_8
13885; RV64I-NEXT:    ld ra, 8(sp)
13886; RV64I-NEXT:    addi sp, sp, 16
13887; RV64I-NEXT:    ret
13888;
13889; RV64IA-LABEL: atomicrmw_and_i64_acq_rel:
13890; RV64IA:       # %bb.0:
13891; RV64IA-NEXT:    amoand.d.aqrl a0, a1, (a0)
13892; RV64IA-NEXT:    ret
13893  %1 = atomicrmw and i64* %a, i64 %b acq_rel
13894  ret i64 %1
13895}
13896
13897define i64 @atomicrmw_and_i64_seq_cst(i64 *%a, i64 %b) nounwind {
13898; RV32I-LABEL: atomicrmw_and_i64_seq_cst:
13899; RV32I:       # %bb.0:
13900; RV32I-NEXT:    addi sp, sp, -16
13901; RV32I-NEXT:    sw ra, 12(sp)
13902; RV32I-NEXT:    addi a3, zero, 5
13903; RV32I-NEXT:    call __atomic_fetch_and_8
13904; RV32I-NEXT:    lw ra, 12(sp)
13905; RV32I-NEXT:    addi sp, sp, 16
13906; RV32I-NEXT:    ret
13907;
13908; RV32IA-LABEL: atomicrmw_and_i64_seq_cst:
13909; RV32IA:       # %bb.0:
13910; RV32IA-NEXT:    addi sp, sp, -16
13911; RV32IA-NEXT:    sw ra, 12(sp)
13912; RV32IA-NEXT:    addi a3, zero, 5
13913; RV32IA-NEXT:    call __atomic_fetch_and_8
13914; RV32IA-NEXT:    lw ra, 12(sp)
13915; RV32IA-NEXT:    addi sp, sp, 16
13916; RV32IA-NEXT:    ret
13917;
13918; RV64I-LABEL: atomicrmw_and_i64_seq_cst:
13919; RV64I:       # %bb.0:
13920; RV64I-NEXT:    addi sp, sp, -16
13921; RV64I-NEXT:    sd ra, 8(sp)
13922; RV64I-NEXT:    addi a2, zero, 5
13923; RV64I-NEXT:    call __atomic_fetch_and_8
13924; RV64I-NEXT:    ld ra, 8(sp)
13925; RV64I-NEXT:    addi sp, sp, 16
13926; RV64I-NEXT:    ret
13927;
13928; RV64IA-LABEL: atomicrmw_and_i64_seq_cst:
13929; RV64IA:       # %bb.0:
13930; RV64IA-NEXT:    amoand.d.aqrl a0, a1, (a0)
13931; RV64IA-NEXT:    ret
13932  %1 = atomicrmw and i64* %a, i64 %b seq_cst
13933  ret i64 %1
13934}
13935
13936define i64 @atomicrmw_nand_i64_monotonic(i64* %a, i64 %b) {
13937; RV32I-LABEL: atomicrmw_nand_i64_monotonic:
13938; RV32I:       # %bb.0:
13939; RV32I-NEXT:    addi sp, sp, -16
13940; RV32I-NEXT:    sw ra, 12(sp)
13941; RV32I-NEXT:    mv a3, zero
13942; RV32I-NEXT:    call __atomic_fetch_nand_8
13943; RV32I-NEXT:    lw ra, 12(sp)
13944; RV32I-NEXT:    addi sp, sp, 16
13945; RV32I-NEXT:    ret
13946;
13947; RV32IA-LABEL: atomicrmw_nand_i64_monotonic:
13948; RV32IA:       # %bb.0:
13949; RV32IA-NEXT:    addi sp, sp, -16
13950; RV32IA-NEXT:    sw ra, 12(sp)
13951; RV32IA-NEXT:    mv a3, zero
13952; RV32IA-NEXT:    call __atomic_fetch_nand_8
13953; RV32IA-NEXT:    lw ra, 12(sp)
13954; RV32IA-NEXT:    addi sp, sp, 16
13955; RV32IA-NEXT:    ret
13956;
13957; RV64I-LABEL: atomicrmw_nand_i64_monotonic:
13958; RV64I:       # %bb.0:
13959; RV64I-NEXT:    addi sp, sp, -16
13960; RV64I-NEXT:    sd ra, 8(sp)
13961; RV64I-NEXT:    mv a2, zero
13962; RV64I-NEXT:    call __atomic_fetch_nand_8
13963; RV64I-NEXT:    ld ra, 8(sp)
13964; RV64I-NEXT:    addi sp, sp, 16
13965; RV64I-NEXT:    ret
13966;
13967; RV64IA-LABEL: atomicrmw_nand_i64_monotonic:
13968; RV64IA:       # %bb.0:
13969; RV64IA-NEXT:  .LBB185_1: # =>This Inner Loop Header: Depth=1
13970; RV64IA-NEXT:    lr.d a2, (a0)
13971; RV64IA-NEXT:    and a3, a2, a1
13972; RV64IA-NEXT:    not a3, a3
13973; RV64IA-NEXT:    sc.d a3, a3, (a0)
13974; RV64IA-NEXT:    bnez a3, .LBB185_1
13975; RV64IA-NEXT:  # %bb.2:
13976; RV64IA-NEXT:    mv a0, a2
13977; RV64IA-NEXT:    ret
13978  %1 = atomicrmw nand i64* %a, i64 %b monotonic
13979  ret i64 %1
13980}
13981
13982define i64 @atomicrmw_nand_i64_acquire(i64* %a, i64 %b) {
13983; RV32I-LABEL: atomicrmw_nand_i64_acquire:
13984; RV32I:       # %bb.0:
13985; RV32I-NEXT:    addi sp, sp, -16
13986; RV32I-NEXT:    sw ra, 12(sp)
13987; RV32I-NEXT:    addi a3, zero, 2
13988; RV32I-NEXT:    call __atomic_fetch_nand_8
13989; RV32I-NEXT:    lw ra, 12(sp)
13990; RV32I-NEXT:    addi sp, sp, 16
13991; RV32I-NEXT:    ret
13992;
13993; RV32IA-LABEL: atomicrmw_nand_i64_acquire:
13994; RV32IA:       # %bb.0:
13995; RV32IA-NEXT:    addi sp, sp, -16
13996; RV32IA-NEXT:    sw ra, 12(sp)
13997; RV32IA-NEXT:    addi a3, zero, 2
13998; RV32IA-NEXT:    call __atomic_fetch_nand_8
13999; RV32IA-NEXT:    lw ra, 12(sp)
14000; RV32IA-NEXT:    addi sp, sp, 16
14001; RV32IA-NEXT:    ret
14002;
14003; RV64I-LABEL: atomicrmw_nand_i64_acquire:
14004; RV64I:       # %bb.0:
14005; RV64I-NEXT:    addi sp, sp, -16
14006; RV64I-NEXT:    sd ra, 8(sp)
14007; RV64I-NEXT:    addi a2, zero, 2
14008; RV64I-NEXT:    call __atomic_fetch_nand_8
14009; RV64I-NEXT:    ld ra, 8(sp)
14010; RV64I-NEXT:    addi sp, sp, 16
14011; RV64I-NEXT:    ret
14012;
14013; RV64IA-LABEL: atomicrmw_nand_i64_acquire:
14014; RV64IA:       # %bb.0:
14015; RV64IA-NEXT:  .LBB186_1: # =>This Inner Loop Header: Depth=1
14016; RV64IA-NEXT:    lr.d.aq a2, (a0)
14017; RV64IA-NEXT:    and a3, a2, a1
14018; RV64IA-NEXT:    not a3, a3
14019; RV64IA-NEXT:    sc.d a3, a3, (a0)
14020; RV64IA-NEXT:    bnez a3, .LBB186_1
14021; RV64IA-NEXT:  # %bb.2:
14022; RV64IA-NEXT:    mv a0, a2
14023; RV64IA-NEXT:    ret
14024  %1 = atomicrmw nand i64* %a, i64 %b acquire
14025  ret i64 %1
14026}
14027
14028define i64 @atomicrmw_nand_i64_release(i64* %a, i64 %b) {
14029; RV32I-LABEL: atomicrmw_nand_i64_release:
14030; RV32I:       # %bb.0:
14031; RV32I-NEXT:    addi sp, sp, -16
14032; RV32I-NEXT:    sw ra, 12(sp)
14033; RV32I-NEXT:    addi a3, zero, 3
14034; RV32I-NEXT:    call __atomic_fetch_nand_8
14035; RV32I-NEXT:    lw ra, 12(sp)
14036; RV32I-NEXT:    addi sp, sp, 16
14037; RV32I-NEXT:    ret
14038;
14039; RV32IA-LABEL: atomicrmw_nand_i64_release:
14040; RV32IA:       # %bb.0:
14041; RV32IA-NEXT:    addi sp, sp, -16
14042; RV32IA-NEXT:    sw ra, 12(sp)
14043; RV32IA-NEXT:    addi a3, zero, 3
14044; RV32IA-NEXT:    call __atomic_fetch_nand_8
14045; RV32IA-NEXT:    lw ra, 12(sp)
14046; RV32IA-NEXT:    addi sp, sp, 16
14047; RV32IA-NEXT:    ret
14048;
14049; RV64I-LABEL: atomicrmw_nand_i64_release:
14050; RV64I:       # %bb.0:
14051; RV64I-NEXT:    addi sp, sp, -16
14052; RV64I-NEXT:    sd ra, 8(sp)
14053; RV64I-NEXT:    addi a2, zero, 3
14054; RV64I-NEXT:    call __atomic_fetch_nand_8
14055; RV64I-NEXT:    ld ra, 8(sp)
14056; RV64I-NEXT:    addi sp, sp, 16
14057; RV64I-NEXT:    ret
14058;
14059; RV64IA-LABEL: atomicrmw_nand_i64_release:
14060; RV64IA:       # %bb.0:
14061; RV64IA-NEXT:  .LBB187_1: # =>This Inner Loop Header: Depth=1
14062; RV64IA-NEXT:    lr.d a2, (a0)
14063; RV64IA-NEXT:    and a3, a2, a1
14064; RV64IA-NEXT:    not a3, a3
14065; RV64IA-NEXT:    sc.d.rl a3, a3, (a0)
14066; RV64IA-NEXT:    bnez a3, .LBB187_1
14067; RV64IA-NEXT:  # %bb.2:
14068; RV64IA-NEXT:    mv a0, a2
14069; RV64IA-NEXT:    ret
14070  %1 = atomicrmw nand i64* %a, i64 %b release
14071  ret i64 %1
14072}
14073
14074define i64 @atomicrmw_nand_i64_acq_rel(i64* %a, i64 %b) {
14075; RV32I-LABEL: atomicrmw_nand_i64_acq_rel:
14076; RV32I:       # %bb.0:
14077; RV32I-NEXT:    addi sp, sp, -16
14078; RV32I-NEXT:    sw ra, 12(sp)
14079; RV32I-NEXT:    addi a3, zero, 4
14080; RV32I-NEXT:    call __atomic_fetch_nand_8
14081; RV32I-NEXT:    lw ra, 12(sp)
14082; RV32I-NEXT:    addi sp, sp, 16
14083; RV32I-NEXT:    ret
14084;
14085; RV32IA-LABEL: atomicrmw_nand_i64_acq_rel:
14086; RV32IA:       # %bb.0:
14087; RV32IA-NEXT:    addi sp, sp, -16
14088; RV32IA-NEXT:    sw ra, 12(sp)
14089; RV32IA-NEXT:    addi a3, zero, 4
14090; RV32IA-NEXT:    call __atomic_fetch_nand_8
14091; RV32IA-NEXT:    lw ra, 12(sp)
14092; RV32IA-NEXT:    addi sp, sp, 16
14093; RV32IA-NEXT:    ret
14094;
14095; RV64I-LABEL: atomicrmw_nand_i64_acq_rel:
14096; RV64I:       # %bb.0:
14097; RV64I-NEXT:    addi sp, sp, -16
14098; RV64I-NEXT:    sd ra, 8(sp)
14099; RV64I-NEXT:    addi a2, zero, 4
14100; RV64I-NEXT:    call __atomic_fetch_nand_8
14101; RV64I-NEXT:    ld ra, 8(sp)
14102; RV64I-NEXT:    addi sp, sp, 16
14103; RV64I-NEXT:    ret
14104;
14105; RV64IA-LABEL: atomicrmw_nand_i64_acq_rel:
14106; RV64IA:       # %bb.0:
14107; RV64IA-NEXT:  .LBB188_1: # =>This Inner Loop Header: Depth=1
14108; RV64IA-NEXT:    lr.d.aq a2, (a0)
14109; RV64IA-NEXT:    and a3, a2, a1
14110; RV64IA-NEXT:    not a3, a3
14111; RV64IA-NEXT:    sc.d.rl a3, a3, (a0)
14112; RV64IA-NEXT:    bnez a3, .LBB188_1
14113; RV64IA-NEXT:  # %bb.2:
14114; RV64IA-NEXT:    mv a0, a2
14115; RV64IA-NEXT:    ret
14116  %1 = atomicrmw nand i64* %a, i64 %b acq_rel
14117  ret i64 %1
14118}
14119
14120define i64 @atomicrmw_nand_i64_seq_cst(i64* %a, i64 %b) {
14121; RV32I-LABEL: atomicrmw_nand_i64_seq_cst:
14122; RV32I:       # %bb.0:
14123; RV32I-NEXT:    addi sp, sp, -16
14124; RV32I-NEXT:    sw ra, 12(sp)
14125; RV32I-NEXT:    addi a3, zero, 5
14126; RV32I-NEXT:    call __atomic_fetch_nand_8
14127; RV32I-NEXT:    lw ra, 12(sp)
14128; RV32I-NEXT:    addi sp, sp, 16
14129; RV32I-NEXT:    ret
14130;
14131; RV32IA-LABEL: atomicrmw_nand_i64_seq_cst:
14132; RV32IA:       # %bb.0:
14133; RV32IA-NEXT:    addi sp, sp, -16
14134; RV32IA-NEXT:    sw ra, 12(sp)
14135; RV32IA-NEXT:    addi a3, zero, 5
14136; RV32IA-NEXT:    call __atomic_fetch_nand_8
14137; RV32IA-NEXT:    lw ra, 12(sp)
14138; RV32IA-NEXT:    addi sp, sp, 16
14139; RV32IA-NEXT:    ret
14140;
14141; RV64I-LABEL: atomicrmw_nand_i64_seq_cst:
14142; RV64I:       # %bb.0:
14143; RV64I-NEXT:    addi sp, sp, -16
14144; RV64I-NEXT:    sd ra, 8(sp)
14145; RV64I-NEXT:    addi a2, zero, 5
14146; RV64I-NEXT:    call __atomic_fetch_nand_8
14147; RV64I-NEXT:    ld ra, 8(sp)
14148; RV64I-NEXT:    addi sp, sp, 16
14149; RV64I-NEXT:    ret
14150;
14151; RV64IA-LABEL: atomicrmw_nand_i64_seq_cst:
14152; RV64IA:       # %bb.0:
14153; RV64IA-NEXT:  .LBB189_1: # =>This Inner Loop Header: Depth=1
14154; RV64IA-NEXT:    lr.d.aqrl a2, (a0)
14155; RV64IA-NEXT:    and a3, a2, a1
14156; RV64IA-NEXT:    not a3, a3
14157; RV64IA-NEXT:    sc.d.aqrl a3, a3, (a0)
14158; RV64IA-NEXT:    bnez a3, .LBB189_1
14159; RV64IA-NEXT:  # %bb.2:
14160; RV64IA-NEXT:    mv a0, a2
14161; RV64IA-NEXT:    ret
14162  %1 = atomicrmw nand i64* %a, i64 %b seq_cst
14163  ret i64 %1
14164}
14165
14166define i64 @atomicrmw_or_i64_monotonic(i64 *%a, i64 %b) nounwind {
14167; RV32I-LABEL: atomicrmw_or_i64_monotonic:
14168; RV32I:       # %bb.0:
14169; RV32I-NEXT:    addi sp, sp, -16
14170; RV32I-NEXT:    sw ra, 12(sp)
14171; RV32I-NEXT:    mv a3, zero
14172; RV32I-NEXT:    call __atomic_fetch_or_8
14173; RV32I-NEXT:    lw ra, 12(sp)
14174; RV32I-NEXT:    addi sp, sp, 16
14175; RV32I-NEXT:    ret
14176;
14177; RV32IA-LABEL: atomicrmw_or_i64_monotonic:
14178; RV32IA:       # %bb.0:
14179; RV32IA-NEXT:    addi sp, sp, -16
14180; RV32IA-NEXT:    sw ra, 12(sp)
14181; RV32IA-NEXT:    mv a3, zero
14182; RV32IA-NEXT:    call __atomic_fetch_or_8
14183; RV32IA-NEXT:    lw ra, 12(sp)
14184; RV32IA-NEXT:    addi sp, sp, 16
14185; RV32IA-NEXT:    ret
14186;
14187; RV64I-LABEL: atomicrmw_or_i64_monotonic:
14188; RV64I:       # %bb.0:
14189; RV64I-NEXT:    addi sp, sp, -16
14190; RV64I-NEXT:    sd ra, 8(sp)
14191; RV64I-NEXT:    mv a2, zero
14192; RV64I-NEXT:    call __atomic_fetch_or_8
14193; RV64I-NEXT:    ld ra, 8(sp)
14194; RV64I-NEXT:    addi sp, sp, 16
14195; RV64I-NEXT:    ret
14196;
14197; RV64IA-LABEL: atomicrmw_or_i64_monotonic:
14198; RV64IA:       # %bb.0:
14199; RV64IA-NEXT:    amoor.d a0, a1, (a0)
14200; RV64IA-NEXT:    ret
14201  %1 = atomicrmw or i64* %a, i64 %b monotonic
14202  ret i64 %1
14203}
14204
14205define i64 @atomicrmw_or_i64_acquire(i64 *%a, i64 %b) nounwind {
14206; RV32I-LABEL: atomicrmw_or_i64_acquire:
14207; RV32I:       # %bb.0:
14208; RV32I-NEXT:    addi sp, sp, -16
14209; RV32I-NEXT:    sw ra, 12(sp)
14210; RV32I-NEXT:    addi a3, zero, 2
14211; RV32I-NEXT:    call __atomic_fetch_or_8
14212; RV32I-NEXT:    lw ra, 12(sp)
14213; RV32I-NEXT:    addi sp, sp, 16
14214; RV32I-NEXT:    ret
14215;
14216; RV32IA-LABEL: atomicrmw_or_i64_acquire:
14217; RV32IA:       # %bb.0:
14218; RV32IA-NEXT:    addi sp, sp, -16
14219; RV32IA-NEXT:    sw ra, 12(sp)
14220; RV32IA-NEXT:    addi a3, zero, 2
14221; RV32IA-NEXT:    call __atomic_fetch_or_8
14222; RV32IA-NEXT:    lw ra, 12(sp)
14223; RV32IA-NEXT:    addi sp, sp, 16
14224; RV32IA-NEXT:    ret
14225;
14226; RV64I-LABEL: atomicrmw_or_i64_acquire:
14227; RV64I:       # %bb.0:
14228; RV64I-NEXT:    addi sp, sp, -16
14229; RV64I-NEXT:    sd ra, 8(sp)
14230; RV64I-NEXT:    addi a2, zero, 2
14231; RV64I-NEXT:    call __atomic_fetch_or_8
14232; RV64I-NEXT:    ld ra, 8(sp)
14233; RV64I-NEXT:    addi sp, sp, 16
14234; RV64I-NEXT:    ret
14235;
14236; RV64IA-LABEL: atomicrmw_or_i64_acquire:
14237; RV64IA:       # %bb.0:
14238; RV64IA-NEXT:    amoor.d.aq a0, a1, (a0)
14239; RV64IA-NEXT:    ret
14240  %1 = atomicrmw or i64* %a, i64 %b acquire
14241  ret i64 %1
14242}
14243
14244define i64 @atomicrmw_or_i64_release(i64 *%a, i64 %b) nounwind {
14245; RV32I-LABEL: atomicrmw_or_i64_release:
14246; RV32I:       # %bb.0:
14247; RV32I-NEXT:    addi sp, sp, -16
14248; RV32I-NEXT:    sw ra, 12(sp)
14249; RV32I-NEXT:    addi a3, zero, 3
14250; RV32I-NEXT:    call __atomic_fetch_or_8
14251; RV32I-NEXT:    lw ra, 12(sp)
14252; RV32I-NEXT:    addi sp, sp, 16
14253; RV32I-NEXT:    ret
14254;
14255; RV32IA-LABEL: atomicrmw_or_i64_release:
14256; RV32IA:       # %bb.0:
14257; RV32IA-NEXT:    addi sp, sp, -16
14258; RV32IA-NEXT:    sw ra, 12(sp)
14259; RV32IA-NEXT:    addi a3, zero, 3
14260; RV32IA-NEXT:    call __atomic_fetch_or_8
14261; RV32IA-NEXT:    lw ra, 12(sp)
14262; RV32IA-NEXT:    addi sp, sp, 16
14263; RV32IA-NEXT:    ret
14264;
14265; RV64I-LABEL: atomicrmw_or_i64_release:
14266; RV64I:       # %bb.0:
14267; RV64I-NEXT:    addi sp, sp, -16
14268; RV64I-NEXT:    sd ra, 8(sp)
14269; RV64I-NEXT:    addi a2, zero, 3
14270; RV64I-NEXT:    call __atomic_fetch_or_8
14271; RV64I-NEXT:    ld ra, 8(sp)
14272; RV64I-NEXT:    addi sp, sp, 16
14273; RV64I-NEXT:    ret
14274;
14275; RV64IA-LABEL: atomicrmw_or_i64_release:
14276; RV64IA:       # %bb.0:
14277; RV64IA-NEXT:    amoor.d.rl a0, a1, (a0)
14278; RV64IA-NEXT:    ret
14279  %1 = atomicrmw or i64* %a, i64 %b release
14280  ret i64 %1
14281}
14282
14283define i64 @atomicrmw_or_i64_acq_rel(i64 *%a, i64 %b) nounwind {
14284; RV32I-LABEL: atomicrmw_or_i64_acq_rel:
14285; RV32I:       # %bb.0:
14286; RV32I-NEXT:    addi sp, sp, -16
14287; RV32I-NEXT:    sw ra, 12(sp)
14288; RV32I-NEXT:    addi a3, zero, 4
14289; RV32I-NEXT:    call __atomic_fetch_or_8
14290; RV32I-NEXT:    lw ra, 12(sp)
14291; RV32I-NEXT:    addi sp, sp, 16
14292; RV32I-NEXT:    ret
14293;
14294; RV32IA-LABEL: atomicrmw_or_i64_acq_rel:
14295; RV32IA:       # %bb.0:
14296; RV32IA-NEXT:    addi sp, sp, -16
14297; RV32IA-NEXT:    sw ra, 12(sp)
14298; RV32IA-NEXT:    addi a3, zero, 4
14299; RV32IA-NEXT:    call __atomic_fetch_or_8
14300; RV32IA-NEXT:    lw ra, 12(sp)
14301; RV32IA-NEXT:    addi sp, sp, 16
14302; RV32IA-NEXT:    ret
14303;
14304; RV64I-LABEL: atomicrmw_or_i64_acq_rel:
14305; RV64I:       # %bb.0:
14306; RV64I-NEXT:    addi sp, sp, -16
14307; RV64I-NEXT:    sd ra, 8(sp)
14308; RV64I-NEXT:    addi a2, zero, 4
14309; RV64I-NEXT:    call __atomic_fetch_or_8
14310; RV64I-NEXT:    ld ra, 8(sp)
14311; RV64I-NEXT:    addi sp, sp, 16
14312; RV64I-NEXT:    ret
14313;
14314; RV64IA-LABEL: atomicrmw_or_i64_acq_rel:
14315; RV64IA:       # %bb.0:
14316; RV64IA-NEXT:    amoor.d.aqrl a0, a1, (a0)
14317; RV64IA-NEXT:    ret
14318  %1 = atomicrmw or i64* %a, i64 %b acq_rel
14319  ret i64 %1
14320}
14321
14322define i64 @atomicrmw_or_i64_seq_cst(i64 *%a, i64 %b) nounwind {
14323; RV32I-LABEL: atomicrmw_or_i64_seq_cst:
14324; RV32I:       # %bb.0:
14325; RV32I-NEXT:    addi sp, sp, -16
14326; RV32I-NEXT:    sw ra, 12(sp)
14327; RV32I-NEXT:    addi a3, zero, 5
14328; RV32I-NEXT:    call __atomic_fetch_or_8
14329; RV32I-NEXT:    lw ra, 12(sp)
14330; RV32I-NEXT:    addi sp, sp, 16
14331; RV32I-NEXT:    ret
14332;
14333; RV32IA-LABEL: atomicrmw_or_i64_seq_cst:
14334; RV32IA:       # %bb.0:
14335; RV32IA-NEXT:    addi sp, sp, -16
14336; RV32IA-NEXT:    sw ra, 12(sp)
14337; RV32IA-NEXT:    addi a3, zero, 5
14338; RV32IA-NEXT:    call __atomic_fetch_or_8
14339; RV32IA-NEXT:    lw ra, 12(sp)
14340; RV32IA-NEXT:    addi sp, sp, 16
14341; RV32IA-NEXT:    ret
14342;
14343; RV64I-LABEL: atomicrmw_or_i64_seq_cst:
14344; RV64I:       # %bb.0:
14345; RV64I-NEXT:    addi sp, sp, -16
14346; RV64I-NEXT:    sd ra, 8(sp)
14347; RV64I-NEXT:    addi a2, zero, 5
14348; RV64I-NEXT:    call __atomic_fetch_or_8
14349; RV64I-NEXT:    ld ra, 8(sp)
14350; RV64I-NEXT:    addi sp, sp, 16
14351; RV64I-NEXT:    ret
14352;
14353; RV64IA-LABEL: atomicrmw_or_i64_seq_cst:
14354; RV64IA:       # %bb.0:
14355; RV64IA-NEXT:    amoor.d.aqrl a0, a1, (a0)
14356; RV64IA-NEXT:    ret
14357  %1 = atomicrmw or i64* %a, i64 %b seq_cst
14358  ret i64 %1
14359}
14360
14361define i64 @atomicrmw_xor_i64_monotonic(i64 *%a, i64 %b) nounwind {
14362; RV32I-LABEL: atomicrmw_xor_i64_monotonic:
14363; RV32I:       # %bb.0:
14364; RV32I-NEXT:    addi sp, sp, -16
14365; RV32I-NEXT:    sw ra, 12(sp)
14366; RV32I-NEXT:    mv a3, zero
14367; RV32I-NEXT:    call __atomic_fetch_xor_8
14368; RV32I-NEXT:    lw ra, 12(sp)
14369; RV32I-NEXT:    addi sp, sp, 16
14370; RV32I-NEXT:    ret
14371;
14372; RV32IA-LABEL: atomicrmw_xor_i64_monotonic:
14373; RV32IA:       # %bb.0:
14374; RV32IA-NEXT:    addi sp, sp, -16
14375; RV32IA-NEXT:    sw ra, 12(sp)
14376; RV32IA-NEXT:    mv a3, zero
14377; RV32IA-NEXT:    call __atomic_fetch_xor_8
14378; RV32IA-NEXT:    lw ra, 12(sp)
14379; RV32IA-NEXT:    addi sp, sp, 16
14380; RV32IA-NEXT:    ret
14381;
14382; RV64I-LABEL: atomicrmw_xor_i64_monotonic:
14383; RV64I:       # %bb.0:
14384; RV64I-NEXT:    addi sp, sp, -16
14385; RV64I-NEXT:    sd ra, 8(sp)
14386; RV64I-NEXT:    mv a2, zero
14387; RV64I-NEXT:    call __atomic_fetch_xor_8
14388; RV64I-NEXT:    ld ra, 8(sp)
14389; RV64I-NEXT:    addi sp, sp, 16
14390; RV64I-NEXT:    ret
14391;
14392; RV64IA-LABEL: atomicrmw_xor_i64_monotonic:
14393; RV64IA:       # %bb.0:
14394; RV64IA-NEXT:    amoxor.d a0, a1, (a0)
14395; RV64IA-NEXT:    ret
14396  %1 = atomicrmw xor i64* %a, i64 %b monotonic
14397  ret i64 %1
14398}
14399
14400define i64 @atomicrmw_xor_i64_acquire(i64 *%a, i64 %b) nounwind {
14401; RV32I-LABEL: atomicrmw_xor_i64_acquire:
14402; RV32I:       # %bb.0:
14403; RV32I-NEXT:    addi sp, sp, -16
14404; RV32I-NEXT:    sw ra, 12(sp)
14405; RV32I-NEXT:    addi a3, zero, 2
14406; RV32I-NEXT:    call __atomic_fetch_xor_8
14407; RV32I-NEXT:    lw ra, 12(sp)
14408; RV32I-NEXT:    addi sp, sp, 16
14409; RV32I-NEXT:    ret
14410;
14411; RV32IA-LABEL: atomicrmw_xor_i64_acquire:
14412; RV32IA:       # %bb.0:
14413; RV32IA-NEXT:    addi sp, sp, -16
14414; RV32IA-NEXT:    sw ra, 12(sp)
14415; RV32IA-NEXT:    addi a3, zero, 2
14416; RV32IA-NEXT:    call __atomic_fetch_xor_8
14417; RV32IA-NEXT:    lw ra, 12(sp)
14418; RV32IA-NEXT:    addi sp, sp, 16
14419; RV32IA-NEXT:    ret
14420;
14421; RV64I-LABEL: atomicrmw_xor_i64_acquire:
14422; RV64I:       # %bb.0:
14423; RV64I-NEXT:    addi sp, sp, -16
14424; RV64I-NEXT:    sd ra, 8(sp)
14425; RV64I-NEXT:    addi a2, zero, 2
14426; RV64I-NEXT:    call __atomic_fetch_xor_8
14427; RV64I-NEXT:    ld ra, 8(sp)
14428; RV64I-NEXT:    addi sp, sp, 16
14429; RV64I-NEXT:    ret
14430;
14431; RV64IA-LABEL: atomicrmw_xor_i64_acquire:
14432; RV64IA:       # %bb.0:
14433; RV64IA-NEXT:    amoxor.d.aq a0, a1, (a0)
14434; RV64IA-NEXT:    ret
14435  %1 = atomicrmw xor i64* %a, i64 %b acquire
14436  ret i64 %1
14437}
14438
14439define i64 @atomicrmw_xor_i64_release(i64 *%a, i64 %b) nounwind {
14440; RV32I-LABEL: atomicrmw_xor_i64_release:
14441; RV32I:       # %bb.0:
14442; RV32I-NEXT:    addi sp, sp, -16
14443; RV32I-NEXT:    sw ra, 12(sp)
14444; RV32I-NEXT:    addi a3, zero, 3
14445; RV32I-NEXT:    call __atomic_fetch_xor_8
14446; RV32I-NEXT:    lw ra, 12(sp)
14447; RV32I-NEXT:    addi sp, sp, 16
14448; RV32I-NEXT:    ret
14449;
14450; RV32IA-LABEL: atomicrmw_xor_i64_release:
14451; RV32IA:       # %bb.0:
14452; RV32IA-NEXT:    addi sp, sp, -16
14453; RV32IA-NEXT:    sw ra, 12(sp)
14454; RV32IA-NEXT:    addi a3, zero, 3
14455; RV32IA-NEXT:    call __atomic_fetch_xor_8
14456; RV32IA-NEXT:    lw ra, 12(sp)
14457; RV32IA-NEXT:    addi sp, sp, 16
14458; RV32IA-NEXT:    ret
14459;
14460; RV64I-LABEL: atomicrmw_xor_i64_release:
14461; RV64I:       # %bb.0:
14462; RV64I-NEXT:    addi sp, sp, -16
14463; RV64I-NEXT:    sd ra, 8(sp)
14464; RV64I-NEXT:    addi a2, zero, 3
14465; RV64I-NEXT:    call __atomic_fetch_xor_8
14466; RV64I-NEXT:    ld ra, 8(sp)
14467; RV64I-NEXT:    addi sp, sp, 16
14468; RV64I-NEXT:    ret
14469;
14470; RV64IA-LABEL: atomicrmw_xor_i64_release:
14471; RV64IA:       # %bb.0:
14472; RV64IA-NEXT:    amoxor.d.rl a0, a1, (a0)
14473; RV64IA-NEXT:    ret
14474  %1 = atomicrmw xor i64* %a, i64 %b release
14475  ret i64 %1
14476}
14477
14478define i64 @atomicrmw_xor_i64_acq_rel(i64 *%a, i64 %b) nounwind {
14479; RV32I-LABEL: atomicrmw_xor_i64_acq_rel:
14480; RV32I:       # %bb.0:
14481; RV32I-NEXT:    addi sp, sp, -16
14482; RV32I-NEXT:    sw ra, 12(sp)
14483; RV32I-NEXT:    addi a3, zero, 4
14484; RV32I-NEXT:    call __atomic_fetch_xor_8
14485; RV32I-NEXT:    lw ra, 12(sp)
14486; RV32I-NEXT:    addi sp, sp, 16
14487; RV32I-NEXT:    ret
14488;
14489; RV32IA-LABEL: atomicrmw_xor_i64_acq_rel:
14490; RV32IA:       # %bb.0:
14491; RV32IA-NEXT:    addi sp, sp, -16
14492; RV32IA-NEXT:    sw ra, 12(sp)
14493; RV32IA-NEXT:    addi a3, zero, 4
14494; RV32IA-NEXT:    call __atomic_fetch_xor_8
14495; RV32IA-NEXT:    lw ra, 12(sp)
14496; RV32IA-NEXT:    addi sp, sp, 16
14497; RV32IA-NEXT:    ret
14498;
14499; RV64I-LABEL: atomicrmw_xor_i64_acq_rel:
14500; RV64I:       # %bb.0:
14501; RV64I-NEXT:    addi sp, sp, -16
14502; RV64I-NEXT:    sd ra, 8(sp)
14503; RV64I-NEXT:    addi a2, zero, 4
14504; RV64I-NEXT:    call __atomic_fetch_xor_8
14505; RV64I-NEXT:    ld ra, 8(sp)
14506; RV64I-NEXT:    addi sp, sp, 16
14507; RV64I-NEXT:    ret
14508;
14509; RV64IA-LABEL: atomicrmw_xor_i64_acq_rel:
14510; RV64IA:       # %bb.0:
14511; RV64IA-NEXT:    amoxor.d.aqrl a0, a1, (a0)
14512; RV64IA-NEXT:    ret
14513  %1 = atomicrmw xor i64* %a, i64 %b acq_rel
14514  ret i64 %1
14515}
14516
14517define i64 @atomicrmw_xor_i64_seq_cst(i64 *%a, i64 %b) nounwind {
14518; RV32I-LABEL: atomicrmw_xor_i64_seq_cst:
14519; RV32I:       # %bb.0:
14520; RV32I-NEXT:    addi sp, sp, -16
14521; RV32I-NEXT:    sw ra, 12(sp)
14522; RV32I-NEXT:    addi a3, zero, 5
14523; RV32I-NEXT:    call __atomic_fetch_xor_8
14524; RV32I-NEXT:    lw ra, 12(sp)
14525; RV32I-NEXT:    addi sp, sp, 16
14526; RV32I-NEXT:    ret
14527;
14528; RV32IA-LABEL: atomicrmw_xor_i64_seq_cst:
14529; RV32IA:       # %bb.0:
14530; RV32IA-NEXT:    addi sp, sp, -16
14531; RV32IA-NEXT:    sw ra, 12(sp)
14532; RV32IA-NEXT:    addi a3, zero, 5
14533; RV32IA-NEXT:    call __atomic_fetch_xor_8
14534; RV32IA-NEXT:    lw ra, 12(sp)
14535; RV32IA-NEXT:    addi sp, sp, 16
14536; RV32IA-NEXT:    ret
14537;
14538; RV64I-LABEL: atomicrmw_xor_i64_seq_cst:
14539; RV64I:       # %bb.0:
14540; RV64I-NEXT:    addi sp, sp, -16
14541; RV64I-NEXT:    sd ra, 8(sp)
14542; RV64I-NEXT:    addi a2, zero, 5
14543; RV64I-NEXT:    call __atomic_fetch_xor_8
14544; RV64I-NEXT:    ld ra, 8(sp)
14545; RV64I-NEXT:    addi sp, sp, 16
14546; RV64I-NEXT:    ret
14547;
14548; RV64IA-LABEL: atomicrmw_xor_i64_seq_cst:
14549; RV64IA:       # %bb.0:
14550; RV64IA-NEXT:    amoxor.d.aqrl a0, a1, (a0)
14551; RV64IA-NEXT:    ret
14552  %1 = atomicrmw xor i64* %a, i64 %b seq_cst
14553  ret i64 %1
14554}
14555
14556define i64 @atomicrmw_max_i64_monotonic(i64 *%a, i64 %b) nounwind {
14557; RV32I-LABEL: atomicrmw_max_i64_monotonic:
14558; RV32I:       # %bb.0:
14559; RV32I-NEXT:    addi sp, sp, -32
14560; RV32I-NEXT:    sw ra, 28(sp)
14561; RV32I-NEXT:    sw s0, 24(sp)
14562; RV32I-NEXT:    sw s1, 20(sp)
14563; RV32I-NEXT:    sw s2, 16(sp)
14564; RV32I-NEXT:    sw s3, 12(sp)
14565; RV32I-NEXT:    mv s0, a2
14566; RV32I-NEXT:    mv s2, a1
14567; RV32I-NEXT:    mv s1, a0
14568; RV32I-NEXT:    lw a1, 4(a0)
14569; RV32I-NEXT:    lw a2, 0(a0)
14570; RV32I-NEXT:    mv s3, sp
14571; RV32I-NEXT:  .LBB200_1: # %atomicrmw.start
14572; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
14573; RV32I-NEXT:    beq a1, s0, .LBB200_3
14574; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
14575; RV32I-NEXT:    # in Loop: Header=BB200_1 Depth=1
14576; RV32I-NEXT:    slt a0, s0, a1
14577; RV32I-NEXT:    j .LBB200_4
14578; RV32I-NEXT:  .LBB200_3: # in Loop: Header=BB200_1 Depth=1
14579; RV32I-NEXT:    sltu a0, s2, a2
14580; RV32I-NEXT:  .LBB200_4: # %atomicrmw.start
14581; RV32I-NEXT:    # in Loop: Header=BB200_1 Depth=1
14582; RV32I-NEXT:    sw a2, 0(sp)
14583; RV32I-NEXT:    mv a3, a1
14584; RV32I-NEXT:    bnez a0, .LBB200_6
14585; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
14586; RV32I-NEXT:    # in Loop: Header=BB200_1 Depth=1
14587; RV32I-NEXT:    mv a2, s2
14588; RV32I-NEXT:    mv a3, s0
14589; RV32I-NEXT:  .LBB200_6: # %atomicrmw.start
14590; RV32I-NEXT:    # in Loop: Header=BB200_1 Depth=1
14591; RV32I-NEXT:    sw a1, 4(sp)
14592; RV32I-NEXT:    mv a0, s1
14593; RV32I-NEXT:    mv a1, s3
14594; RV32I-NEXT:    mv a4, zero
14595; RV32I-NEXT:    mv a5, zero
14596; RV32I-NEXT:    call __atomic_compare_exchange_8
14597; RV32I-NEXT:    lw a1, 4(sp)
14598; RV32I-NEXT:    lw a2, 0(sp)
14599; RV32I-NEXT:    beqz a0, .LBB200_1
14600; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
14601; RV32I-NEXT:    mv a0, a2
14602; RV32I-NEXT:    lw s3, 12(sp)
14603; RV32I-NEXT:    lw s2, 16(sp)
14604; RV32I-NEXT:    lw s1, 20(sp)
14605; RV32I-NEXT:    lw s0, 24(sp)
14606; RV32I-NEXT:    lw ra, 28(sp)
14607; RV32I-NEXT:    addi sp, sp, 32
14608; RV32I-NEXT:    ret
14609;
14610; RV32IA-LABEL: atomicrmw_max_i64_monotonic:
14611; RV32IA:       # %bb.0:
14612; RV32IA-NEXT:    addi sp, sp, -32
14613; RV32IA-NEXT:    sw ra, 28(sp)
14614; RV32IA-NEXT:    sw s0, 24(sp)
14615; RV32IA-NEXT:    sw s1, 20(sp)
14616; RV32IA-NEXT:    sw s2, 16(sp)
14617; RV32IA-NEXT:    sw s3, 12(sp)
14618; RV32IA-NEXT:    mv s0, a2
14619; RV32IA-NEXT:    mv s2, a1
14620; RV32IA-NEXT:    mv s1, a0
14621; RV32IA-NEXT:    lw a1, 4(a0)
14622; RV32IA-NEXT:    lw a2, 0(a0)
14623; RV32IA-NEXT:    mv s3, sp
14624; RV32IA-NEXT:  .LBB200_1: # %atomicrmw.start
14625; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
14626; RV32IA-NEXT:    beq a1, s0, .LBB200_3
14627; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
14628; RV32IA-NEXT:    # in Loop: Header=BB200_1 Depth=1
14629; RV32IA-NEXT:    slt a0, s0, a1
14630; RV32IA-NEXT:    j .LBB200_4
14631; RV32IA-NEXT:  .LBB200_3: # in Loop: Header=BB200_1 Depth=1
14632; RV32IA-NEXT:    sltu a0, s2, a2
14633; RV32IA-NEXT:  .LBB200_4: # %atomicrmw.start
14634; RV32IA-NEXT:    # in Loop: Header=BB200_1 Depth=1
14635; RV32IA-NEXT:    sw a2, 0(sp)
14636; RV32IA-NEXT:    mv a3, a1
14637; RV32IA-NEXT:    bnez a0, .LBB200_6
14638; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
14639; RV32IA-NEXT:    # in Loop: Header=BB200_1 Depth=1
14640; RV32IA-NEXT:    mv a2, s2
14641; RV32IA-NEXT:    mv a3, s0
14642; RV32IA-NEXT:  .LBB200_6: # %atomicrmw.start
14643; RV32IA-NEXT:    # in Loop: Header=BB200_1 Depth=1
14644; RV32IA-NEXT:    sw a1, 4(sp)
14645; RV32IA-NEXT:    mv a0, s1
14646; RV32IA-NEXT:    mv a1, s3
14647; RV32IA-NEXT:    mv a4, zero
14648; RV32IA-NEXT:    mv a5, zero
14649; RV32IA-NEXT:    call __atomic_compare_exchange_8
14650; RV32IA-NEXT:    lw a1, 4(sp)
14651; RV32IA-NEXT:    lw a2, 0(sp)
14652; RV32IA-NEXT:    beqz a0, .LBB200_1
14653; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
14654; RV32IA-NEXT:    mv a0, a2
14655; RV32IA-NEXT:    lw s3, 12(sp)
14656; RV32IA-NEXT:    lw s2, 16(sp)
14657; RV32IA-NEXT:    lw s1, 20(sp)
14658; RV32IA-NEXT:    lw s0, 24(sp)
14659; RV32IA-NEXT:    lw ra, 28(sp)
14660; RV32IA-NEXT:    addi sp, sp, 32
14661; RV32IA-NEXT:    ret
14662;
14663; RV64I-LABEL: atomicrmw_max_i64_monotonic:
14664; RV64I:       # %bb.0:
14665; RV64I-NEXT:    addi sp, sp, -48
14666; RV64I-NEXT:    sd ra, 40(sp)
14667; RV64I-NEXT:    sd s0, 32(sp)
14668; RV64I-NEXT:    sd s1, 24(sp)
14669; RV64I-NEXT:    sd s2, 16(sp)
14670; RV64I-NEXT:    mv s0, a1
14671; RV64I-NEXT:    mv s1, a0
14672; RV64I-NEXT:    ld a2, 0(a0)
14673; RV64I-NEXT:    addi s2, sp, 8
14674; RV64I-NEXT:  .LBB200_1: # %atomicrmw.start
14675; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
14676; RV64I-NEXT:    sd a2, 8(sp)
14677; RV64I-NEXT:    blt s0, a2, .LBB200_3
14678; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
14679; RV64I-NEXT:    # in Loop: Header=BB200_1 Depth=1
14680; RV64I-NEXT:    mv a2, s0
14681; RV64I-NEXT:  .LBB200_3: # %atomicrmw.start
14682; RV64I-NEXT:    # in Loop: Header=BB200_1 Depth=1
14683; RV64I-NEXT:    mv a0, s1
14684; RV64I-NEXT:    mv a1, s2
14685; RV64I-NEXT:    mv a3, zero
14686; RV64I-NEXT:    mv a4, zero
14687; RV64I-NEXT:    call __atomic_compare_exchange_8
14688; RV64I-NEXT:    ld a2, 8(sp)
14689; RV64I-NEXT:    beqz a0, .LBB200_1
14690; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
14691; RV64I-NEXT:    mv a0, a2
14692; RV64I-NEXT:    ld s2, 16(sp)
14693; RV64I-NEXT:    ld s1, 24(sp)
14694; RV64I-NEXT:    ld s0, 32(sp)
14695; RV64I-NEXT:    ld ra, 40(sp)
14696; RV64I-NEXT:    addi sp, sp, 48
14697; RV64I-NEXT:    ret
14698;
14699; RV64IA-LABEL: atomicrmw_max_i64_monotonic:
14700; RV64IA:       # %bb.0:
14701; RV64IA-NEXT:    amomax.d a0, a1, (a0)
14702; RV64IA-NEXT:    ret
14703  %1 = atomicrmw max i64* %a, i64 %b monotonic
14704  ret i64 %1
14705}
14706
14707define i64 @atomicrmw_max_i64_acquire(i64 *%a, i64 %b) nounwind {
14708; RV32I-LABEL: atomicrmw_max_i64_acquire:
14709; RV32I:       # %bb.0:
14710; RV32I-NEXT:    addi sp, sp, -32
14711; RV32I-NEXT:    sw ra, 28(sp)
14712; RV32I-NEXT:    sw s0, 24(sp)
14713; RV32I-NEXT:    sw s1, 20(sp)
14714; RV32I-NEXT:    sw s2, 16(sp)
14715; RV32I-NEXT:    sw s3, 12(sp)
14716; RV32I-NEXT:    mv s0, a2
14717; RV32I-NEXT:    mv s2, a1
14718; RV32I-NEXT:    mv s1, a0
14719; RV32I-NEXT:    lw a1, 4(a0)
14720; RV32I-NEXT:    lw a2, 0(a0)
14721; RV32I-NEXT:    mv s3, sp
14722; RV32I-NEXT:  .LBB201_1: # %atomicrmw.start
14723; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
14724; RV32I-NEXT:    beq a1, s0, .LBB201_3
14725; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
14726; RV32I-NEXT:    # in Loop: Header=BB201_1 Depth=1
14727; RV32I-NEXT:    slt a0, s0, a1
14728; RV32I-NEXT:    j .LBB201_4
14729; RV32I-NEXT:  .LBB201_3: # in Loop: Header=BB201_1 Depth=1
14730; RV32I-NEXT:    sltu a0, s2, a2
14731; RV32I-NEXT:  .LBB201_4: # %atomicrmw.start
14732; RV32I-NEXT:    # in Loop: Header=BB201_1 Depth=1
14733; RV32I-NEXT:    sw a2, 0(sp)
14734; RV32I-NEXT:    mv a3, a1
14735; RV32I-NEXT:    bnez a0, .LBB201_6
14736; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
14737; RV32I-NEXT:    # in Loop: Header=BB201_1 Depth=1
14738; RV32I-NEXT:    mv a2, s2
14739; RV32I-NEXT:    mv a3, s0
14740; RV32I-NEXT:  .LBB201_6: # %atomicrmw.start
14741; RV32I-NEXT:    # in Loop: Header=BB201_1 Depth=1
14742; RV32I-NEXT:    sw a1, 4(sp)
14743; RV32I-NEXT:    mv a0, s1
14744; RV32I-NEXT:    mv a1, s3
14745; RV32I-NEXT:    addi a4, zero, 2
14746; RV32I-NEXT:    addi a5, zero, 2
14747; RV32I-NEXT:    call __atomic_compare_exchange_8
14748; RV32I-NEXT:    lw a1, 4(sp)
14749; RV32I-NEXT:    lw a2, 0(sp)
14750; RV32I-NEXT:    beqz a0, .LBB201_1
14751; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
14752; RV32I-NEXT:    mv a0, a2
14753; RV32I-NEXT:    lw s3, 12(sp)
14754; RV32I-NEXT:    lw s2, 16(sp)
14755; RV32I-NEXT:    lw s1, 20(sp)
14756; RV32I-NEXT:    lw s0, 24(sp)
14757; RV32I-NEXT:    lw ra, 28(sp)
14758; RV32I-NEXT:    addi sp, sp, 32
14759; RV32I-NEXT:    ret
14760;
14761; RV32IA-LABEL: atomicrmw_max_i64_acquire:
14762; RV32IA:       # %bb.0:
14763; RV32IA-NEXT:    addi sp, sp, -32
14764; RV32IA-NEXT:    sw ra, 28(sp)
14765; RV32IA-NEXT:    sw s0, 24(sp)
14766; RV32IA-NEXT:    sw s1, 20(sp)
14767; RV32IA-NEXT:    sw s2, 16(sp)
14768; RV32IA-NEXT:    sw s3, 12(sp)
14769; RV32IA-NEXT:    mv s0, a2
14770; RV32IA-NEXT:    mv s2, a1
14771; RV32IA-NEXT:    mv s1, a0
14772; RV32IA-NEXT:    lw a1, 4(a0)
14773; RV32IA-NEXT:    lw a2, 0(a0)
14774; RV32IA-NEXT:    mv s3, sp
14775; RV32IA-NEXT:  .LBB201_1: # %atomicrmw.start
14776; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
14777; RV32IA-NEXT:    beq a1, s0, .LBB201_3
14778; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
14779; RV32IA-NEXT:    # in Loop: Header=BB201_1 Depth=1
14780; RV32IA-NEXT:    slt a0, s0, a1
14781; RV32IA-NEXT:    j .LBB201_4
14782; RV32IA-NEXT:  .LBB201_3: # in Loop: Header=BB201_1 Depth=1
14783; RV32IA-NEXT:    sltu a0, s2, a2
14784; RV32IA-NEXT:  .LBB201_4: # %atomicrmw.start
14785; RV32IA-NEXT:    # in Loop: Header=BB201_1 Depth=1
14786; RV32IA-NEXT:    sw a2, 0(sp)
14787; RV32IA-NEXT:    mv a3, a1
14788; RV32IA-NEXT:    bnez a0, .LBB201_6
14789; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
14790; RV32IA-NEXT:    # in Loop: Header=BB201_1 Depth=1
14791; RV32IA-NEXT:    mv a2, s2
14792; RV32IA-NEXT:    mv a3, s0
14793; RV32IA-NEXT:  .LBB201_6: # %atomicrmw.start
14794; RV32IA-NEXT:    # in Loop: Header=BB201_1 Depth=1
14795; RV32IA-NEXT:    sw a1, 4(sp)
14796; RV32IA-NEXT:    mv a0, s1
14797; RV32IA-NEXT:    mv a1, s3
14798; RV32IA-NEXT:    addi a4, zero, 2
14799; RV32IA-NEXT:    addi a5, zero, 2
14800; RV32IA-NEXT:    call __atomic_compare_exchange_8
14801; RV32IA-NEXT:    lw a1, 4(sp)
14802; RV32IA-NEXT:    lw a2, 0(sp)
14803; RV32IA-NEXT:    beqz a0, .LBB201_1
14804; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
14805; RV32IA-NEXT:    mv a0, a2
14806; RV32IA-NEXT:    lw s3, 12(sp)
14807; RV32IA-NEXT:    lw s2, 16(sp)
14808; RV32IA-NEXT:    lw s1, 20(sp)
14809; RV32IA-NEXT:    lw s0, 24(sp)
14810; RV32IA-NEXT:    lw ra, 28(sp)
14811; RV32IA-NEXT:    addi sp, sp, 32
14812; RV32IA-NEXT:    ret
14813;
14814; RV64I-LABEL: atomicrmw_max_i64_acquire:
14815; RV64I:       # %bb.0:
14816; RV64I-NEXT:    addi sp, sp, -48
14817; RV64I-NEXT:    sd ra, 40(sp)
14818; RV64I-NEXT:    sd s0, 32(sp)
14819; RV64I-NEXT:    sd s1, 24(sp)
14820; RV64I-NEXT:    sd s2, 16(sp)
14821; RV64I-NEXT:    mv s0, a1
14822; RV64I-NEXT:    mv s1, a0
14823; RV64I-NEXT:    ld a2, 0(a0)
14824; RV64I-NEXT:    addi s2, sp, 8
14825; RV64I-NEXT:  .LBB201_1: # %atomicrmw.start
14826; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
14827; RV64I-NEXT:    sd a2, 8(sp)
14828; RV64I-NEXT:    blt s0, a2, .LBB201_3
14829; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
14830; RV64I-NEXT:    # in Loop: Header=BB201_1 Depth=1
14831; RV64I-NEXT:    mv a2, s0
14832; RV64I-NEXT:  .LBB201_3: # %atomicrmw.start
14833; RV64I-NEXT:    # in Loop: Header=BB201_1 Depth=1
14834; RV64I-NEXT:    mv a0, s1
14835; RV64I-NEXT:    mv a1, s2
14836; RV64I-NEXT:    addi a3, zero, 2
14837; RV64I-NEXT:    addi a4, zero, 2
14838; RV64I-NEXT:    call __atomic_compare_exchange_8
14839; RV64I-NEXT:    ld a2, 8(sp)
14840; RV64I-NEXT:    beqz a0, .LBB201_1
14841; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
14842; RV64I-NEXT:    mv a0, a2
14843; RV64I-NEXT:    ld s2, 16(sp)
14844; RV64I-NEXT:    ld s1, 24(sp)
14845; RV64I-NEXT:    ld s0, 32(sp)
14846; RV64I-NEXT:    ld ra, 40(sp)
14847; RV64I-NEXT:    addi sp, sp, 48
14848; RV64I-NEXT:    ret
14849;
14850; RV64IA-LABEL: atomicrmw_max_i64_acquire:
14851; RV64IA:       # %bb.0:
14852; RV64IA-NEXT:    amomax.d.aq a0, a1, (a0)
14853; RV64IA-NEXT:    ret
14854  %1 = atomicrmw max i64* %a, i64 %b acquire
14855  ret i64 %1
14856}
14857
14858define i64 @atomicrmw_max_i64_release(i64 *%a, i64 %b) nounwind {
14859; RV32I-LABEL: atomicrmw_max_i64_release:
14860; RV32I:       # %bb.0:
14861; RV32I-NEXT:    addi sp, sp, -32
14862; RV32I-NEXT:    sw ra, 28(sp)
14863; RV32I-NEXT:    sw s0, 24(sp)
14864; RV32I-NEXT:    sw s1, 20(sp)
14865; RV32I-NEXT:    sw s2, 16(sp)
14866; RV32I-NEXT:    sw s3, 12(sp)
14867; RV32I-NEXT:    mv s0, a2
14868; RV32I-NEXT:    mv s2, a1
14869; RV32I-NEXT:    mv s1, a0
14870; RV32I-NEXT:    lw a1, 4(a0)
14871; RV32I-NEXT:    lw a2, 0(a0)
14872; RV32I-NEXT:    mv s3, sp
14873; RV32I-NEXT:  .LBB202_1: # %atomicrmw.start
14874; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
14875; RV32I-NEXT:    beq a1, s0, .LBB202_3
14876; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
14877; RV32I-NEXT:    # in Loop: Header=BB202_1 Depth=1
14878; RV32I-NEXT:    slt a0, s0, a1
14879; RV32I-NEXT:    j .LBB202_4
14880; RV32I-NEXT:  .LBB202_3: # in Loop: Header=BB202_1 Depth=1
14881; RV32I-NEXT:    sltu a0, s2, a2
14882; RV32I-NEXT:  .LBB202_4: # %atomicrmw.start
14883; RV32I-NEXT:    # in Loop: Header=BB202_1 Depth=1
14884; RV32I-NEXT:    sw a2, 0(sp)
14885; RV32I-NEXT:    mv a3, a1
14886; RV32I-NEXT:    bnez a0, .LBB202_6
14887; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
14888; RV32I-NEXT:    # in Loop: Header=BB202_1 Depth=1
14889; RV32I-NEXT:    mv a2, s2
14890; RV32I-NEXT:    mv a3, s0
14891; RV32I-NEXT:  .LBB202_6: # %atomicrmw.start
14892; RV32I-NEXT:    # in Loop: Header=BB202_1 Depth=1
14893; RV32I-NEXT:    sw a1, 4(sp)
14894; RV32I-NEXT:    mv a0, s1
14895; RV32I-NEXT:    mv a1, s3
14896; RV32I-NEXT:    addi a4, zero, 3
14897; RV32I-NEXT:    mv a5, zero
14898; RV32I-NEXT:    call __atomic_compare_exchange_8
14899; RV32I-NEXT:    lw a1, 4(sp)
14900; RV32I-NEXT:    lw a2, 0(sp)
14901; RV32I-NEXT:    beqz a0, .LBB202_1
14902; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
14903; RV32I-NEXT:    mv a0, a2
14904; RV32I-NEXT:    lw s3, 12(sp)
14905; RV32I-NEXT:    lw s2, 16(sp)
14906; RV32I-NEXT:    lw s1, 20(sp)
14907; RV32I-NEXT:    lw s0, 24(sp)
14908; RV32I-NEXT:    lw ra, 28(sp)
14909; RV32I-NEXT:    addi sp, sp, 32
14910; RV32I-NEXT:    ret
14911;
14912; RV32IA-LABEL: atomicrmw_max_i64_release:
14913; RV32IA:       # %bb.0:
14914; RV32IA-NEXT:    addi sp, sp, -32
14915; RV32IA-NEXT:    sw ra, 28(sp)
14916; RV32IA-NEXT:    sw s0, 24(sp)
14917; RV32IA-NEXT:    sw s1, 20(sp)
14918; RV32IA-NEXT:    sw s2, 16(sp)
14919; RV32IA-NEXT:    sw s3, 12(sp)
14920; RV32IA-NEXT:    mv s0, a2
14921; RV32IA-NEXT:    mv s2, a1
14922; RV32IA-NEXT:    mv s1, a0
14923; RV32IA-NEXT:    lw a1, 4(a0)
14924; RV32IA-NEXT:    lw a2, 0(a0)
14925; RV32IA-NEXT:    mv s3, sp
14926; RV32IA-NEXT:  .LBB202_1: # %atomicrmw.start
14927; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
14928; RV32IA-NEXT:    beq a1, s0, .LBB202_3
14929; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
14930; RV32IA-NEXT:    # in Loop: Header=BB202_1 Depth=1
14931; RV32IA-NEXT:    slt a0, s0, a1
14932; RV32IA-NEXT:    j .LBB202_4
14933; RV32IA-NEXT:  .LBB202_3: # in Loop: Header=BB202_1 Depth=1
14934; RV32IA-NEXT:    sltu a0, s2, a2
14935; RV32IA-NEXT:  .LBB202_4: # %atomicrmw.start
14936; RV32IA-NEXT:    # in Loop: Header=BB202_1 Depth=1
14937; RV32IA-NEXT:    sw a2, 0(sp)
14938; RV32IA-NEXT:    mv a3, a1
14939; RV32IA-NEXT:    bnez a0, .LBB202_6
14940; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
14941; RV32IA-NEXT:    # in Loop: Header=BB202_1 Depth=1
14942; RV32IA-NEXT:    mv a2, s2
14943; RV32IA-NEXT:    mv a3, s0
14944; RV32IA-NEXT:  .LBB202_6: # %atomicrmw.start
14945; RV32IA-NEXT:    # in Loop: Header=BB202_1 Depth=1
14946; RV32IA-NEXT:    sw a1, 4(sp)
14947; RV32IA-NEXT:    mv a0, s1
14948; RV32IA-NEXT:    mv a1, s3
14949; RV32IA-NEXT:    addi a4, zero, 3
14950; RV32IA-NEXT:    mv a5, zero
14951; RV32IA-NEXT:    call __atomic_compare_exchange_8
14952; RV32IA-NEXT:    lw a1, 4(sp)
14953; RV32IA-NEXT:    lw a2, 0(sp)
14954; RV32IA-NEXT:    beqz a0, .LBB202_1
14955; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
14956; RV32IA-NEXT:    mv a0, a2
14957; RV32IA-NEXT:    lw s3, 12(sp)
14958; RV32IA-NEXT:    lw s2, 16(sp)
14959; RV32IA-NEXT:    lw s1, 20(sp)
14960; RV32IA-NEXT:    lw s0, 24(sp)
14961; RV32IA-NEXT:    lw ra, 28(sp)
14962; RV32IA-NEXT:    addi sp, sp, 32
14963; RV32IA-NEXT:    ret
14964;
14965; RV64I-LABEL: atomicrmw_max_i64_release:
14966; RV64I:       # %bb.0:
14967; RV64I-NEXT:    addi sp, sp, -48
14968; RV64I-NEXT:    sd ra, 40(sp)
14969; RV64I-NEXT:    sd s0, 32(sp)
14970; RV64I-NEXT:    sd s1, 24(sp)
14971; RV64I-NEXT:    sd s2, 16(sp)
14972; RV64I-NEXT:    mv s0, a1
14973; RV64I-NEXT:    mv s1, a0
14974; RV64I-NEXT:    ld a2, 0(a0)
14975; RV64I-NEXT:    addi s2, sp, 8
14976; RV64I-NEXT:  .LBB202_1: # %atomicrmw.start
14977; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
14978; RV64I-NEXT:    sd a2, 8(sp)
14979; RV64I-NEXT:    blt s0, a2, .LBB202_3
14980; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
14981; RV64I-NEXT:    # in Loop: Header=BB202_1 Depth=1
14982; RV64I-NEXT:    mv a2, s0
14983; RV64I-NEXT:  .LBB202_3: # %atomicrmw.start
14984; RV64I-NEXT:    # in Loop: Header=BB202_1 Depth=1
14985; RV64I-NEXT:    mv a0, s1
14986; RV64I-NEXT:    mv a1, s2
14987; RV64I-NEXT:    addi a3, zero, 3
14988; RV64I-NEXT:    mv a4, zero
14989; RV64I-NEXT:    call __atomic_compare_exchange_8
14990; RV64I-NEXT:    ld a2, 8(sp)
14991; RV64I-NEXT:    beqz a0, .LBB202_1
14992; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
14993; RV64I-NEXT:    mv a0, a2
14994; RV64I-NEXT:    ld s2, 16(sp)
14995; RV64I-NEXT:    ld s1, 24(sp)
14996; RV64I-NEXT:    ld s0, 32(sp)
14997; RV64I-NEXT:    ld ra, 40(sp)
14998; RV64I-NEXT:    addi sp, sp, 48
14999; RV64I-NEXT:    ret
15000;
15001; RV64IA-LABEL: atomicrmw_max_i64_release:
15002; RV64IA:       # %bb.0:
15003; RV64IA-NEXT:    amomax.d.rl a0, a1, (a0)
15004; RV64IA-NEXT:    ret
15005  %1 = atomicrmw max i64* %a, i64 %b release
15006  ret i64 %1
15007}
15008
15009define i64 @atomicrmw_max_i64_acq_rel(i64 *%a, i64 %b) nounwind {
15010; RV32I-LABEL: atomicrmw_max_i64_acq_rel:
15011; RV32I:       # %bb.0:
15012; RV32I-NEXT:    addi sp, sp, -32
15013; RV32I-NEXT:    sw ra, 28(sp)
15014; RV32I-NEXT:    sw s0, 24(sp)
15015; RV32I-NEXT:    sw s1, 20(sp)
15016; RV32I-NEXT:    sw s2, 16(sp)
15017; RV32I-NEXT:    sw s3, 12(sp)
15018; RV32I-NEXT:    mv s0, a2
15019; RV32I-NEXT:    mv s2, a1
15020; RV32I-NEXT:    mv s1, a0
15021; RV32I-NEXT:    lw a1, 4(a0)
15022; RV32I-NEXT:    lw a2, 0(a0)
15023; RV32I-NEXT:    mv s3, sp
15024; RV32I-NEXT:  .LBB203_1: # %atomicrmw.start
15025; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
15026; RV32I-NEXT:    beq a1, s0, .LBB203_3
15027; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
15028; RV32I-NEXT:    # in Loop: Header=BB203_1 Depth=1
15029; RV32I-NEXT:    slt a0, s0, a1
15030; RV32I-NEXT:    j .LBB203_4
15031; RV32I-NEXT:  .LBB203_3: # in Loop: Header=BB203_1 Depth=1
15032; RV32I-NEXT:    sltu a0, s2, a2
15033; RV32I-NEXT:  .LBB203_4: # %atomicrmw.start
15034; RV32I-NEXT:    # in Loop: Header=BB203_1 Depth=1
15035; RV32I-NEXT:    sw a2, 0(sp)
15036; RV32I-NEXT:    mv a3, a1
15037; RV32I-NEXT:    bnez a0, .LBB203_6
15038; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
15039; RV32I-NEXT:    # in Loop: Header=BB203_1 Depth=1
15040; RV32I-NEXT:    mv a2, s2
15041; RV32I-NEXT:    mv a3, s0
15042; RV32I-NEXT:  .LBB203_6: # %atomicrmw.start
15043; RV32I-NEXT:    # in Loop: Header=BB203_1 Depth=1
15044; RV32I-NEXT:    sw a1, 4(sp)
15045; RV32I-NEXT:    mv a0, s1
15046; RV32I-NEXT:    mv a1, s3
15047; RV32I-NEXT:    addi a4, zero, 4
15048; RV32I-NEXT:    addi a5, zero, 2
15049; RV32I-NEXT:    call __atomic_compare_exchange_8
15050; RV32I-NEXT:    lw a1, 4(sp)
15051; RV32I-NEXT:    lw a2, 0(sp)
15052; RV32I-NEXT:    beqz a0, .LBB203_1
15053; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
15054; RV32I-NEXT:    mv a0, a2
15055; RV32I-NEXT:    lw s3, 12(sp)
15056; RV32I-NEXT:    lw s2, 16(sp)
15057; RV32I-NEXT:    lw s1, 20(sp)
15058; RV32I-NEXT:    lw s0, 24(sp)
15059; RV32I-NEXT:    lw ra, 28(sp)
15060; RV32I-NEXT:    addi sp, sp, 32
15061; RV32I-NEXT:    ret
15062;
15063; RV32IA-LABEL: atomicrmw_max_i64_acq_rel:
15064; RV32IA:       # %bb.0:
15065; RV32IA-NEXT:    addi sp, sp, -32
15066; RV32IA-NEXT:    sw ra, 28(sp)
15067; RV32IA-NEXT:    sw s0, 24(sp)
15068; RV32IA-NEXT:    sw s1, 20(sp)
15069; RV32IA-NEXT:    sw s2, 16(sp)
15070; RV32IA-NEXT:    sw s3, 12(sp)
15071; RV32IA-NEXT:    mv s0, a2
15072; RV32IA-NEXT:    mv s2, a1
15073; RV32IA-NEXT:    mv s1, a0
15074; RV32IA-NEXT:    lw a1, 4(a0)
15075; RV32IA-NEXT:    lw a2, 0(a0)
15076; RV32IA-NEXT:    mv s3, sp
15077; RV32IA-NEXT:  .LBB203_1: # %atomicrmw.start
15078; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
15079; RV32IA-NEXT:    beq a1, s0, .LBB203_3
15080; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
15081; RV32IA-NEXT:    # in Loop: Header=BB203_1 Depth=1
15082; RV32IA-NEXT:    slt a0, s0, a1
15083; RV32IA-NEXT:    j .LBB203_4
15084; RV32IA-NEXT:  .LBB203_3: # in Loop: Header=BB203_1 Depth=1
15085; RV32IA-NEXT:    sltu a0, s2, a2
15086; RV32IA-NEXT:  .LBB203_4: # %atomicrmw.start
15087; RV32IA-NEXT:    # in Loop: Header=BB203_1 Depth=1
15088; RV32IA-NEXT:    sw a2, 0(sp)
15089; RV32IA-NEXT:    mv a3, a1
15090; RV32IA-NEXT:    bnez a0, .LBB203_6
15091; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
15092; RV32IA-NEXT:    # in Loop: Header=BB203_1 Depth=1
15093; RV32IA-NEXT:    mv a2, s2
15094; RV32IA-NEXT:    mv a3, s0
15095; RV32IA-NEXT:  .LBB203_6: # %atomicrmw.start
15096; RV32IA-NEXT:    # in Loop: Header=BB203_1 Depth=1
15097; RV32IA-NEXT:    sw a1, 4(sp)
15098; RV32IA-NEXT:    mv a0, s1
15099; RV32IA-NEXT:    mv a1, s3
15100; RV32IA-NEXT:    addi a4, zero, 4
15101; RV32IA-NEXT:    addi a5, zero, 2
15102; RV32IA-NEXT:    call __atomic_compare_exchange_8
15103; RV32IA-NEXT:    lw a1, 4(sp)
15104; RV32IA-NEXT:    lw a2, 0(sp)
15105; RV32IA-NEXT:    beqz a0, .LBB203_1
15106; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
15107; RV32IA-NEXT:    mv a0, a2
15108; RV32IA-NEXT:    lw s3, 12(sp)
15109; RV32IA-NEXT:    lw s2, 16(sp)
15110; RV32IA-NEXT:    lw s1, 20(sp)
15111; RV32IA-NEXT:    lw s0, 24(sp)
15112; RV32IA-NEXT:    lw ra, 28(sp)
15113; RV32IA-NEXT:    addi sp, sp, 32
15114; RV32IA-NEXT:    ret
15115;
15116; RV64I-LABEL: atomicrmw_max_i64_acq_rel:
15117; RV64I:       # %bb.0:
15118; RV64I-NEXT:    addi sp, sp, -48
15119; RV64I-NEXT:    sd ra, 40(sp)
15120; RV64I-NEXT:    sd s0, 32(sp)
15121; RV64I-NEXT:    sd s1, 24(sp)
15122; RV64I-NEXT:    sd s2, 16(sp)
15123; RV64I-NEXT:    mv s0, a1
15124; RV64I-NEXT:    mv s1, a0
15125; RV64I-NEXT:    ld a2, 0(a0)
15126; RV64I-NEXT:    addi s2, sp, 8
15127; RV64I-NEXT:  .LBB203_1: # %atomicrmw.start
15128; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
15129; RV64I-NEXT:    sd a2, 8(sp)
15130; RV64I-NEXT:    blt s0, a2, .LBB203_3
15131; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
15132; RV64I-NEXT:    # in Loop: Header=BB203_1 Depth=1
15133; RV64I-NEXT:    mv a2, s0
15134; RV64I-NEXT:  .LBB203_3: # %atomicrmw.start
15135; RV64I-NEXT:    # in Loop: Header=BB203_1 Depth=1
15136; RV64I-NEXT:    mv a0, s1
15137; RV64I-NEXT:    mv a1, s2
15138; RV64I-NEXT:    addi a3, zero, 4
15139; RV64I-NEXT:    addi a4, zero, 2
15140; RV64I-NEXT:    call __atomic_compare_exchange_8
15141; RV64I-NEXT:    ld a2, 8(sp)
15142; RV64I-NEXT:    beqz a0, .LBB203_1
15143; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
15144; RV64I-NEXT:    mv a0, a2
15145; RV64I-NEXT:    ld s2, 16(sp)
15146; RV64I-NEXT:    ld s1, 24(sp)
15147; RV64I-NEXT:    ld s0, 32(sp)
15148; RV64I-NEXT:    ld ra, 40(sp)
15149; RV64I-NEXT:    addi sp, sp, 48
15150; RV64I-NEXT:    ret
15151;
15152; RV64IA-LABEL: atomicrmw_max_i64_acq_rel:
15153; RV64IA:       # %bb.0:
15154; RV64IA-NEXT:    amomax.d.aqrl a0, a1, (a0)
15155; RV64IA-NEXT:    ret
15156  %1 = atomicrmw max i64* %a, i64 %b acq_rel
15157  ret i64 %1
15158}
15159
15160define i64 @atomicrmw_max_i64_seq_cst(i64 *%a, i64 %b) nounwind {
15161; RV32I-LABEL: atomicrmw_max_i64_seq_cst:
15162; RV32I:       # %bb.0:
15163; RV32I-NEXT:    addi sp, sp, -32
15164; RV32I-NEXT:    sw ra, 28(sp)
15165; RV32I-NEXT:    sw s0, 24(sp)
15166; RV32I-NEXT:    sw s1, 20(sp)
15167; RV32I-NEXT:    sw s2, 16(sp)
15168; RV32I-NEXT:    sw s3, 12(sp)
15169; RV32I-NEXT:    mv s0, a2
15170; RV32I-NEXT:    mv s2, a1
15171; RV32I-NEXT:    mv s1, a0
15172; RV32I-NEXT:    lw a1, 4(a0)
15173; RV32I-NEXT:    lw a2, 0(a0)
15174; RV32I-NEXT:    mv s3, sp
15175; RV32I-NEXT:  .LBB204_1: # %atomicrmw.start
15176; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
15177; RV32I-NEXT:    beq a1, s0, .LBB204_3
15178; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
15179; RV32I-NEXT:    # in Loop: Header=BB204_1 Depth=1
15180; RV32I-NEXT:    slt a0, s0, a1
15181; RV32I-NEXT:    j .LBB204_4
15182; RV32I-NEXT:  .LBB204_3: # in Loop: Header=BB204_1 Depth=1
15183; RV32I-NEXT:    sltu a0, s2, a2
15184; RV32I-NEXT:  .LBB204_4: # %atomicrmw.start
15185; RV32I-NEXT:    # in Loop: Header=BB204_1 Depth=1
15186; RV32I-NEXT:    sw a2, 0(sp)
15187; RV32I-NEXT:    mv a3, a1
15188; RV32I-NEXT:    bnez a0, .LBB204_6
15189; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
15190; RV32I-NEXT:    # in Loop: Header=BB204_1 Depth=1
15191; RV32I-NEXT:    mv a2, s2
15192; RV32I-NEXT:    mv a3, s0
15193; RV32I-NEXT:  .LBB204_6: # %atomicrmw.start
15194; RV32I-NEXT:    # in Loop: Header=BB204_1 Depth=1
15195; RV32I-NEXT:    sw a1, 4(sp)
15196; RV32I-NEXT:    mv a0, s1
15197; RV32I-NEXT:    mv a1, s3
15198; RV32I-NEXT:    addi a4, zero, 5
15199; RV32I-NEXT:    addi a5, zero, 5
15200; RV32I-NEXT:    call __atomic_compare_exchange_8
15201; RV32I-NEXT:    lw a1, 4(sp)
15202; RV32I-NEXT:    lw a2, 0(sp)
15203; RV32I-NEXT:    beqz a0, .LBB204_1
15204; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
15205; RV32I-NEXT:    mv a0, a2
15206; RV32I-NEXT:    lw s3, 12(sp)
15207; RV32I-NEXT:    lw s2, 16(sp)
15208; RV32I-NEXT:    lw s1, 20(sp)
15209; RV32I-NEXT:    lw s0, 24(sp)
15210; RV32I-NEXT:    lw ra, 28(sp)
15211; RV32I-NEXT:    addi sp, sp, 32
15212; RV32I-NEXT:    ret
15213;
15214; RV32IA-LABEL: atomicrmw_max_i64_seq_cst:
15215; RV32IA:       # %bb.0:
15216; RV32IA-NEXT:    addi sp, sp, -32
15217; RV32IA-NEXT:    sw ra, 28(sp)
15218; RV32IA-NEXT:    sw s0, 24(sp)
15219; RV32IA-NEXT:    sw s1, 20(sp)
15220; RV32IA-NEXT:    sw s2, 16(sp)
15221; RV32IA-NEXT:    sw s3, 12(sp)
15222; RV32IA-NEXT:    mv s0, a2
15223; RV32IA-NEXT:    mv s2, a1
15224; RV32IA-NEXT:    mv s1, a0
15225; RV32IA-NEXT:    lw a1, 4(a0)
15226; RV32IA-NEXT:    lw a2, 0(a0)
15227; RV32IA-NEXT:    mv s3, sp
15228; RV32IA-NEXT:  .LBB204_1: # %atomicrmw.start
15229; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
15230; RV32IA-NEXT:    beq a1, s0, .LBB204_3
15231; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
15232; RV32IA-NEXT:    # in Loop: Header=BB204_1 Depth=1
15233; RV32IA-NEXT:    slt a0, s0, a1
15234; RV32IA-NEXT:    j .LBB204_4
15235; RV32IA-NEXT:  .LBB204_3: # in Loop: Header=BB204_1 Depth=1
15236; RV32IA-NEXT:    sltu a0, s2, a2
15237; RV32IA-NEXT:  .LBB204_4: # %atomicrmw.start
15238; RV32IA-NEXT:    # in Loop: Header=BB204_1 Depth=1
15239; RV32IA-NEXT:    sw a2, 0(sp)
15240; RV32IA-NEXT:    mv a3, a1
15241; RV32IA-NEXT:    bnez a0, .LBB204_6
15242; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
15243; RV32IA-NEXT:    # in Loop: Header=BB204_1 Depth=1
15244; RV32IA-NEXT:    mv a2, s2
15245; RV32IA-NEXT:    mv a3, s0
15246; RV32IA-NEXT:  .LBB204_6: # %atomicrmw.start
15247; RV32IA-NEXT:    # in Loop: Header=BB204_1 Depth=1
15248; RV32IA-NEXT:    sw a1, 4(sp)
15249; RV32IA-NEXT:    mv a0, s1
15250; RV32IA-NEXT:    mv a1, s3
15251; RV32IA-NEXT:    addi a4, zero, 5
15252; RV32IA-NEXT:    addi a5, zero, 5
15253; RV32IA-NEXT:    call __atomic_compare_exchange_8
15254; RV32IA-NEXT:    lw a1, 4(sp)
15255; RV32IA-NEXT:    lw a2, 0(sp)
15256; RV32IA-NEXT:    beqz a0, .LBB204_1
15257; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
15258; RV32IA-NEXT:    mv a0, a2
15259; RV32IA-NEXT:    lw s3, 12(sp)
15260; RV32IA-NEXT:    lw s2, 16(sp)
15261; RV32IA-NEXT:    lw s1, 20(sp)
15262; RV32IA-NEXT:    lw s0, 24(sp)
15263; RV32IA-NEXT:    lw ra, 28(sp)
15264; RV32IA-NEXT:    addi sp, sp, 32
15265; RV32IA-NEXT:    ret
15266;
15267; RV64I-LABEL: atomicrmw_max_i64_seq_cst:
15268; RV64I:       # %bb.0:
15269; RV64I-NEXT:    addi sp, sp, -48
15270; RV64I-NEXT:    sd ra, 40(sp)
15271; RV64I-NEXT:    sd s0, 32(sp)
15272; RV64I-NEXT:    sd s1, 24(sp)
15273; RV64I-NEXT:    sd s2, 16(sp)
15274; RV64I-NEXT:    mv s0, a1
15275; RV64I-NEXT:    mv s1, a0
15276; RV64I-NEXT:    ld a2, 0(a0)
15277; RV64I-NEXT:    addi s2, sp, 8
15278; RV64I-NEXT:  .LBB204_1: # %atomicrmw.start
15279; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
15280; RV64I-NEXT:    sd a2, 8(sp)
15281; RV64I-NEXT:    blt s0, a2, .LBB204_3
15282; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
15283; RV64I-NEXT:    # in Loop: Header=BB204_1 Depth=1
15284; RV64I-NEXT:    mv a2, s0
15285; RV64I-NEXT:  .LBB204_3: # %atomicrmw.start
15286; RV64I-NEXT:    # in Loop: Header=BB204_1 Depth=1
15287; RV64I-NEXT:    mv a0, s1
15288; RV64I-NEXT:    mv a1, s2
15289; RV64I-NEXT:    addi a3, zero, 5
15290; RV64I-NEXT:    addi a4, zero, 5
15291; RV64I-NEXT:    call __atomic_compare_exchange_8
15292; RV64I-NEXT:    ld a2, 8(sp)
15293; RV64I-NEXT:    beqz a0, .LBB204_1
15294; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
15295; RV64I-NEXT:    mv a0, a2
15296; RV64I-NEXT:    ld s2, 16(sp)
15297; RV64I-NEXT:    ld s1, 24(sp)
15298; RV64I-NEXT:    ld s0, 32(sp)
15299; RV64I-NEXT:    ld ra, 40(sp)
15300; RV64I-NEXT:    addi sp, sp, 48
15301; RV64I-NEXT:    ret
15302;
15303; RV64IA-LABEL: atomicrmw_max_i64_seq_cst:
15304; RV64IA:       # %bb.0:
15305; RV64IA-NEXT:    amomax.d.aqrl a0, a1, (a0)
15306; RV64IA-NEXT:    ret
15307  %1 = atomicrmw max i64* %a, i64 %b seq_cst
15308  ret i64 %1
15309}
15310
15311define i64 @atomicrmw_min_i64_monotonic(i64 *%a, i64 %b) nounwind {
15312; RV32I-LABEL: atomicrmw_min_i64_monotonic:
15313; RV32I:       # %bb.0:
15314; RV32I-NEXT:    addi sp, sp, -32
15315; RV32I-NEXT:    sw ra, 28(sp)
15316; RV32I-NEXT:    sw s0, 24(sp)
15317; RV32I-NEXT:    sw s1, 20(sp)
15318; RV32I-NEXT:    sw s2, 16(sp)
15319; RV32I-NEXT:    sw s3, 12(sp)
15320; RV32I-NEXT:    mv s0, a2
15321; RV32I-NEXT:    mv s2, a1
15322; RV32I-NEXT:    mv s1, a0
15323; RV32I-NEXT:    lw a1, 4(a0)
15324; RV32I-NEXT:    lw a2, 0(a0)
15325; RV32I-NEXT:    mv s3, sp
15326; RV32I-NEXT:  .LBB205_1: # %atomicrmw.start
15327; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
15328; RV32I-NEXT:    beq a1, s0, .LBB205_3
15329; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
15330; RV32I-NEXT:    # in Loop: Header=BB205_1 Depth=1
15331; RV32I-NEXT:    slt a0, s0, a1
15332; RV32I-NEXT:    j .LBB205_4
15333; RV32I-NEXT:  .LBB205_3: # in Loop: Header=BB205_1 Depth=1
15334; RV32I-NEXT:    sltu a0, s2, a2
15335; RV32I-NEXT:  .LBB205_4: # %atomicrmw.start
15336; RV32I-NEXT:    # in Loop: Header=BB205_1 Depth=1
15337; RV32I-NEXT:    xori a0, a0, 1
15338; RV32I-NEXT:    sw a2, 0(sp)
15339; RV32I-NEXT:    mv a3, a1
15340; RV32I-NEXT:    bnez a0, .LBB205_6
15341; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
15342; RV32I-NEXT:    # in Loop: Header=BB205_1 Depth=1
15343; RV32I-NEXT:    mv a2, s2
15344; RV32I-NEXT:    mv a3, s0
15345; RV32I-NEXT:  .LBB205_6: # %atomicrmw.start
15346; RV32I-NEXT:    # in Loop: Header=BB205_1 Depth=1
15347; RV32I-NEXT:    sw a1, 4(sp)
15348; RV32I-NEXT:    mv a0, s1
15349; RV32I-NEXT:    mv a1, s3
15350; RV32I-NEXT:    mv a4, zero
15351; RV32I-NEXT:    mv a5, zero
15352; RV32I-NEXT:    call __atomic_compare_exchange_8
15353; RV32I-NEXT:    lw a1, 4(sp)
15354; RV32I-NEXT:    lw a2, 0(sp)
15355; RV32I-NEXT:    beqz a0, .LBB205_1
15356; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
15357; RV32I-NEXT:    mv a0, a2
15358; RV32I-NEXT:    lw s3, 12(sp)
15359; RV32I-NEXT:    lw s2, 16(sp)
15360; RV32I-NEXT:    lw s1, 20(sp)
15361; RV32I-NEXT:    lw s0, 24(sp)
15362; RV32I-NEXT:    lw ra, 28(sp)
15363; RV32I-NEXT:    addi sp, sp, 32
15364; RV32I-NEXT:    ret
15365;
15366; RV32IA-LABEL: atomicrmw_min_i64_monotonic:
15367; RV32IA:       # %bb.0:
15368; RV32IA-NEXT:    addi sp, sp, -32
15369; RV32IA-NEXT:    sw ra, 28(sp)
15370; RV32IA-NEXT:    sw s0, 24(sp)
15371; RV32IA-NEXT:    sw s1, 20(sp)
15372; RV32IA-NEXT:    sw s2, 16(sp)
15373; RV32IA-NEXT:    sw s3, 12(sp)
15374; RV32IA-NEXT:    mv s0, a2
15375; RV32IA-NEXT:    mv s2, a1
15376; RV32IA-NEXT:    mv s1, a0
15377; RV32IA-NEXT:    lw a1, 4(a0)
15378; RV32IA-NEXT:    lw a2, 0(a0)
15379; RV32IA-NEXT:    mv s3, sp
15380; RV32IA-NEXT:  .LBB205_1: # %atomicrmw.start
15381; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
15382; RV32IA-NEXT:    beq a1, s0, .LBB205_3
15383; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
15384; RV32IA-NEXT:    # in Loop: Header=BB205_1 Depth=1
15385; RV32IA-NEXT:    slt a0, s0, a1
15386; RV32IA-NEXT:    j .LBB205_4
15387; RV32IA-NEXT:  .LBB205_3: # in Loop: Header=BB205_1 Depth=1
15388; RV32IA-NEXT:    sltu a0, s2, a2
15389; RV32IA-NEXT:  .LBB205_4: # %atomicrmw.start
15390; RV32IA-NEXT:    # in Loop: Header=BB205_1 Depth=1
15391; RV32IA-NEXT:    xori a0, a0, 1
15392; RV32IA-NEXT:    sw a2, 0(sp)
15393; RV32IA-NEXT:    mv a3, a1
15394; RV32IA-NEXT:    bnez a0, .LBB205_6
15395; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
15396; RV32IA-NEXT:    # in Loop: Header=BB205_1 Depth=1
15397; RV32IA-NEXT:    mv a2, s2
15398; RV32IA-NEXT:    mv a3, s0
15399; RV32IA-NEXT:  .LBB205_6: # %atomicrmw.start
15400; RV32IA-NEXT:    # in Loop: Header=BB205_1 Depth=1
15401; RV32IA-NEXT:    sw a1, 4(sp)
15402; RV32IA-NEXT:    mv a0, s1
15403; RV32IA-NEXT:    mv a1, s3
15404; RV32IA-NEXT:    mv a4, zero
15405; RV32IA-NEXT:    mv a5, zero
15406; RV32IA-NEXT:    call __atomic_compare_exchange_8
15407; RV32IA-NEXT:    lw a1, 4(sp)
15408; RV32IA-NEXT:    lw a2, 0(sp)
15409; RV32IA-NEXT:    beqz a0, .LBB205_1
15410; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
15411; RV32IA-NEXT:    mv a0, a2
15412; RV32IA-NEXT:    lw s3, 12(sp)
15413; RV32IA-NEXT:    lw s2, 16(sp)
15414; RV32IA-NEXT:    lw s1, 20(sp)
15415; RV32IA-NEXT:    lw s0, 24(sp)
15416; RV32IA-NEXT:    lw ra, 28(sp)
15417; RV32IA-NEXT:    addi sp, sp, 32
15418; RV32IA-NEXT:    ret
15419;
15420; RV64I-LABEL: atomicrmw_min_i64_monotonic:
15421; RV64I:       # %bb.0:
15422; RV64I-NEXT:    addi sp, sp, -48
15423; RV64I-NEXT:    sd ra, 40(sp)
15424; RV64I-NEXT:    sd s0, 32(sp)
15425; RV64I-NEXT:    sd s1, 24(sp)
15426; RV64I-NEXT:    sd s2, 16(sp)
15427; RV64I-NEXT:    mv s0, a1
15428; RV64I-NEXT:    mv s1, a0
15429; RV64I-NEXT:    ld a2, 0(a0)
15430; RV64I-NEXT:    addi s2, sp, 8
15431; RV64I-NEXT:  .LBB205_1: # %atomicrmw.start
15432; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
15433; RV64I-NEXT:    sd a2, 8(sp)
15434; RV64I-NEXT:    bge s0, a2, .LBB205_3
15435; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
15436; RV64I-NEXT:    # in Loop: Header=BB205_1 Depth=1
15437; RV64I-NEXT:    mv a2, s0
15438; RV64I-NEXT:  .LBB205_3: # %atomicrmw.start
15439; RV64I-NEXT:    # in Loop: Header=BB205_1 Depth=1
15440; RV64I-NEXT:    mv a0, s1
15441; RV64I-NEXT:    mv a1, s2
15442; RV64I-NEXT:    mv a3, zero
15443; RV64I-NEXT:    mv a4, zero
15444; RV64I-NEXT:    call __atomic_compare_exchange_8
15445; RV64I-NEXT:    ld a2, 8(sp)
15446; RV64I-NEXT:    beqz a0, .LBB205_1
15447; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
15448; RV64I-NEXT:    mv a0, a2
15449; RV64I-NEXT:    ld s2, 16(sp)
15450; RV64I-NEXT:    ld s1, 24(sp)
15451; RV64I-NEXT:    ld s0, 32(sp)
15452; RV64I-NEXT:    ld ra, 40(sp)
15453; RV64I-NEXT:    addi sp, sp, 48
15454; RV64I-NEXT:    ret
15455;
15456; RV64IA-LABEL: atomicrmw_min_i64_monotonic:
15457; RV64IA:       # %bb.0:
15458; RV64IA-NEXT:    amomin.d a0, a1, (a0)
15459; RV64IA-NEXT:    ret
15460  %1 = atomicrmw min i64* %a, i64 %b monotonic
15461  ret i64 %1
15462}
15463
15464define i64 @atomicrmw_min_i64_acquire(i64 *%a, i64 %b) nounwind {
15465; RV32I-LABEL: atomicrmw_min_i64_acquire:
15466; RV32I:       # %bb.0:
15467; RV32I-NEXT:    addi sp, sp, -32
15468; RV32I-NEXT:    sw ra, 28(sp)
15469; RV32I-NEXT:    sw s0, 24(sp)
15470; RV32I-NEXT:    sw s1, 20(sp)
15471; RV32I-NEXT:    sw s2, 16(sp)
15472; RV32I-NEXT:    sw s3, 12(sp)
15473; RV32I-NEXT:    mv s0, a2
15474; RV32I-NEXT:    mv s2, a1
15475; RV32I-NEXT:    mv s1, a0
15476; RV32I-NEXT:    lw a1, 4(a0)
15477; RV32I-NEXT:    lw a2, 0(a0)
15478; RV32I-NEXT:    mv s3, sp
15479; RV32I-NEXT:  .LBB206_1: # %atomicrmw.start
15480; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
15481; RV32I-NEXT:    beq a1, s0, .LBB206_3
15482; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
15483; RV32I-NEXT:    # in Loop: Header=BB206_1 Depth=1
15484; RV32I-NEXT:    slt a0, s0, a1
15485; RV32I-NEXT:    j .LBB206_4
15486; RV32I-NEXT:  .LBB206_3: # in Loop: Header=BB206_1 Depth=1
15487; RV32I-NEXT:    sltu a0, s2, a2
15488; RV32I-NEXT:  .LBB206_4: # %atomicrmw.start
15489; RV32I-NEXT:    # in Loop: Header=BB206_1 Depth=1
15490; RV32I-NEXT:    xori a0, a0, 1
15491; RV32I-NEXT:    sw a2, 0(sp)
15492; RV32I-NEXT:    mv a3, a1
15493; RV32I-NEXT:    bnez a0, .LBB206_6
15494; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
15495; RV32I-NEXT:    # in Loop: Header=BB206_1 Depth=1
15496; RV32I-NEXT:    mv a2, s2
15497; RV32I-NEXT:    mv a3, s0
15498; RV32I-NEXT:  .LBB206_6: # %atomicrmw.start
15499; RV32I-NEXT:    # in Loop: Header=BB206_1 Depth=1
15500; RV32I-NEXT:    sw a1, 4(sp)
15501; RV32I-NEXT:    mv a0, s1
15502; RV32I-NEXT:    mv a1, s3
15503; RV32I-NEXT:    addi a4, zero, 2
15504; RV32I-NEXT:    addi a5, zero, 2
15505; RV32I-NEXT:    call __atomic_compare_exchange_8
15506; RV32I-NEXT:    lw a1, 4(sp)
15507; RV32I-NEXT:    lw a2, 0(sp)
15508; RV32I-NEXT:    beqz a0, .LBB206_1
15509; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
15510; RV32I-NEXT:    mv a0, a2
15511; RV32I-NEXT:    lw s3, 12(sp)
15512; RV32I-NEXT:    lw s2, 16(sp)
15513; RV32I-NEXT:    lw s1, 20(sp)
15514; RV32I-NEXT:    lw s0, 24(sp)
15515; RV32I-NEXT:    lw ra, 28(sp)
15516; RV32I-NEXT:    addi sp, sp, 32
15517; RV32I-NEXT:    ret
15518;
15519; RV32IA-LABEL: atomicrmw_min_i64_acquire:
15520; RV32IA:       # %bb.0:
15521; RV32IA-NEXT:    addi sp, sp, -32
15522; RV32IA-NEXT:    sw ra, 28(sp)
15523; RV32IA-NEXT:    sw s0, 24(sp)
15524; RV32IA-NEXT:    sw s1, 20(sp)
15525; RV32IA-NEXT:    sw s2, 16(sp)
15526; RV32IA-NEXT:    sw s3, 12(sp)
15527; RV32IA-NEXT:    mv s0, a2
15528; RV32IA-NEXT:    mv s2, a1
15529; RV32IA-NEXT:    mv s1, a0
15530; RV32IA-NEXT:    lw a1, 4(a0)
15531; RV32IA-NEXT:    lw a2, 0(a0)
15532; RV32IA-NEXT:    mv s3, sp
15533; RV32IA-NEXT:  .LBB206_1: # %atomicrmw.start
15534; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
15535; RV32IA-NEXT:    beq a1, s0, .LBB206_3
15536; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
15537; RV32IA-NEXT:    # in Loop: Header=BB206_1 Depth=1
15538; RV32IA-NEXT:    slt a0, s0, a1
15539; RV32IA-NEXT:    j .LBB206_4
15540; RV32IA-NEXT:  .LBB206_3: # in Loop: Header=BB206_1 Depth=1
15541; RV32IA-NEXT:    sltu a0, s2, a2
15542; RV32IA-NEXT:  .LBB206_4: # %atomicrmw.start
15543; RV32IA-NEXT:    # in Loop: Header=BB206_1 Depth=1
15544; RV32IA-NEXT:    xori a0, a0, 1
15545; RV32IA-NEXT:    sw a2, 0(sp)
15546; RV32IA-NEXT:    mv a3, a1
15547; RV32IA-NEXT:    bnez a0, .LBB206_6
15548; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
15549; RV32IA-NEXT:    # in Loop: Header=BB206_1 Depth=1
15550; RV32IA-NEXT:    mv a2, s2
15551; RV32IA-NEXT:    mv a3, s0
15552; RV32IA-NEXT:  .LBB206_6: # %atomicrmw.start
15553; RV32IA-NEXT:    # in Loop: Header=BB206_1 Depth=1
15554; RV32IA-NEXT:    sw a1, 4(sp)
15555; RV32IA-NEXT:    mv a0, s1
15556; RV32IA-NEXT:    mv a1, s3
15557; RV32IA-NEXT:    addi a4, zero, 2
15558; RV32IA-NEXT:    addi a5, zero, 2
15559; RV32IA-NEXT:    call __atomic_compare_exchange_8
15560; RV32IA-NEXT:    lw a1, 4(sp)
15561; RV32IA-NEXT:    lw a2, 0(sp)
15562; RV32IA-NEXT:    beqz a0, .LBB206_1
15563; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
15564; RV32IA-NEXT:    mv a0, a2
15565; RV32IA-NEXT:    lw s3, 12(sp)
15566; RV32IA-NEXT:    lw s2, 16(sp)
15567; RV32IA-NEXT:    lw s1, 20(sp)
15568; RV32IA-NEXT:    lw s0, 24(sp)
15569; RV32IA-NEXT:    lw ra, 28(sp)
15570; RV32IA-NEXT:    addi sp, sp, 32
15571; RV32IA-NEXT:    ret
15572;
15573; RV64I-LABEL: atomicrmw_min_i64_acquire:
15574; RV64I:       # %bb.0:
15575; RV64I-NEXT:    addi sp, sp, -48
15576; RV64I-NEXT:    sd ra, 40(sp)
15577; RV64I-NEXT:    sd s0, 32(sp)
15578; RV64I-NEXT:    sd s1, 24(sp)
15579; RV64I-NEXT:    sd s2, 16(sp)
15580; RV64I-NEXT:    mv s0, a1
15581; RV64I-NEXT:    mv s1, a0
15582; RV64I-NEXT:    ld a2, 0(a0)
15583; RV64I-NEXT:    addi s2, sp, 8
15584; RV64I-NEXT:  .LBB206_1: # %atomicrmw.start
15585; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
15586; RV64I-NEXT:    sd a2, 8(sp)
15587; RV64I-NEXT:    bge s0, a2, .LBB206_3
15588; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
15589; RV64I-NEXT:    # in Loop: Header=BB206_1 Depth=1
15590; RV64I-NEXT:    mv a2, s0
15591; RV64I-NEXT:  .LBB206_3: # %atomicrmw.start
15592; RV64I-NEXT:    # in Loop: Header=BB206_1 Depth=1
15593; RV64I-NEXT:    mv a0, s1
15594; RV64I-NEXT:    mv a1, s2
15595; RV64I-NEXT:    addi a3, zero, 2
15596; RV64I-NEXT:    addi a4, zero, 2
15597; RV64I-NEXT:    call __atomic_compare_exchange_8
15598; RV64I-NEXT:    ld a2, 8(sp)
15599; RV64I-NEXT:    beqz a0, .LBB206_1
15600; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
15601; RV64I-NEXT:    mv a0, a2
15602; RV64I-NEXT:    ld s2, 16(sp)
15603; RV64I-NEXT:    ld s1, 24(sp)
15604; RV64I-NEXT:    ld s0, 32(sp)
15605; RV64I-NEXT:    ld ra, 40(sp)
15606; RV64I-NEXT:    addi sp, sp, 48
15607; RV64I-NEXT:    ret
15608;
15609; RV64IA-LABEL: atomicrmw_min_i64_acquire:
15610; RV64IA:       # %bb.0:
15611; RV64IA-NEXT:    amomin.d.aq a0, a1, (a0)
15612; RV64IA-NEXT:    ret
15613  %1 = atomicrmw min i64* %a, i64 %b acquire
15614  ret i64 %1
15615}
15616
15617define i64 @atomicrmw_min_i64_release(i64 *%a, i64 %b) nounwind {
15618; RV32I-LABEL: atomicrmw_min_i64_release:
15619; RV32I:       # %bb.0:
15620; RV32I-NEXT:    addi sp, sp, -32
15621; RV32I-NEXT:    sw ra, 28(sp)
15622; RV32I-NEXT:    sw s0, 24(sp)
15623; RV32I-NEXT:    sw s1, 20(sp)
15624; RV32I-NEXT:    sw s2, 16(sp)
15625; RV32I-NEXT:    sw s3, 12(sp)
15626; RV32I-NEXT:    mv s0, a2
15627; RV32I-NEXT:    mv s2, a1
15628; RV32I-NEXT:    mv s1, a0
15629; RV32I-NEXT:    lw a1, 4(a0)
15630; RV32I-NEXT:    lw a2, 0(a0)
15631; RV32I-NEXT:    mv s3, sp
15632; RV32I-NEXT:  .LBB207_1: # %atomicrmw.start
15633; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
15634; RV32I-NEXT:    beq a1, s0, .LBB207_3
15635; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
15636; RV32I-NEXT:    # in Loop: Header=BB207_1 Depth=1
15637; RV32I-NEXT:    slt a0, s0, a1
15638; RV32I-NEXT:    j .LBB207_4
15639; RV32I-NEXT:  .LBB207_3: # in Loop: Header=BB207_1 Depth=1
15640; RV32I-NEXT:    sltu a0, s2, a2
15641; RV32I-NEXT:  .LBB207_4: # %atomicrmw.start
15642; RV32I-NEXT:    # in Loop: Header=BB207_1 Depth=1
15643; RV32I-NEXT:    xori a0, a0, 1
15644; RV32I-NEXT:    sw a2, 0(sp)
15645; RV32I-NEXT:    mv a3, a1
15646; RV32I-NEXT:    bnez a0, .LBB207_6
15647; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
15648; RV32I-NEXT:    # in Loop: Header=BB207_1 Depth=1
15649; RV32I-NEXT:    mv a2, s2
15650; RV32I-NEXT:    mv a3, s0
15651; RV32I-NEXT:  .LBB207_6: # %atomicrmw.start
15652; RV32I-NEXT:    # in Loop: Header=BB207_1 Depth=1
15653; RV32I-NEXT:    sw a1, 4(sp)
15654; RV32I-NEXT:    mv a0, s1
15655; RV32I-NEXT:    mv a1, s3
15656; RV32I-NEXT:    addi a4, zero, 3
15657; RV32I-NEXT:    mv a5, zero
15658; RV32I-NEXT:    call __atomic_compare_exchange_8
15659; RV32I-NEXT:    lw a1, 4(sp)
15660; RV32I-NEXT:    lw a2, 0(sp)
15661; RV32I-NEXT:    beqz a0, .LBB207_1
15662; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
15663; RV32I-NEXT:    mv a0, a2
15664; RV32I-NEXT:    lw s3, 12(sp)
15665; RV32I-NEXT:    lw s2, 16(sp)
15666; RV32I-NEXT:    lw s1, 20(sp)
15667; RV32I-NEXT:    lw s0, 24(sp)
15668; RV32I-NEXT:    lw ra, 28(sp)
15669; RV32I-NEXT:    addi sp, sp, 32
15670; RV32I-NEXT:    ret
15671;
15672; RV32IA-LABEL: atomicrmw_min_i64_release:
15673; RV32IA:       # %bb.0:
15674; RV32IA-NEXT:    addi sp, sp, -32
15675; RV32IA-NEXT:    sw ra, 28(sp)
15676; RV32IA-NEXT:    sw s0, 24(sp)
15677; RV32IA-NEXT:    sw s1, 20(sp)
15678; RV32IA-NEXT:    sw s2, 16(sp)
15679; RV32IA-NEXT:    sw s3, 12(sp)
15680; RV32IA-NEXT:    mv s0, a2
15681; RV32IA-NEXT:    mv s2, a1
15682; RV32IA-NEXT:    mv s1, a0
15683; RV32IA-NEXT:    lw a1, 4(a0)
15684; RV32IA-NEXT:    lw a2, 0(a0)
15685; RV32IA-NEXT:    mv s3, sp
15686; RV32IA-NEXT:  .LBB207_1: # %atomicrmw.start
15687; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
15688; RV32IA-NEXT:    beq a1, s0, .LBB207_3
15689; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
15690; RV32IA-NEXT:    # in Loop: Header=BB207_1 Depth=1
15691; RV32IA-NEXT:    slt a0, s0, a1
15692; RV32IA-NEXT:    j .LBB207_4
15693; RV32IA-NEXT:  .LBB207_3: # in Loop: Header=BB207_1 Depth=1
15694; RV32IA-NEXT:    sltu a0, s2, a2
15695; RV32IA-NEXT:  .LBB207_4: # %atomicrmw.start
15696; RV32IA-NEXT:    # in Loop: Header=BB207_1 Depth=1
15697; RV32IA-NEXT:    xori a0, a0, 1
15698; RV32IA-NEXT:    sw a2, 0(sp)
15699; RV32IA-NEXT:    mv a3, a1
15700; RV32IA-NEXT:    bnez a0, .LBB207_6
15701; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
15702; RV32IA-NEXT:    # in Loop: Header=BB207_1 Depth=1
15703; RV32IA-NEXT:    mv a2, s2
15704; RV32IA-NEXT:    mv a3, s0
15705; RV32IA-NEXT:  .LBB207_6: # %atomicrmw.start
15706; RV32IA-NEXT:    # in Loop: Header=BB207_1 Depth=1
15707; RV32IA-NEXT:    sw a1, 4(sp)
15708; RV32IA-NEXT:    mv a0, s1
15709; RV32IA-NEXT:    mv a1, s3
15710; RV32IA-NEXT:    addi a4, zero, 3
15711; RV32IA-NEXT:    mv a5, zero
15712; RV32IA-NEXT:    call __atomic_compare_exchange_8
15713; RV32IA-NEXT:    lw a1, 4(sp)
15714; RV32IA-NEXT:    lw a2, 0(sp)
15715; RV32IA-NEXT:    beqz a0, .LBB207_1
15716; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
15717; RV32IA-NEXT:    mv a0, a2
15718; RV32IA-NEXT:    lw s3, 12(sp)
15719; RV32IA-NEXT:    lw s2, 16(sp)
15720; RV32IA-NEXT:    lw s1, 20(sp)
15721; RV32IA-NEXT:    lw s0, 24(sp)
15722; RV32IA-NEXT:    lw ra, 28(sp)
15723; RV32IA-NEXT:    addi sp, sp, 32
15724; RV32IA-NEXT:    ret
15725;
15726; RV64I-LABEL: atomicrmw_min_i64_release:
15727; RV64I:       # %bb.0:
15728; RV64I-NEXT:    addi sp, sp, -48
15729; RV64I-NEXT:    sd ra, 40(sp)
15730; RV64I-NEXT:    sd s0, 32(sp)
15731; RV64I-NEXT:    sd s1, 24(sp)
15732; RV64I-NEXT:    sd s2, 16(sp)
15733; RV64I-NEXT:    mv s0, a1
15734; RV64I-NEXT:    mv s1, a0
15735; RV64I-NEXT:    ld a2, 0(a0)
15736; RV64I-NEXT:    addi s2, sp, 8
15737; RV64I-NEXT:  .LBB207_1: # %atomicrmw.start
15738; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
15739; RV64I-NEXT:    sd a2, 8(sp)
15740; RV64I-NEXT:    bge s0, a2, .LBB207_3
15741; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
15742; RV64I-NEXT:    # in Loop: Header=BB207_1 Depth=1
15743; RV64I-NEXT:    mv a2, s0
15744; RV64I-NEXT:  .LBB207_3: # %atomicrmw.start
15745; RV64I-NEXT:    # in Loop: Header=BB207_1 Depth=1
15746; RV64I-NEXT:    mv a0, s1
15747; RV64I-NEXT:    mv a1, s2
15748; RV64I-NEXT:    addi a3, zero, 3
15749; RV64I-NEXT:    mv a4, zero
15750; RV64I-NEXT:    call __atomic_compare_exchange_8
15751; RV64I-NEXT:    ld a2, 8(sp)
15752; RV64I-NEXT:    beqz a0, .LBB207_1
15753; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
15754; RV64I-NEXT:    mv a0, a2
15755; RV64I-NEXT:    ld s2, 16(sp)
15756; RV64I-NEXT:    ld s1, 24(sp)
15757; RV64I-NEXT:    ld s0, 32(sp)
15758; RV64I-NEXT:    ld ra, 40(sp)
15759; RV64I-NEXT:    addi sp, sp, 48
15760; RV64I-NEXT:    ret
15761;
15762; RV64IA-LABEL: atomicrmw_min_i64_release:
15763; RV64IA:       # %bb.0:
15764; RV64IA-NEXT:    amomin.d.rl a0, a1, (a0)
15765; RV64IA-NEXT:    ret
15766  %1 = atomicrmw min i64* %a, i64 %b release
15767  ret i64 %1
15768}
15769
15770define i64 @atomicrmw_min_i64_acq_rel(i64 *%a, i64 %b) nounwind {
15771; RV32I-LABEL: atomicrmw_min_i64_acq_rel:
15772; RV32I:       # %bb.0:
15773; RV32I-NEXT:    addi sp, sp, -32
15774; RV32I-NEXT:    sw ra, 28(sp)
15775; RV32I-NEXT:    sw s0, 24(sp)
15776; RV32I-NEXT:    sw s1, 20(sp)
15777; RV32I-NEXT:    sw s2, 16(sp)
15778; RV32I-NEXT:    sw s3, 12(sp)
15779; RV32I-NEXT:    mv s0, a2
15780; RV32I-NEXT:    mv s2, a1
15781; RV32I-NEXT:    mv s1, a0
15782; RV32I-NEXT:    lw a1, 4(a0)
15783; RV32I-NEXT:    lw a2, 0(a0)
15784; RV32I-NEXT:    mv s3, sp
15785; RV32I-NEXT:  .LBB208_1: # %atomicrmw.start
15786; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
15787; RV32I-NEXT:    beq a1, s0, .LBB208_3
15788; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
15789; RV32I-NEXT:    # in Loop: Header=BB208_1 Depth=1
15790; RV32I-NEXT:    slt a0, s0, a1
15791; RV32I-NEXT:    j .LBB208_4
15792; RV32I-NEXT:  .LBB208_3: # in Loop: Header=BB208_1 Depth=1
15793; RV32I-NEXT:    sltu a0, s2, a2
15794; RV32I-NEXT:  .LBB208_4: # %atomicrmw.start
15795; RV32I-NEXT:    # in Loop: Header=BB208_1 Depth=1
15796; RV32I-NEXT:    xori a0, a0, 1
15797; RV32I-NEXT:    sw a2, 0(sp)
15798; RV32I-NEXT:    mv a3, a1
15799; RV32I-NEXT:    bnez a0, .LBB208_6
15800; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
15801; RV32I-NEXT:    # in Loop: Header=BB208_1 Depth=1
15802; RV32I-NEXT:    mv a2, s2
15803; RV32I-NEXT:    mv a3, s0
15804; RV32I-NEXT:  .LBB208_6: # %atomicrmw.start
15805; RV32I-NEXT:    # in Loop: Header=BB208_1 Depth=1
15806; RV32I-NEXT:    sw a1, 4(sp)
15807; RV32I-NEXT:    mv a0, s1
15808; RV32I-NEXT:    mv a1, s3
15809; RV32I-NEXT:    addi a4, zero, 4
15810; RV32I-NEXT:    addi a5, zero, 2
15811; RV32I-NEXT:    call __atomic_compare_exchange_8
15812; RV32I-NEXT:    lw a1, 4(sp)
15813; RV32I-NEXT:    lw a2, 0(sp)
15814; RV32I-NEXT:    beqz a0, .LBB208_1
15815; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
15816; RV32I-NEXT:    mv a0, a2
15817; RV32I-NEXT:    lw s3, 12(sp)
15818; RV32I-NEXT:    lw s2, 16(sp)
15819; RV32I-NEXT:    lw s1, 20(sp)
15820; RV32I-NEXT:    lw s0, 24(sp)
15821; RV32I-NEXT:    lw ra, 28(sp)
15822; RV32I-NEXT:    addi sp, sp, 32
15823; RV32I-NEXT:    ret
15824;
15825; RV32IA-LABEL: atomicrmw_min_i64_acq_rel:
15826; RV32IA:       # %bb.0:
15827; RV32IA-NEXT:    addi sp, sp, -32
15828; RV32IA-NEXT:    sw ra, 28(sp)
15829; RV32IA-NEXT:    sw s0, 24(sp)
15830; RV32IA-NEXT:    sw s1, 20(sp)
15831; RV32IA-NEXT:    sw s2, 16(sp)
15832; RV32IA-NEXT:    sw s3, 12(sp)
15833; RV32IA-NEXT:    mv s0, a2
15834; RV32IA-NEXT:    mv s2, a1
15835; RV32IA-NEXT:    mv s1, a0
15836; RV32IA-NEXT:    lw a1, 4(a0)
15837; RV32IA-NEXT:    lw a2, 0(a0)
15838; RV32IA-NEXT:    mv s3, sp
15839; RV32IA-NEXT:  .LBB208_1: # %atomicrmw.start
15840; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
15841; RV32IA-NEXT:    beq a1, s0, .LBB208_3
15842; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
15843; RV32IA-NEXT:    # in Loop: Header=BB208_1 Depth=1
15844; RV32IA-NEXT:    slt a0, s0, a1
15845; RV32IA-NEXT:    j .LBB208_4
15846; RV32IA-NEXT:  .LBB208_3: # in Loop: Header=BB208_1 Depth=1
15847; RV32IA-NEXT:    sltu a0, s2, a2
15848; RV32IA-NEXT:  .LBB208_4: # %atomicrmw.start
15849; RV32IA-NEXT:    # in Loop: Header=BB208_1 Depth=1
15850; RV32IA-NEXT:    xori a0, a0, 1
15851; RV32IA-NEXT:    sw a2, 0(sp)
15852; RV32IA-NEXT:    mv a3, a1
15853; RV32IA-NEXT:    bnez a0, .LBB208_6
15854; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
15855; RV32IA-NEXT:    # in Loop: Header=BB208_1 Depth=1
15856; RV32IA-NEXT:    mv a2, s2
15857; RV32IA-NEXT:    mv a3, s0
15858; RV32IA-NEXT:  .LBB208_6: # %atomicrmw.start
15859; RV32IA-NEXT:    # in Loop: Header=BB208_1 Depth=1
15860; RV32IA-NEXT:    sw a1, 4(sp)
15861; RV32IA-NEXT:    mv a0, s1
15862; RV32IA-NEXT:    mv a1, s3
15863; RV32IA-NEXT:    addi a4, zero, 4
15864; RV32IA-NEXT:    addi a5, zero, 2
15865; RV32IA-NEXT:    call __atomic_compare_exchange_8
15866; RV32IA-NEXT:    lw a1, 4(sp)
15867; RV32IA-NEXT:    lw a2, 0(sp)
15868; RV32IA-NEXT:    beqz a0, .LBB208_1
15869; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
15870; RV32IA-NEXT:    mv a0, a2
15871; RV32IA-NEXT:    lw s3, 12(sp)
15872; RV32IA-NEXT:    lw s2, 16(sp)
15873; RV32IA-NEXT:    lw s1, 20(sp)
15874; RV32IA-NEXT:    lw s0, 24(sp)
15875; RV32IA-NEXT:    lw ra, 28(sp)
15876; RV32IA-NEXT:    addi sp, sp, 32
15877; RV32IA-NEXT:    ret
15878;
15879; RV64I-LABEL: atomicrmw_min_i64_acq_rel:
15880; RV64I:       # %bb.0:
15881; RV64I-NEXT:    addi sp, sp, -48
15882; RV64I-NEXT:    sd ra, 40(sp)
15883; RV64I-NEXT:    sd s0, 32(sp)
15884; RV64I-NEXT:    sd s1, 24(sp)
15885; RV64I-NEXT:    sd s2, 16(sp)
15886; RV64I-NEXT:    mv s0, a1
15887; RV64I-NEXT:    mv s1, a0
15888; RV64I-NEXT:    ld a2, 0(a0)
15889; RV64I-NEXT:    addi s2, sp, 8
15890; RV64I-NEXT:  .LBB208_1: # %atomicrmw.start
15891; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
15892; RV64I-NEXT:    sd a2, 8(sp)
15893; RV64I-NEXT:    bge s0, a2, .LBB208_3
15894; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
15895; RV64I-NEXT:    # in Loop: Header=BB208_1 Depth=1
15896; RV64I-NEXT:    mv a2, s0
15897; RV64I-NEXT:  .LBB208_3: # %atomicrmw.start
15898; RV64I-NEXT:    # in Loop: Header=BB208_1 Depth=1
15899; RV64I-NEXT:    mv a0, s1
15900; RV64I-NEXT:    mv a1, s2
15901; RV64I-NEXT:    addi a3, zero, 4
15902; RV64I-NEXT:    addi a4, zero, 2
15903; RV64I-NEXT:    call __atomic_compare_exchange_8
15904; RV64I-NEXT:    ld a2, 8(sp)
15905; RV64I-NEXT:    beqz a0, .LBB208_1
15906; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
15907; RV64I-NEXT:    mv a0, a2
15908; RV64I-NEXT:    ld s2, 16(sp)
15909; RV64I-NEXT:    ld s1, 24(sp)
15910; RV64I-NEXT:    ld s0, 32(sp)
15911; RV64I-NEXT:    ld ra, 40(sp)
15912; RV64I-NEXT:    addi sp, sp, 48
15913; RV64I-NEXT:    ret
15914;
15915; RV64IA-LABEL: atomicrmw_min_i64_acq_rel:
15916; RV64IA:       # %bb.0:
15917; RV64IA-NEXT:    amomin.d.aqrl a0, a1, (a0)
15918; RV64IA-NEXT:    ret
15919  %1 = atomicrmw min i64* %a, i64 %b acq_rel
15920  ret i64 %1
15921}
15922
15923define i64 @atomicrmw_min_i64_seq_cst(i64 *%a, i64 %b) nounwind {
15924; RV32I-LABEL: atomicrmw_min_i64_seq_cst:
15925; RV32I:       # %bb.0:
15926; RV32I-NEXT:    addi sp, sp, -32
15927; RV32I-NEXT:    sw ra, 28(sp)
15928; RV32I-NEXT:    sw s0, 24(sp)
15929; RV32I-NEXT:    sw s1, 20(sp)
15930; RV32I-NEXT:    sw s2, 16(sp)
15931; RV32I-NEXT:    sw s3, 12(sp)
15932; RV32I-NEXT:    mv s0, a2
15933; RV32I-NEXT:    mv s2, a1
15934; RV32I-NEXT:    mv s1, a0
15935; RV32I-NEXT:    lw a1, 4(a0)
15936; RV32I-NEXT:    lw a2, 0(a0)
15937; RV32I-NEXT:    mv s3, sp
15938; RV32I-NEXT:  .LBB209_1: # %atomicrmw.start
15939; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
15940; RV32I-NEXT:    beq a1, s0, .LBB209_3
15941; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
15942; RV32I-NEXT:    # in Loop: Header=BB209_1 Depth=1
15943; RV32I-NEXT:    slt a0, s0, a1
15944; RV32I-NEXT:    j .LBB209_4
15945; RV32I-NEXT:  .LBB209_3: # in Loop: Header=BB209_1 Depth=1
15946; RV32I-NEXT:    sltu a0, s2, a2
15947; RV32I-NEXT:  .LBB209_4: # %atomicrmw.start
15948; RV32I-NEXT:    # in Loop: Header=BB209_1 Depth=1
15949; RV32I-NEXT:    xori a0, a0, 1
15950; RV32I-NEXT:    sw a2, 0(sp)
15951; RV32I-NEXT:    mv a3, a1
15952; RV32I-NEXT:    bnez a0, .LBB209_6
15953; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
15954; RV32I-NEXT:    # in Loop: Header=BB209_1 Depth=1
15955; RV32I-NEXT:    mv a2, s2
15956; RV32I-NEXT:    mv a3, s0
15957; RV32I-NEXT:  .LBB209_6: # %atomicrmw.start
15958; RV32I-NEXT:    # in Loop: Header=BB209_1 Depth=1
15959; RV32I-NEXT:    sw a1, 4(sp)
15960; RV32I-NEXT:    mv a0, s1
15961; RV32I-NEXT:    mv a1, s3
15962; RV32I-NEXT:    addi a4, zero, 5
15963; RV32I-NEXT:    addi a5, zero, 5
15964; RV32I-NEXT:    call __atomic_compare_exchange_8
15965; RV32I-NEXT:    lw a1, 4(sp)
15966; RV32I-NEXT:    lw a2, 0(sp)
15967; RV32I-NEXT:    beqz a0, .LBB209_1
15968; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
15969; RV32I-NEXT:    mv a0, a2
15970; RV32I-NEXT:    lw s3, 12(sp)
15971; RV32I-NEXT:    lw s2, 16(sp)
15972; RV32I-NEXT:    lw s1, 20(sp)
15973; RV32I-NEXT:    lw s0, 24(sp)
15974; RV32I-NEXT:    lw ra, 28(sp)
15975; RV32I-NEXT:    addi sp, sp, 32
15976; RV32I-NEXT:    ret
15977;
15978; RV32IA-LABEL: atomicrmw_min_i64_seq_cst:
15979; RV32IA:       # %bb.0:
15980; RV32IA-NEXT:    addi sp, sp, -32
15981; RV32IA-NEXT:    sw ra, 28(sp)
15982; RV32IA-NEXT:    sw s0, 24(sp)
15983; RV32IA-NEXT:    sw s1, 20(sp)
15984; RV32IA-NEXT:    sw s2, 16(sp)
15985; RV32IA-NEXT:    sw s3, 12(sp)
15986; RV32IA-NEXT:    mv s0, a2
15987; RV32IA-NEXT:    mv s2, a1
15988; RV32IA-NEXT:    mv s1, a0
15989; RV32IA-NEXT:    lw a1, 4(a0)
15990; RV32IA-NEXT:    lw a2, 0(a0)
15991; RV32IA-NEXT:    mv s3, sp
15992; RV32IA-NEXT:  .LBB209_1: # %atomicrmw.start
15993; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
15994; RV32IA-NEXT:    beq a1, s0, .LBB209_3
15995; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
15996; RV32IA-NEXT:    # in Loop: Header=BB209_1 Depth=1
15997; RV32IA-NEXT:    slt a0, s0, a1
15998; RV32IA-NEXT:    j .LBB209_4
15999; RV32IA-NEXT:  .LBB209_3: # in Loop: Header=BB209_1 Depth=1
16000; RV32IA-NEXT:    sltu a0, s2, a2
16001; RV32IA-NEXT:  .LBB209_4: # %atomicrmw.start
16002; RV32IA-NEXT:    # in Loop: Header=BB209_1 Depth=1
16003; RV32IA-NEXT:    xori a0, a0, 1
16004; RV32IA-NEXT:    sw a2, 0(sp)
16005; RV32IA-NEXT:    mv a3, a1
16006; RV32IA-NEXT:    bnez a0, .LBB209_6
16007; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
16008; RV32IA-NEXT:    # in Loop: Header=BB209_1 Depth=1
16009; RV32IA-NEXT:    mv a2, s2
16010; RV32IA-NEXT:    mv a3, s0
16011; RV32IA-NEXT:  .LBB209_6: # %atomicrmw.start
16012; RV32IA-NEXT:    # in Loop: Header=BB209_1 Depth=1
16013; RV32IA-NEXT:    sw a1, 4(sp)
16014; RV32IA-NEXT:    mv a0, s1
16015; RV32IA-NEXT:    mv a1, s3
16016; RV32IA-NEXT:    addi a4, zero, 5
16017; RV32IA-NEXT:    addi a5, zero, 5
16018; RV32IA-NEXT:    call __atomic_compare_exchange_8
16019; RV32IA-NEXT:    lw a1, 4(sp)
16020; RV32IA-NEXT:    lw a2, 0(sp)
16021; RV32IA-NEXT:    beqz a0, .LBB209_1
16022; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
16023; RV32IA-NEXT:    mv a0, a2
16024; RV32IA-NEXT:    lw s3, 12(sp)
16025; RV32IA-NEXT:    lw s2, 16(sp)
16026; RV32IA-NEXT:    lw s1, 20(sp)
16027; RV32IA-NEXT:    lw s0, 24(sp)
16028; RV32IA-NEXT:    lw ra, 28(sp)
16029; RV32IA-NEXT:    addi sp, sp, 32
16030; RV32IA-NEXT:    ret
16031;
16032; RV64I-LABEL: atomicrmw_min_i64_seq_cst:
16033; RV64I:       # %bb.0:
16034; RV64I-NEXT:    addi sp, sp, -48
16035; RV64I-NEXT:    sd ra, 40(sp)
16036; RV64I-NEXT:    sd s0, 32(sp)
16037; RV64I-NEXT:    sd s1, 24(sp)
16038; RV64I-NEXT:    sd s2, 16(sp)
16039; RV64I-NEXT:    mv s0, a1
16040; RV64I-NEXT:    mv s1, a0
16041; RV64I-NEXT:    ld a2, 0(a0)
16042; RV64I-NEXT:    addi s2, sp, 8
16043; RV64I-NEXT:  .LBB209_1: # %atomicrmw.start
16044; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
16045; RV64I-NEXT:    sd a2, 8(sp)
16046; RV64I-NEXT:    bge s0, a2, .LBB209_3
16047; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
16048; RV64I-NEXT:    # in Loop: Header=BB209_1 Depth=1
16049; RV64I-NEXT:    mv a2, s0
16050; RV64I-NEXT:  .LBB209_3: # %atomicrmw.start
16051; RV64I-NEXT:    # in Loop: Header=BB209_1 Depth=1
16052; RV64I-NEXT:    mv a0, s1
16053; RV64I-NEXT:    mv a1, s2
16054; RV64I-NEXT:    addi a3, zero, 5
16055; RV64I-NEXT:    addi a4, zero, 5
16056; RV64I-NEXT:    call __atomic_compare_exchange_8
16057; RV64I-NEXT:    ld a2, 8(sp)
16058; RV64I-NEXT:    beqz a0, .LBB209_1
16059; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
16060; RV64I-NEXT:    mv a0, a2
16061; RV64I-NEXT:    ld s2, 16(sp)
16062; RV64I-NEXT:    ld s1, 24(sp)
16063; RV64I-NEXT:    ld s0, 32(sp)
16064; RV64I-NEXT:    ld ra, 40(sp)
16065; RV64I-NEXT:    addi sp, sp, 48
16066; RV64I-NEXT:    ret
16067;
16068; RV64IA-LABEL: atomicrmw_min_i64_seq_cst:
16069; RV64IA:       # %bb.0:
16070; RV64IA-NEXT:    amomin.d.aqrl a0, a1, (a0)
16071; RV64IA-NEXT:    ret
16072  %1 = atomicrmw min i64* %a, i64 %b seq_cst
16073  ret i64 %1
16074}
16075
16076define i64 @atomicrmw_umax_i64_monotonic(i64 *%a, i64 %b) nounwind {
16077; RV32I-LABEL: atomicrmw_umax_i64_monotonic:
16078; RV32I:       # %bb.0:
16079; RV32I-NEXT:    addi sp, sp, -32
16080; RV32I-NEXT:    sw ra, 28(sp)
16081; RV32I-NEXT:    sw s0, 24(sp)
16082; RV32I-NEXT:    sw s1, 20(sp)
16083; RV32I-NEXT:    sw s2, 16(sp)
16084; RV32I-NEXT:    sw s3, 12(sp)
16085; RV32I-NEXT:    mv s0, a2
16086; RV32I-NEXT:    mv s2, a1
16087; RV32I-NEXT:    mv s1, a0
16088; RV32I-NEXT:    lw a1, 4(a0)
16089; RV32I-NEXT:    lw a2, 0(a0)
16090; RV32I-NEXT:    mv s3, sp
16091; RV32I-NEXT:  .LBB210_1: # %atomicrmw.start
16092; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
16093; RV32I-NEXT:    beq a1, s0, .LBB210_3
16094; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
16095; RV32I-NEXT:    # in Loop: Header=BB210_1 Depth=1
16096; RV32I-NEXT:    sltu a0, s0, a1
16097; RV32I-NEXT:    j .LBB210_4
16098; RV32I-NEXT:  .LBB210_3: # in Loop: Header=BB210_1 Depth=1
16099; RV32I-NEXT:    sltu a0, s2, a2
16100; RV32I-NEXT:  .LBB210_4: # %atomicrmw.start
16101; RV32I-NEXT:    # in Loop: Header=BB210_1 Depth=1
16102; RV32I-NEXT:    sw a2, 0(sp)
16103; RV32I-NEXT:    mv a3, a1
16104; RV32I-NEXT:    bnez a0, .LBB210_6
16105; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
16106; RV32I-NEXT:    # in Loop: Header=BB210_1 Depth=1
16107; RV32I-NEXT:    mv a2, s2
16108; RV32I-NEXT:    mv a3, s0
16109; RV32I-NEXT:  .LBB210_6: # %atomicrmw.start
16110; RV32I-NEXT:    # in Loop: Header=BB210_1 Depth=1
16111; RV32I-NEXT:    sw a1, 4(sp)
16112; RV32I-NEXT:    mv a0, s1
16113; RV32I-NEXT:    mv a1, s3
16114; RV32I-NEXT:    mv a4, zero
16115; RV32I-NEXT:    mv a5, zero
16116; RV32I-NEXT:    call __atomic_compare_exchange_8
16117; RV32I-NEXT:    lw a1, 4(sp)
16118; RV32I-NEXT:    lw a2, 0(sp)
16119; RV32I-NEXT:    beqz a0, .LBB210_1
16120; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
16121; RV32I-NEXT:    mv a0, a2
16122; RV32I-NEXT:    lw s3, 12(sp)
16123; RV32I-NEXT:    lw s2, 16(sp)
16124; RV32I-NEXT:    lw s1, 20(sp)
16125; RV32I-NEXT:    lw s0, 24(sp)
16126; RV32I-NEXT:    lw ra, 28(sp)
16127; RV32I-NEXT:    addi sp, sp, 32
16128; RV32I-NEXT:    ret
16129;
16130; RV32IA-LABEL: atomicrmw_umax_i64_monotonic:
16131; RV32IA:       # %bb.0:
16132; RV32IA-NEXT:    addi sp, sp, -32
16133; RV32IA-NEXT:    sw ra, 28(sp)
16134; RV32IA-NEXT:    sw s0, 24(sp)
16135; RV32IA-NEXT:    sw s1, 20(sp)
16136; RV32IA-NEXT:    sw s2, 16(sp)
16137; RV32IA-NEXT:    sw s3, 12(sp)
16138; RV32IA-NEXT:    mv s0, a2
16139; RV32IA-NEXT:    mv s2, a1
16140; RV32IA-NEXT:    mv s1, a0
16141; RV32IA-NEXT:    lw a1, 4(a0)
16142; RV32IA-NEXT:    lw a2, 0(a0)
16143; RV32IA-NEXT:    mv s3, sp
16144; RV32IA-NEXT:  .LBB210_1: # %atomicrmw.start
16145; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
16146; RV32IA-NEXT:    beq a1, s0, .LBB210_3
16147; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
16148; RV32IA-NEXT:    # in Loop: Header=BB210_1 Depth=1
16149; RV32IA-NEXT:    sltu a0, s0, a1
16150; RV32IA-NEXT:    j .LBB210_4
16151; RV32IA-NEXT:  .LBB210_3: # in Loop: Header=BB210_1 Depth=1
16152; RV32IA-NEXT:    sltu a0, s2, a2
16153; RV32IA-NEXT:  .LBB210_4: # %atomicrmw.start
16154; RV32IA-NEXT:    # in Loop: Header=BB210_1 Depth=1
16155; RV32IA-NEXT:    sw a2, 0(sp)
16156; RV32IA-NEXT:    mv a3, a1
16157; RV32IA-NEXT:    bnez a0, .LBB210_6
16158; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
16159; RV32IA-NEXT:    # in Loop: Header=BB210_1 Depth=1
16160; RV32IA-NEXT:    mv a2, s2
16161; RV32IA-NEXT:    mv a3, s0
16162; RV32IA-NEXT:  .LBB210_6: # %atomicrmw.start
16163; RV32IA-NEXT:    # in Loop: Header=BB210_1 Depth=1
16164; RV32IA-NEXT:    sw a1, 4(sp)
16165; RV32IA-NEXT:    mv a0, s1
16166; RV32IA-NEXT:    mv a1, s3
16167; RV32IA-NEXT:    mv a4, zero
16168; RV32IA-NEXT:    mv a5, zero
16169; RV32IA-NEXT:    call __atomic_compare_exchange_8
16170; RV32IA-NEXT:    lw a1, 4(sp)
16171; RV32IA-NEXT:    lw a2, 0(sp)
16172; RV32IA-NEXT:    beqz a0, .LBB210_1
16173; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
16174; RV32IA-NEXT:    mv a0, a2
16175; RV32IA-NEXT:    lw s3, 12(sp)
16176; RV32IA-NEXT:    lw s2, 16(sp)
16177; RV32IA-NEXT:    lw s1, 20(sp)
16178; RV32IA-NEXT:    lw s0, 24(sp)
16179; RV32IA-NEXT:    lw ra, 28(sp)
16180; RV32IA-NEXT:    addi sp, sp, 32
16181; RV32IA-NEXT:    ret
16182;
16183; RV64I-LABEL: atomicrmw_umax_i64_monotonic:
16184; RV64I:       # %bb.0:
16185; RV64I-NEXT:    addi sp, sp, -48
16186; RV64I-NEXT:    sd ra, 40(sp)
16187; RV64I-NEXT:    sd s0, 32(sp)
16188; RV64I-NEXT:    sd s1, 24(sp)
16189; RV64I-NEXT:    sd s2, 16(sp)
16190; RV64I-NEXT:    mv s0, a1
16191; RV64I-NEXT:    mv s1, a0
16192; RV64I-NEXT:    ld a2, 0(a0)
16193; RV64I-NEXT:    addi s2, sp, 8
16194; RV64I-NEXT:  .LBB210_1: # %atomicrmw.start
16195; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
16196; RV64I-NEXT:    sd a2, 8(sp)
16197; RV64I-NEXT:    bltu s0, a2, .LBB210_3
16198; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
16199; RV64I-NEXT:    # in Loop: Header=BB210_1 Depth=1
16200; RV64I-NEXT:    mv a2, s0
16201; RV64I-NEXT:  .LBB210_3: # %atomicrmw.start
16202; RV64I-NEXT:    # in Loop: Header=BB210_1 Depth=1
16203; RV64I-NEXT:    mv a0, s1
16204; RV64I-NEXT:    mv a1, s2
16205; RV64I-NEXT:    mv a3, zero
16206; RV64I-NEXT:    mv a4, zero
16207; RV64I-NEXT:    call __atomic_compare_exchange_8
16208; RV64I-NEXT:    ld a2, 8(sp)
16209; RV64I-NEXT:    beqz a0, .LBB210_1
16210; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
16211; RV64I-NEXT:    mv a0, a2
16212; RV64I-NEXT:    ld s2, 16(sp)
16213; RV64I-NEXT:    ld s1, 24(sp)
16214; RV64I-NEXT:    ld s0, 32(sp)
16215; RV64I-NEXT:    ld ra, 40(sp)
16216; RV64I-NEXT:    addi sp, sp, 48
16217; RV64I-NEXT:    ret
16218;
16219; RV64IA-LABEL: atomicrmw_umax_i64_monotonic:
16220; RV64IA:       # %bb.0:
16221; RV64IA-NEXT:    amomaxu.d a0, a1, (a0)
16222; RV64IA-NEXT:    ret
16223  %1 = atomicrmw umax i64* %a, i64 %b monotonic
16224  ret i64 %1
16225}
16226
16227define i64 @atomicrmw_umax_i64_acquire(i64 *%a, i64 %b) nounwind {
16228; RV32I-LABEL: atomicrmw_umax_i64_acquire:
16229; RV32I:       # %bb.0:
16230; RV32I-NEXT:    addi sp, sp, -32
16231; RV32I-NEXT:    sw ra, 28(sp)
16232; RV32I-NEXT:    sw s0, 24(sp)
16233; RV32I-NEXT:    sw s1, 20(sp)
16234; RV32I-NEXT:    sw s2, 16(sp)
16235; RV32I-NEXT:    sw s3, 12(sp)
16236; RV32I-NEXT:    mv s0, a2
16237; RV32I-NEXT:    mv s2, a1
16238; RV32I-NEXT:    mv s1, a0
16239; RV32I-NEXT:    lw a1, 4(a0)
16240; RV32I-NEXT:    lw a2, 0(a0)
16241; RV32I-NEXT:    mv s3, sp
16242; RV32I-NEXT:  .LBB211_1: # %atomicrmw.start
16243; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
16244; RV32I-NEXT:    beq a1, s0, .LBB211_3
16245; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
16246; RV32I-NEXT:    # in Loop: Header=BB211_1 Depth=1
16247; RV32I-NEXT:    sltu a0, s0, a1
16248; RV32I-NEXT:    j .LBB211_4
16249; RV32I-NEXT:  .LBB211_3: # in Loop: Header=BB211_1 Depth=1
16250; RV32I-NEXT:    sltu a0, s2, a2
16251; RV32I-NEXT:  .LBB211_4: # %atomicrmw.start
16252; RV32I-NEXT:    # in Loop: Header=BB211_1 Depth=1
16253; RV32I-NEXT:    sw a2, 0(sp)
16254; RV32I-NEXT:    mv a3, a1
16255; RV32I-NEXT:    bnez a0, .LBB211_6
16256; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
16257; RV32I-NEXT:    # in Loop: Header=BB211_1 Depth=1
16258; RV32I-NEXT:    mv a2, s2
16259; RV32I-NEXT:    mv a3, s0
16260; RV32I-NEXT:  .LBB211_6: # %atomicrmw.start
16261; RV32I-NEXT:    # in Loop: Header=BB211_1 Depth=1
16262; RV32I-NEXT:    sw a1, 4(sp)
16263; RV32I-NEXT:    mv a0, s1
16264; RV32I-NEXT:    mv a1, s3
16265; RV32I-NEXT:    addi a4, zero, 2
16266; RV32I-NEXT:    addi a5, zero, 2
16267; RV32I-NEXT:    call __atomic_compare_exchange_8
16268; RV32I-NEXT:    lw a1, 4(sp)
16269; RV32I-NEXT:    lw a2, 0(sp)
16270; RV32I-NEXT:    beqz a0, .LBB211_1
16271; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
16272; RV32I-NEXT:    mv a0, a2
16273; RV32I-NEXT:    lw s3, 12(sp)
16274; RV32I-NEXT:    lw s2, 16(sp)
16275; RV32I-NEXT:    lw s1, 20(sp)
16276; RV32I-NEXT:    lw s0, 24(sp)
16277; RV32I-NEXT:    lw ra, 28(sp)
16278; RV32I-NEXT:    addi sp, sp, 32
16279; RV32I-NEXT:    ret
16280;
16281; RV32IA-LABEL: atomicrmw_umax_i64_acquire:
16282; RV32IA:       # %bb.0:
16283; RV32IA-NEXT:    addi sp, sp, -32
16284; RV32IA-NEXT:    sw ra, 28(sp)
16285; RV32IA-NEXT:    sw s0, 24(sp)
16286; RV32IA-NEXT:    sw s1, 20(sp)
16287; RV32IA-NEXT:    sw s2, 16(sp)
16288; RV32IA-NEXT:    sw s3, 12(sp)
16289; RV32IA-NEXT:    mv s0, a2
16290; RV32IA-NEXT:    mv s2, a1
16291; RV32IA-NEXT:    mv s1, a0
16292; RV32IA-NEXT:    lw a1, 4(a0)
16293; RV32IA-NEXT:    lw a2, 0(a0)
16294; RV32IA-NEXT:    mv s3, sp
16295; RV32IA-NEXT:  .LBB211_1: # %atomicrmw.start
16296; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
16297; RV32IA-NEXT:    beq a1, s0, .LBB211_3
16298; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
16299; RV32IA-NEXT:    # in Loop: Header=BB211_1 Depth=1
16300; RV32IA-NEXT:    sltu a0, s0, a1
16301; RV32IA-NEXT:    j .LBB211_4
16302; RV32IA-NEXT:  .LBB211_3: # in Loop: Header=BB211_1 Depth=1
16303; RV32IA-NEXT:    sltu a0, s2, a2
16304; RV32IA-NEXT:  .LBB211_4: # %atomicrmw.start
16305; RV32IA-NEXT:    # in Loop: Header=BB211_1 Depth=1
16306; RV32IA-NEXT:    sw a2, 0(sp)
16307; RV32IA-NEXT:    mv a3, a1
16308; RV32IA-NEXT:    bnez a0, .LBB211_6
16309; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
16310; RV32IA-NEXT:    # in Loop: Header=BB211_1 Depth=1
16311; RV32IA-NEXT:    mv a2, s2
16312; RV32IA-NEXT:    mv a3, s0
16313; RV32IA-NEXT:  .LBB211_6: # %atomicrmw.start
16314; RV32IA-NEXT:    # in Loop: Header=BB211_1 Depth=1
16315; RV32IA-NEXT:    sw a1, 4(sp)
16316; RV32IA-NEXT:    mv a0, s1
16317; RV32IA-NEXT:    mv a1, s3
16318; RV32IA-NEXT:    addi a4, zero, 2
16319; RV32IA-NEXT:    addi a5, zero, 2
16320; RV32IA-NEXT:    call __atomic_compare_exchange_8
16321; RV32IA-NEXT:    lw a1, 4(sp)
16322; RV32IA-NEXT:    lw a2, 0(sp)
16323; RV32IA-NEXT:    beqz a0, .LBB211_1
16324; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
16325; RV32IA-NEXT:    mv a0, a2
16326; RV32IA-NEXT:    lw s3, 12(sp)
16327; RV32IA-NEXT:    lw s2, 16(sp)
16328; RV32IA-NEXT:    lw s1, 20(sp)
16329; RV32IA-NEXT:    lw s0, 24(sp)
16330; RV32IA-NEXT:    lw ra, 28(sp)
16331; RV32IA-NEXT:    addi sp, sp, 32
16332; RV32IA-NEXT:    ret
16333;
16334; RV64I-LABEL: atomicrmw_umax_i64_acquire:
16335; RV64I:       # %bb.0:
16336; RV64I-NEXT:    addi sp, sp, -48
16337; RV64I-NEXT:    sd ra, 40(sp)
16338; RV64I-NEXT:    sd s0, 32(sp)
16339; RV64I-NEXT:    sd s1, 24(sp)
16340; RV64I-NEXT:    sd s2, 16(sp)
16341; RV64I-NEXT:    mv s0, a1
16342; RV64I-NEXT:    mv s1, a0
16343; RV64I-NEXT:    ld a2, 0(a0)
16344; RV64I-NEXT:    addi s2, sp, 8
16345; RV64I-NEXT:  .LBB211_1: # %atomicrmw.start
16346; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
16347; RV64I-NEXT:    sd a2, 8(sp)
16348; RV64I-NEXT:    bltu s0, a2, .LBB211_3
16349; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
16350; RV64I-NEXT:    # in Loop: Header=BB211_1 Depth=1
16351; RV64I-NEXT:    mv a2, s0
16352; RV64I-NEXT:  .LBB211_3: # %atomicrmw.start
16353; RV64I-NEXT:    # in Loop: Header=BB211_1 Depth=1
16354; RV64I-NEXT:    mv a0, s1
16355; RV64I-NEXT:    mv a1, s2
16356; RV64I-NEXT:    addi a3, zero, 2
16357; RV64I-NEXT:    addi a4, zero, 2
16358; RV64I-NEXT:    call __atomic_compare_exchange_8
16359; RV64I-NEXT:    ld a2, 8(sp)
16360; RV64I-NEXT:    beqz a0, .LBB211_1
16361; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
16362; RV64I-NEXT:    mv a0, a2
16363; RV64I-NEXT:    ld s2, 16(sp)
16364; RV64I-NEXT:    ld s1, 24(sp)
16365; RV64I-NEXT:    ld s0, 32(sp)
16366; RV64I-NEXT:    ld ra, 40(sp)
16367; RV64I-NEXT:    addi sp, sp, 48
16368; RV64I-NEXT:    ret
16369;
16370; RV64IA-LABEL: atomicrmw_umax_i64_acquire:
16371; RV64IA:       # %bb.0:
16372; RV64IA-NEXT:    amomaxu.d.aq a0, a1, (a0)
16373; RV64IA-NEXT:    ret
16374  %1 = atomicrmw umax i64* %a, i64 %b acquire
16375  ret i64 %1
16376}
16377
16378define i64 @atomicrmw_umax_i64_release(i64 *%a, i64 %b) nounwind {
16379; RV32I-LABEL: atomicrmw_umax_i64_release:
16380; RV32I:       # %bb.0:
16381; RV32I-NEXT:    addi sp, sp, -32
16382; RV32I-NEXT:    sw ra, 28(sp)
16383; RV32I-NEXT:    sw s0, 24(sp)
16384; RV32I-NEXT:    sw s1, 20(sp)
16385; RV32I-NEXT:    sw s2, 16(sp)
16386; RV32I-NEXT:    sw s3, 12(sp)
16387; RV32I-NEXT:    mv s0, a2
16388; RV32I-NEXT:    mv s2, a1
16389; RV32I-NEXT:    mv s1, a0
16390; RV32I-NEXT:    lw a1, 4(a0)
16391; RV32I-NEXT:    lw a2, 0(a0)
16392; RV32I-NEXT:    mv s3, sp
16393; RV32I-NEXT:  .LBB212_1: # %atomicrmw.start
16394; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
16395; RV32I-NEXT:    beq a1, s0, .LBB212_3
16396; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
16397; RV32I-NEXT:    # in Loop: Header=BB212_1 Depth=1
16398; RV32I-NEXT:    sltu a0, s0, a1
16399; RV32I-NEXT:    j .LBB212_4
16400; RV32I-NEXT:  .LBB212_3: # in Loop: Header=BB212_1 Depth=1
16401; RV32I-NEXT:    sltu a0, s2, a2
16402; RV32I-NEXT:  .LBB212_4: # %atomicrmw.start
16403; RV32I-NEXT:    # in Loop: Header=BB212_1 Depth=1
16404; RV32I-NEXT:    sw a2, 0(sp)
16405; RV32I-NEXT:    mv a3, a1
16406; RV32I-NEXT:    bnez a0, .LBB212_6
16407; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
16408; RV32I-NEXT:    # in Loop: Header=BB212_1 Depth=1
16409; RV32I-NEXT:    mv a2, s2
16410; RV32I-NEXT:    mv a3, s0
16411; RV32I-NEXT:  .LBB212_6: # %atomicrmw.start
16412; RV32I-NEXT:    # in Loop: Header=BB212_1 Depth=1
16413; RV32I-NEXT:    sw a1, 4(sp)
16414; RV32I-NEXT:    mv a0, s1
16415; RV32I-NEXT:    mv a1, s3
16416; RV32I-NEXT:    addi a4, zero, 3
16417; RV32I-NEXT:    mv a5, zero
16418; RV32I-NEXT:    call __atomic_compare_exchange_8
16419; RV32I-NEXT:    lw a1, 4(sp)
16420; RV32I-NEXT:    lw a2, 0(sp)
16421; RV32I-NEXT:    beqz a0, .LBB212_1
16422; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
16423; RV32I-NEXT:    mv a0, a2
16424; RV32I-NEXT:    lw s3, 12(sp)
16425; RV32I-NEXT:    lw s2, 16(sp)
16426; RV32I-NEXT:    lw s1, 20(sp)
16427; RV32I-NEXT:    lw s0, 24(sp)
16428; RV32I-NEXT:    lw ra, 28(sp)
16429; RV32I-NEXT:    addi sp, sp, 32
16430; RV32I-NEXT:    ret
16431;
16432; RV32IA-LABEL: atomicrmw_umax_i64_release:
16433; RV32IA:       # %bb.0:
16434; RV32IA-NEXT:    addi sp, sp, -32
16435; RV32IA-NEXT:    sw ra, 28(sp)
16436; RV32IA-NEXT:    sw s0, 24(sp)
16437; RV32IA-NEXT:    sw s1, 20(sp)
16438; RV32IA-NEXT:    sw s2, 16(sp)
16439; RV32IA-NEXT:    sw s3, 12(sp)
16440; RV32IA-NEXT:    mv s0, a2
16441; RV32IA-NEXT:    mv s2, a1
16442; RV32IA-NEXT:    mv s1, a0
16443; RV32IA-NEXT:    lw a1, 4(a0)
16444; RV32IA-NEXT:    lw a2, 0(a0)
16445; RV32IA-NEXT:    mv s3, sp
16446; RV32IA-NEXT:  .LBB212_1: # %atomicrmw.start
16447; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
16448; RV32IA-NEXT:    beq a1, s0, .LBB212_3
16449; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
16450; RV32IA-NEXT:    # in Loop: Header=BB212_1 Depth=1
16451; RV32IA-NEXT:    sltu a0, s0, a1
16452; RV32IA-NEXT:    j .LBB212_4
16453; RV32IA-NEXT:  .LBB212_3: # in Loop: Header=BB212_1 Depth=1
16454; RV32IA-NEXT:    sltu a0, s2, a2
16455; RV32IA-NEXT:  .LBB212_4: # %atomicrmw.start
16456; RV32IA-NEXT:    # in Loop: Header=BB212_1 Depth=1
16457; RV32IA-NEXT:    sw a2, 0(sp)
16458; RV32IA-NEXT:    mv a3, a1
16459; RV32IA-NEXT:    bnez a0, .LBB212_6
16460; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
16461; RV32IA-NEXT:    # in Loop: Header=BB212_1 Depth=1
16462; RV32IA-NEXT:    mv a2, s2
16463; RV32IA-NEXT:    mv a3, s0
16464; RV32IA-NEXT:  .LBB212_6: # %atomicrmw.start
16465; RV32IA-NEXT:    # in Loop: Header=BB212_1 Depth=1
16466; RV32IA-NEXT:    sw a1, 4(sp)
16467; RV32IA-NEXT:    mv a0, s1
16468; RV32IA-NEXT:    mv a1, s3
16469; RV32IA-NEXT:    addi a4, zero, 3
16470; RV32IA-NEXT:    mv a5, zero
16471; RV32IA-NEXT:    call __atomic_compare_exchange_8
16472; RV32IA-NEXT:    lw a1, 4(sp)
16473; RV32IA-NEXT:    lw a2, 0(sp)
16474; RV32IA-NEXT:    beqz a0, .LBB212_1
16475; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
16476; RV32IA-NEXT:    mv a0, a2
16477; RV32IA-NEXT:    lw s3, 12(sp)
16478; RV32IA-NEXT:    lw s2, 16(sp)
16479; RV32IA-NEXT:    lw s1, 20(sp)
16480; RV32IA-NEXT:    lw s0, 24(sp)
16481; RV32IA-NEXT:    lw ra, 28(sp)
16482; RV32IA-NEXT:    addi sp, sp, 32
16483; RV32IA-NEXT:    ret
16484;
16485; RV64I-LABEL: atomicrmw_umax_i64_release:
16486; RV64I:       # %bb.0:
16487; RV64I-NEXT:    addi sp, sp, -48
16488; RV64I-NEXT:    sd ra, 40(sp)
16489; RV64I-NEXT:    sd s0, 32(sp)
16490; RV64I-NEXT:    sd s1, 24(sp)
16491; RV64I-NEXT:    sd s2, 16(sp)
16492; RV64I-NEXT:    mv s0, a1
16493; RV64I-NEXT:    mv s1, a0
16494; RV64I-NEXT:    ld a2, 0(a0)
16495; RV64I-NEXT:    addi s2, sp, 8
16496; RV64I-NEXT:  .LBB212_1: # %atomicrmw.start
16497; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
16498; RV64I-NEXT:    sd a2, 8(sp)
16499; RV64I-NEXT:    bltu s0, a2, .LBB212_3
16500; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
16501; RV64I-NEXT:    # in Loop: Header=BB212_1 Depth=1
16502; RV64I-NEXT:    mv a2, s0
16503; RV64I-NEXT:  .LBB212_3: # %atomicrmw.start
16504; RV64I-NEXT:    # in Loop: Header=BB212_1 Depth=1
16505; RV64I-NEXT:    mv a0, s1
16506; RV64I-NEXT:    mv a1, s2
16507; RV64I-NEXT:    addi a3, zero, 3
16508; RV64I-NEXT:    mv a4, zero
16509; RV64I-NEXT:    call __atomic_compare_exchange_8
16510; RV64I-NEXT:    ld a2, 8(sp)
16511; RV64I-NEXT:    beqz a0, .LBB212_1
16512; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
16513; RV64I-NEXT:    mv a0, a2
16514; RV64I-NEXT:    ld s2, 16(sp)
16515; RV64I-NEXT:    ld s1, 24(sp)
16516; RV64I-NEXT:    ld s0, 32(sp)
16517; RV64I-NEXT:    ld ra, 40(sp)
16518; RV64I-NEXT:    addi sp, sp, 48
16519; RV64I-NEXT:    ret
16520;
16521; RV64IA-LABEL: atomicrmw_umax_i64_release:
16522; RV64IA:       # %bb.0:
16523; RV64IA-NEXT:    amomaxu.d.rl a0, a1, (a0)
16524; RV64IA-NEXT:    ret
16525  %1 = atomicrmw umax i64* %a, i64 %b release
16526  ret i64 %1
16527}
16528
16529define i64 @atomicrmw_umax_i64_acq_rel(i64 *%a, i64 %b) nounwind {
16530; RV32I-LABEL: atomicrmw_umax_i64_acq_rel:
16531; RV32I:       # %bb.0:
16532; RV32I-NEXT:    addi sp, sp, -32
16533; RV32I-NEXT:    sw ra, 28(sp)
16534; RV32I-NEXT:    sw s0, 24(sp)
16535; RV32I-NEXT:    sw s1, 20(sp)
16536; RV32I-NEXT:    sw s2, 16(sp)
16537; RV32I-NEXT:    sw s3, 12(sp)
16538; RV32I-NEXT:    mv s0, a2
16539; RV32I-NEXT:    mv s2, a1
16540; RV32I-NEXT:    mv s1, a0
16541; RV32I-NEXT:    lw a1, 4(a0)
16542; RV32I-NEXT:    lw a2, 0(a0)
16543; RV32I-NEXT:    mv s3, sp
16544; RV32I-NEXT:  .LBB213_1: # %atomicrmw.start
16545; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
16546; RV32I-NEXT:    beq a1, s0, .LBB213_3
16547; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
16548; RV32I-NEXT:    # in Loop: Header=BB213_1 Depth=1
16549; RV32I-NEXT:    sltu a0, s0, a1
16550; RV32I-NEXT:    j .LBB213_4
16551; RV32I-NEXT:  .LBB213_3: # in Loop: Header=BB213_1 Depth=1
16552; RV32I-NEXT:    sltu a0, s2, a2
16553; RV32I-NEXT:  .LBB213_4: # %atomicrmw.start
16554; RV32I-NEXT:    # in Loop: Header=BB213_1 Depth=1
16555; RV32I-NEXT:    sw a2, 0(sp)
16556; RV32I-NEXT:    mv a3, a1
16557; RV32I-NEXT:    bnez a0, .LBB213_6
16558; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
16559; RV32I-NEXT:    # in Loop: Header=BB213_1 Depth=1
16560; RV32I-NEXT:    mv a2, s2
16561; RV32I-NEXT:    mv a3, s0
16562; RV32I-NEXT:  .LBB213_6: # %atomicrmw.start
16563; RV32I-NEXT:    # in Loop: Header=BB213_1 Depth=1
16564; RV32I-NEXT:    sw a1, 4(sp)
16565; RV32I-NEXT:    mv a0, s1
16566; RV32I-NEXT:    mv a1, s3
16567; RV32I-NEXT:    addi a4, zero, 4
16568; RV32I-NEXT:    addi a5, zero, 2
16569; RV32I-NEXT:    call __atomic_compare_exchange_8
16570; RV32I-NEXT:    lw a1, 4(sp)
16571; RV32I-NEXT:    lw a2, 0(sp)
16572; RV32I-NEXT:    beqz a0, .LBB213_1
16573; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
16574; RV32I-NEXT:    mv a0, a2
16575; RV32I-NEXT:    lw s3, 12(sp)
16576; RV32I-NEXT:    lw s2, 16(sp)
16577; RV32I-NEXT:    lw s1, 20(sp)
16578; RV32I-NEXT:    lw s0, 24(sp)
16579; RV32I-NEXT:    lw ra, 28(sp)
16580; RV32I-NEXT:    addi sp, sp, 32
16581; RV32I-NEXT:    ret
16582;
16583; RV32IA-LABEL: atomicrmw_umax_i64_acq_rel:
16584; RV32IA:       # %bb.0:
16585; RV32IA-NEXT:    addi sp, sp, -32
16586; RV32IA-NEXT:    sw ra, 28(sp)
16587; RV32IA-NEXT:    sw s0, 24(sp)
16588; RV32IA-NEXT:    sw s1, 20(sp)
16589; RV32IA-NEXT:    sw s2, 16(sp)
16590; RV32IA-NEXT:    sw s3, 12(sp)
16591; RV32IA-NEXT:    mv s0, a2
16592; RV32IA-NEXT:    mv s2, a1
16593; RV32IA-NEXT:    mv s1, a0
16594; RV32IA-NEXT:    lw a1, 4(a0)
16595; RV32IA-NEXT:    lw a2, 0(a0)
16596; RV32IA-NEXT:    mv s3, sp
16597; RV32IA-NEXT:  .LBB213_1: # %atomicrmw.start
16598; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
16599; RV32IA-NEXT:    beq a1, s0, .LBB213_3
16600; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
16601; RV32IA-NEXT:    # in Loop: Header=BB213_1 Depth=1
16602; RV32IA-NEXT:    sltu a0, s0, a1
16603; RV32IA-NEXT:    j .LBB213_4
16604; RV32IA-NEXT:  .LBB213_3: # in Loop: Header=BB213_1 Depth=1
16605; RV32IA-NEXT:    sltu a0, s2, a2
16606; RV32IA-NEXT:  .LBB213_4: # %atomicrmw.start
16607; RV32IA-NEXT:    # in Loop: Header=BB213_1 Depth=1
16608; RV32IA-NEXT:    sw a2, 0(sp)
16609; RV32IA-NEXT:    mv a3, a1
16610; RV32IA-NEXT:    bnez a0, .LBB213_6
16611; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
16612; RV32IA-NEXT:    # in Loop: Header=BB213_1 Depth=1
16613; RV32IA-NEXT:    mv a2, s2
16614; RV32IA-NEXT:    mv a3, s0
16615; RV32IA-NEXT:  .LBB213_6: # %atomicrmw.start
16616; RV32IA-NEXT:    # in Loop: Header=BB213_1 Depth=1
16617; RV32IA-NEXT:    sw a1, 4(sp)
16618; RV32IA-NEXT:    mv a0, s1
16619; RV32IA-NEXT:    mv a1, s3
16620; RV32IA-NEXT:    addi a4, zero, 4
16621; RV32IA-NEXT:    addi a5, zero, 2
16622; RV32IA-NEXT:    call __atomic_compare_exchange_8
16623; RV32IA-NEXT:    lw a1, 4(sp)
16624; RV32IA-NEXT:    lw a2, 0(sp)
16625; RV32IA-NEXT:    beqz a0, .LBB213_1
16626; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
16627; RV32IA-NEXT:    mv a0, a2
16628; RV32IA-NEXT:    lw s3, 12(sp)
16629; RV32IA-NEXT:    lw s2, 16(sp)
16630; RV32IA-NEXT:    lw s1, 20(sp)
16631; RV32IA-NEXT:    lw s0, 24(sp)
16632; RV32IA-NEXT:    lw ra, 28(sp)
16633; RV32IA-NEXT:    addi sp, sp, 32
16634; RV32IA-NEXT:    ret
16635;
16636; RV64I-LABEL: atomicrmw_umax_i64_acq_rel:
16637; RV64I:       # %bb.0:
16638; RV64I-NEXT:    addi sp, sp, -48
16639; RV64I-NEXT:    sd ra, 40(sp)
16640; RV64I-NEXT:    sd s0, 32(sp)
16641; RV64I-NEXT:    sd s1, 24(sp)
16642; RV64I-NEXT:    sd s2, 16(sp)
16643; RV64I-NEXT:    mv s0, a1
16644; RV64I-NEXT:    mv s1, a0
16645; RV64I-NEXT:    ld a2, 0(a0)
16646; RV64I-NEXT:    addi s2, sp, 8
16647; RV64I-NEXT:  .LBB213_1: # %atomicrmw.start
16648; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
16649; RV64I-NEXT:    sd a2, 8(sp)
16650; RV64I-NEXT:    bltu s0, a2, .LBB213_3
16651; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
16652; RV64I-NEXT:    # in Loop: Header=BB213_1 Depth=1
16653; RV64I-NEXT:    mv a2, s0
16654; RV64I-NEXT:  .LBB213_3: # %atomicrmw.start
16655; RV64I-NEXT:    # in Loop: Header=BB213_1 Depth=1
16656; RV64I-NEXT:    mv a0, s1
16657; RV64I-NEXT:    mv a1, s2
16658; RV64I-NEXT:    addi a3, zero, 4
16659; RV64I-NEXT:    addi a4, zero, 2
16660; RV64I-NEXT:    call __atomic_compare_exchange_8
16661; RV64I-NEXT:    ld a2, 8(sp)
16662; RV64I-NEXT:    beqz a0, .LBB213_1
16663; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
16664; RV64I-NEXT:    mv a0, a2
16665; RV64I-NEXT:    ld s2, 16(sp)
16666; RV64I-NEXT:    ld s1, 24(sp)
16667; RV64I-NEXT:    ld s0, 32(sp)
16668; RV64I-NEXT:    ld ra, 40(sp)
16669; RV64I-NEXT:    addi sp, sp, 48
16670; RV64I-NEXT:    ret
16671;
16672; RV64IA-LABEL: atomicrmw_umax_i64_acq_rel:
16673; RV64IA:       # %bb.0:
16674; RV64IA-NEXT:    amomaxu.d.aqrl a0, a1, (a0)
16675; RV64IA-NEXT:    ret
16676  %1 = atomicrmw umax i64* %a, i64 %b acq_rel
16677  ret i64 %1
16678}
16679
16680define i64 @atomicrmw_umax_i64_seq_cst(i64 *%a, i64 %b) nounwind {
16681; RV32I-LABEL: atomicrmw_umax_i64_seq_cst:
16682; RV32I:       # %bb.0:
16683; RV32I-NEXT:    addi sp, sp, -32
16684; RV32I-NEXT:    sw ra, 28(sp)
16685; RV32I-NEXT:    sw s0, 24(sp)
16686; RV32I-NEXT:    sw s1, 20(sp)
16687; RV32I-NEXT:    sw s2, 16(sp)
16688; RV32I-NEXT:    sw s3, 12(sp)
16689; RV32I-NEXT:    mv s0, a2
16690; RV32I-NEXT:    mv s2, a1
16691; RV32I-NEXT:    mv s1, a0
16692; RV32I-NEXT:    lw a1, 4(a0)
16693; RV32I-NEXT:    lw a2, 0(a0)
16694; RV32I-NEXT:    mv s3, sp
16695; RV32I-NEXT:  .LBB214_1: # %atomicrmw.start
16696; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
16697; RV32I-NEXT:    beq a1, s0, .LBB214_3
16698; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
16699; RV32I-NEXT:    # in Loop: Header=BB214_1 Depth=1
16700; RV32I-NEXT:    sltu a0, s0, a1
16701; RV32I-NEXT:    j .LBB214_4
16702; RV32I-NEXT:  .LBB214_3: # in Loop: Header=BB214_1 Depth=1
16703; RV32I-NEXT:    sltu a0, s2, a2
16704; RV32I-NEXT:  .LBB214_4: # %atomicrmw.start
16705; RV32I-NEXT:    # in Loop: Header=BB214_1 Depth=1
16706; RV32I-NEXT:    sw a2, 0(sp)
16707; RV32I-NEXT:    mv a3, a1
16708; RV32I-NEXT:    bnez a0, .LBB214_6
16709; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
16710; RV32I-NEXT:    # in Loop: Header=BB214_1 Depth=1
16711; RV32I-NEXT:    mv a2, s2
16712; RV32I-NEXT:    mv a3, s0
16713; RV32I-NEXT:  .LBB214_6: # %atomicrmw.start
16714; RV32I-NEXT:    # in Loop: Header=BB214_1 Depth=1
16715; RV32I-NEXT:    sw a1, 4(sp)
16716; RV32I-NEXT:    mv a0, s1
16717; RV32I-NEXT:    mv a1, s3
16718; RV32I-NEXT:    addi a4, zero, 5
16719; RV32I-NEXT:    addi a5, zero, 5
16720; RV32I-NEXT:    call __atomic_compare_exchange_8
16721; RV32I-NEXT:    lw a1, 4(sp)
16722; RV32I-NEXT:    lw a2, 0(sp)
16723; RV32I-NEXT:    beqz a0, .LBB214_1
16724; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
16725; RV32I-NEXT:    mv a0, a2
16726; RV32I-NEXT:    lw s3, 12(sp)
16727; RV32I-NEXT:    lw s2, 16(sp)
16728; RV32I-NEXT:    lw s1, 20(sp)
16729; RV32I-NEXT:    lw s0, 24(sp)
16730; RV32I-NEXT:    lw ra, 28(sp)
16731; RV32I-NEXT:    addi sp, sp, 32
16732; RV32I-NEXT:    ret
16733;
16734; RV32IA-LABEL: atomicrmw_umax_i64_seq_cst:
16735; RV32IA:       # %bb.0:
16736; RV32IA-NEXT:    addi sp, sp, -32
16737; RV32IA-NEXT:    sw ra, 28(sp)
16738; RV32IA-NEXT:    sw s0, 24(sp)
16739; RV32IA-NEXT:    sw s1, 20(sp)
16740; RV32IA-NEXT:    sw s2, 16(sp)
16741; RV32IA-NEXT:    sw s3, 12(sp)
16742; RV32IA-NEXT:    mv s0, a2
16743; RV32IA-NEXT:    mv s2, a1
16744; RV32IA-NEXT:    mv s1, a0
16745; RV32IA-NEXT:    lw a1, 4(a0)
16746; RV32IA-NEXT:    lw a2, 0(a0)
16747; RV32IA-NEXT:    mv s3, sp
16748; RV32IA-NEXT:  .LBB214_1: # %atomicrmw.start
16749; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
16750; RV32IA-NEXT:    beq a1, s0, .LBB214_3
16751; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
16752; RV32IA-NEXT:    # in Loop: Header=BB214_1 Depth=1
16753; RV32IA-NEXT:    sltu a0, s0, a1
16754; RV32IA-NEXT:    j .LBB214_4
16755; RV32IA-NEXT:  .LBB214_3: # in Loop: Header=BB214_1 Depth=1
16756; RV32IA-NEXT:    sltu a0, s2, a2
16757; RV32IA-NEXT:  .LBB214_4: # %atomicrmw.start
16758; RV32IA-NEXT:    # in Loop: Header=BB214_1 Depth=1
16759; RV32IA-NEXT:    sw a2, 0(sp)
16760; RV32IA-NEXT:    mv a3, a1
16761; RV32IA-NEXT:    bnez a0, .LBB214_6
16762; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
16763; RV32IA-NEXT:    # in Loop: Header=BB214_1 Depth=1
16764; RV32IA-NEXT:    mv a2, s2
16765; RV32IA-NEXT:    mv a3, s0
16766; RV32IA-NEXT:  .LBB214_6: # %atomicrmw.start
16767; RV32IA-NEXT:    # in Loop: Header=BB214_1 Depth=1
16768; RV32IA-NEXT:    sw a1, 4(sp)
16769; RV32IA-NEXT:    mv a0, s1
16770; RV32IA-NEXT:    mv a1, s3
16771; RV32IA-NEXT:    addi a4, zero, 5
16772; RV32IA-NEXT:    addi a5, zero, 5
16773; RV32IA-NEXT:    call __atomic_compare_exchange_8
16774; RV32IA-NEXT:    lw a1, 4(sp)
16775; RV32IA-NEXT:    lw a2, 0(sp)
16776; RV32IA-NEXT:    beqz a0, .LBB214_1
16777; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
16778; RV32IA-NEXT:    mv a0, a2
16779; RV32IA-NEXT:    lw s3, 12(sp)
16780; RV32IA-NEXT:    lw s2, 16(sp)
16781; RV32IA-NEXT:    lw s1, 20(sp)
16782; RV32IA-NEXT:    lw s0, 24(sp)
16783; RV32IA-NEXT:    lw ra, 28(sp)
16784; RV32IA-NEXT:    addi sp, sp, 32
16785; RV32IA-NEXT:    ret
16786;
16787; RV64I-LABEL: atomicrmw_umax_i64_seq_cst:
16788; RV64I:       # %bb.0:
16789; RV64I-NEXT:    addi sp, sp, -48
16790; RV64I-NEXT:    sd ra, 40(sp)
16791; RV64I-NEXT:    sd s0, 32(sp)
16792; RV64I-NEXT:    sd s1, 24(sp)
16793; RV64I-NEXT:    sd s2, 16(sp)
16794; RV64I-NEXT:    mv s0, a1
16795; RV64I-NEXT:    mv s1, a0
16796; RV64I-NEXT:    ld a2, 0(a0)
16797; RV64I-NEXT:    addi s2, sp, 8
16798; RV64I-NEXT:  .LBB214_1: # %atomicrmw.start
16799; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
16800; RV64I-NEXT:    sd a2, 8(sp)
16801; RV64I-NEXT:    bltu s0, a2, .LBB214_3
16802; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
16803; RV64I-NEXT:    # in Loop: Header=BB214_1 Depth=1
16804; RV64I-NEXT:    mv a2, s0
16805; RV64I-NEXT:  .LBB214_3: # %atomicrmw.start
16806; RV64I-NEXT:    # in Loop: Header=BB214_1 Depth=1
16807; RV64I-NEXT:    mv a0, s1
16808; RV64I-NEXT:    mv a1, s2
16809; RV64I-NEXT:    addi a3, zero, 5
16810; RV64I-NEXT:    addi a4, zero, 5
16811; RV64I-NEXT:    call __atomic_compare_exchange_8
16812; RV64I-NEXT:    ld a2, 8(sp)
16813; RV64I-NEXT:    beqz a0, .LBB214_1
16814; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
16815; RV64I-NEXT:    mv a0, a2
16816; RV64I-NEXT:    ld s2, 16(sp)
16817; RV64I-NEXT:    ld s1, 24(sp)
16818; RV64I-NEXT:    ld s0, 32(sp)
16819; RV64I-NEXT:    ld ra, 40(sp)
16820; RV64I-NEXT:    addi sp, sp, 48
16821; RV64I-NEXT:    ret
16822;
16823; RV64IA-LABEL: atomicrmw_umax_i64_seq_cst:
16824; RV64IA:       # %bb.0:
16825; RV64IA-NEXT:    amomaxu.d.aqrl a0, a1, (a0)
16826; RV64IA-NEXT:    ret
16827  %1 = atomicrmw umax i64* %a, i64 %b seq_cst
16828  ret i64 %1
16829}
16830
16831define i64 @atomicrmw_umin_i64_monotonic(i64 *%a, i64 %b) nounwind {
16832; RV32I-LABEL: atomicrmw_umin_i64_monotonic:
16833; RV32I:       # %bb.0:
16834; RV32I-NEXT:    addi sp, sp, -32
16835; RV32I-NEXT:    sw ra, 28(sp)
16836; RV32I-NEXT:    sw s0, 24(sp)
16837; RV32I-NEXT:    sw s1, 20(sp)
16838; RV32I-NEXT:    sw s2, 16(sp)
16839; RV32I-NEXT:    sw s3, 12(sp)
16840; RV32I-NEXT:    mv s0, a2
16841; RV32I-NEXT:    mv s2, a1
16842; RV32I-NEXT:    mv s1, a0
16843; RV32I-NEXT:    lw a1, 4(a0)
16844; RV32I-NEXT:    lw a2, 0(a0)
16845; RV32I-NEXT:    mv s3, sp
16846; RV32I-NEXT:  .LBB215_1: # %atomicrmw.start
16847; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
16848; RV32I-NEXT:    beq a1, s0, .LBB215_3
16849; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
16850; RV32I-NEXT:    # in Loop: Header=BB215_1 Depth=1
16851; RV32I-NEXT:    sltu a0, s0, a1
16852; RV32I-NEXT:    j .LBB215_4
16853; RV32I-NEXT:  .LBB215_3: # in Loop: Header=BB215_1 Depth=1
16854; RV32I-NEXT:    sltu a0, s2, a2
16855; RV32I-NEXT:  .LBB215_4: # %atomicrmw.start
16856; RV32I-NEXT:    # in Loop: Header=BB215_1 Depth=1
16857; RV32I-NEXT:    xori a0, a0, 1
16858; RV32I-NEXT:    sw a2, 0(sp)
16859; RV32I-NEXT:    mv a3, a1
16860; RV32I-NEXT:    bnez a0, .LBB215_6
16861; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
16862; RV32I-NEXT:    # in Loop: Header=BB215_1 Depth=1
16863; RV32I-NEXT:    mv a2, s2
16864; RV32I-NEXT:    mv a3, s0
16865; RV32I-NEXT:  .LBB215_6: # %atomicrmw.start
16866; RV32I-NEXT:    # in Loop: Header=BB215_1 Depth=1
16867; RV32I-NEXT:    sw a1, 4(sp)
16868; RV32I-NEXT:    mv a0, s1
16869; RV32I-NEXT:    mv a1, s3
16870; RV32I-NEXT:    mv a4, zero
16871; RV32I-NEXT:    mv a5, zero
16872; RV32I-NEXT:    call __atomic_compare_exchange_8
16873; RV32I-NEXT:    lw a1, 4(sp)
16874; RV32I-NEXT:    lw a2, 0(sp)
16875; RV32I-NEXT:    beqz a0, .LBB215_1
16876; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
16877; RV32I-NEXT:    mv a0, a2
16878; RV32I-NEXT:    lw s3, 12(sp)
16879; RV32I-NEXT:    lw s2, 16(sp)
16880; RV32I-NEXT:    lw s1, 20(sp)
16881; RV32I-NEXT:    lw s0, 24(sp)
16882; RV32I-NEXT:    lw ra, 28(sp)
16883; RV32I-NEXT:    addi sp, sp, 32
16884; RV32I-NEXT:    ret
16885;
16886; RV32IA-LABEL: atomicrmw_umin_i64_monotonic:
16887; RV32IA:       # %bb.0:
16888; RV32IA-NEXT:    addi sp, sp, -32
16889; RV32IA-NEXT:    sw ra, 28(sp)
16890; RV32IA-NEXT:    sw s0, 24(sp)
16891; RV32IA-NEXT:    sw s1, 20(sp)
16892; RV32IA-NEXT:    sw s2, 16(sp)
16893; RV32IA-NEXT:    sw s3, 12(sp)
16894; RV32IA-NEXT:    mv s0, a2
16895; RV32IA-NEXT:    mv s2, a1
16896; RV32IA-NEXT:    mv s1, a0
16897; RV32IA-NEXT:    lw a1, 4(a0)
16898; RV32IA-NEXT:    lw a2, 0(a0)
16899; RV32IA-NEXT:    mv s3, sp
16900; RV32IA-NEXT:  .LBB215_1: # %atomicrmw.start
16901; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
16902; RV32IA-NEXT:    beq a1, s0, .LBB215_3
16903; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
16904; RV32IA-NEXT:    # in Loop: Header=BB215_1 Depth=1
16905; RV32IA-NEXT:    sltu a0, s0, a1
16906; RV32IA-NEXT:    j .LBB215_4
16907; RV32IA-NEXT:  .LBB215_3: # in Loop: Header=BB215_1 Depth=1
16908; RV32IA-NEXT:    sltu a0, s2, a2
16909; RV32IA-NEXT:  .LBB215_4: # %atomicrmw.start
16910; RV32IA-NEXT:    # in Loop: Header=BB215_1 Depth=1
16911; RV32IA-NEXT:    xori a0, a0, 1
16912; RV32IA-NEXT:    sw a2, 0(sp)
16913; RV32IA-NEXT:    mv a3, a1
16914; RV32IA-NEXT:    bnez a0, .LBB215_6
16915; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
16916; RV32IA-NEXT:    # in Loop: Header=BB215_1 Depth=1
16917; RV32IA-NEXT:    mv a2, s2
16918; RV32IA-NEXT:    mv a3, s0
16919; RV32IA-NEXT:  .LBB215_6: # %atomicrmw.start
16920; RV32IA-NEXT:    # in Loop: Header=BB215_1 Depth=1
16921; RV32IA-NEXT:    sw a1, 4(sp)
16922; RV32IA-NEXT:    mv a0, s1
16923; RV32IA-NEXT:    mv a1, s3
16924; RV32IA-NEXT:    mv a4, zero
16925; RV32IA-NEXT:    mv a5, zero
16926; RV32IA-NEXT:    call __atomic_compare_exchange_8
16927; RV32IA-NEXT:    lw a1, 4(sp)
16928; RV32IA-NEXT:    lw a2, 0(sp)
16929; RV32IA-NEXT:    beqz a0, .LBB215_1
16930; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
16931; RV32IA-NEXT:    mv a0, a2
16932; RV32IA-NEXT:    lw s3, 12(sp)
16933; RV32IA-NEXT:    lw s2, 16(sp)
16934; RV32IA-NEXT:    lw s1, 20(sp)
16935; RV32IA-NEXT:    lw s0, 24(sp)
16936; RV32IA-NEXT:    lw ra, 28(sp)
16937; RV32IA-NEXT:    addi sp, sp, 32
16938; RV32IA-NEXT:    ret
16939;
16940; RV64I-LABEL: atomicrmw_umin_i64_monotonic:
16941; RV64I:       # %bb.0:
16942; RV64I-NEXT:    addi sp, sp, -48
16943; RV64I-NEXT:    sd ra, 40(sp)
16944; RV64I-NEXT:    sd s0, 32(sp)
16945; RV64I-NEXT:    sd s1, 24(sp)
16946; RV64I-NEXT:    sd s2, 16(sp)
16947; RV64I-NEXT:    mv s0, a1
16948; RV64I-NEXT:    mv s1, a0
16949; RV64I-NEXT:    ld a2, 0(a0)
16950; RV64I-NEXT:    addi s2, sp, 8
16951; RV64I-NEXT:  .LBB215_1: # %atomicrmw.start
16952; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
16953; RV64I-NEXT:    sd a2, 8(sp)
16954; RV64I-NEXT:    bgeu s0, a2, .LBB215_3
16955; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
16956; RV64I-NEXT:    # in Loop: Header=BB215_1 Depth=1
16957; RV64I-NEXT:    mv a2, s0
16958; RV64I-NEXT:  .LBB215_3: # %atomicrmw.start
16959; RV64I-NEXT:    # in Loop: Header=BB215_1 Depth=1
16960; RV64I-NEXT:    mv a0, s1
16961; RV64I-NEXT:    mv a1, s2
16962; RV64I-NEXT:    mv a3, zero
16963; RV64I-NEXT:    mv a4, zero
16964; RV64I-NEXT:    call __atomic_compare_exchange_8
16965; RV64I-NEXT:    ld a2, 8(sp)
16966; RV64I-NEXT:    beqz a0, .LBB215_1
16967; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
16968; RV64I-NEXT:    mv a0, a2
16969; RV64I-NEXT:    ld s2, 16(sp)
16970; RV64I-NEXT:    ld s1, 24(sp)
16971; RV64I-NEXT:    ld s0, 32(sp)
16972; RV64I-NEXT:    ld ra, 40(sp)
16973; RV64I-NEXT:    addi sp, sp, 48
16974; RV64I-NEXT:    ret
16975;
16976; RV64IA-LABEL: atomicrmw_umin_i64_monotonic:
16977; RV64IA:       # %bb.0:
16978; RV64IA-NEXT:    amominu.d a0, a1, (a0)
16979; RV64IA-NEXT:    ret
16980  %1 = atomicrmw umin i64* %a, i64 %b monotonic
16981  ret i64 %1
16982}
16983
16984define i64 @atomicrmw_umin_i64_acquire(i64 *%a, i64 %b) nounwind {
16985; RV32I-LABEL: atomicrmw_umin_i64_acquire:
16986; RV32I:       # %bb.0:
16987; RV32I-NEXT:    addi sp, sp, -32
16988; RV32I-NEXT:    sw ra, 28(sp)
16989; RV32I-NEXT:    sw s0, 24(sp)
16990; RV32I-NEXT:    sw s1, 20(sp)
16991; RV32I-NEXT:    sw s2, 16(sp)
16992; RV32I-NEXT:    sw s3, 12(sp)
16993; RV32I-NEXT:    mv s0, a2
16994; RV32I-NEXT:    mv s2, a1
16995; RV32I-NEXT:    mv s1, a0
16996; RV32I-NEXT:    lw a1, 4(a0)
16997; RV32I-NEXT:    lw a2, 0(a0)
16998; RV32I-NEXT:    mv s3, sp
16999; RV32I-NEXT:  .LBB216_1: # %atomicrmw.start
17000; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
17001; RV32I-NEXT:    beq a1, s0, .LBB216_3
17002; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
17003; RV32I-NEXT:    # in Loop: Header=BB216_1 Depth=1
17004; RV32I-NEXT:    sltu a0, s0, a1
17005; RV32I-NEXT:    j .LBB216_4
17006; RV32I-NEXT:  .LBB216_3: # in Loop: Header=BB216_1 Depth=1
17007; RV32I-NEXT:    sltu a0, s2, a2
17008; RV32I-NEXT:  .LBB216_4: # %atomicrmw.start
17009; RV32I-NEXT:    # in Loop: Header=BB216_1 Depth=1
17010; RV32I-NEXT:    xori a0, a0, 1
17011; RV32I-NEXT:    sw a2, 0(sp)
17012; RV32I-NEXT:    mv a3, a1
17013; RV32I-NEXT:    bnez a0, .LBB216_6
17014; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
17015; RV32I-NEXT:    # in Loop: Header=BB216_1 Depth=1
17016; RV32I-NEXT:    mv a2, s2
17017; RV32I-NEXT:    mv a3, s0
17018; RV32I-NEXT:  .LBB216_6: # %atomicrmw.start
17019; RV32I-NEXT:    # in Loop: Header=BB216_1 Depth=1
17020; RV32I-NEXT:    sw a1, 4(sp)
17021; RV32I-NEXT:    mv a0, s1
17022; RV32I-NEXT:    mv a1, s3
17023; RV32I-NEXT:    addi a4, zero, 2
17024; RV32I-NEXT:    addi a5, zero, 2
17025; RV32I-NEXT:    call __atomic_compare_exchange_8
17026; RV32I-NEXT:    lw a1, 4(sp)
17027; RV32I-NEXT:    lw a2, 0(sp)
17028; RV32I-NEXT:    beqz a0, .LBB216_1
17029; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
17030; RV32I-NEXT:    mv a0, a2
17031; RV32I-NEXT:    lw s3, 12(sp)
17032; RV32I-NEXT:    lw s2, 16(sp)
17033; RV32I-NEXT:    lw s1, 20(sp)
17034; RV32I-NEXT:    lw s0, 24(sp)
17035; RV32I-NEXT:    lw ra, 28(sp)
17036; RV32I-NEXT:    addi sp, sp, 32
17037; RV32I-NEXT:    ret
17038;
17039; RV32IA-LABEL: atomicrmw_umin_i64_acquire:
17040; RV32IA:       # %bb.0:
17041; RV32IA-NEXT:    addi sp, sp, -32
17042; RV32IA-NEXT:    sw ra, 28(sp)
17043; RV32IA-NEXT:    sw s0, 24(sp)
17044; RV32IA-NEXT:    sw s1, 20(sp)
17045; RV32IA-NEXT:    sw s2, 16(sp)
17046; RV32IA-NEXT:    sw s3, 12(sp)
17047; RV32IA-NEXT:    mv s0, a2
17048; RV32IA-NEXT:    mv s2, a1
17049; RV32IA-NEXT:    mv s1, a0
17050; RV32IA-NEXT:    lw a1, 4(a0)
17051; RV32IA-NEXT:    lw a2, 0(a0)
17052; RV32IA-NEXT:    mv s3, sp
17053; RV32IA-NEXT:  .LBB216_1: # %atomicrmw.start
17054; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
17055; RV32IA-NEXT:    beq a1, s0, .LBB216_3
17056; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
17057; RV32IA-NEXT:    # in Loop: Header=BB216_1 Depth=1
17058; RV32IA-NEXT:    sltu a0, s0, a1
17059; RV32IA-NEXT:    j .LBB216_4
17060; RV32IA-NEXT:  .LBB216_3: # in Loop: Header=BB216_1 Depth=1
17061; RV32IA-NEXT:    sltu a0, s2, a2
17062; RV32IA-NEXT:  .LBB216_4: # %atomicrmw.start
17063; RV32IA-NEXT:    # in Loop: Header=BB216_1 Depth=1
17064; RV32IA-NEXT:    xori a0, a0, 1
17065; RV32IA-NEXT:    sw a2, 0(sp)
17066; RV32IA-NEXT:    mv a3, a1
17067; RV32IA-NEXT:    bnez a0, .LBB216_6
17068; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
17069; RV32IA-NEXT:    # in Loop: Header=BB216_1 Depth=1
17070; RV32IA-NEXT:    mv a2, s2
17071; RV32IA-NEXT:    mv a3, s0
17072; RV32IA-NEXT:  .LBB216_6: # %atomicrmw.start
17073; RV32IA-NEXT:    # in Loop: Header=BB216_1 Depth=1
17074; RV32IA-NEXT:    sw a1, 4(sp)
17075; RV32IA-NEXT:    mv a0, s1
17076; RV32IA-NEXT:    mv a1, s3
17077; RV32IA-NEXT:    addi a4, zero, 2
17078; RV32IA-NEXT:    addi a5, zero, 2
17079; RV32IA-NEXT:    call __atomic_compare_exchange_8
17080; RV32IA-NEXT:    lw a1, 4(sp)
17081; RV32IA-NEXT:    lw a2, 0(sp)
17082; RV32IA-NEXT:    beqz a0, .LBB216_1
17083; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
17084; RV32IA-NEXT:    mv a0, a2
17085; RV32IA-NEXT:    lw s3, 12(sp)
17086; RV32IA-NEXT:    lw s2, 16(sp)
17087; RV32IA-NEXT:    lw s1, 20(sp)
17088; RV32IA-NEXT:    lw s0, 24(sp)
17089; RV32IA-NEXT:    lw ra, 28(sp)
17090; RV32IA-NEXT:    addi sp, sp, 32
17091; RV32IA-NEXT:    ret
17092;
17093; RV64I-LABEL: atomicrmw_umin_i64_acquire:
17094; RV64I:       # %bb.0:
17095; RV64I-NEXT:    addi sp, sp, -48
17096; RV64I-NEXT:    sd ra, 40(sp)
17097; RV64I-NEXT:    sd s0, 32(sp)
17098; RV64I-NEXT:    sd s1, 24(sp)
17099; RV64I-NEXT:    sd s2, 16(sp)
17100; RV64I-NEXT:    mv s0, a1
17101; RV64I-NEXT:    mv s1, a0
17102; RV64I-NEXT:    ld a2, 0(a0)
17103; RV64I-NEXT:    addi s2, sp, 8
17104; RV64I-NEXT:  .LBB216_1: # %atomicrmw.start
17105; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
17106; RV64I-NEXT:    sd a2, 8(sp)
17107; RV64I-NEXT:    bgeu s0, a2, .LBB216_3
17108; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
17109; RV64I-NEXT:    # in Loop: Header=BB216_1 Depth=1
17110; RV64I-NEXT:    mv a2, s0
17111; RV64I-NEXT:  .LBB216_3: # %atomicrmw.start
17112; RV64I-NEXT:    # in Loop: Header=BB216_1 Depth=1
17113; RV64I-NEXT:    mv a0, s1
17114; RV64I-NEXT:    mv a1, s2
17115; RV64I-NEXT:    addi a3, zero, 2
17116; RV64I-NEXT:    addi a4, zero, 2
17117; RV64I-NEXT:    call __atomic_compare_exchange_8
17118; RV64I-NEXT:    ld a2, 8(sp)
17119; RV64I-NEXT:    beqz a0, .LBB216_1
17120; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
17121; RV64I-NEXT:    mv a0, a2
17122; RV64I-NEXT:    ld s2, 16(sp)
17123; RV64I-NEXT:    ld s1, 24(sp)
17124; RV64I-NEXT:    ld s0, 32(sp)
17125; RV64I-NEXT:    ld ra, 40(sp)
17126; RV64I-NEXT:    addi sp, sp, 48
17127; RV64I-NEXT:    ret
17128;
17129; RV64IA-LABEL: atomicrmw_umin_i64_acquire:
17130; RV64IA:       # %bb.0:
17131; RV64IA-NEXT:    amominu.d.aq a0, a1, (a0)
17132; RV64IA-NEXT:    ret
17133  %1 = atomicrmw umin i64* %a, i64 %b acquire
17134  ret i64 %1
17135}
17136
17137define i64 @atomicrmw_umin_i64_release(i64 *%a, i64 %b) nounwind {
17138; RV32I-LABEL: atomicrmw_umin_i64_release:
17139; RV32I:       # %bb.0:
17140; RV32I-NEXT:    addi sp, sp, -32
17141; RV32I-NEXT:    sw ra, 28(sp)
17142; RV32I-NEXT:    sw s0, 24(sp)
17143; RV32I-NEXT:    sw s1, 20(sp)
17144; RV32I-NEXT:    sw s2, 16(sp)
17145; RV32I-NEXT:    sw s3, 12(sp)
17146; RV32I-NEXT:    mv s0, a2
17147; RV32I-NEXT:    mv s2, a1
17148; RV32I-NEXT:    mv s1, a0
17149; RV32I-NEXT:    lw a1, 4(a0)
17150; RV32I-NEXT:    lw a2, 0(a0)
17151; RV32I-NEXT:    mv s3, sp
17152; RV32I-NEXT:  .LBB217_1: # %atomicrmw.start
17153; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
17154; RV32I-NEXT:    beq a1, s0, .LBB217_3
17155; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
17156; RV32I-NEXT:    # in Loop: Header=BB217_1 Depth=1
17157; RV32I-NEXT:    sltu a0, s0, a1
17158; RV32I-NEXT:    j .LBB217_4
17159; RV32I-NEXT:  .LBB217_3: # in Loop: Header=BB217_1 Depth=1
17160; RV32I-NEXT:    sltu a0, s2, a2
17161; RV32I-NEXT:  .LBB217_4: # %atomicrmw.start
17162; RV32I-NEXT:    # in Loop: Header=BB217_1 Depth=1
17163; RV32I-NEXT:    xori a0, a0, 1
17164; RV32I-NEXT:    sw a2, 0(sp)
17165; RV32I-NEXT:    mv a3, a1
17166; RV32I-NEXT:    bnez a0, .LBB217_6
17167; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
17168; RV32I-NEXT:    # in Loop: Header=BB217_1 Depth=1
17169; RV32I-NEXT:    mv a2, s2
17170; RV32I-NEXT:    mv a3, s0
17171; RV32I-NEXT:  .LBB217_6: # %atomicrmw.start
17172; RV32I-NEXT:    # in Loop: Header=BB217_1 Depth=1
17173; RV32I-NEXT:    sw a1, 4(sp)
17174; RV32I-NEXT:    mv a0, s1
17175; RV32I-NEXT:    mv a1, s3
17176; RV32I-NEXT:    addi a4, zero, 3
17177; RV32I-NEXT:    mv a5, zero
17178; RV32I-NEXT:    call __atomic_compare_exchange_8
17179; RV32I-NEXT:    lw a1, 4(sp)
17180; RV32I-NEXT:    lw a2, 0(sp)
17181; RV32I-NEXT:    beqz a0, .LBB217_1
17182; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
17183; RV32I-NEXT:    mv a0, a2
17184; RV32I-NEXT:    lw s3, 12(sp)
17185; RV32I-NEXT:    lw s2, 16(sp)
17186; RV32I-NEXT:    lw s1, 20(sp)
17187; RV32I-NEXT:    lw s0, 24(sp)
17188; RV32I-NEXT:    lw ra, 28(sp)
17189; RV32I-NEXT:    addi sp, sp, 32
17190; RV32I-NEXT:    ret
17191;
17192; RV32IA-LABEL: atomicrmw_umin_i64_release:
17193; RV32IA:       # %bb.0:
17194; RV32IA-NEXT:    addi sp, sp, -32
17195; RV32IA-NEXT:    sw ra, 28(sp)
17196; RV32IA-NEXT:    sw s0, 24(sp)
17197; RV32IA-NEXT:    sw s1, 20(sp)
17198; RV32IA-NEXT:    sw s2, 16(sp)
17199; RV32IA-NEXT:    sw s3, 12(sp)
17200; RV32IA-NEXT:    mv s0, a2
17201; RV32IA-NEXT:    mv s2, a1
17202; RV32IA-NEXT:    mv s1, a0
17203; RV32IA-NEXT:    lw a1, 4(a0)
17204; RV32IA-NEXT:    lw a2, 0(a0)
17205; RV32IA-NEXT:    mv s3, sp
17206; RV32IA-NEXT:  .LBB217_1: # %atomicrmw.start
17207; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
17208; RV32IA-NEXT:    beq a1, s0, .LBB217_3
17209; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
17210; RV32IA-NEXT:    # in Loop: Header=BB217_1 Depth=1
17211; RV32IA-NEXT:    sltu a0, s0, a1
17212; RV32IA-NEXT:    j .LBB217_4
17213; RV32IA-NEXT:  .LBB217_3: # in Loop: Header=BB217_1 Depth=1
17214; RV32IA-NEXT:    sltu a0, s2, a2
17215; RV32IA-NEXT:  .LBB217_4: # %atomicrmw.start
17216; RV32IA-NEXT:    # in Loop: Header=BB217_1 Depth=1
17217; RV32IA-NEXT:    xori a0, a0, 1
17218; RV32IA-NEXT:    sw a2, 0(sp)
17219; RV32IA-NEXT:    mv a3, a1
17220; RV32IA-NEXT:    bnez a0, .LBB217_6
17221; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
17222; RV32IA-NEXT:    # in Loop: Header=BB217_1 Depth=1
17223; RV32IA-NEXT:    mv a2, s2
17224; RV32IA-NEXT:    mv a3, s0
17225; RV32IA-NEXT:  .LBB217_6: # %atomicrmw.start
17226; RV32IA-NEXT:    # in Loop: Header=BB217_1 Depth=1
17227; RV32IA-NEXT:    sw a1, 4(sp)
17228; RV32IA-NEXT:    mv a0, s1
17229; RV32IA-NEXT:    mv a1, s3
17230; RV32IA-NEXT:    addi a4, zero, 3
17231; RV32IA-NEXT:    mv a5, zero
17232; RV32IA-NEXT:    call __atomic_compare_exchange_8
17233; RV32IA-NEXT:    lw a1, 4(sp)
17234; RV32IA-NEXT:    lw a2, 0(sp)
17235; RV32IA-NEXT:    beqz a0, .LBB217_1
17236; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
17237; RV32IA-NEXT:    mv a0, a2
17238; RV32IA-NEXT:    lw s3, 12(sp)
17239; RV32IA-NEXT:    lw s2, 16(sp)
17240; RV32IA-NEXT:    lw s1, 20(sp)
17241; RV32IA-NEXT:    lw s0, 24(sp)
17242; RV32IA-NEXT:    lw ra, 28(sp)
17243; RV32IA-NEXT:    addi sp, sp, 32
17244; RV32IA-NEXT:    ret
17245;
17246; RV64I-LABEL: atomicrmw_umin_i64_release:
17247; RV64I:       # %bb.0:
17248; RV64I-NEXT:    addi sp, sp, -48
17249; RV64I-NEXT:    sd ra, 40(sp)
17250; RV64I-NEXT:    sd s0, 32(sp)
17251; RV64I-NEXT:    sd s1, 24(sp)
17252; RV64I-NEXT:    sd s2, 16(sp)
17253; RV64I-NEXT:    mv s0, a1
17254; RV64I-NEXT:    mv s1, a0
17255; RV64I-NEXT:    ld a2, 0(a0)
17256; RV64I-NEXT:    addi s2, sp, 8
17257; RV64I-NEXT:  .LBB217_1: # %atomicrmw.start
17258; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
17259; RV64I-NEXT:    sd a2, 8(sp)
17260; RV64I-NEXT:    bgeu s0, a2, .LBB217_3
17261; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
17262; RV64I-NEXT:    # in Loop: Header=BB217_1 Depth=1
17263; RV64I-NEXT:    mv a2, s0
17264; RV64I-NEXT:  .LBB217_3: # %atomicrmw.start
17265; RV64I-NEXT:    # in Loop: Header=BB217_1 Depth=1
17266; RV64I-NEXT:    mv a0, s1
17267; RV64I-NEXT:    mv a1, s2
17268; RV64I-NEXT:    addi a3, zero, 3
17269; RV64I-NEXT:    mv a4, zero
17270; RV64I-NEXT:    call __atomic_compare_exchange_8
17271; RV64I-NEXT:    ld a2, 8(sp)
17272; RV64I-NEXT:    beqz a0, .LBB217_1
17273; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
17274; RV64I-NEXT:    mv a0, a2
17275; RV64I-NEXT:    ld s2, 16(sp)
17276; RV64I-NEXT:    ld s1, 24(sp)
17277; RV64I-NEXT:    ld s0, 32(sp)
17278; RV64I-NEXT:    ld ra, 40(sp)
17279; RV64I-NEXT:    addi sp, sp, 48
17280; RV64I-NEXT:    ret
17281;
17282; RV64IA-LABEL: atomicrmw_umin_i64_release:
17283; RV64IA:       # %bb.0:
17284; RV64IA-NEXT:    amominu.d.rl a0, a1, (a0)
17285; RV64IA-NEXT:    ret
17286  %1 = atomicrmw umin i64* %a, i64 %b release
17287  ret i64 %1
17288}
17289
17290define i64 @atomicrmw_umin_i64_acq_rel(i64 *%a, i64 %b) nounwind {
17291; RV32I-LABEL: atomicrmw_umin_i64_acq_rel:
17292; RV32I:       # %bb.0:
17293; RV32I-NEXT:    addi sp, sp, -32
17294; RV32I-NEXT:    sw ra, 28(sp)
17295; RV32I-NEXT:    sw s0, 24(sp)
17296; RV32I-NEXT:    sw s1, 20(sp)
17297; RV32I-NEXT:    sw s2, 16(sp)
17298; RV32I-NEXT:    sw s3, 12(sp)
17299; RV32I-NEXT:    mv s0, a2
17300; RV32I-NEXT:    mv s2, a1
17301; RV32I-NEXT:    mv s1, a0
17302; RV32I-NEXT:    lw a1, 4(a0)
17303; RV32I-NEXT:    lw a2, 0(a0)
17304; RV32I-NEXT:    mv s3, sp
17305; RV32I-NEXT:  .LBB218_1: # %atomicrmw.start
17306; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
17307; RV32I-NEXT:    beq a1, s0, .LBB218_3
17308; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
17309; RV32I-NEXT:    # in Loop: Header=BB218_1 Depth=1
17310; RV32I-NEXT:    sltu a0, s0, a1
17311; RV32I-NEXT:    j .LBB218_4
17312; RV32I-NEXT:  .LBB218_3: # in Loop: Header=BB218_1 Depth=1
17313; RV32I-NEXT:    sltu a0, s2, a2
17314; RV32I-NEXT:  .LBB218_4: # %atomicrmw.start
17315; RV32I-NEXT:    # in Loop: Header=BB218_1 Depth=1
17316; RV32I-NEXT:    xori a0, a0, 1
17317; RV32I-NEXT:    sw a2, 0(sp)
17318; RV32I-NEXT:    mv a3, a1
17319; RV32I-NEXT:    bnez a0, .LBB218_6
17320; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
17321; RV32I-NEXT:    # in Loop: Header=BB218_1 Depth=1
17322; RV32I-NEXT:    mv a2, s2
17323; RV32I-NEXT:    mv a3, s0
17324; RV32I-NEXT:  .LBB218_6: # %atomicrmw.start
17325; RV32I-NEXT:    # in Loop: Header=BB218_1 Depth=1
17326; RV32I-NEXT:    sw a1, 4(sp)
17327; RV32I-NEXT:    mv a0, s1
17328; RV32I-NEXT:    mv a1, s3
17329; RV32I-NEXT:    addi a4, zero, 4
17330; RV32I-NEXT:    addi a5, zero, 2
17331; RV32I-NEXT:    call __atomic_compare_exchange_8
17332; RV32I-NEXT:    lw a1, 4(sp)
17333; RV32I-NEXT:    lw a2, 0(sp)
17334; RV32I-NEXT:    beqz a0, .LBB218_1
17335; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
17336; RV32I-NEXT:    mv a0, a2
17337; RV32I-NEXT:    lw s3, 12(sp)
17338; RV32I-NEXT:    lw s2, 16(sp)
17339; RV32I-NEXT:    lw s1, 20(sp)
17340; RV32I-NEXT:    lw s0, 24(sp)
17341; RV32I-NEXT:    lw ra, 28(sp)
17342; RV32I-NEXT:    addi sp, sp, 32
17343; RV32I-NEXT:    ret
17344;
17345; RV32IA-LABEL: atomicrmw_umin_i64_acq_rel:
17346; RV32IA:       # %bb.0:
17347; RV32IA-NEXT:    addi sp, sp, -32
17348; RV32IA-NEXT:    sw ra, 28(sp)
17349; RV32IA-NEXT:    sw s0, 24(sp)
17350; RV32IA-NEXT:    sw s1, 20(sp)
17351; RV32IA-NEXT:    sw s2, 16(sp)
17352; RV32IA-NEXT:    sw s3, 12(sp)
17353; RV32IA-NEXT:    mv s0, a2
17354; RV32IA-NEXT:    mv s2, a1
17355; RV32IA-NEXT:    mv s1, a0
17356; RV32IA-NEXT:    lw a1, 4(a0)
17357; RV32IA-NEXT:    lw a2, 0(a0)
17358; RV32IA-NEXT:    mv s3, sp
17359; RV32IA-NEXT:  .LBB218_1: # %atomicrmw.start
17360; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
17361; RV32IA-NEXT:    beq a1, s0, .LBB218_3
17362; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
17363; RV32IA-NEXT:    # in Loop: Header=BB218_1 Depth=1
17364; RV32IA-NEXT:    sltu a0, s0, a1
17365; RV32IA-NEXT:    j .LBB218_4
17366; RV32IA-NEXT:  .LBB218_3: # in Loop: Header=BB218_1 Depth=1
17367; RV32IA-NEXT:    sltu a0, s2, a2
17368; RV32IA-NEXT:  .LBB218_4: # %atomicrmw.start
17369; RV32IA-NEXT:    # in Loop: Header=BB218_1 Depth=1
17370; RV32IA-NEXT:    xori a0, a0, 1
17371; RV32IA-NEXT:    sw a2, 0(sp)
17372; RV32IA-NEXT:    mv a3, a1
17373; RV32IA-NEXT:    bnez a0, .LBB218_6
17374; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
17375; RV32IA-NEXT:    # in Loop: Header=BB218_1 Depth=1
17376; RV32IA-NEXT:    mv a2, s2
17377; RV32IA-NEXT:    mv a3, s0
17378; RV32IA-NEXT:  .LBB218_6: # %atomicrmw.start
17379; RV32IA-NEXT:    # in Loop: Header=BB218_1 Depth=1
17380; RV32IA-NEXT:    sw a1, 4(sp)
17381; RV32IA-NEXT:    mv a0, s1
17382; RV32IA-NEXT:    mv a1, s3
17383; RV32IA-NEXT:    addi a4, zero, 4
17384; RV32IA-NEXT:    addi a5, zero, 2
17385; RV32IA-NEXT:    call __atomic_compare_exchange_8
17386; RV32IA-NEXT:    lw a1, 4(sp)
17387; RV32IA-NEXT:    lw a2, 0(sp)
17388; RV32IA-NEXT:    beqz a0, .LBB218_1
17389; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
17390; RV32IA-NEXT:    mv a0, a2
17391; RV32IA-NEXT:    lw s3, 12(sp)
17392; RV32IA-NEXT:    lw s2, 16(sp)
17393; RV32IA-NEXT:    lw s1, 20(sp)
17394; RV32IA-NEXT:    lw s0, 24(sp)
17395; RV32IA-NEXT:    lw ra, 28(sp)
17396; RV32IA-NEXT:    addi sp, sp, 32
17397; RV32IA-NEXT:    ret
17398;
17399; RV64I-LABEL: atomicrmw_umin_i64_acq_rel:
17400; RV64I:       # %bb.0:
17401; RV64I-NEXT:    addi sp, sp, -48
17402; RV64I-NEXT:    sd ra, 40(sp)
17403; RV64I-NEXT:    sd s0, 32(sp)
17404; RV64I-NEXT:    sd s1, 24(sp)
17405; RV64I-NEXT:    sd s2, 16(sp)
17406; RV64I-NEXT:    mv s0, a1
17407; RV64I-NEXT:    mv s1, a0
17408; RV64I-NEXT:    ld a2, 0(a0)
17409; RV64I-NEXT:    addi s2, sp, 8
17410; RV64I-NEXT:  .LBB218_1: # %atomicrmw.start
17411; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
17412; RV64I-NEXT:    sd a2, 8(sp)
17413; RV64I-NEXT:    bgeu s0, a2, .LBB218_3
17414; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
17415; RV64I-NEXT:    # in Loop: Header=BB218_1 Depth=1
17416; RV64I-NEXT:    mv a2, s0
17417; RV64I-NEXT:  .LBB218_3: # %atomicrmw.start
17418; RV64I-NEXT:    # in Loop: Header=BB218_1 Depth=1
17419; RV64I-NEXT:    mv a0, s1
17420; RV64I-NEXT:    mv a1, s2
17421; RV64I-NEXT:    addi a3, zero, 4
17422; RV64I-NEXT:    addi a4, zero, 2
17423; RV64I-NEXT:    call __atomic_compare_exchange_8
17424; RV64I-NEXT:    ld a2, 8(sp)
17425; RV64I-NEXT:    beqz a0, .LBB218_1
17426; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
17427; RV64I-NEXT:    mv a0, a2
17428; RV64I-NEXT:    ld s2, 16(sp)
17429; RV64I-NEXT:    ld s1, 24(sp)
17430; RV64I-NEXT:    ld s0, 32(sp)
17431; RV64I-NEXT:    ld ra, 40(sp)
17432; RV64I-NEXT:    addi sp, sp, 48
17433; RV64I-NEXT:    ret
17434;
17435; RV64IA-LABEL: atomicrmw_umin_i64_acq_rel:
17436; RV64IA:       # %bb.0:
17437; RV64IA-NEXT:    amominu.d.aqrl a0, a1, (a0)
17438; RV64IA-NEXT:    ret
17439  %1 = atomicrmw umin i64* %a, i64 %b acq_rel
17440  ret i64 %1
17441}
17442
17443define i64 @atomicrmw_umin_i64_seq_cst(i64 *%a, i64 %b) nounwind {
17444; RV32I-LABEL: atomicrmw_umin_i64_seq_cst:
17445; RV32I:       # %bb.0:
17446; RV32I-NEXT:    addi sp, sp, -32
17447; RV32I-NEXT:    sw ra, 28(sp)
17448; RV32I-NEXT:    sw s0, 24(sp)
17449; RV32I-NEXT:    sw s1, 20(sp)
17450; RV32I-NEXT:    sw s2, 16(sp)
17451; RV32I-NEXT:    sw s3, 12(sp)
17452; RV32I-NEXT:    mv s0, a2
17453; RV32I-NEXT:    mv s2, a1
17454; RV32I-NEXT:    mv s1, a0
17455; RV32I-NEXT:    lw a1, 4(a0)
17456; RV32I-NEXT:    lw a2, 0(a0)
17457; RV32I-NEXT:    mv s3, sp
17458; RV32I-NEXT:  .LBB219_1: # %atomicrmw.start
17459; RV32I-NEXT:    # =>This Inner Loop Header: Depth=1
17460; RV32I-NEXT:    beq a1, s0, .LBB219_3
17461; RV32I-NEXT:  # %bb.2: # %atomicrmw.start
17462; RV32I-NEXT:    # in Loop: Header=BB219_1 Depth=1
17463; RV32I-NEXT:    sltu a0, s0, a1
17464; RV32I-NEXT:    j .LBB219_4
17465; RV32I-NEXT:  .LBB219_3: # in Loop: Header=BB219_1 Depth=1
17466; RV32I-NEXT:    sltu a0, s2, a2
17467; RV32I-NEXT:  .LBB219_4: # %atomicrmw.start
17468; RV32I-NEXT:    # in Loop: Header=BB219_1 Depth=1
17469; RV32I-NEXT:    xori a0, a0, 1
17470; RV32I-NEXT:    sw a2, 0(sp)
17471; RV32I-NEXT:    mv a3, a1
17472; RV32I-NEXT:    bnez a0, .LBB219_6
17473; RV32I-NEXT:  # %bb.5: # %atomicrmw.start
17474; RV32I-NEXT:    # in Loop: Header=BB219_1 Depth=1
17475; RV32I-NEXT:    mv a2, s2
17476; RV32I-NEXT:    mv a3, s0
17477; RV32I-NEXT:  .LBB219_6: # %atomicrmw.start
17478; RV32I-NEXT:    # in Loop: Header=BB219_1 Depth=1
17479; RV32I-NEXT:    sw a1, 4(sp)
17480; RV32I-NEXT:    mv a0, s1
17481; RV32I-NEXT:    mv a1, s3
17482; RV32I-NEXT:    addi a4, zero, 5
17483; RV32I-NEXT:    addi a5, zero, 5
17484; RV32I-NEXT:    call __atomic_compare_exchange_8
17485; RV32I-NEXT:    lw a1, 4(sp)
17486; RV32I-NEXT:    lw a2, 0(sp)
17487; RV32I-NEXT:    beqz a0, .LBB219_1
17488; RV32I-NEXT:  # %bb.7: # %atomicrmw.end
17489; RV32I-NEXT:    mv a0, a2
17490; RV32I-NEXT:    lw s3, 12(sp)
17491; RV32I-NEXT:    lw s2, 16(sp)
17492; RV32I-NEXT:    lw s1, 20(sp)
17493; RV32I-NEXT:    lw s0, 24(sp)
17494; RV32I-NEXT:    lw ra, 28(sp)
17495; RV32I-NEXT:    addi sp, sp, 32
17496; RV32I-NEXT:    ret
17497;
17498; RV32IA-LABEL: atomicrmw_umin_i64_seq_cst:
17499; RV32IA:       # %bb.0:
17500; RV32IA-NEXT:    addi sp, sp, -32
17501; RV32IA-NEXT:    sw ra, 28(sp)
17502; RV32IA-NEXT:    sw s0, 24(sp)
17503; RV32IA-NEXT:    sw s1, 20(sp)
17504; RV32IA-NEXT:    sw s2, 16(sp)
17505; RV32IA-NEXT:    sw s3, 12(sp)
17506; RV32IA-NEXT:    mv s0, a2
17507; RV32IA-NEXT:    mv s2, a1
17508; RV32IA-NEXT:    mv s1, a0
17509; RV32IA-NEXT:    lw a1, 4(a0)
17510; RV32IA-NEXT:    lw a2, 0(a0)
17511; RV32IA-NEXT:    mv s3, sp
17512; RV32IA-NEXT:  .LBB219_1: # %atomicrmw.start
17513; RV32IA-NEXT:    # =>This Inner Loop Header: Depth=1
17514; RV32IA-NEXT:    beq a1, s0, .LBB219_3
17515; RV32IA-NEXT:  # %bb.2: # %atomicrmw.start
17516; RV32IA-NEXT:    # in Loop: Header=BB219_1 Depth=1
17517; RV32IA-NEXT:    sltu a0, s0, a1
17518; RV32IA-NEXT:    j .LBB219_4
17519; RV32IA-NEXT:  .LBB219_3: # in Loop: Header=BB219_1 Depth=1
17520; RV32IA-NEXT:    sltu a0, s2, a2
17521; RV32IA-NEXT:  .LBB219_4: # %atomicrmw.start
17522; RV32IA-NEXT:    # in Loop: Header=BB219_1 Depth=1
17523; RV32IA-NEXT:    xori a0, a0, 1
17524; RV32IA-NEXT:    sw a2, 0(sp)
17525; RV32IA-NEXT:    mv a3, a1
17526; RV32IA-NEXT:    bnez a0, .LBB219_6
17527; RV32IA-NEXT:  # %bb.5: # %atomicrmw.start
17528; RV32IA-NEXT:    # in Loop: Header=BB219_1 Depth=1
17529; RV32IA-NEXT:    mv a2, s2
17530; RV32IA-NEXT:    mv a3, s0
17531; RV32IA-NEXT:  .LBB219_6: # %atomicrmw.start
17532; RV32IA-NEXT:    # in Loop: Header=BB219_1 Depth=1
17533; RV32IA-NEXT:    sw a1, 4(sp)
17534; RV32IA-NEXT:    mv a0, s1
17535; RV32IA-NEXT:    mv a1, s3
17536; RV32IA-NEXT:    addi a4, zero, 5
17537; RV32IA-NEXT:    addi a5, zero, 5
17538; RV32IA-NEXT:    call __atomic_compare_exchange_8
17539; RV32IA-NEXT:    lw a1, 4(sp)
17540; RV32IA-NEXT:    lw a2, 0(sp)
17541; RV32IA-NEXT:    beqz a0, .LBB219_1
17542; RV32IA-NEXT:  # %bb.7: # %atomicrmw.end
17543; RV32IA-NEXT:    mv a0, a2
17544; RV32IA-NEXT:    lw s3, 12(sp)
17545; RV32IA-NEXT:    lw s2, 16(sp)
17546; RV32IA-NEXT:    lw s1, 20(sp)
17547; RV32IA-NEXT:    lw s0, 24(sp)
17548; RV32IA-NEXT:    lw ra, 28(sp)
17549; RV32IA-NEXT:    addi sp, sp, 32
17550; RV32IA-NEXT:    ret
17551;
17552; RV64I-LABEL: atomicrmw_umin_i64_seq_cst:
17553; RV64I:       # %bb.0:
17554; RV64I-NEXT:    addi sp, sp, -48
17555; RV64I-NEXT:    sd ra, 40(sp)
17556; RV64I-NEXT:    sd s0, 32(sp)
17557; RV64I-NEXT:    sd s1, 24(sp)
17558; RV64I-NEXT:    sd s2, 16(sp)
17559; RV64I-NEXT:    mv s0, a1
17560; RV64I-NEXT:    mv s1, a0
17561; RV64I-NEXT:    ld a2, 0(a0)
17562; RV64I-NEXT:    addi s2, sp, 8
17563; RV64I-NEXT:  .LBB219_1: # %atomicrmw.start
17564; RV64I-NEXT:    # =>This Inner Loop Header: Depth=1
17565; RV64I-NEXT:    sd a2, 8(sp)
17566; RV64I-NEXT:    bgeu s0, a2, .LBB219_3
17567; RV64I-NEXT:  # %bb.2: # %atomicrmw.start
17568; RV64I-NEXT:    # in Loop: Header=BB219_1 Depth=1
17569; RV64I-NEXT:    mv a2, s0
17570; RV64I-NEXT:  .LBB219_3: # %atomicrmw.start
17571; RV64I-NEXT:    # in Loop: Header=BB219_1 Depth=1
17572; RV64I-NEXT:    mv a0, s1
17573; RV64I-NEXT:    mv a1, s2
17574; RV64I-NEXT:    addi a3, zero, 5
17575; RV64I-NEXT:    addi a4, zero, 5
17576; RV64I-NEXT:    call __atomic_compare_exchange_8
17577; RV64I-NEXT:    ld a2, 8(sp)
17578; RV64I-NEXT:    beqz a0, .LBB219_1
17579; RV64I-NEXT:  # %bb.4: # %atomicrmw.end
17580; RV64I-NEXT:    mv a0, a2
17581; RV64I-NEXT:    ld s2, 16(sp)
17582; RV64I-NEXT:    ld s1, 24(sp)
17583; RV64I-NEXT:    ld s0, 32(sp)
17584; RV64I-NEXT:    ld ra, 40(sp)
17585; RV64I-NEXT:    addi sp, sp, 48
17586; RV64I-NEXT:    ret
17587;
17588; RV64IA-LABEL: atomicrmw_umin_i64_seq_cst:
17589; RV64IA:       # %bb.0:
17590; RV64IA-NEXT:    amominu.d.aqrl a0, a1, (a0)
17591; RV64IA-NEXT:    ret
17592  %1 = atomicrmw umin i64* %a, i64 %b seq_cst
17593  ret i64 %1
17594}
17595