1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32I %s
4; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
5; RUN:   | FileCheck -check-prefix=RV32IA %s
6; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
7; RUN:   | FileCheck -check-prefix=RV64I %s
8; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
9; RUN:   | FileCheck -check-prefix=RV64IA %s
10
11define void @cmpxchg_i8_monotonic_monotonic(i8* %ptr, i8 %cmp, i8 %val) nounwind {
12; RV32I-LABEL: cmpxchg_i8_monotonic_monotonic:
13; RV32I:       # %bb.0:
14; RV32I-NEXT:    addi sp, sp, -16
15; RV32I-NEXT:    sw ra, 12(sp)
16; RV32I-NEXT:    sb a1, 11(sp)
17; RV32I-NEXT:    addi a1, sp, 11
18; RV32I-NEXT:    mv a3, zero
19; RV32I-NEXT:    mv a4, zero
20; RV32I-NEXT:    call __atomic_compare_exchange_1
21; RV32I-NEXT:    lw ra, 12(sp)
22; RV32I-NEXT:    addi sp, sp, 16
23; RV32I-NEXT:    ret
24;
25; RV32IA-LABEL: cmpxchg_i8_monotonic_monotonic:
26; RV32IA:       # %bb.0:
27; RV32IA-NEXT:    andi a3, a0, -4
28; RV32IA-NEXT:    slli a0, a0, 3
29; RV32IA-NEXT:    andi a0, a0, 24
30; RV32IA-NEXT:    addi a4, zero, 255
31; RV32IA-NEXT:    sll a4, a4, a0
32; RV32IA-NEXT:    andi a1, a1, 255
33; RV32IA-NEXT:    sll a1, a1, a0
34; RV32IA-NEXT:    andi a2, a2, 255
35; RV32IA-NEXT:    sll a0, a2, a0
36; RV32IA-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
37; RV32IA-NEXT:    lr.w a2, (a3)
38; RV32IA-NEXT:    and a5, a2, a4
39; RV32IA-NEXT:    bne a5, a1, .LBB0_3
40; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB0_1 Depth=1
41; RV32IA-NEXT:    xor a5, a2, a0
42; RV32IA-NEXT:    and a5, a5, a4
43; RV32IA-NEXT:    xor a5, a2, a5
44; RV32IA-NEXT:    sc.w a5, a5, (a3)
45; RV32IA-NEXT:    bnez a5, .LBB0_1
46; RV32IA-NEXT:  .LBB0_3:
47; RV32IA-NEXT:    ret
48;
49; RV64I-LABEL: cmpxchg_i8_monotonic_monotonic:
50; RV64I:       # %bb.0:
51; RV64I-NEXT:    addi sp, sp, -16
52; RV64I-NEXT:    sd ra, 8(sp)
53; RV64I-NEXT:    sb a1, 7(sp)
54; RV64I-NEXT:    addi a1, sp, 7
55; RV64I-NEXT:    mv a3, zero
56; RV64I-NEXT:    mv a4, zero
57; RV64I-NEXT:    call __atomic_compare_exchange_1
58; RV64I-NEXT:    ld ra, 8(sp)
59; RV64I-NEXT:    addi sp, sp, 16
60; RV64I-NEXT:    ret
61;
62; RV64IA-LABEL: cmpxchg_i8_monotonic_monotonic:
63; RV64IA:       # %bb.0:
64; RV64IA-NEXT:    andi a3, a0, -4
65; RV64IA-NEXT:    slli a0, a0, 3
66; RV64IA-NEXT:    andi a0, a0, 24
67; RV64IA-NEXT:    addi a4, zero, 255
68; RV64IA-NEXT:    sllw a4, a4, a0
69; RV64IA-NEXT:    andi a1, a1, 255
70; RV64IA-NEXT:    sllw a1, a1, a0
71; RV64IA-NEXT:    andi a2, a2, 255
72; RV64IA-NEXT:    sllw a0, a2, a0
73; RV64IA-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
74; RV64IA-NEXT:    lr.w a2, (a3)
75; RV64IA-NEXT:    and a5, a2, a4
76; RV64IA-NEXT:    bne a5, a1, .LBB0_3
77; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB0_1 Depth=1
78; RV64IA-NEXT:    xor a5, a2, a0
79; RV64IA-NEXT:    and a5, a5, a4
80; RV64IA-NEXT:    xor a5, a2, a5
81; RV64IA-NEXT:    sc.w a5, a5, (a3)
82; RV64IA-NEXT:    bnez a5, .LBB0_1
83; RV64IA-NEXT:  .LBB0_3:
84; RV64IA-NEXT:    ret
85  %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val monotonic monotonic
86  ret void
87}
88
89define void @cmpxchg_i8_acquire_monotonic(i8* %ptr, i8 %cmp, i8 %val) nounwind {
90; RV32I-LABEL: cmpxchg_i8_acquire_monotonic:
91; RV32I:       # %bb.0:
92; RV32I-NEXT:    addi sp, sp, -16
93; RV32I-NEXT:    sw ra, 12(sp)
94; RV32I-NEXT:    sb a1, 11(sp)
95; RV32I-NEXT:    addi a1, sp, 11
96; RV32I-NEXT:    addi a3, zero, 2
97; RV32I-NEXT:    mv a4, zero
98; RV32I-NEXT:    call __atomic_compare_exchange_1
99; RV32I-NEXT:    lw ra, 12(sp)
100; RV32I-NEXT:    addi sp, sp, 16
101; RV32I-NEXT:    ret
102;
103; RV32IA-LABEL: cmpxchg_i8_acquire_monotonic:
104; RV32IA:       # %bb.0:
105; RV32IA-NEXT:    andi a3, a0, -4
106; RV32IA-NEXT:    slli a0, a0, 3
107; RV32IA-NEXT:    andi a0, a0, 24
108; RV32IA-NEXT:    addi a4, zero, 255
109; RV32IA-NEXT:    sll a4, a4, a0
110; RV32IA-NEXT:    andi a1, a1, 255
111; RV32IA-NEXT:    sll a1, a1, a0
112; RV32IA-NEXT:    andi a2, a2, 255
113; RV32IA-NEXT:    sll a0, a2, a0
114; RV32IA-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
115; RV32IA-NEXT:    lr.w.aq a2, (a3)
116; RV32IA-NEXT:    and a5, a2, a4
117; RV32IA-NEXT:    bne a5, a1, .LBB1_3
118; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB1_1 Depth=1
119; RV32IA-NEXT:    xor a5, a2, a0
120; RV32IA-NEXT:    and a5, a5, a4
121; RV32IA-NEXT:    xor a5, a2, a5
122; RV32IA-NEXT:    sc.w a5, a5, (a3)
123; RV32IA-NEXT:    bnez a5, .LBB1_1
124; RV32IA-NEXT:  .LBB1_3:
125; RV32IA-NEXT:    ret
126;
127; RV64I-LABEL: cmpxchg_i8_acquire_monotonic:
128; RV64I:       # %bb.0:
129; RV64I-NEXT:    addi sp, sp, -16
130; RV64I-NEXT:    sd ra, 8(sp)
131; RV64I-NEXT:    sb a1, 7(sp)
132; RV64I-NEXT:    addi a1, sp, 7
133; RV64I-NEXT:    addi a3, zero, 2
134; RV64I-NEXT:    mv a4, zero
135; RV64I-NEXT:    call __atomic_compare_exchange_1
136; RV64I-NEXT:    ld ra, 8(sp)
137; RV64I-NEXT:    addi sp, sp, 16
138; RV64I-NEXT:    ret
139;
140; RV64IA-LABEL: cmpxchg_i8_acquire_monotonic:
141; RV64IA:       # %bb.0:
142; RV64IA-NEXT:    andi a3, a0, -4
143; RV64IA-NEXT:    slli a0, a0, 3
144; RV64IA-NEXT:    andi a0, a0, 24
145; RV64IA-NEXT:    addi a4, zero, 255
146; RV64IA-NEXT:    sllw a4, a4, a0
147; RV64IA-NEXT:    andi a1, a1, 255
148; RV64IA-NEXT:    sllw a1, a1, a0
149; RV64IA-NEXT:    andi a2, a2, 255
150; RV64IA-NEXT:    sllw a0, a2, a0
151; RV64IA-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
152; RV64IA-NEXT:    lr.w.aq a2, (a3)
153; RV64IA-NEXT:    and a5, a2, a4
154; RV64IA-NEXT:    bne a5, a1, .LBB1_3
155; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB1_1 Depth=1
156; RV64IA-NEXT:    xor a5, a2, a0
157; RV64IA-NEXT:    and a5, a5, a4
158; RV64IA-NEXT:    xor a5, a2, a5
159; RV64IA-NEXT:    sc.w a5, a5, (a3)
160; RV64IA-NEXT:    bnez a5, .LBB1_1
161; RV64IA-NEXT:  .LBB1_3:
162; RV64IA-NEXT:    ret
163  %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acquire monotonic
164  ret void
165}
166
167define void @cmpxchg_i8_acquire_acquire(i8* %ptr, i8 %cmp, i8 %val) nounwind {
168; RV32I-LABEL: cmpxchg_i8_acquire_acquire:
169; RV32I:       # %bb.0:
170; RV32I-NEXT:    addi sp, sp, -16
171; RV32I-NEXT:    sw ra, 12(sp)
172; RV32I-NEXT:    sb a1, 11(sp)
173; RV32I-NEXT:    addi a1, sp, 11
174; RV32I-NEXT:    addi a3, zero, 2
175; RV32I-NEXT:    addi a4, zero, 2
176; RV32I-NEXT:    call __atomic_compare_exchange_1
177; RV32I-NEXT:    lw ra, 12(sp)
178; RV32I-NEXT:    addi sp, sp, 16
179; RV32I-NEXT:    ret
180;
181; RV32IA-LABEL: cmpxchg_i8_acquire_acquire:
182; RV32IA:       # %bb.0:
183; RV32IA-NEXT:    andi a3, a0, -4
184; RV32IA-NEXT:    slli a0, a0, 3
185; RV32IA-NEXT:    andi a0, a0, 24
186; RV32IA-NEXT:    addi a4, zero, 255
187; RV32IA-NEXT:    sll a4, a4, a0
188; RV32IA-NEXT:    andi a1, a1, 255
189; RV32IA-NEXT:    sll a1, a1, a0
190; RV32IA-NEXT:    andi a2, a2, 255
191; RV32IA-NEXT:    sll a0, a2, a0
192; RV32IA-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
193; RV32IA-NEXT:    lr.w.aq a2, (a3)
194; RV32IA-NEXT:    and a5, a2, a4
195; RV32IA-NEXT:    bne a5, a1, .LBB2_3
196; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB2_1 Depth=1
197; RV32IA-NEXT:    xor a5, a2, a0
198; RV32IA-NEXT:    and a5, a5, a4
199; RV32IA-NEXT:    xor a5, a2, a5
200; RV32IA-NEXT:    sc.w a5, a5, (a3)
201; RV32IA-NEXT:    bnez a5, .LBB2_1
202; RV32IA-NEXT:  .LBB2_3:
203; RV32IA-NEXT:    ret
204;
205; RV64I-LABEL: cmpxchg_i8_acquire_acquire:
206; RV64I:       # %bb.0:
207; RV64I-NEXT:    addi sp, sp, -16
208; RV64I-NEXT:    sd ra, 8(sp)
209; RV64I-NEXT:    sb a1, 7(sp)
210; RV64I-NEXT:    addi a1, sp, 7
211; RV64I-NEXT:    addi a3, zero, 2
212; RV64I-NEXT:    addi a4, zero, 2
213; RV64I-NEXT:    call __atomic_compare_exchange_1
214; RV64I-NEXT:    ld ra, 8(sp)
215; RV64I-NEXT:    addi sp, sp, 16
216; RV64I-NEXT:    ret
217;
218; RV64IA-LABEL: cmpxchg_i8_acquire_acquire:
219; RV64IA:       # %bb.0:
220; RV64IA-NEXT:    andi a3, a0, -4
221; RV64IA-NEXT:    slli a0, a0, 3
222; RV64IA-NEXT:    andi a0, a0, 24
223; RV64IA-NEXT:    addi a4, zero, 255
224; RV64IA-NEXT:    sllw a4, a4, a0
225; RV64IA-NEXT:    andi a1, a1, 255
226; RV64IA-NEXT:    sllw a1, a1, a0
227; RV64IA-NEXT:    andi a2, a2, 255
228; RV64IA-NEXT:    sllw a0, a2, a0
229; RV64IA-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
230; RV64IA-NEXT:    lr.w.aq a2, (a3)
231; RV64IA-NEXT:    and a5, a2, a4
232; RV64IA-NEXT:    bne a5, a1, .LBB2_3
233; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB2_1 Depth=1
234; RV64IA-NEXT:    xor a5, a2, a0
235; RV64IA-NEXT:    and a5, a5, a4
236; RV64IA-NEXT:    xor a5, a2, a5
237; RV64IA-NEXT:    sc.w a5, a5, (a3)
238; RV64IA-NEXT:    bnez a5, .LBB2_1
239; RV64IA-NEXT:  .LBB2_3:
240; RV64IA-NEXT:    ret
241  %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acquire acquire
242  ret void
243}
244
245define void @cmpxchg_i8_release_monotonic(i8* %ptr, i8 %cmp, i8 %val) nounwind {
246; RV32I-LABEL: cmpxchg_i8_release_monotonic:
247; RV32I:       # %bb.0:
248; RV32I-NEXT:    addi sp, sp, -16
249; RV32I-NEXT:    sw ra, 12(sp)
250; RV32I-NEXT:    sb a1, 11(sp)
251; RV32I-NEXT:    addi a1, sp, 11
252; RV32I-NEXT:    addi a3, zero, 3
253; RV32I-NEXT:    mv a4, zero
254; RV32I-NEXT:    call __atomic_compare_exchange_1
255; RV32I-NEXT:    lw ra, 12(sp)
256; RV32I-NEXT:    addi sp, sp, 16
257; RV32I-NEXT:    ret
258;
259; RV32IA-LABEL: cmpxchg_i8_release_monotonic:
260; RV32IA:       # %bb.0:
261; RV32IA-NEXT:    andi a3, a0, -4
262; RV32IA-NEXT:    slli a0, a0, 3
263; RV32IA-NEXT:    andi a0, a0, 24
264; RV32IA-NEXT:    addi a4, zero, 255
265; RV32IA-NEXT:    sll a4, a4, a0
266; RV32IA-NEXT:    andi a1, a1, 255
267; RV32IA-NEXT:    sll a1, a1, a0
268; RV32IA-NEXT:    andi a2, a2, 255
269; RV32IA-NEXT:    sll a0, a2, a0
270; RV32IA-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
271; RV32IA-NEXT:    lr.w a2, (a3)
272; RV32IA-NEXT:    and a5, a2, a4
273; RV32IA-NEXT:    bne a5, a1, .LBB3_3
274; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB3_1 Depth=1
275; RV32IA-NEXT:    xor a5, a2, a0
276; RV32IA-NEXT:    and a5, a5, a4
277; RV32IA-NEXT:    xor a5, a2, a5
278; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
279; RV32IA-NEXT:    bnez a5, .LBB3_1
280; RV32IA-NEXT:  .LBB3_3:
281; RV32IA-NEXT:    ret
282;
283; RV64I-LABEL: cmpxchg_i8_release_monotonic:
284; RV64I:       # %bb.0:
285; RV64I-NEXT:    addi sp, sp, -16
286; RV64I-NEXT:    sd ra, 8(sp)
287; RV64I-NEXT:    sb a1, 7(sp)
288; RV64I-NEXT:    addi a1, sp, 7
289; RV64I-NEXT:    addi a3, zero, 3
290; RV64I-NEXT:    mv a4, zero
291; RV64I-NEXT:    call __atomic_compare_exchange_1
292; RV64I-NEXT:    ld ra, 8(sp)
293; RV64I-NEXT:    addi sp, sp, 16
294; RV64I-NEXT:    ret
295;
296; RV64IA-LABEL: cmpxchg_i8_release_monotonic:
297; RV64IA:       # %bb.0:
298; RV64IA-NEXT:    andi a3, a0, -4
299; RV64IA-NEXT:    slli a0, a0, 3
300; RV64IA-NEXT:    andi a0, a0, 24
301; RV64IA-NEXT:    addi a4, zero, 255
302; RV64IA-NEXT:    sllw a4, a4, a0
303; RV64IA-NEXT:    andi a1, a1, 255
304; RV64IA-NEXT:    sllw a1, a1, a0
305; RV64IA-NEXT:    andi a2, a2, 255
306; RV64IA-NEXT:    sllw a0, a2, a0
307; RV64IA-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
308; RV64IA-NEXT:    lr.w a2, (a3)
309; RV64IA-NEXT:    and a5, a2, a4
310; RV64IA-NEXT:    bne a5, a1, .LBB3_3
311; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB3_1 Depth=1
312; RV64IA-NEXT:    xor a5, a2, a0
313; RV64IA-NEXT:    and a5, a5, a4
314; RV64IA-NEXT:    xor a5, a2, a5
315; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
316; RV64IA-NEXT:    bnez a5, .LBB3_1
317; RV64IA-NEXT:  .LBB3_3:
318; RV64IA-NEXT:    ret
319  %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val release monotonic
320  ret void
321}
322
323define void @cmpxchg_i8_release_acquire(i8* %ptr, i8 %cmp, i8 %val) nounwind {
324; RV32I-LABEL: cmpxchg_i8_release_acquire:
325; RV32I:       # %bb.0:
326; RV32I-NEXT:    addi sp, sp, -16
327; RV32I-NEXT:    sw ra, 12(sp)
328; RV32I-NEXT:    sb a1, 11(sp)
329; RV32I-NEXT:    addi a1, sp, 11
330; RV32I-NEXT:    addi a3, zero, 3
331; RV32I-NEXT:    addi a4, zero, 2
332; RV32I-NEXT:    call __atomic_compare_exchange_1
333; RV32I-NEXT:    lw ra, 12(sp)
334; RV32I-NEXT:    addi sp, sp, 16
335; RV32I-NEXT:    ret
336;
337; RV32IA-LABEL: cmpxchg_i8_release_acquire:
338; RV32IA:       # %bb.0:
339; RV32IA-NEXT:    andi a3, a0, -4
340; RV32IA-NEXT:    slli a0, a0, 3
341; RV32IA-NEXT:    andi a0, a0, 24
342; RV32IA-NEXT:    addi a4, zero, 255
343; RV32IA-NEXT:    sll a4, a4, a0
344; RV32IA-NEXT:    andi a1, a1, 255
345; RV32IA-NEXT:    sll a1, a1, a0
346; RV32IA-NEXT:    andi a2, a2, 255
347; RV32IA-NEXT:    sll a0, a2, a0
348; RV32IA-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
349; RV32IA-NEXT:    lr.w a2, (a3)
350; RV32IA-NEXT:    and a5, a2, a4
351; RV32IA-NEXT:    bne a5, a1, .LBB4_3
352; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB4_1 Depth=1
353; RV32IA-NEXT:    xor a5, a2, a0
354; RV32IA-NEXT:    and a5, a5, a4
355; RV32IA-NEXT:    xor a5, a2, a5
356; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
357; RV32IA-NEXT:    bnez a5, .LBB4_1
358; RV32IA-NEXT:  .LBB4_3:
359; RV32IA-NEXT:    ret
360;
361; RV64I-LABEL: cmpxchg_i8_release_acquire:
362; RV64I:       # %bb.0:
363; RV64I-NEXT:    addi sp, sp, -16
364; RV64I-NEXT:    sd ra, 8(sp)
365; RV64I-NEXT:    sb a1, 7(sp)
366; RV64I-NEXT:    addi a1, sp, 7
367; RV64I-NEXT:    addi a3, zero, 3
368; RV64I-NEXT:    addi a4, zero, 2
369; RV64I-NEXT:    call __atomic_compare_exchange_1
370; RV64I-NEXT:    ld ra, 8(sp)
371; RV64I-NEXT:    addi sp, sp, 16
372; RV64I-NEXT:    ret
373;
374; RV64IA-LABEL: cmpxchg_i8_release_acquire:
375; RV64IA:       # %bb.0:
376; RV64IA-NEXT:    andi a3, a0, -4
377; RV64IA-NEXT:    slli a0, a0, 3
378; RV64IA-NEXT:    andi a0, a0, 24
379; RV64IA-NEXT:    addi a4, zero, 255
380; RV64IA-NEXT:    sllw a4, a4, a0
381; RV64IA-NEXT:    andi a1, a1, 255
382; RV64IA-NEXT:    sllw a1, a1, a0
383; RV64IA-NEXT:    andi a2, a2, 255
384; RV64IA-NEXT:    sllw a0, a2, a0
385; RV64IA-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
386; RV64IA-NEXT:    lr.w a2, (a3)
387; RV64IA-NEXT:    and a5, a2, a4
388; RV64IA-NEXT:    bne a5, a1, .LBB4_3
389; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB4_1 Depth=1
390; RV64IA-NEXT:    xor a5, a2, a0
391; RV64IA-NEXT:    and a5, a5, a4
392; RV64IA-NEXT:    xor a5, a2, a5
393; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
394; RV64IA-NEXT:    bnez a5, .LBB4_1
395; RV64IA-NEXT:  .LBB4_3:
396; RV64IA-NEXT:    ret
397  %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val release acquire
398  ret void
399}
400
401define void @cmpxchg_i8_acq_rel_monotonic(i8* %ptr, i8 %cmp, i8 %val) nounwind {
402; RV32I-LABEL: cmpxchg_i8_acq_rel_monotonic:
403; RV32I:       # %bb.0:
404; RV32I-NEXT:    addi sp, sp, -16
405; RV32I-NEXT:    sw ra, 12(sp)
406; RV32I-NEXT:    sb a1, 11(sp)
407; RV32I-NEXT:    addi a1, sp, 11
408; RV32I-NEXT:    addi a3, zero, 4
409; RV32I-NEXT:    mv a4, zero
410; RV32I-NEXT:    call __atomic_compare_exchange_1
411; RV32I-NEXT:    lw ra, 12(sp)
412; RV32I-NEXT:    addi sp, sp, 16
413; RV32I-NEXT:    ret
414;
415; RV32IA-LABEL: cmpxchg_i8_acq_rel_monotonic:
416; RV32IA:       # %bb.0:
417; RV32IA-NEXT:    andi a3, a0, -4
418; RV32IA-NEXT:    slli a0, a0, 3
419; RV32IA-NEXT:    andi a0, a0, 24
420; RV32IA-NEXT:    addi a4, zero, 255
421; RV32IA-NEXT:    sll a4, a4, a0
422; RV32IA-NEXT:    andi a1, a1, 255
423; RV32IA-NEXT:    sll a1, a1, a0
424; RV32IA-NEXT:    andi a2, a2, 255
425; RV32IA-NEXT:    sll a0, a2, a0
426; RV32IA-NEXT:  .LBB5_1: # =>This Inner Loop Header: Depth=1
427; RV32IA-NEXT:    lr.w.aq a2, (a3)
428; RV32IA-NEXT:    and a5, a2, a4
429; RV32IA-NEXT:    bne a5, a1, .LBB5_3
430; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB5_1 Depth=1
431; RV32IA-NEXT:    xor a5, a2, a0
432; RV32IA-NEXT:    and a5, a5, a4
433; RV32IA-NEXT:    xor a5, a2, a5
434; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
435; RV32IA-NEXT:    bnez a5, .LBB5_1
436; RV32IA-NEXT:  .LBB5_3:
437; RV32IA-NEXT:    ret
438;
439; RV64I-LABEL: cmpxchg_i8_acq_rel_monotonic:
440; RV64I:       # %bb.0:
441; RV64I-NEXT:    addi sp, sp, -16
442; RV64I-NEXT:    sd ra, 8(sp)
443; RV64I-NEXT:    sb a1, 7(sp)
444; RV64I-NEXT:    addi a1, sp, 7
445; RV64I-NEXT:    addi a3, zero, 4
446; RV64I-NEXT:    mv a4, zero
447; RV64I-NEXT:    call __atomic_compare_exchange_1
448; RV64I-NEXT:    ld ra, 8(sp)
449; RV64I-NEXT:    addi sp, sp, 16
450; RV64I-NEXT:    ret
451;
452; RV64IA-LABEL: cmpxchg_i8_acq_rel_monotonic:
453; RV64IA:       # %bb.0:
454; RV64IA-NEXT:    andi a3, a0, -4
455; RV64IA-NEXT:    slli a0, a0, 3
456; RV64IA-NEXT:    andi a0, a0, 24
457; RV64IA-NEXT:    addi a4, zero, 255
458; RV64IA-NEXT:    sllw a4, a4, a0
459; RV64IA-NEXT:    andi a1, a1, 255
460; RV64IA-NEXT:    sllw a1, a1, a0
461; RV64IA-NEXT:    andi a2, a2, 255
462; RV64IA-NEXT:    sllw a0, a2, a0
463; RV64IA-NEXT:  .LBB5_1: # =>This Inner Loop Header: Depth=1
464; RV64IA-NEXT:    lr.w.aq a2, (a3)
465; RV64IA-NEXT:    and a5, a2, a4
466; RV64IA-NEXT:    bne a5, a1, .LBB5_3
467; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB5_1 Depth=1
468; RV64IA-NEXT:    xor a5, a2, a0
469; RV64IA-NEXT:    and a5, a5, a4
470; RV64IA-NEXT:    xor a5, a2, a5
471; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
472; RV64IA-NEXT:    bnez a5, .LBB5_1
473; RV64IA-NEXT:  .LBB5_3:
474; RV64IA-NEXT:    ret
475  %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acq_rel monotonic
476  ret void
477}
478
479define void @cmpxchg_i8_acq_rel_acquire(i8* %ptr, i8 %cmp, i8 %val) nounwind {
480; RV32I-LABEL: cmpxchg_i8_acq_rel_acquire:
481; RV32I:       # %bb.0:
482; RV32I-NEXT:    addi sp, sp, -16
483; RV32I-NEXT:    sw ra, 12(sp)
484; RV32I-NEXT:    sb a1, 11(sp)
485; RV32I-NEXT:    addi a1, sp, 11
486; RV32I-NEXT:    addi a3, zero, 4
487; RV32I-NEXT:    addi a4, zero, 2
488; RV32I-NEXT:    call __atomic_compare_exchange_1
489; RV32I-NEXT:    lw ra, 12(sp)
490; RV32I-NEXT:    addi sp, sp, 16
491; RV32I-NEXT:    ret
492;
493; RV32IA-LABEL: cmpxchg_i8_acq_rel_acquire:
494; RV32IA:       # %bb.0:
495; RV32IA-NEXT:    andi a3, a0, -4
496; RV32IA-NEXT:    slli a0, a0, 3
497; RV32IA-NEXT:    andi a0, a0, 24
498; RV32IA-NEXT:    addi a4, zero, 255
499; RV32IA-NEXT:    sll a4, a4, a0
500; RV32IA-NEXT:    andi a1, a1, 255
501; RV32IA-NEXT:    sll a1, a1, a0
502; RV32IA-NEXT:    andi a2, a2, 255
503; RV32IA-NEXT:    sll a0, a2, a0
504; RV32IA-NEXT:  .LBB6_1: # =>This Inner Loop Header: Depth=1
505; RV32IA-NEXT:    lr.w.aq a2, (a3)
506; RV32IA-NEXT:    and a5, a2, a4
507; RV32IA-NEXT:    bne a5, a1, .LBB6_3
508; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB6_1 Depth=1
509; RV32IA-NEXT:    xor a5, a2, a0
510; RV32IA-NEXT:    and a5, a5, a4
511; RV32IA-NEXT:    xor a5, a2, a5
512; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
513; RV32IA-NEXT:    bnez a5, .LBB6_1
514; RV32IA-NEXT:  .LBB6_3:
515; RV32IA-NEXT:    ret
516;
517; RV64I-LABEL: cmpxchg_i8_acq_rel_acquire:
518; RV64I:       # %bb.0:
519; RV64I-NEXT:    addi sp, sp, -16
520; RV64I-NEXT:    sd ra, 8(sp)
521; RV64I-NEXT:    sb a1, 7(sp)
522; RV64I-NEXT:    addi a1, sp, 7
523; RV64I-NEXT:    addi a3, zero, 4
524; RV64I-NEXT:    addi a4, zero, 2
525; RV64I-NEXT:    call __atomic_compare_exchange_1
526; RV64I-NEXT:    ld ra, 8(sp)
527; RV64I-NEXT:    addi sp, sp, 16
528; RV64I-NEXT:    ret
529;
530; RV64IA-LABEL: cmpxchg_i8_acq_rel_acquire:
531; RV64IA:       # %bb.0:
532; RV64IA-NEXT:    andi a3, a0, -4
533; RV64IA-NEXT:    slli a0, a0, 3
534; RV64IA-NEXT:    andi a0, a0, 24
535; RV64IA-NEXT:    addi a4, zero, 255
536; RV64IA-NEXT:    sllw a4, a4, a0
537; RV64IA-NEXT:    andi a1, a1, 255
538; RV64IA-NEXT:    sllw a1, a1, a0
539; RV64IA-NEXT:    andi a2, a2, 255
540; RV64IA-NEXT:    sllw a0, a2, a0
541; RV64IA-NEXT:  .LBB6_1: # =>This Inner Loop Header: Depth=1
542; RV64IA-NEXT:    lr.w.aq a2, (a3)
543; RV64IA-NEXT:    and a5, a2, a4
544; RV64IA-NEXT:    bne a5, a1, .LBB6_3
545; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB6_1 Depth=1
546; RV64IA-NEXT:    xor a5, a2, a0
547; RV64IA-NEXT:    and a5, a5, a4
548; RV64IA-NEXT:    xor a5, a2, a5
549; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
550; RV64IA-NEXT:    bnez a5, .LBB6_1
551; RV64IA-NEXT:  .LBB6_3:
552; RV64IA-NEXT:    ret
553  %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acq_rel acquire
554  ret void
555}
556
557define void @cmpxchg_i8_seq_cst_monotonic(i8* %ptr, i8 %cmp, i8 %val) nounwind {
558; RV32I-LABEL: cmpxchg_i8_seq_cst_monotonic:
559; RV32I:       # %bb.0:
560; RV32I-NEXT:    addi sp, sp, -16
561; RV32I-NEXT:    sw ra, 12(sp)
562; RV32I-NEXT:    sb a1, 11(sp)
563; RV32I-NEXT:    addi a1, sp, 11
564; RV32I-NEXT:    addi a3, zero, 5
565; RV32I-NEXT:    mv a4, zero
566; RV32I-NEXT:    call __atomic_compare_exchange_1
567; RV32I-NEXT:    lw ra, 12(sp)
568; RV32I-NEXT:    addi sp, sp, 16
569; RV32I-NEXT:    ret
570;
571; RV32IA-LABEL: cmpxchg_i8_seq_cst_monotonic:
572; RV32IA:       # %bb.0:
573; RV32IA-NEXT:    andi a3, a0, -4
574; RV32IA-NEXT:    slli a0, a0, 3
575; RV32IA-NEXT:    andi a0, a0, 24
576; RV32IA-NEXT:    addi a4, zero, 255
577; RV32IA-NEXT:    sll a4, a4, a0
578; RV32IA-NEXT:    andi a1, a1, 255
579; RV32IA-NEXT:    sll a1, a1, a0
580; RV32IA-NEXT:    andi a2, a2, 255
581; RV32IA-NEXT:    sll a0, a2, a0
582; RV32IA-NEXT:  .LBB7_1: # =>This Inner Loop Header: Depth=1
583; RV32IA-NEXT:    lr.w.aqrl a2, (a3)
584; RV32IA-NEXT:    and a5, a2, a4
585; RV32IA-NEXT:    bne a5, a1, .LBB7_3
586; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB7_1 Depth=1
587; RV32IA-NEXT:    xor a5, a2, a0
588; RV32IA-NEXT:    and a5, a5, a4
589; RV32IA-NEXT:    xor a5, a2, a5
590; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a3)
591; RV32IA-NEXT:    bnez a5, .LBB7_1
592; RV32IA-NEXT:  .LBB7_3:
593; RV32IA-NEXT:    ret
594;
595; RV64I-LABEL: cmpxchg_i8_seq_cst_monotonic:
596; RV64I:       # %bb.0:
597; RV64I-NEXT:    addi sp, sp, -16
598; RV64I-NEXT:    sd ra, 8(sp)
599; RV64I-NEXT:    sb a1, 7(sp)
600; RV64I-NEXT:    addi a1, sp, 7
601; RV64I-NEXT:    addi a3, zero, 5
602; RV64I-NEXT:    mv a4, zero
603; RV64I-NEXT:    call __atomic_compare_exchange_1
604; RV64I-NEXT:    ld ra, 8(sp)
605; RV64I-NEXT:    addi sp, sp, 16
606; RV64I-NEXT:    ret
607;
608; RV64IA-LABEL: cmpxchg_i8_seq_cst_monotonic:
609; RV64IA:       # %bb.0:
610; RV64IA-NEXT:    andi a3, a0, -4
611; RV64IA-NEXT:    slli a0, a0, 3
612; RV64IA-NEXT:    andi a0, a0, 24
613; RV64IA-NEXT:    addi a4, zero, 255
614; RV64IA-NEXT:    sllw a4, a4, a0
615; RV64IA-NEXT:    andi a1, a1, 255
616; RV64IA-NEXT:    sllw a1, a1, a0
617; RV64IA-NEXT:    andi a2, a2, 255
618; RV64IA-NEXT:    sllw a0, a2, a0
619; RV64IA-NEXT:  .LBB7_1: # =>This Inner Loop Header: Depth=1
620; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
621; RV64IA-NEXT:    and a5, a2, a4
622; RV64IA-NEXT:    bne a5, a1, .LBB7_3
623; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB7_1 Depth=1
624; RV64IA-NEXT:    xor a5, a2, a0
625; RV64IA-NEXT:    and a5, a5, a4
626; RV64IA-NEXT:    xor a5, a2, a5
627; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a3)
628; RV64IA-NEXT:    bnez a5, .LBB7_1
629; RV64IA-NEXT:  .LBB7_3:
630; RV64IA-NEXT:    ret
631  %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst monotonic
632  ret void
633}
634
635define void @cmpxchg_i8_seq_cst_acquire(i8* %ptr, i8 %cmp, i8 %val) nounwind {
636; RV32I-LABEL: cmpxchg_i8_seq_cst_acquire:
637; RV32I:       # %bb.0:
638; RV32I-NEXT:    addi sp, sp, -16
639; RV32I-NEXT:    sw ra, 12(sp)
640; RV32I-NEXT:    sb a1, 11(sp)
641; RV32I-NEXT:    addi a1, sp, 11
642; RV32I-NEXT:    addi a3, zero, 5
643; RV32I-NEXT:    addi a4, zero, 2
644; RV32I-NEXT:    call __atomic_compare_exchange_1
645; RV32I-NEXT:    lw ra, 12(sp)
646; RV32I-NEXT:    addi sp, sp, 16
647; RV32I-NEXT:    ret
648;
649; RV32IA-LABEL: cmpxchg_i8_seq_cst_acquire:
650; RV32IA:       # %bb.0:
651; RV32IA-NEXT:    andi a3, a0, -4
652; RV32IA-NEXT:    slli a0, a0, 3
653; RV32IA-NEXT:    andi a0, a0, 24
654; RV32IA-NEXT:    addi a4, zero, 255
655; RV32IA-NEXT:    sll a4, a4, a0
656; RV32IA-NEXT:    andi a1, a1, 255
657; RV32IA-NEXT:    sll a1, a1, a0
658; RV32IA-NEXT:    andi a2, a2, 255
659; RV32IA-NEXT:    sll a0, a2, a0
660; RV32IA-NEXT:  .LBB8_1: # =>This Inner Loop Header: Depth=1
661; RV32IA-NEXT:    lr.w.aqrl a2, (a3)
662; RV32IA-NEXT:    and a5, a2, a4
663; RV32IA-NEXT:    bne a5, a1, .LBB8_3
664; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB8_1 Depth=1
665; RV32IA-NEXT:    xor a5, a2, a0
666; RV32IA-NEXT:    and a5, a5, a4
667; RV32IA-NEXT:    xor a5, a2, a5
668; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a3)
669; RV32IA-NEXT:    bnez a5, .LBB8_1
670; RV32IA-NEXT:  .LBB8_3:
671; RV32IA-NEXT:    ret
672;
673; RV64I-LABEL: cmpxchg_i8_seq_cst_acquire:
674; RV64I:       # %bb.0:
675; RV64I-NEXT:    addi sp, sp, -16
676; RV64I-NEXT:    sd ra, 8(sp)
677; RV64I-NEXT:    sb a1, 7(sp)
678; RV64I-NEXT:    addi a1, sp, 7
679; RV64I-NEXT:    addi a3, zero, 5
680; RV64I-NEXT:    addi a4, zero, 2
681; RV64I-NEXT:    call __atomic_compare_exchange_1
682; RV64I-NEXT:    ld ra, 8(sp)
683; RV64I-NEXT:    addi sp, sp, 16
684; RV64I-NEXT:    ret
685;
686; RV64IA-LABEL: cmpxchg_i8_seq_cst_acquire:
687; RV64IA:       # %bb.0:
688; RV64IA-NEXT:    andi a3, a0, -4
689; RV64IA-NEXT:    slli a0, a0, 3
690; RV64IA-NEXT:    andi a0, a0, 24
691; RV64IA-NEXT:    addi a4, zero, 255
692; RV64IA-NEXT:    sllw a4, a4, a0
693; RV64IA-NEXT:    andi a1, a1, 255
694; RV64IA-NEXT:    sllw a1, a1, a0
695; RV64IA-NEXT:    andi a2, a2, 255
696; RV64IA-NEXT:    sllw a0, a2, a0
697; RV64IA-NEXT:  .LBB8_1: # =>This Inner Loop Header: Depth=1
698; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
699; RV64IA-NEXT:    and a5, a2, a4
700; RV64IA-NEXT:    bne a5, a1, .LBB8_3
701; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB8_1 Depth=1
702; RV64IA-NEXT:    xor a5, a2, a0
703; RV64IA-NEXT:    and a5, a5, a4
704; RV64IA-NEXT:    xor a5, a2, a5
705; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a3)
706; RV64IA-NEXT:    bnez a5, .LBB8_1
707; RV64IA-NEXT:  .LBB8_3:
708; RV64IA-NEXT:    ret
709  %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst acquire
710  ret void
711}
712
713define void @cmpxchg_i8_seq_cst_seq_cst(i8* %ptr, i8 %cmp, i8 %val) nounwind {
714; RV32I-LABEL: cmpxchg_i8_seq_cst_seq_cst:
715; RV32I:       # %bb.0:
716; RV32I-NEXT:    addi sp, sp, -16
717; RV32I-NEXT:    sw ra, 12(sp)
718; RV32I-NEXT:    sb a1, 11(sp)
719; RV32I-NEXT:    addi a1, sp, 11
720; RV32I-NEXT:    addi a3, zero, 5
721; RV32I-NEXT:    addi a4, zero, 5
722; RV32I-NEXT:    call __atomic_compare_exchange_1
723; RV32I-NEXT:    lw ra, 12(sp)
724; RV32I-NEXT:    addi sp, sp, 16
725; RV32I-NEXT:    ret
726;
727; RV32IA-LABEL: cmpxchg_i8_seq_cst_seq_cst:
728; RV32IA:       # %bb.0:
729; RV32IA-NEXT:    andi a3, a0, -4
730; RV32IA-NEXT:    slli a0, a0, 3
731; RV32IA-NEXT:    andi a0, a0, 24
732; RV32IA-NEXT:    addi a4, zero, 255
733; RV32IA-NEXT:    sll a4, a4, a0
734; RV32IA-NEXT:    andi a1, a1, 255
735; RV32IA-NEXT:    sll a1, a1, a0
736; RV32IA-NEXT:    andi a2, a2, 255
737; RV32IA-NEXT:    sll a0, a2, a0
738; RV32IA-NEXT:  .LBB9_1: # =>This Inner Loop Header: Depth=1
739; RV32IA-NEXT:    lr.w.aqrl a2, (a3)
740; RV32IA-NEXT:    and a5, a2, a4
741; RV32IA-NEXT:    bne a5, a1, .LBB9_3
742; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB9_1 Depth=1
743; RV32IA-NEXT:    xor a5, a2, a0
744; RV32IA-NEXT:    and a5, a5, a4
745; RV32IA-NEXT:    xor a5, a2, a5
746; RV32IA-NEXT:    sc.w.aqrl a5, a5, (a3)
747; RV32IA-NEXT:    bnez a5, .LBB9_1
748; RV32IA-NEXT:  .LBB9_3:
749; RV32IA-NEXT:    ret
750;
751; RV64I-LABEL: cmpxchg_i8_seq_cst_seq_cst:
752; RV64I:       # %bb.0:
753; RV64I-NEXT:    addi sp, sp, -16
754; RV64I-NEXT:    sd ra, 8(sp)
755; RV64I-NEXT:    sb a1, 7(sp)
756; RV64I-NEXT:    addi a1, sp, 7
757; RV64I-NEXT:    addi a3, zero, 5
758; RV64I-NEXT:    addi a4, zero, 5
759; RV64I-NEXT:    call __atomic_compare_exchange_1
760; RV64I-NEXT:    ld ra, 8(sp)
761; RV64I-NEXT:    addi sp, sp, 16
762; RV64I-NEXT:    ret
763;
764; RV64IA-LABEL: cmpxchg_i8_seq_cst_seq_cst:
765; RV64IA:       # %bb.0:
766; RV64IA-NEXT:    andi a3, a0, -4
767; RV64IA-NEXT:    slli a0, a0, 3
768; RV64IA-NEXT:    andi a0, a0, 24
769; RV64IA-NEXT:    addi a4, zero, 255
770; RV64IA-NEXT:    sllw a4, a4, a0
771; RV64IA-NEXT:    andi a1, a1, 255
772; RV64IA-NEXT:    sllw a1, a1, a0
773; RV64IA-NEXT:    andi a2, a2, 255
774; RV64IA-NEXT:    sllw a0, a2, a0
775; RV64IA-NEXT:  .LBB9_1: # =>This Inner Loop Header: Depth=1
776; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
777; RV64IA-NEXT:    and a5, a2, a4
778; RV64IA-NEXT:    bne a5, a1, .LBB9_3
779; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB9_1 Depth=1
780; RV64IA-NEXT:    xor a5, a2, a0
781; RV64IA-NEXT:    and a5, a5, a4
782; RV64IA-NEXT:    xor a5, a2, a5
783; RV64IA-NEXT:    sc.w.aqrl a5, a5, (a3)
784; RV64IA-NEXT:    bnez a5, .LBB9_1
785; RV64IA-NEXT:  .LBB9_3:
786; RV64IA-NEXT:    ret
787  %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst seq_cst
788  ret void
789}
790
791define void @cmpxchg_i16_monotonic_monotonic(i16* %ptr, i16 %cmp, i16 %val) nounwind {
792; RV32I-LABEL: cmpxchg_i16_monotonic_monotonic:
793; RV32I:       # %bb.0:
794; RV32I-NEXT:    addi sp, sp, -16
795; RV32I-NEXT:    sw ra, 12(sp)
796; RV32I-NEXT:    sh a1, 10(sp)
797; RV32I-NEXT:    addi a1, sp, 10
798; RV32I-NEXT:    mv a3, zero
799; RV32I-NEXT:    mv a4, zero
800; RV32I-NEXT:    call __atomic_compare_exchange_2
801; RV32I-NEXT:    lw ra, 12(sp)
802; RV32I-NEXT:    addi sp, sp, 16
803; RV32I-NEXT:    ret
804;
805; RV32IA-LABEL: cmpxchg_i16_monotonic_monotonic:
806; RV32IA:       # %bb.0:
807; RV32IA-NEXT:    andi a3, a0, -4
808; RV32IA-NEXT:    slli a0, a0, 3
809; RV32IA-NEXT:    andi a0, a0, 24
810; RV32IA-NEXT:    lui a4, 16
811; RV32IA-NEXT:    addi a4, a4, -1
812; RV32IA-NEXT:    sll a5, a4, a0
813; RV32IA-NEXT:    and a1, a1, a4
814; RV32IA-NEXT:    sll a1, a1, a0
815; RV32IA-NEXT:    and a2, a2, a4
816; RV32IA-NEXT:    sll a0, a2, a0
817; RV32IA-NEXT:  .LBB10_1: # =>This Inner Loop Header: Depth=1
818; RV32IA-NEXT:    lr.w a2, (a3)
819; RV32IA-NEXT:    and a4, a2, a5
820; RV32IA-NEXT:    bne a4, a1, .LBB10_3
821; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB10_1 Depth=1
822; RV32IA-NEXT:    xor a4, a2, a0
823; RV32IA-NEXT:    and a4, a4, a5
824; RV32IA-NEXT:    xor a4, a2, a4
825; RV32IA-NEXT:    sc.w a4, a4, (a3)
826; RV32IA-NEXT:    bnez a4, .LBB10_1
827; RV32IA-NEXT:  .LBB10_3:
828; RV32IA-NEXT:    ret
829;
830; RV64I-LABEL: cmpxchg_i16_monotonic_monotonic:
831; RV64I:       # %bb.0:
832; RV64I-NEXT:    addi sp, sp, -16
833; RV64I-NEXT:    sd ra, 8(sp)
834; RV64I-NEXT:    sh a1, 6(sp)
835; RV64I-NEXT:    addi a1, sp, 6
836; RV64I-NEXT:    mv a3, zero
837; RV64I-NEXT:    mv a4, zero
838; RV64I-NEXT:    call __atomic_compare_exchange_2
839; RV64I-NEXT:    ld ra, 8(sp)
840; RV64I-NEXT:    addi sp, sp, 16
841; RV64I-NEXT:    ret
842;
843; RV64IA-LABEL: cmpxchg_i16_monotonic_monotonic:
844; RV64IA:       # %bb.0:
845; RV64IA-NEXT:    andi a3, a0, -4
846; RV64IA-NEXT:    slli a0, a0, 3
847; RV64IA-NEXT:    andi a0, a0, 24
848; RV64IA-NEXT:    lui a4, 16
849; RV64IA-NEXT:    addiw a4, a4, -1
850; RV64IA-NEXT:    sllw a5, a4, a0
851; RV64IA-NEXT:    and a1, a1, a4
852; RV64IA-NEXT:    sllw a1, a1, a0
853; RV64IA-NEXT:    and a2, a2, a4
854; RV64IA-NEXT:    sllw a0, a2, a0
855; RV64IA-NEXT:  .LBB10_1: # =>This Inner Loop Header: Depth=1
856; RV64IA-NEXT:    lr.w a2, (a3)
857; RV64IA-NEXT:    and a4, a2, a5
858; RV64IA-NEXT:    bne a4, a1, .LBB10_3
859; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB10_1 Depth=1
860; RV64IA-NEXT:    xor a4, a2, a0
861; RV64IA-NEXT:    and a4, a4, a5
862; RV64IA-NEXT:    xor a4, a2, a4
863; RV64IA-NEXT:    sc.w a4, a4, (a3)
864; RV64IA-NEXT:    bnez a4, .LBB10_1
865; RV64IA-NEXT:  .LBB10_3:
866; RV64IA-NEXT:    ret
867  %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val monotonic monotonic
868  ret void
869}
870
871define void @cmpxchg_i16_acquire_monotonic(i16* %ptr, i16 %cmp, i16 %val) nounwind {
872; RV32I-LABEL: cmpxchg_i16_acquire_monotonic:
873; RV32I:       # %bb.0:
874; RV32I-NEXT:    addi sp, sp, -16
875; RV32I-NEXT:    sw ra, 12(sp)
876; RV32I-NEXT:    sh a1, 10(sp)
877; RV32I-NEXT:    addi a1, sp, 10
878; RV32I-NEXT:    addi a3, zero, 2
879; RV32I-NEXT:    mv a4, zero
880; RV32I-NEXT:    call __atomic_compare_exchange_2
881; RV32I-NEXT:    lw ra, 12(sp)
882; RV32I-NEXT:    addi sp, sp, 16
883; RV32I-NEXT:    ret
884;
885; RV32IA-LABEL: cmpxchg_i16_acquire_monotonic:
886; RV32IA:       # %bb.0:
887; RV32IA-NEXT:    andi a3, a0, -4
888; RV32IA-NEXT:    slli a0, a0, 3
889; RV32IA-NEXT:    andi a0, a0, 24
890; RV32IA-NEXT:    lui a4, 16
891; RV32IA-NEXT:    addi a4, a4, -1
892; RV32IA-NEXT:    sll a5, a4, a0
893; RV32IA-NEXT:    and a1, a1, a4
894; RV32IA-NEXT:    sll a1, a1, a0
895; RV32IA-NEXT:    and a2, a2, a4
896; RV32IA-NEXT:    sll a0, a2, a0
897; RV32IA-NEXT:  .LBB11_1: # =>This Inner Loop Header: Depth=1
898; RV32IA-NEXT:    lr.w.aq a2, (a3)
899; RV32IA-NEXT:    and a4, a2, a5
900; RV32IA-NEXT:    bne a4, a1, .LBB11_3
901; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB11_1 Depth=1
902; RV32IA-NEXT:    xor a4, a2, a0
903; RV32IA-NEXT:    and a4, a4, a5
904; RV32IA-NEXT:    xor a4, a2, a4
905; RV32IA-NEXT:    sc.w a4, a4, (a3)
906; RV32IA-NEXT:    bnez a4, .LBB11_1
907; RV32IA-NEXT:  .LBB11_3:
908; RV32IA-NEXT:    ret
909;
910; RV64I-LABEL: cmpxchg_i16_acquire_monotonic:
911; RV64I:       # %bb.0:
912; RV64I-NEXT:    addi sp, sp, -16
913; RV64I-NEXT:    sd ra, 8(sp)
914; RV64I-NEXT:    sh a1, 6(sp)
915; RV64I-NEXT:    addi a1, sp, 6
916; RV64I-NEXT:    addi a3, zero, 2
917; RV64I-NEXT:    mv a4, zero
918; RV64I-NEXT:    call __atomic_compare_exchange_2
919; RV64I-NEXT:    ld ra, 8(sp)
920; RV64I-NEXT:    addi sp, sp, 16
921; RV64I-NEXT:    ret
922;
923; RV64IA-LABEL: cmpxchg_i16_acquire_monotonic:
924; RV64IA:       # %bb.0:
925; RV64IA-NEXT:    andi a3, a0, -4
926; RV64IA-NEXT:    slli a0, a0, 3
927; RV64IA-NEXT:    andi a0, a0, 24
928; RV64IA-NEXT:    lui a4, 16
929; RV64IA-NEXT:    addiw a4, a4, -1
930; RV64IA-NEXT:    sllw a5, a4, a0
931; RV64IA-NEXT:    and a1, a1, a4
932; RV64IA-NEXT:    sllw a1, a1, a0
933; RV64IA-NEXT:    and a2, a2, a4
934; RV64IA-NEXT:    sllw a0, a2, a0
935; RV64IA-NEXT:  .LBB11_1: # =>This Inner Loop Header: Depth=1
936; RV64IA-NEXT:    lr.w.aq a2, (a3)
937; RV64IA-NEXT:    and a4, a2, a5
938; RV64IA-NEXT:    bne a4, a1, .LBB11_3
939; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB11_1 Depth=1
940; RV64IA-NEXT:    xor a4, a2, a0
941; RV64IA-NEXT:    and a4, a4, a5
942; RV64IA-NEXT:    xor a4, a2, a4
943; RV64IA-NEXT:    sc.w a4, a4, (a3)
944; RV64IA-NEXT:    bnez a4, .LBB11_1
945; RV64IA-NEXT:  .LBB11_3:
946; RV64IA-NEXT:    ret
947  %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acquire monotonic
948  ret void
949}
950
951define void @cmpxchg_i16_acquire_acquire(i16* %ptr, i16 %cmp, i16 %val) nounwind {
952; RV32I-LABEL: cmpxchg_i16_acquire_acquire:
953; RV32I:       # %bb.0:
954; RV32I-NEXT:    addi sp, sp, -16
955; RV32I-NEXT:    sw ra, 12(sp)
956; RV32I-NEXT:    sh a1, 10(sp)
957; RV32I-NEXT:    addi a1, sp, 10
958; RV32I-NEXT:    addi a3, zero, 2
959; RV32I-NEXT:    addi a4, zero, 2
960; RV32I-NEXT:    call __atomic_compare_exchange_2
961; RV32I-NEXT:    lw ra, 12(sp)
962; RV32I-NEXT:    addi sp, sp, 16
963; RV32I-NEXT:    ret
964;
965; RV32IA-LABEL: cmpxchg_i16_acquire_acquire:
966; RV32IA:       # %bb.0:
967; RV32IA-NEXT:    andi a3, a0, -4
968; RV32IA-NEXT:    slli a0, a0, 3
969; RV32IA-NEXT:    andi a0, a0, 24
970; RV32IA-NEXT:    lui a4, 16
971; RV32IA-NEXT:    addi a4, a4, -1
972; RV32IA-NEXT:    sll a5, a4, a0
973; RV32IA-NEXT:    and a1, a1, a4
974; RV32IA-NEXT:    sll a1, a1, a0
975; RV32IA-NEXT:    and a2, a2, a4
976; RV32IA-NEXT:    sll a0, a2, a0
977; RV32IA-NEXT:  .LBB12_1: # =>This Inner Loop Header: Depth=1
978; RV32IA-NEXT:    lr.w.aq a2, (a3)
979; RV32IA-NEXT:    and a4, a2, a5
980; RV32IA-NEXT:    bne a4, a1, .LBB12_3
981; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB12_1 Depth=1
982; RV32IA-NEXT:    xor a4, a2, a0
983; RV32IA-NEXT:    and a4, a4, a5
984; RV32IA-NEXT:    xor a4, a2, a4
985; RV32IA-NEXT:    sc.w a4, a4, (a3)
986; RV32IA-NEXT:    bnez a4, .LBB12_1
987; RV32IA-NEXT:  .LBB12_3:
988; RV32IA-NEXT:    ret
989;
990; RV64I-LABEL: cmpxchg_i16_acquire_acquire:
991; RV64I:       # %bb.0:
992; RV64I-NEXT:    addi sp, sp, -16
993; RV64I-NEXT:    sd ra, 8(sp)
994; RV64I-NEXT:    sh a1, 6(sp)
995; RV64I-NEXT:    addi a1, sp, 6
996; RV64I-NEXT:    addi a3, zero, 2
997; RV64I-NEXT:    addi a4, zero, 2
998; RV64I-NEXT:    call __atomic_compare_exchange_2
999; RV64I-NEXT:    ld ra, 8(sp)
1000; RV64I-NEXT:    addi sp, sp, 16
1001; RV64I-NEXT:    ret
1002;
1003; RV64IA-LABEL: cmpxchg_i16_acquire_acquire:
1004; RV64IA:       # %bb.0:
1005; RV64IA-NEXT:    andi a3, a0, -4
1006; RV64IA-NEXT:    slli a0, a0, 3
1007; RV64IA-NEXT:    andi a0, a0, 24
1008; RV64IA-NEXT:    lui a4, 16
1009; RV64IA-NEXT:    addiw a4, a4, -1
1010; RV64IA-NEXT:    sllw a5, a4, a0
1011; RV64IA-NEXT:    and a1, a1, a4
1012; RV64IA-NEXT:    sllw a1, a1, a0
1013; RV64IA-NEXT:    and a2, a2, a4
1014; RV64IA-NEXT:    sllw a0, a2, a0
1015; RV64IA-NEXT:  .LBB12_1: # =>This Inner Loop Header: Depth=1
1016; RV64IA-NEXT:    lr.w.aq a2, (a3)
1017; RV64IA-NEXT:    and a4, a2, a5
1018; RV64IA-NEXT:    bne a4, a1, .LBB12_3
1019; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB12_1 Depth=1
1020; RV64IA-NEXT:    xor a4, a2, a0
1021; RV64IA-NEXT:    and a4, a4, a5
1022; RV64IA-NEXT:    xor a4, a2, a4
1023; RV64IA-NEXT:    sc.w a4, a4, (a3)
1024; RV64IA-NEXT:    bnez a4, .LBB12_1
1025; RV64IA-NEXT:  .LBB12_3:
1026; RV64IA-NEXT:    ret
1027  %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acquire acquire
1028  ret void
1029}
1030
1031define void @cmpxchg_i16_release_monotonic(i16* %ptr, i16 %cmp, i16 %val) nounwind {
1032; RV32I-LABEL: cmpxchg_i16_release_monotonic:
1033; RV32I:       # %bb.0:
1034; RV32I-NEXT:    addi sp, sp, -16
1035; RV32I-NEXT:    sw ra, 12(sp)
1036; RV32I-NEXT:    sh a1, 10(sp)
1037; RV32I-NEXT:    addi a1, sp, 10
1038; RV32I-NEXT:    addi a3, zero, 3
1039; RV32I-NEXT:    mv a4, zero
1040; RV32I-NEXT:    call __atomic_compare_exchange_2
1041; RV32I-NEXT:    lw ra, 12(sp)
1042; RV32I-NEXT:    addi sp, sp, 16
1043; RV32I-NEXT:    ret
1044;
1045; RV32IA-LABEL: cmpxchg_i16_release_monotonic:
1046; RV32IA:       # %bb.0:
1047; RV32IA-NEXT:    andi a3, a0, -4
1048; RV32IA-NEXT:    slli a0, a0, 3
1049; RV32IA-NEXT:    andi a0, a0, 24
1050; RV32IA-NEXT:    lui a4, 16
1051; RV32IA-NEXT:    addi a4, a4, -1
1052; RV32IA-NEXT:    sll a5, a4, a0
1053; RV32IA-NEXT:    and a1, a1, a4
1054; RV32IA-NEXT:    sll a1, a1, a0
1055; RV32IA-NEXT:    and a2, a2, a4
1056; RV32IA-NEXT:    sll a0, a2, a0
1057; RV32IA-NEXT:  .LBB13_1: # =>This Inner Loop Header: Depth=1
1058; RV32IA-NEXT:    lr.w a2, (a3)
1059; RV32IA-NEXT:    and a4, a2, a5
1060; RV32IA-NEXT:    bne a4, a1, .LBB13_3
1061; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB13_1 Depth=1
1062; RV32IA-NEXT:    xor a4, a2, a0
1063; RV32IA-NEXT:    and a4, a4, a5
1064; RV32IA-NEXT:    xor a4, a2, a4
1065; RV32IA-NEXT:    sc.w.rl a4, a4, (a3)
1066; RV32IA-NEXT:    bnez a4, .LBB13_1
1067; RV32IA-NEXT:  .LBB13_3:
1068; RV32IA-NEXT:    ret
1069;
1070; RV64I-LABEL: cmpxchg_i16_release_monotonic:
1071; RV64I:       # %bb.0:
1072; RV64I-NEXT:    addi sp, sp, -16
1073; RV64I-NEXT:    sd ra, 8(sp)
1074; RV64I-NEXT:    sh a1, 6(sp)
1075; RV64I-NEXT:    addi a1, sp, 6
1076; RV64I-NEXT:    addi a3, zero, 3
1077; RV64I-NEXT:    mv a4, zero
1078; RV64I-NEXT:    call __atomic_compare_exchange_2
1079; RV64I-NEXT:    ld ra, 8(sp)
1080; RV64I-NEXT:    addi sp, sp, 16
1081; RV64I-NEXT:    ret
1082;
1083; RV64IA-LABEL: cmpxchg_i16_release_monotonic:
1084; RV64IA:       # %bb.0:
1085; RV64IA-NEXT:    andi a3, a0, -4
1086; RV64IA-NEXT:    slli a0, a0, 3
1087; RV64IA-NEXT:    andi a0, a0, 24
1088; RV64IA-NEXT:    lui a4, 16
1089; RV64IA-NEXT:    addiw a4, a4, -1
1090; RV64IA-NEXT:    sllw a5, a4, a0
1091; RV64IA-NEXT:    and a1, a1, a4
1092; RV64IA-NEXT:    sllw a1, a1, a0
1093; RV64IA-NEXT:    and a2, a2, a4
1094; RV64IA-NEXT:    sllw a0, a2, a0
1095; RV64IA-NEXT:  .LBB13_1: # =>This Inner Loop Header: Depth=1
1096; RV64IA-NEXT:    lr.w a2, (a3)
1097; RV64IA-NEXT:    and a4, a2, a5
1098; RV64IA-NEXT:    bne a4, a1, .LBB13_3
1099; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB13_1 Depth=1
1100; RV64IA-NEXT:    xor a4, a2, a0
1101; RV64IA-NEXT:    and a4, a4, a5
1102; RV64IA-NEXT:    xor a4, a2, a4
1103; RV64IA-NEXT:    sc.w.rl a4, a4, (a3)
1104; RV64IA-NEXT:    bnez a4, .LBB13_1
1105; RV64IA-NEXT:  .LBB13_3:
1106; RV64IA-NEXT:    ret
1107  %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val release monotonic
1108  ret void
1109}
1110
1111define void @cmpxchg_i16_release_acquire(i16* %ptr, i16 %cmp, i16 %val) nounwind {
1112; RV32I-LABEL: cmpxchg_i16_release_acquire:
1113; RV32I:       # %bb.0:
1114; RV32I-NEXT:    addi sp, sp, -16
1115; RV32I-NEXT:    sw ra, 12(sp)
1116; RV32I-NEXT:    sh a1, 10(sp)
1117; RV32I-NEXT:    addi a1, sp, 10
1118; RV32I-NEXT:    addi a3, zero, 3
1119; RV32I-NEXT:    addi a4, zero, 2
1120; RV32I-NEXT:    call __atomic_compare_exchange_2
1121; RV32I-NEXT:    lw ra, 12(sp)
1122; RV32I-NEXT:    addi sp, sp, 16
1123; RV32I-NEXT:    ret
1124;
1125; RV32IA-LABEL: cmpxchg_i16_release_acquire:
1126; RV32IA:       # %bb.0:
1127; RV32IA-NEXT:    andi a3, a0, -4
1128; RV32IA-NEXT:    slli a0, a0, 3
1129; RV32IA-NEXT:    andi a0, a0, 24
1130; RV32IA-NEXT:    lui a4, 16
1131; RV32IA-NEXT:    addi a4, a4, -1
1132; RV32IA-NEXT:    sll a5, a4, a0
1133; RV32IA-NEXT:    and a1, a1, a4
1134; RV32IA-NEXT:    sll a1, a1, a0
1135; RV32IA-NEXT:    and a2, a2, a4
1136; RV32IA-NEXT:    sll a0, a2, a0
1137; RV32IA-NEXT:  .LBB14_1: # =>This Inner Loop Header: Depth=1
1138; RV32IA-NEXT:    lr.w a2, (a3)
1139; RV32IA-NEXT:    and a4, a2, a5
1140; RV32IA-NEXT:    bne a4, a1, .LBB14_3
1141; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB14_1 Depth=1
1142; RV32IA-NEXT:    xor a4, a2, a0
1143; RV32IA-NEXT:    and a4, a4, a5
1144; RV32IA-NEXT:    xor a4, a2, a4
1145; RV32IA-NEXT:    sc.w.rl a4, a4, (a3)
1146; RV32IA-NEXT:    bnez a4, .LBB14_1
1147; RV32IA-NEXT:  .LBB14_3:
1148; RV32IA-NEXT:    ret
1149;
1150; RV64I-LABEL: cmpxchg_i16_release_acquire:
1151; RV64I:       # %bb.0:
1152; RV64I-NEXT:    addi sp, sp, -16
1153; RV64I-NEXT:    sd ra, 8(sp)
1154; RV64I-NEXT:    sh a1, 6(sp)
1155; RV64I-NEXT:    addi a1, sp, 6
1156; RV64I-NEXT:    addi a3, zero, 3
1157; RV64I-NEXT:    addi a4, zero, 2
1158; RV64I-NEXT:    call __atomic_compare_exchange_2
1159; RV64I-NEXT:    ld ra, 8(sp)
1160; RV64I-NEXT:    addi sp, sp, 16
1161; RV64I-NEXT:    ret
1162;
1163; RV64IA-LABEL: cmpxchg_i16_release_acquire:
1164; RV64IA:       # %bb.0:
1165; RV64IA-NEXT:    andi a3, a0, -4
1166; RV64IA-NEXT:    slli a0, a0, 3
1167; RV64IA-NEXT:    andi a0, a0, 24
1168; RV64IA-NEXT:    lui a4, 16
1169; RV64IA-NEXT:    addiw a4, a4, -1
1170; RV64IA-NEXT:    sllw a5, a4, a0
1171; RV64IA-NEXT:    and a1, a1, a4
1172; RV64IA-NEXT:    sllw a1, a1, a0
1173; RV64IA-NEXT:    and a2, a2, a4
1174; RV64IA-NEXT:    sllw a0, a2, a0
1175; RV64IA-NEXT:  .LBB14_1: # =>This Inner Loop Header: Depth=1
1176; RV64IA-NEXT:    lr.w a2, (a3)
1177; RV64IA-NEXT:    and a4, a2, a5
1178; RV64IA-NEXT:    bne a4, a1, .LBB14_3
1179; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB14_1 Depth=1
1180; RV64IA-NEXT:    xor a4, a2, a0
1181; RV64IA-NEXT:    and a4, a4, a5
1182; RV64IA-NEXT:    xor a4, a2, a4
1183; RV64IA-NEXT:    sc.w.rl a4, a4, (a3)
1184; RV64IA-NEXT:    bnez a4, .LBB14_1
1185; RV64IA-NEXT:  .LBB14_3:
1186; RV64IA-NEXT:    ret
1187  %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val release acquire
1188  ret void
1189}
1190
1191define void @cmpxchg_i16_acq_rel_monotonic(i16* %ptr, i16 %cmp, i16 %val) nounwind {
1192; RV32I-LABEL: cmpxchg_i16_acq_rel_monotonic:
1193; RV32I:       # %bb.0:
1194; RV32I-NEXT:    addi sp, sp, -16
1195; RV32I-NEXT:    sw ra, 12(sp)
1196; RV32I-NEXT:    sh a1, 10(sp)
1197; RV32I-NEXT:    addi a1, sp, 10
1198; RV32I-NEXT:    addi a3, zero, 4
1199; RV32I-NEXT:    mv a4, zero
1200; RV32I-NEXT:    call __atomic_compare_exchange_2
1201; RV32I-NEXT:    lw ra, 12(sp)
1202; RV32I-NEXT:    addi sp, sp, 16
1203; RV32I-NEXT:    ret
1204;
1205; RV32IA-LABEL: cmpxchg_i16_acq_rel_monotonic:
1206; RV32IA:       # %bb.0:
1207; RV32IA-NEXT:    andi a3, a0, -4
1208; RV32IA-NEXT:    slli a0, a0, 3
1209; RV32IA-NEXT:    andi a0, a0, 24
1210; RV32IA-NEXT:    lui a4, 16
1211; RV32IA-NEXT:    addi a4, a4, -1
1212; RV32IA-NEXT:    sll a5, a4, a0
1213; RV32IA-NEXT:    and a1, a1, a4
1214; RV32IA-NEXT:    sll a1, a1, a0
1215; RV32IA-NEXT:    and a2, a2, a4
1216; RV32IA-NEXT:    sll a0, a2, a0
1217; RV32IA-NEXT:  .LBB15_1: # =>This Inner Loop Header: Depth=1
1218; RV32IA-NEXT:    lr.w.aq a2, (a3)
1219; RV32IA-NEXT:    and a4, a2, a5
1220; RV32IA-NEXT:    bne a4, a1, .LBB15_3
1221; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB15_1 Depth=1
1222; RV32IA-NEXT:    xor a4, a2, a0
1223; RV32IA-NEXT:    and a4, a4, a5
1224; RV32IA-NEXT:    xor a4, a2, a4
1225; RV32IA-NEXT:    sc.w.rl a4, a4, (a3)
1226; RV32IA-NEXT:    bnez a4, .LBB15_1
1227; RV32IA-NEXT:  .LBB15_3:
1228; RV32IA-NEXT:    ret
1229;
1230; RV64I-LABEL: cmpxchg_i16_acq_rel_monotonic:
1231; RV64I:       # %bb.0:
1232; RV64I-NEXT:    addi sp, sp, -16
1233; RV64I-NEXT:    sd ra, 8(sp)
1234; RV64I-NEXT:    sh a1, 6(sp)
1235; RV64I-NEXT:    addi a1, sp, 6
1236; RV64I-NEXT:    addi a3, zero, 4
1237; RV64I-NEXT:    mv a4, zero
1238; RV64I-NEXT:    call __atomic_compare_exchange_2
1239; RV64I-NEXT:    ld ra, 8(sp)
1240; RV64I-NEXT:    addi sp, sp, 16
1241; RV64I-NEXT:    ret
1242;
1243; RV64IA-LABEL: cmpxchg_i16_acq_rel_monotonic:
1244; RV64IA:       # %bb.0:
1245; RV64IA-NEXT:    andi a3, a0, -4
1246; RV64IA-NEXT:    slli a0, a0, 3
1247; RV64IA-NEXT:    andi a0, a0, 24
1248; RV64IA-NEXT:    lui a4, 16
1249; RV64IA-NEXT:    addiw a4, a4, -1
1250; RV64IA-NEXT:    sllw a5, a4, a0
1251; RV64IA-NEXT:    and a1, a1, a4
1252; RV64IA-NEXT:    sllw a1, a1, a0
1253; RV64IA-NEXT:    and a2, a2, a4
1254; RV64IA-NEXT:    sllw a0, a2, a0
1255; RV64IA-NEXT:  .LBB15_1: # =>This Inner Loop Header: Depth=1
1256; RV64IA-NEXT:    lr.w.aq a2, (a3)
1257; RV64IA-NEXT:    and a4, a2, a5
1258; RV64IA-NEXT:    bne a4, a1, .LBB15_3
1259; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB15_1 Depth=1
1260; RV64IA-NEXT:    xor a4, a2, a0
1261; RV64IA-NEXT:    and a4, a4, a5
1262; RV64IA-NEXT:    xor a4, a2, a4
1263; RV64IA-NEXT:    sc.w.rl a4, a4, (a3)
1264; RV64IA-NEXT:    bnez a4, .LBB15_1
1265; RV64IA-NEXT:  .LBB15_3:
1266; RV64IA-NEXT:    ret
1267  %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acq_rel monotonic
1268  ret void
1269}
1270
1271define void @cmpxchg_i16_acq_rel_acquire(i16* %ptr, i16 %cmp, i16 %val) nounwind {
1272; RV32I-LABEL: cmpxchg_i16_acq_rel_acquire:
1273; RV32I:       # %bb.0:
1274; RV32I-NEXT:    addi sp, sp, -16
1275; RV32I-NEXT:    sw ra, 12(sp)
1276; RV32I-NEXT:    sh a1, 10(sp)
1277; RV32I-NEXT:    addi a1, sp, 10
1278; RV32I-NEXT:    addi a3, zero, 4
1279; RV32I-NEXT:    addi a4, zero, 2
1280; RV32I-NEXT:    call __atomic_compare_exchange_2
1281; RV32I-NEXT:    lw ra, 12(sp)
1282; RV32I-NEXT:    addi sp, sp, 16
1283; RV32I-NEXT:    ret
1284;
1285; RV32IA-LABEL: cmpxchg_i16_acq_rel_acquire:
1286; RV32IA:       # %bb.0:
1287; RV32IA-NEXT:    andi a3, a0, -4
1288; RV32IA-NEXT:    slli a0, a0, 3
1289; RV32IA-NEXT:    andi a0, a0, 24
1290; RV32IA-NEXT:    lui a4, 16
1291; RV32IA-NEXT:    addi a4, a4, -1
1292; RV32IA-NEXT:    sll a5, a4, a0
1293; RV32IA-NEXT:    and a1, a1, a4
1294; RV32IA-NEXT:    sll a1, a1, a0
1295; RV32IA-NEXT:    and a2, a2, a4
1296; RV32IA-NEXT:    sll a0, a2, a0
1297; RV32IA-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
1298; RV32IA-NEXT:    lr.w.aq a2, (a3)
1299; RV32IA-NEXT:    and a4, a2, a5
1300; RV32IA-NEXT:    bne a4, a1, .LBB16_3
1301; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB16_1 Depth=1
1302; RV32IA-NEXT:    xor a4, a2, a0
1303; RV32IA-NEXT:    and a4, a4, a5
1304; RV32IA-NEXT:    xor a4, a2, a4
1305; RV32IA-NEXT:    sc.w.rl a4, a4, (a3)
1306; RV32IA-NEXT:    bnez a4, .LBB16_1
1307; RV32IA-NEXT:  .LBB16_3:
1308; RV32IA-NEXT:    ret
1309;
1310; RV64I-LABEL: cmpxchg_i16_acq_rel_acquire:
1311; RV64I:       # %bb.0:
1312; RV64I-NEXT:    addi sp, sp, -16
1313; RV64I-NEXT:    sd ra, 8(sp)
1314; RV64I-NEXT:    sh a1, 6(sp)
1315; RV64I-NEXT:    addi a1, sp, 6
1316; RV64I-NEXT:    addi a3, zero, 4
1317; RV64I-NEXT:    addi a4, zero, 2
1318; RV64I-NEXT:    call __atomic_compare_exchange_2
1319; RV64I-NEXT:    ld ra, 8(sp)
1320; RV64I-NEXT:    addi sp, sp, 16
1321; RV64I-NEXT:    ret
1322;
1323; RV64IA-LABEL: cmpxchg_i16_acq_rel_acquire:
1324; RV64IA:       # %bb.0:
1325; RV64IA-NEXT:    andi a3, a0, -4
1326; RV64IA-NEXT:    slli a0, a0, 3
1327; RV64IA-NEXT:    andi a0, a0, 24
1328; RV64IA-NEXT:    lui a4, 16
1329; RV64IA-NEXT:    addiw a4, a4, -1
1330; RV64IA-NEXT:    sllw a5, a4, a0
1331; RV64IA-NEXT:    and a1, a1, a4
1332; RV64IA-NEXT:    sllw a1, a1, a0
1333; RV64IA-NEXT:    and a2, a2, a4
1334; RV64IA-NEXT:    sllw a0, a2, a0
1335; RV64IA-NEXT:  .LBB16_1: # =>This Inner Loop Header: Depth=1
1336; RV64IA-NEXT:    lr.w.aq a2, (a3)
1337; RV64IA-NEXT:    and a4, a2, a5
1338; RV64IA-NEXT:    bne a4, a1, .LBB16_3
1339; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB16_1 Depth=1
1340; RV64IA-NEXT:    xor a4, a2, a0
1341; RV64IA-NEXT:    and a4, a4, a5
1342; RV64IA-NEXT:    xor a4, a2, a4
1343; RV64IA-NEXT:    sc.w.rl a4, a4, (a3)
1344; RV64IA-NEXT:    bnez a4, .LBB16_1
1345; RV64IA-NEXT:  .LBB16_3:
1346; RV64IA-NEXT:    ret
1347  %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acq_rel acquire
1348  ret void
1349}
1350
1351define void @cmpxchg_i16_seq_cst_monotonic(i16* %ptr, i16 %cmp, i16 %val) nounwind {
1352; RV32I-LABEL: cmpxchg_i16_seq_cst_monotonic:
1353; RV32I:       # %bb.0:
1354; RV32I-NEXT:    addi sp, sp, -16
1355; RV32I-NEXT:    sw ra, 12(sp)
1356; RV32I-NEXT:    sh a1, 10(sp)
1357; RV32I-NEXT:    addi a1, sp, 10
1358; RV32I-NEXT:    addi a3, zero, 5
1359; RV32I-NEXT:    mv a4, zero
1360; RV32I-NEXT:    call __atomic_compare_exchange_2
1361; RV32I-NEXT:    lw ra, 12(sp)
1362; RV32I-NEXT:    addi sp, sp, 16
1363; RV32I-NEXT:    ret
1364;
1365; RV32IA-LABEL: cmpxchg_i16_seq_cst_monotonic:
1366; RV32IA:       # %bb.0:
1367; RV32IA-NEXT:    andi a3, a0, -4
1368; RV32IA-NEXT:    slli a0, a0, 3
1369; RV32IA-NEXT:    andi a0, a0, 24
1370; RV32IA-NEXT:    lui a4, 16
1371; RV32IA-NEXT:    addi a4, a4, -1
1372; RV32IA-NEXT:    sll a5, a4, a0
1373; RV32IA-NEXT:    and a1, a1, a4
1374; RV32IA-NEXT:    sll a1, a1, a0
1375; RV32IA-NEXT:    and a2, a2, a4
1376; RV32IA-NEXT:    sll a0, a2, a0
1377; RV32IA-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
1378; RV32IA-NEXT:    lr.w.aqrl a2, (a3)
1379; RV32IA-NEXT:    and a4, a2, a5
1380; RV32IA-NEXT:    bne a4, a1, .LBB17_3
1381; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB17_1 Depth=1
1382; RV32IA-NEXT:    xor a4, a2, a0
1383; RV32IA-NEXT:    and a4, a4, a5
1384; RV32IA-NEXT:    xor a4, a2, a4
1385; RV32IA-NEXT:    sc.w.aqrl a4, a4, (a3)
1386; RV32IA-NEXT:    bnez a4, .LBB17_1
1387; RV32IA-NEXT:  .LBB17_3:
1388; RV32IA-NEXT:    ret
1389;
1390; RV64I-LABEL: cmpxchg_i16_seq_cst_monotonic:
1391; RV64I:       # %bb.0:
1392; RV64I-NEXT:    addi sp, sp, -16
1393; RV64I-NEXT:    sd ra, 8(sp)
1394; RV64I-NEXT:    sh a1, 6(sp)
1395; RV64I-NEXT:    addi a1, sp, 6
1396; RV64I-NEXT:    addi a3, zero, 5
1397; RV64I-NEXT:    mv a4, zero
1398; RV64I-NEXT:    call __atomic_compare_exchange_2
1399; RV64I-NEXT:    ld ra, 8(sp)
1400; RV64I-NEXT:    addi sp, sp, 16
1401; RV64I-NEXT:    ret
1402;
1403; RV64IA-LABEL: cmpxchg_i16_seq_cst_monotonic:
1404; RV64IA:       # %bb.0:
1405; RV64IA-NEXT:    andi a3, a0, -4
1406; RV64IA-NEXT:    slli a0, a0, 3
1407; RV64IA-NEXT:    andi a0, a0, 24
1408; RV64IA-NEXT:    lui a4, 16
1409; RV64IA-NEXT:    addiw a4, a4, -1
1410; RV64IA-NEXT:    sllw a5, a4, a0
1411; RV64IA-NEXT:    and a1, a1, a4
1412; RV64IA-NEXT:    sllw a1, a1, a0
1413; RV64IA-NEXT:    and a2, a2, a4
1414; RV64IA-NEXT:    sllw a0, a2, a0
1415; RV64IA-NEXT:  .LBB17_1: # =>This Inner Loop Header: Depth=1
1416; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
1417; RV64IA-NEXT:    and a4, a2, a5
1418; RV64IA-NEXT:    bne a4, a1, .LBB17_3
1419; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB17_1 Depth=1
1420; RV64IA-NEXT:    xor a4, a2, a0
1421; RV64IA-NEXT:    and a4, a4, a5
1422; RV64IA-NEXT:    xor a4, a2, a4
1423; RV64IA-NEXT:    sc.w.aqrl a4, a4, (a3)
1424; RV64IA-NEXT:    bnez a4, .LBB17_1
1425; RV64IA-NEXT:  .LBB17_3:
1426; RV64IA-NEXT:    ret
1427  %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst monotonic
1428  ret void
1429}
1430
1431define void @cmpxchg_i16_seq_cst_acquire(i16* %ptr, i16 %cmp, i16 %val) nounwind {
1432; RV32I-LABEL: cmpxchg_i16_seq_cst_acquire:
1433; RV32I:       # %bb.0:
1434; RV32I-NEXT:    addi sp, sp, -16
1435; RV32I-NEXT:    sw ra, 12(sp)
1436; RV32I-NEXT:    sh a1, 10(sp)
1437; RV32I-NEXT:    addi a1, sp, 10
1438; RV32I-NEXT:    addi a3, zero, 5
1439; RV32I-NEXT:    addi a4, zero, 2
1440; RV32I-NEXT:    call __atomic_compare_exchange_2
1441; RV32I-NEXT:    lw ra, 12(sp)
1442; RV32I-NEXT:    addi sp, sp, 16
1443; RV32I-NEXT:    ret
1444;
1445; RV32IA-LABEL: cmpxchg_i16_seq_cst_acquire:
1446; RV32IA:       # %bb.0:
1447; RV32IA-NEXT:    andi a3, a0, -4
1448; RV32IA-NEXT:    slli a0, a0, 3
1449; RV32IA-NEXT:    andi a0, a0, 24
1450; RV32IA-NEXT:    lui a4, 16
1451; RV32IA-NEXT:    addi a4, a4, -1
1452; RV32IA-NEXT:    sll a5, a4, a0
1453; RV32IA-NEXT:    and a1, a1, a4
1454; RV32IA-NEXT:    sll a1, a1, a0
1455; RV32IA-NEXT:    and a2, a2, a4
1456; RV32IA-NEXT:    sll a0, a2, a0
1457; RV32IA-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
1458; RV32IA-NEXT:    lr.w.aqrl a2, (a3)
1459; RV32IA-NEXT:    and a4, a2, a5
1460; RV32IA-NEXT:    bne a4, a1, .LBB18_3
1461; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB18_1 Depth=1
1462; RV32IA-NEXT:    xor a4, a2, a0
1463; RV32IA-NEXT:    and a4, a4, a5
1464; RV32IA-NEXT:    xor a4, a2, a4
1465; RV32IA-NEXT:    sc.w.aqrl a4, a4, (a3)
1466; RV32IA-NEXT:    bnez a4, .LBB18_1
1467; RV32IA-NEXT:  .LBB18_3:
1468; RV32IA-NEXT:    ret
1469;
1470; RV64I-LABEL: cmpxchg_i16_seq_cst_acquire:
1471; RV64I:       # %bb.0:
1472; RV64I-NEXT:    addi sp, sp, -16
1473; RV64I-NEXT:    sd ra, 8(sp)
1474; RV64I-NEXT:    sh a1, 6(sp)
1475; RV64I-NEXT:    addi a1, sp, 6
1476; RV64I-NEXT:    addi a3, zero, 5
1477; RV64I-NEXT:    addi a4, zero, 2
1478; RV64I-NEXT:    call __atomic_compare_exchange_2
1479; RV64I-NEXT:    ld ra, 8(sp)
1480; RV64I-NEXT:    addi sp, sp, 16
1481; RV64I-NEXT:    ret
1482;
1483; RV64IA-LABEL: cmpxchg_i16_seq_cst_acquire:
1484; RV64IA:       # %bb.0:
1485; RV64IA-NEXT:    andi a3, a0, -4
1486; RV64IA-NEXT:    slli a0, a0, 3
1487; RV64IA-NEXT:    andi a0, a0, 24
1488; RV64IA-NEXT:    lui a4, 16
1489; RV64IA-NEXT:    addiw a4, a4, -1
1490; RV64IA-NEXT:    sllw a5, a4, a0
1491; RV64IA-NEXT:    and a1, a1, a4
1492; RV64IA-NEXT:    sllw a1, a1, a0
1493; RV64IA-NEXT:    and a2, a2, a4
1494; RV64IA-NEXT:    sllw a0, a2, a0
1495; RV64IA-NEXT:  .LBB18_1: # =>This Inner Loop Header: Depth=1
1496; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
1497; RV64IA-NEXT:    and a4, a2, a5
1498; RV64IA-NEXT:    bne a4, a1, .LBB18_3
1499; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB18_1 Depth=1
1500; RV64IA-NEXT:    xor a4, a2, a0
1501; RV64IA-NEXT:    and a4, a4, a5
1502; RV64IA-NEXT:    xor a4, a2, a4
1503; RV64IA-NEXT:    sc.w.aqrl a4, a4, (a3)
1504; RV64IA-NEXT:    bnez a4, .LBB18_1
1505; RV64IA-NEXT:  .LBB18_3:
1506; RV64IA-NEXT:    ret
1507  %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst acquire
1508  ret void
1509}
1510
1511define void @cmpxchg_i16_seq_cst_seq_cst(i16* %ptr, i16 %cmp, i16 %val) nounwind {
1512; RV32I-LABEL: cmpxchg_i16_seq_cst_seq_cst:
1513; RV32I:       # %bb.0:
1514; RV32I-NEXT:    addi sp, sp, -16
1515; RV32I-NEXT:    sw ra, 12(sp)
1516; RV32I-NEXT:    sh a1, 10(sp)
1517; RV32I-NEXT:    addi a1, sp, 10
1518; RV32I-NEXT:    addi a3, zero, 5
1519; RV32I-NEXT:    addi a4, zero, 5
1520; RV32I-NEXT:    call __atomic_compare_exchange_2
1521; RV32I-NEXT:    lw ra, 12(sp)
1522; RV32I-NEXT:    addi sp, sp, 16
1523; RV32I-NEXT:    ret
1524;
1525; RV32IA-LABEL: cmpxchg_i16_seq_cst_seq_cst:
1526; RV32IA:       # %bb.0:
1527; RV32IA-NEXT:    andi a3, a0, -4
1528; RV32IA-NEXT:    slli a0, a0, 3
1529; RV32IA-NEXT:    andi a0, a0, 24
1530; RV32IA-NEXT:    lui a4, 16
1531; RV32IA-NEXT:    addi a4, a4, -1
1532; RV32IA-NEXT:    sll a5, a4, a0
1533; RV32IA-NEXT:    and a1, a1, a4
1534; RV32IA-NEXT:    sll a1, a1, a0
1535; RV32IA-NEXT:    and a2, a2, a4
1536; RV32IA-NEXT:    sll a0, a2, a0
1537; RV32IA-NEXT:  .LBB19_1: # =>This Inner Loop Header: Depth=1
1538; RV32IA-NEXT:    lr.w.aqrl a2, (a3)
1539; RV32IA-NEXT:    and a4, a2, a5
1540; RV32IA-NEXT:    bne a4, a1, .LBB19_3
1541; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB19_1 Depth=1
1542; RV32IA-NEXT:    xor a4, a2, a0
1543; RV32IA-NEXT:    and a4, a4, a5
1544; RV32IA-NEXT:    xor a4, a2, a4
1545; RV32IA-NEXT:    sc.w.aqrl a4, a4, (a3)
1546; RV32IA-NEXT:    bnez a4, .LBB19_1
1547; RV32IA-NEXT:  .LBB19_3:
1548; RV32IA-NEXT:    ret
1549;
1550; RV64I-LABEL: cmpxchg_i16_seq_cst_seq_cst:
1551; RV64I:       # %bb.0:
1552; RV64I-NEXT:    addi sp, sp, -16
1553; RV64I-NEXT:    sd ra, 8(sp)
1554; RV64I-NEXT:    sh a1, 6(sp)
1555; RV64I-NEXT:    addi a1, sp, 6
1556; RV64I-NEXT:    addi a3, zero, 5
1557; RV64I-NEXT:    addi a4, zero, 5
1558; RV64I-NEXT:    call __atomic_compare_exchange_2
1559; RV64I-NEXT:    ld ra, 8(sp)
1560; RV64I-NEXT:    addi sp, sp, 16
1561; RV64I-NEXT:    ret
1562;
1563; RV64IA-LABEL: cmpxchg_i16_seq_cst_seq_cst:
1564; RV64IA:       # %bb.0:
1565; RV64IA-NEXT:    andi a3, a0, -4
1566; RV64IA-NEXT:    slli a0, a0, 3
1567; RV64IA-NEXT:    andi a0, a0, 24
1568; RV64IA-NEXT:    lui a4, 16
1569; RV64IA-NEXT:    addiw a4, a4, -1
1570; RV64IA-NEXT:    sllw a5, a4, a0
1571; RV64IA-NEXT:    and a1, a1, a4
1572; RV64IA-NEXT:    sllw a1, a1, a0
1573; RV64IA-NEXT:    and a2, a2, a4
1574; RV64IA-NEXT:    sllw a0, a2, a0
1575; RV64IA-NEXT:  .LBB19_1: # =>This Inner Loop Header: Depth=1
1576; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
1577; RV64IA-NEXT:    and a4, a2, a5
1578; RV64IA-NEXT:    bne a4, a1, .LBB19_3
1579; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB19_1 Depth=1
1580; RV64IA-NEXT:    xor a4, a2, a0
1581; RV64IA-NEXT:    and a4, a4, a5
1582; RV64IA-NEXT:    xor a4, a2, a4
1583; RV64IA-NEXT:    sc.w.aqrl a4, a4, (a3)
1584; RV64IA-NEXT:    bnez a4, .LBB19_1
1585; RV64IA-NEXT:  .LBB19_3:
1586; RV64IA-NEXT:    ret
1587  %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst seq_cst
1588  ret void
1589}
1590
1591define void @cmpxchg_i32_monotonic_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwind {
1592; RV32I-LABEL: cmpxchg_i32_monotonic_monotonic:
1593; RV32I:       # %bb.0:
1594; RV32I-NEXT:    addi sp, sp, -16
1595; RV32I-NEXT:    sw ra, 12(sp)
1596; RV32I-NEXT:    sw a1, 8(sp)
1597; RV32I-NEXT:    addi a1, sp, 8
1598; RV32I-NEXT:    mv a3, zero
1599; RV32I-NEXT:    mv a4, zero
1600; RV32I-NEXT:    call __atomic_compare_exchange_4
1601; RV32I-NEXT:    lw ra, 12(sp)
1602; RV32I-NEXT:    addi sp, sp, 16
1603; RV32I-NEXT:    ret
1604;
1605; RV32IA-LABEL: cmpxchg_i32_monotonic_monotonic:
1606; RV32IA:       # %bb.0:
1607; RV32IA-NEXT:  .LBB20_1: # =>This Inner Loop Header: Depth=1
1608; RV32IA-NEXT:    lr.w a3, (a0)
1609; RV32IA-NEXT:    bne a3, a1, .LBB20_3
1610; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB20_1 Depth=1
1611; RV32IA-NEXT:    sc.w a4, a2, (a0)
1612; RV32IA-NEXT:    bnez a4, .LBB20_1
1613; RV32IA-NEXT:  .LBB20_3:
1614; RV32IA-NEXT:    ret
1615;
1616; RV64I-LABEL: cmpxchg_i32_monotonic_monotonic:
1617; RV64I:       # %bb.0:
1618; RV64I-NEXT:    addi sp, sp, -16
1619; RV64I-NEXT:    sd ra, 8(sp)
1620; RV64I-NEXT:    sw a1, 4(sp)
1621; RV64I-NEXT:    addi a1, sp, 4
1622; RV64I-NEXT:    mv a3, zero
1623; RV64I-NEXT:    mv a4, zero
1624; RV64I-NEXT:    call __atomic_compare_exchange_4
1625; RV64I-NEXT:    ld ra, 8(sp)
1626; RV64I-NEXT:    addi sp, sp, 16
1627; RV64I-NEXT:    ret
1628;
1629; RV64IA-LABEL: cmpxchg_i32_monotonic_monotonic:
1630; RV64IA:       # %bb.0:
1631; RV64IA-NEXT:    sext.w a1, a1
1632; RV64IA-NEXT:  .LBB20_1: # =>This Inner Loop Header: Depth=1
1633; RV64IA-NEXT:    lr.w a3, (a0)
1634; RV64IA-NEXT:    bne a3, a1, .LBB20_3
1635; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB20_1 Depth=1
1636; RV64IA-NEXT:    sc.w a4, a2, (a0)
1637; RV64IA-NEXT:    bnez a4, .LBB20_1
1638; RV64IA-NEXT:  .LBB20_3:
1639; RV64IA-NEXT:    ret
1640  %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val monotonic monotonic
1641  ret void
1642}
1643
1644define void @cmpxchg_i32_acquire_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwind {
1645; RV32I-LABEL: cmpxchg_i32_acquire_monotonic:
1646; RV32I:       # %bb.0:
1647; RV32I-NEXT:    addi sp, sp, -16
1648; RV32I-NEXT:    sw ra, 12(sp)
1649; RV32I-NEXT:    sw a1, 8(sp)
1650; RV32I-NEXT:    addi a1, sp, 8
1651; RV32I-NEXT:    addi a3, zero, 2
1652; RV32I-NEXT:    mv a4, zero
1653; RV32I-NEXT:    call __atomic_compare_exchange_4
1654; RV32I-NEXT:    lw ra, 12(sp)
1655; RV32I-NEXT:    addi sp, sp, 16
1656; RV32I-NEXT:    ret
1657;
1658; RV32IA-LABEL: cmpxchg_i32_acquire_monotonic:
1659; RV32IA:       # %bb.0:
1660; RV32IA-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
1661; RV32IA-NEXT:    lr.w.aq a3, (a0)
1662; RV32IA-NEXT:    bne a3, a1, .LBB21_3
1663; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB21_1 Depth=1
1664; RV32IA-NEXT:    sc.w a4, a2, (a0)
1665; RV32IA-NEXT:    bnez a4, .LBB21_1
1666; RV32IA-NEXT:  .LBB21_3:
1667; RV32IA-NEXT:    ret
1668;
1669; RV64I-LABEL: cmpxchg_i32_acquire_monotonic:
1670; RV64I:       # %bb.0:
1671; RV64I-NEXT:    addi sp, sp, -16
1672; RV64I-NEXT:    sd ra, 8(sp)
1673; RV64I-NEXT:    sw a1, 4(sp)
1674; RV64I-NEXT:    addi a1, sp, 4
1675; RV64I-NEXT:    addi a3, zero, 2
1676; RV64I-NEXT:    mv a4, zero
1677; RV64I-NEXT:    call __atomic_compare_exchange_4
1678; RV64I-NEXT:    ld ra, 8(sp)
1679; RV64I-NEXT:    addi sp, sp, 16
1680; RV64I-NEXT:    ret
1681;
1682; RV64IA-LABEL: cmpxchg_i32_acquire_monotonic:
1683; RV64IA:       # %bb.0:
1684; RV64IA-NEXT:    sext.w a1, a1
1685; RV64IA-NEXT:  .LBB21_1: # =>This Inner Loop Header: Depth=1
1686; RV64IA-NEXT:    lr.w.aq a3, (a0)
1687; RV64IA-NEXT:    bne a3, a1, .LBB21_3
1688; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB21_1 Depth=1
1689; RV64IA-NEXT:    sc.w a4, a2, (a0)
1690; RV64IA-NEXT:    bnez a4, .LBB21_1
1691; RV64IA-NEXT:  .LBB21_3:
1692; RV64IA-NEXT:    ret
1693  %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acquire monotonic
1694  ret void
1695}
1696
1697define void @cmpxchg_i32_acquire_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind {
1698; RV32I-LABEL: cmpxchg_i32_acquire_acquire:
1699; RV32I:       # %bb.0:
1700; RV32I-NEXT:    addi sp, sp, -16
1701; RV32I-NEXT:    sw ra, 12(sp)
1702; RV32I-NEXT:    sw a1, 8(sp)
1703; RV32I-NEXT:    addi a1, sp, 8
1704; RV32I-NEXT:    addi a3, zero, 2
1705; RV32I-NEXT:    addi a4, zero, 2
1706; RV32I-NEXT:    call __atomic_compare_exchange_4
1707; RV32I-NEXT:    lw ra, 12(sp)
1708; RV32I-NEXT:    addi sp, sp, 16
1709; RV32I-NEXT:    ret
1710;
1711; RV32IA-LABEL: cmpxchg_i32_acquire_acquire:
1712; RV32IA:       # %bb.0:
1713; RV32IA-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
1714; RV32IA-NEXT:    lr.w.aq a3, (a0)
1715; RV32IA-NEXT:    bne a3, a1, .LBB22_3
1716; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB22_1 Depth=1
1717; RV32IA-NEXT:    sc.w a4, a2, (a0)
1718; RV32IA-NEXT:    bnez a4, .LBB22_1
1719; RV32IA-NEXT:  .LBB22_3:
1720; RV32IA-NEXT:    ret
1721;
1722; RV64I-LABEL: cmpxchg_i32_acquire_acquire:
1723; RV64I:       # %bb.0:
1724; RV64I-NEXT:    addi sp, sp, -16
1725; RV64I-NEXT:    sd ra, 8(sp)
1726; RV64I-NEXT:    sw a1, 4(sp)
1727; RV64I-NEXT:    addi a1, sp, 4
1728; RV64I-NEXT:    addi a3, zero, 2
1729; RV64I-NEXT:    addi a4, zero, 2
1730; RV64I-NEXT:    call __atomic_compare_exchange_4
1731; RV64I-NEXT:    ld ra, 8(sp)
1732; RV64I-NEXT:    addi sp, sp, 16
1733; RV64I-NEXT:    ret
1734;
1735; RV64IA-LABEL: cmpxchg_i32_acquire_acquire:
1736; RV64IA:       # %bb.0:
1737; RV64IA-NEXT:    sext.w a1, a1
1738; RV64IA-NEXT:  .LBB22_1: # =>This Inner Loop Header: Depth=1
1739; RV64IA-NEXT:    lr.w.aq a3, (a0)
1740; RV64IA-NEXT:    bne a3, a1, .LBB22_3
1741; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB22_1 Depth=1
1742; RV64IA-NEXT:    sc.w a4, a2, (a0)
1743; RV64IA-NEXT:    bnez a4, .LBB22_1
1744; RV64IA-NEXT:  .LBB22_3:
1745; RV64IA-NEXT:    ret
1746  %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acquire acquire
1747  ret void
1748}
1749
1750define void @cmpxchg_i32_release_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwind {
1751; RV32I-LABEL: cmpxchg_i32_release_monotonic:
1752; RV32I:       # %bb.0:
1753; RV32I-NEXT:    addi sp, sp, -16
1754; RV32I-NEXT:    sw ra, 12(sp)
1755; RV32I-NEXT:    sw a1, 8(sp)
1756; RV32I-NEXT:    addi a1, sp, 8
1757; RV32I-NEXT:    addi a3, zero, 3
1758; RV32I-NEXT:    mv a4, zero
1759; RV32I-NEXT:    call __atomic_compare_exchange_4
1760; RV32I-NEXT:    lw ra, 12(sp)
1761; RV32I-NEXT:    addi sp, sp, 16
1762; RV32I-NEXT:    ret
1763;
1764; RV32IA-LABEL: cmpxchg_i32_release_monotonic:
1765; RV32IA:       # %bb.0:
1766; RV32IA-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
1767; RV32IA-NEXT:    lr.w a3, (a0)
1768; RV32IA-NEXT:    bne a3, a1, .LBB23_3
1769; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB23_1 Depth=1
1770; RV32IA-NEXT:    sc.w.rl a4, a2, (a0)
1771; RV32IA-NEXT:    bnez a4, .LBB23_1
1772; RV32IA-NEXT:  .LBB23_3:
1773; RV32IA-NEXT:    ret
1774;
1775; RV64I-LABEL: cmpxchg_i32_release_monotonic:
1776; RV64I:       # %bb.0:
1777; RV64I-NEXT:    addi sp, sp, -16
1778; RV64I-NEXT:    sd ra, 8(sp)
1779; RV64I-NEXT:    sw a1, 4(sp)
1780; RV64I-NEXT:    addi a1, sp, 4
1781; RV64I-NEXT:    addi a3, zero, 3
1782; RV64I-NEXT:    mv a4, zero
1783; RV64I-NEXT:    call __atomic_compare_exchange_4
1784; RV64I-NEXT:    ld ra, 8(sp)
1785; RV64I-NEXT:    addi sp, sp, 16
1786; RV64I-NEXT:    ret
1787;
1788; RV64IA-LABEL: cmpxchg_i32_release_monotonic:
1789; RV64IA:       # %bb.0:
1790; RV64IA-NEXT:    sext.w a1, a1
1791; RV64IA-NEXT:  .LBB23_1: # =>This Inner Loop Header: Depth=1
1792; RV64IA-NEXT:    lr.w a3, (a0)
1793; RV64IA-NEXT:    bne a3, a1, .LBB23_3
1794; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB23_1 Depth=1
1795; RV64IA-NEXT:    sc.w.rl a4, a2, (a0)
1796; RV64IA-NEXT:    bnez a4, .LBB23_1
1797; RV64IA-NEXT:  .LBB23_3:
1798; RV64IA-NEXT:    ret
1799  %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val release monotonic
1800  ret void
1801}
1802
1803define void @cmpxchg_i32_release_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind {
1804; RV32I-LABEL: cmpxchg_i32_release_acquire:
1805; RV32I:       # %bb.0:
1806; RV32I-NEXT:    addi sp, sp, -16
1807; RV32I-NEXT:    sw ra, 12(sp)
1808; RV32I-NEXT:    sw a1, 8(sp)
1809; RV32I-NEXT:    addi a1, sp, 8
1810; RV32I-NEXT:    addi a3, zero, 3
1811; RV32I-NEXT:    addi a4, zero, 2
1812; RV32I-NEXT:    call __atomic_compare_exchange_4
1813; RV32I-NEXT:    lw ra, 12(sp)
1814; RV32I-NEXT:    addi sp, sp, 16
1815; RV32I-NEXT:    ret
1816;
1817; RV32IA-LABEL: cmpxchg_i32_release_acquire:
1818; RV32IA:       # %bb.0:
1819; RV32IA-NEXT:  .LBB24_1: # =>This Inner Loop Header: Depth=1
1820; RV32IA-NEXT:    lr.w a3, (a0)
1821; RV32IA-NEXT:    bne a3, a1, .LBB24_3
1822; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB24_1 Depth=1
1823; RV32IA-NEXT:    sc.w.rl a4, a2, (a0)
1824; RV32IA-NEXT:    bnez a4, .LBB24_1
1825; RV32IA-NEXT:  .LBB24_3:
1826; RV32IA-NEXT:    ret
1827;
1828; RV64I-LABEL: cmpxchg_i32_release_acquire:
1829; RV64I:       # %bb.0:
1830; RV64I-NEXT:    addi sp, sp, -16
1831; RV64I-NEXT:    sd ra, 8(sp)
1832; RV64I-NEXT:    sw a1, 4(sp)
1833; RV64I-NEXT:    addi a1, sp, 4
1834; RV64I-NEXT:    addi a3, zero, 3
1835; RV64I-NEXT:    addi a4, zero, 2
1836; RV64I-NEXT:    call __atomic_compare_exchange_4
1837; RV64I-NEXT:    ld ra, 8(sp)
1838; RV64I-NEXT:    addi sp, sp, 16
1839; RV64I-NEXT:    ret
1840;
1841; RV64IA-LABEL: cmpxchg_i32_release_acquire:
1842; RV64IA:       # %bb.0:
1843; RV64IA-NEXT:    sext.w a1, a1
1844; RV64IA-NEXT:  .LBB24_1: # =>This Inner Loop Header: Depth=1
1845; RV64IA-NEXT:    lr.w a3, (a0)
1846; RV64IA-NEXT:    bne a3, a1, .LBB24_3
1847; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB24_1 Depth=1
1848; RV64IA-NEXT:    sc.w.rl a4, a2, (a0)
1849; RV64IA-NEXT:    bnez a4, .LBB24_1
1850; RV64IA-NEXT:  .LBB24_3:
1851; RV64IA-NEXT:    ret
1852  %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val release acquire
1853  ret void
1854}
1855
1856define void @cmpxchg_i32_acq_rel_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwind {
1857; RV32I-LABEL: cmpxchg_i32_acq_rel_monotonic:
1858; RV32I:       # %bb.0:
1859; RV32I-NEXT:    addi sp, sp, -16
1860; RV32I-NEXT:    sw ra, 12(sp)
1861; RV32I-NEXT:    sw a1, 8(sp)
1862; RV32I-NEXT:    addi a1, sp, 8
1863; RV32I-NEXT:    addi a3, zero, 4
1864; RV32I-NEXT:    mv a4, zero
1865; RV32I-NEXT:    call __atomic_compare_exchange_4
1866; RV32I-NEXT:    lw ra, 12(sp)
1867; RV32I-NEXT:    addi sp, sp, 16
1868; RV32I-NEXT:    ret
1869;
1870; RV32IA-LABEL: cmpxchg_i32_acq_rel_monotonic:
1871; RV32IA:       # %bb.0:
1872; RV32IA-NEXT:  .LBB25_1: # =>This Inner Loop Header: Depth=1
1873; RV32IA-NEXT:    lr.w.aq a3, (a0)
1874; RV32IA-NEXT:    bne a3, a1, .LBB25_3
1875; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB25_1 Depth=1
1876; RV32IA-NEXT:    sc.w.rl a4, a2, (a0)
1877; RV32IA-NEXT:    bnez a4, .LBB25_1
1878; RV32IA-NEXT:  .LBB25_3:
1879; RV32IA-NEXT:    ret
1880;
1881; RV64I-LABEL: cmpxchg_i32_acq_rel_monotonic:
1882; RV64I:       # %bb.0:
1883; RV64I-NEXT:    addi sp, sp, -16
1884; RV64I-NEXT:    sd ra, 8(sp)
1885; RV64I-NEXT:    sw a1, 4(sp)
1886; RV64I-NEXT:    addi a1, sp, 4
1887; RV64I-NEXT:    addi a3, zero, 4
1888; RV64I-NEXT:    mv a4, zero
1889; RV64I-NEXT:    call __atomic_compare_exchange_4
1890; RV64I-NEXT:    ld ra, 8(sp)
1891; RV64I-NEXT:    addi sp, sp, 16
1892; RV64I-NEXT:    ret
1893;
1894; RV64IA-LABEL: cmpxchg_i32_acq_rel_monotonic:
1895; RV64IA:       # %bb.0:
1896; RV64IA-NEXT:    sext.w a1, a1
1897; RV64IA-NEXT:  .LBB25_1: # =>This Inner Loop Header: Depth=1
1898; RV64IA-NEXT:    lr.w.aq a3, (a0)
1899; RV64IA-NEXT:    bne a3, a1, .LBB25_3
1900; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB25_1 Depth=1
1901; RV64IA-NEXT:    sc.w.rl a4, a2, (a0)
1902; RV64IA-NEXT:    bnez a4, .LBB25_1
1903; RV64IA-NEXT:  .LBB25_3:
1904; RV64IA-NEXT:    ret
1905  %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acq_rel monotonic
1906  ret void
1907}
1908
1909define void @cmpxchg_i32_acq_rel_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind {
1910; RV32I-LABEL: cmpxchg_i32_acq_rel_acquire:
1911; RV32I:       # %bb.0:
1912; RV32I-NEXT:    addi sp, sp, -16
1913; RV32I-NEXT:    sw ra, 12(sp)
1914; RV32I-NEXT:    sw a1, 8(sp)
1915; RV32I-NEXT:    addi a1, sp, 8
1916; RV32I-NEXT:    addi a3, zero, 4
1917; RV32I-NEXT:    addi a4, zero, 2
1918; RV32I-NEXT:    call __atomic_compare_exchange_4
1919; RV32I-NEXT:    lw ra, 12(sp)
1920; RV32I-NEXT:    addi sp, sp, 16
1921; RV32I-NEXT:    ret
1922;
1923; RV32IA-LABEL: cmpxchg_i32_acq_rel_acquire:
1924; RV32IA:       # %bb.0:
1925; RV32IA-NEXT:  .LBB26_1: # =>This Inner Loop Header: Depth=1
1926; RV32IA-NEXT:    lr.w.aq a3, (a0)
1927; RV32IA-NEXT:    bne a3, a1, .LBB26_3
1928; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB26_1 Depth=1
1929; RV32IA-NEXT:    sc.w.rl a4, a2, (a0)
1930; RV32IA-NEXT:    bnez a4, .LBB26_1
1931; RV32IA-NEXT:  .LBB26_3:
1932; RV32IA-NEXT:    ret
1933;
1934; RV64I-LABEL: cmpxchg_i32_acq_rel_acquire:
1935; RV64I:       # %bb.0:
1936; RV64I-NEXT:    addi sp, sp, -16
1937; RV64I-NEXT:    sd ra, 8(sp)
1938; RV64I-NEXT:    sw a1, 4(sp)
1939; RV64I-NEXT:    addi a1, sp, 4
1940; RV64I-NEXT:    addi a3, zero, 4
1941; RV64I-NEXT:    addi a4, zero, 2
1942; RV64I-NEXT:    call __atomic_compare_exchange_4
1943; RV64I-NEXT:    ld ra, 8(sp)
1944; RV64I-NEXT:    addi sp, sp, 16
1945; RV64I-NEXT:    ret
1946;
1947; RV64IA-LABEL: cmpxchg_i32_acq_rel_acquire:
1948; RV64IA:       # %bb.0:
1949; RV64IA-NEXT:    sext.w a1, a1
1950; RV64IA-NEXT:  .LBB26_1: # =>This Inner Loop Header: Depth=1
1951; RV64IA-NEXT:    lr.w.aq a3, (a0)
1952; RV64IA-NEXT:    bne a3, a1, .LBB26_3
1953; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB26_1 Depth=1
1954; RV64IA-NEXT:    sc.w.rl a4, a2, (a0)
1955; RV64IA-NEXT:    bnez a4, .LBB26_1
1956; RV64IA-NEXT:  .LBB26_3:
1957; RV64IA-NEXT:    ret
1958  %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acq_rel acquire
1959  ret void
1960}
1961
1962define void @cmpxchg_i32_seq_cst_monotonic(i32* %ptr, i32 %cmp, i32 %val) nounwind {
1963; RV32I-LABEL: cmpxchg_i32_seq_cst_monotonic:
1964; RV32I:       # %bb.0:
1965; RV32I-NEXT:    addi sp, sp, -16
1966; RV32I-NEXT:    sw ra, 12(sp)
1967; RV32I-NEXT:    sw a1, 8(sp)
1968; RV32I-NEXT:    addi a1, sp, 8
1969; RV32I-NEXT:    addi a3, zero, 5
1970; RV32I-NEXT:    mv a4, zero
1971; RV32I-NEXT:    call __atomic_compare_exchange_4
1972; RV32I-NEXT:    lw ra, 12(sp)
1973; RV32I-NEXT:    addi sp, sp, 16
1974; RV32I-NEXT:    ret
1975;
1976; RV32IA-LABEL: cmpxchg_i32_seq_cst_monotonic:
1977; RV32IA:       # %bb.0:
1978; RV32IA-NEXT:  .LBB27_1: # =>This Inner Loop Header: Depth=1
1979; RV32IA-NEXT:    lr.w.aqrl a3, (a0)
1980; RV32IA-NEXT:    bne a3, a1, .LBB27_3
1981; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB27_1 Depth=1
1982; RV32IA-NEXT:    sc.w.aqrl a4, a2, (a0)
1983; RV32IA-NEXT:    bnez a4, .LBB27_1
1984; RV32IA-NEXT:  .LBB27_3:
1985; RV32IA-NEXT:    ret
1986;
1987; RV64I-LABEL: cmpxchg_i32_seq_cst_monotonic:
1988; RV64I:       # %bb.0:
1989; RV64I-NEXT:    addi sp, sp, -16
1990; RV64I-NEXT:    sd ra, 8(sp)
1991; RV64I-NEXT:    sw a1, 4(sp)
1992; RV64I-NEXT:    addi a1, sp, 4
1993; RV64I-NEXT:    addi a3, zero, 5
1994; RV64I-NEXT:    mv a4, zero
1995; RV64I-NEXT:    call __atomic_compare_exchange_4
1996; RV64I-NEXT:    ld ra, 8(sp)
1997; RV64I-NEXT:    addi sp, sp, 16
1998; RV64I-NEXT:    ret
1999;
2000; RV64IA-LABEL: cmpxchg_i32_seq_cst_monotonic:
2001; RV64IA:       # %bb.0:
2002; RV64IA-NEXT:    sext.w a1, a1
2003; RV64IA-NEXT:  .LBB27_1: # =>This Inner Loop Header: Depth=1
2004; RV64IA-NEXT:    lr.w.aqrl a3, (a0)
2005; RV64IA-NEXT:    bne a3, a1, .LBB27_3
2006; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB27_1 Depth=1
2007; RV64IA-NEXT:    sc.w.aqrl a4, a2, (a0)
2008; RV64IA-NEXT:    bnez a4, .LBB27_1
2009; RV64IA-NEXT:  .LBB27_3:
2010; RV64IA-NEXT:    ret
2011  %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst monotonic
2012  ret void
2013}
2014
2015define void @cmpxchg_i32_seq_cst_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind {
2016; RV32I-LABEL: cmpxchg_i32_seq_cst_acquire:
2017; RV32I:       # %bb.0:
2018; RV32I-NEXT:    addi sp, sp, -16
2019; RV32I-NEXT:    sw ra, 12(sp)
2020; RV32I-NEXT:    sw a1, 8(sp)
2021; RV32I-NEXT:    addi a1, sp, 8
2022; RV32I-NEXT:    addi a3, zero, 5
2023; RV32I-NEXT:    addi a4, zero, 2
2024; RV32I-NEXT:    call __atomic_compare_exchange_4
2025; RV32I-NEXT:    lw ra, 12(sp)
2026; RV32I-NEXT:    addi sp, sp, 16
2027; RV32I-NEXT:    ret
2028;
2029; RV32IA-LABEL: cmpxchg_i32_seq_cst_acquire:
2030; RV32IA:       # %bb.0:
2031; RV32IA-NEXT:  .LBB28_1: # =>This Inner Loop Header: Depth=1
2032; RV32IA-NEXT:    lr.w.aqrl a3, (a0)
2033; RV32IA-NEXT:    bne a3, a1, .LBB28_3
2034; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB28_1 Depth=1
2035; RV32IA-NEXT:    sc.w.aqrl a4, a2, (a0)
2036; RV32IA-NEXT:    bnez a4, .LBB28_1
2037; RV32IA-NEXT:  .LBB28_3:
2038; RV32IA-NEXT:    ret
2039;
2040; RV64I-LABEL: cmpxchg_i32_seq_cst_acquire:
2041; RV64I:       # %bb.0:
2042; RV64I-NEXT:    addi sp, sp, -16
2043; RV64I-NEXT:    sd ra, 8(sp)
2044; RV64I-NEXT:    sw a1, 4(sp)
2045; RV64I-NEXT:    addi a1, sp, 4
2046; RV64I-NEXT:    addi a3, zero, 5
2047; RV64I-NEXT:    addi a4, zero, 2
2048; RV64I-NEXT:    call __atomic_compare_exchange_4
2049; RV64I-NEXT:    ld ra, 8(sp)
2050; RV64I-NEXT:    addi sp, sp, 16
2051; RV64I-NEXT:    ret
2052;
2053; RV64IA-LABEL: cmpxchg_i32_seq_cst_acquire:
2054; RV64IA:       # %bb.0:
2055; RV64IA-NEXT:    sext.w a1, a1
2056; RV64IA-NEXT:  .LBB28_1: # =>This Inner Loop Header: Depth=1
2057; RV64IA-NEXT:    lr.w.aqrl a3, (a0)
2058; RV64IA-NEXT:    bne a3, a1, .LBB28_3
2059; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB28_1 Depth=1
2060; RV64IA-NEXT:    sc.w.aqrl a4, a2, (a0)
2061; RV64IA-NEXT:    bnez a4, .LBB28_1
2062; RV64IA-NEXT:  .LBB28_3:
2063; RV64IA-NEXT:    ret
2064  %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst acquire
2065  ret void
2066}
2067
2068define void @cmpxchg_i32_seq_cst_seq_cst(i32* %ptr, i32 %cmp, i32 %val) nounwind {
2069; RV32I-LABEL: cmpxchg_i32_seq_cst_seq_cst:
2070; RV32I:       # %bb.0:
2071; RV32I-NEXT:    addi sp, sp, -16
2072; RV32I-NEXT:    sw ra, 12(sp)
2073; RV32I-NEXT:    sw a1, 8(sp)
2074; RV32I-NEXT:    addi a1, sp, 8
2075; RV32I-NEXT:    addi a3, zero, 5
2076; RV32I-NEXT:    addi a4, zero, 5
2077; RV32I-NEXT:    call __atomic_compare_exchange_4
2078; RV32I-NEXT:    lw ra, 12(sp)
2079; RV32I-NEXT:    addi sp, sp, 16
2080; RV32I-NEXT:    ret
2081;
2082; RV32IA-LABEL: cmpxchg_i32_seq_cst_seq_cst:
2083; RV32IA:       # %bb.0:
2084; RV32IA-NEXT:  .LBB29_1: # =>This Inner Loop Header: Depth=1
2085; RV32IA-NEXT:    lr.w.aqrl a3, (a0)
2086; RV32IA-NEXT:    bne a3, a1, .LBB29_3
2087; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB29_1 Depth=1
2088; RV32IA-NEXT:    sc.w.aqrl a4, a2, (a0)
2089; RV32IA-NEXT:    bnez a4, .LBB29_1
2090; RV32IA-NEXT:  .LBB29_3:
2091; RV32IA-NEXT:    ret
2092;
2093; RV64I-LABEL: cmpxchg_i32_seq_cst_seq_cst:
2094; RV64I:       # %bb.0:
2095; RV64I-NEXT:    addi sp, sp, -16
2096; RV64I-NEXT:    sd ra, 8(sp)
2097; RV64I-NEXT:    sw a1, 4(sp)
2098; RV64I-NEXT:    addi a1, sp, 4
2099; RV64I-NEXT:    addi a3, zero, 5
2100; RV64I-NEXT:    addi a4, zero, 5
2101; RV64I-NEXT:    call __atomic_compare_exchange_4
2102; RV64I-NEXT:    ld ra, 8(sp)
2103; RV64I-NEXT:    addi sp, sp, 16
2104; RV64I-NEXT:    ret
2105;
2106; RV64IA-LABEL: cmpxchg_i32_seq_cst_seq_cst:
2107; RV64IA:       # %bb.0:
2108; RV64IA-NEXT:    sext.w a1, a1
2109; RV64IA-NEXT:  .LBB29_1: # =>This Inner Loop Header: Depth=1
2110; RV64IA-NEXT:    lr.w.aqrl a3, (a0)
2111; RV64IA-NEXT:    bne a3, a1, .LBB29_3
2112; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB29_1 Depth=1
2113; RV64IA-NEXT:    sc.w.aqrl a4, a2, (a0)
2114; RV64IA-NEXT:    bnez a4, .LBB29_1
2115; RV64IA-NEXT:  .LBB29_3:
2116; RV64IA-NEXT:    ret
2117  %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst seq_cst
2118  ret void
2119}
2120
2121define void @cmpxchg_i64_monotonic_monotonic(i64* %ptr, i64 %cmp, i64 %val) nounwind {
2122; RV32I-LABEL: cmpxchg_i64_monotonic_monotonic:
2123; RV32I:       # %bb.0:
2124; RV32I-NEXT:    addi sp, sp, -16
2125; RV32I-NEXT:    sw ra, 12(sp)
2126; RV32I-NEXT:    sw a2, 4(sp)
2127; RV32I-NEXT:    sw a1, 0(sp)
2128; RV32I-NEXT:    mv a1, sp
2129; RV32I-NEXT:    mv a2, a3
2130; RV32I-NEXT:    mv a3, a4
2131; RV32I-NEXT:    mv a4, zero
2132; RV32I-NEXT:    mv a5, zero
2133; RV32I-NEXT:    call __atomic_compare_exchange_8
2134; RV32I-NEXT:    lw ra, 12(sp)
2135; RV32I-NEXT:    addi sp, sp, 16
2136; RV32I-NEXT:    ret
2137;
2138; RV32IA-LABEL: cmpxchg_i64_monotonic_monotonic:
2139; RV32IA:       # %bb.0:
2140; RV32IA-NEXT:    addi sp, sp, -16
2141; RV32IA-NEXT:    sw ra, 12(sp)
2142; RV32IA-NEXT:    sw a2, 4(sp)
2143; RV32IA-NEXT:    sw a1, 0(sp)
2144; RV32IA-NEXT:    mv a1, sp
2145; RV32IA-NEXT:    mv a2, a3
2146; RV32IA-NEXT:    mv a3, a4
2147; RV32IA-NEXT:    mv a4, zero
2148; RV32IA-NEXT:    mv a5, zero
2149; RV32IA-NEXT:    call __atomic_compare_exchange_8
2150; RV32IA-NEXT:    lw ra, 12(sp)
2151; RV32IA-NEXT:    addi sp, sp, 16
2152; RV32IA-NEXT:    ret
2153;
2154; RV64I-LABEL: cmpxchg_i64_monotonic_monotonic:
2155; RV64I:       # %bb.0:
2156; RV64I-NEXT:    addi sp, sp, -16
2157; RV64I-NEXT:    sd ra, 8(sp)
2158; RV64I-NEXT:    sd a1, 0(sp)
2159; RV64I-NEXT:    mv a1, sp
2160; RV64I-NEXT:    mv a3, zero
2161; RV64I-NEXT:    mv a4, zero
2162; RV64I-NEXT:    call __atomic_compare_exchange_8
2163; RV64I-NEXT:    ld ra, 8(sp)
2164; RV64I-NEXT:    addi sp, sp, 16
2165; RV64I-NEXT:    ret
2166;
2167; RV64IA-LABEL: cmpxchg_i64_monotonic_monotonic:
2168; RV64IA:       # %bb.0:
2169; RV64IA-NEXT:  .LBB30_1: # =>This Inner Loop Header: Depth=1
2170; RV64IA-NEXT:    lr.d a3, (a0)
2171; RV64IA-NEXT:    bne a3, a1, .LBB30_3
2172; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB30_1 Depth=1
2173; RV64IA-NEXT:    sc.d a4, a2, (a0)
2174; RV64IA-NEXT:    bnez a4, .LBB30_1
2175; RV64IA-NEXT:  .LBB30_3:
2176; RV64IA-NEXT:    ret
2177  %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val monotonic monotonic
2178  ret void
2179}
2180
2181define void @cmpxchg_i64_acquire_monotonic(i64* %ptr, i64 %cmp, i64 %val) nounwind {
2182; RV32I-LABEL: cmpxchg_i64_acquire_monotonic:
2183; RV32I:       # %bb.0:
2184; RV32I-NEXT:    addi sp, sp, -16
2185; RV32I-NEXT:    sw ra, 12(sp)
2186; RV32I-NEXT:    mv a5, a4
2187; RV32I-NEXT:    sw a2, 4(sp)
2188; RV32I-NEXT:    sw a1, 0(sp)
2189; RV32I-NEXT:    mv a1, sp
2190; RV32I-NEXT:    addi a4, zero, 2
2191; RV32I-NEXT:    mv a2, a3
2192; RV32I-NEXT:    mv a3, a5
2193; RV32I-NEXT:    mv a5, zero
2194; RV32I-NEXT:    call __atomic_compare_exchange_8
2195; RV32I-NEXT:    lw ra, 12(sp)
2196; RV32I-NEXT:    addi sp, sp, 16
2197; RV32I-NEXT:    ret
2198;
2199; RV32IA-LABEL: cmpxchg_i64_acquire_monotonic:
2200; RV32IA:       # %bb.0:
2201; RV32IA-NEXT:    addi sp, sp, -16
2202; RV32IA-NEXT:    sw ra, 12(sp)
2203; RV32IA-NEXT:    mv a5, a4
2204; RV32IA-NEXT:    sw a2, 4(sp)
2205; RV32IA-NEXT:    sw a1, 0(sp)
2206; RV32IA-NEXT:    mv a1, sp
2207; RV32IA-NEXT:    addi a4, zero, 2
2208; RV32IA-NEXT:    mv a2, a3
2209; RV32IA-NEXT:    mv a3, a5
2210; RV32IA-NEXT:    mv a5, zero
2211; RV32IA-NEXT:    call __atomic_compare_exchange_8
2212; RV32IA-NEXT:    lw ra, 12(sp)
2213; RV32IA-NEXT:    addi sp, sp, 16
2214; RV32IA-NEXT:    ret
2215;
2216; RV64I-LABEL: cmpxchg_i64_acquire_monotonic:
2217; RV64I:       # %bb.0:
2218; RV64I-NEXT:    addi sp, sp, -16
2219; RV64I-NEXT:    sd ra, 8(sp)
2220; RV64I-NEXT:    sd a1, 0(sp)
2221; RV64I-NEXT:    mv a1, sp
2222; RV64I-NEXT:    addi a3, zero, 2
2223; RV64I-NEXT:    mv a4, zero
2224; RV64I-NEXT:    call __atomic_compare_exchange_8
2225; RV64I-NEXT:    ld ra, 8(sp)
2226; RV64I-NEXT:    addi sp, sp, 16
2227; RV64I-NEXT:    ret
2228;
2229; RV64IA-LABEL: cmpxchg_i64_acquire_monotonic:
2230; RV64IA:       # %bb.0:
2231; RV64IA-NEXT:  .LBB31_1: # =>This Inner Loop Header: Depth=1
2232; RV64IA-NEXT:    lr.d.aq a3, (a0)
2233; RV64IA-NEXT:    bne a3, a1, .LBB31_3
2234; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB31_1 Depth=1
2235; RV64IA-NEXT:    sc.d a4, a2, (a0)
2236; RV64IA-NEXT:    bnez a4, .LBB31_1
2237; RV64IA-NEXT:  .LBB31_3:
2238; RV64IA-NEXT:    ret
2239  %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acquire monotonic
2240  ret void
2241}
2242
2243define void @cmpxchg_i64_acquire_acquire(i64* %ptr, i64 %cmp, i64 %val) nounwind {
2244; RV32I-LABEL: cmpxchg_i64_acquire_acquire:
2245; RV32I:       # %bb.0:
2246; RV32I-NEXT:    addi sp, sp, -16
2247; RV32I-NEXT:    sw ra, 12(sp)
2248; RV32I-NEXT:    mv a6, a4
2249; RV32I-NEXT:    sw a2, 4(sp)
2250; RV32I-NEXT:    sw a1, 0(sp)
2251; RV32I-NEXT:    mv a1, sp
2252; RV32I-NEXT:    addi a4, zero, 2
2253; RV32I-NEXT:    addi a5, zero, 2
2254; RV32I-NEXT:    mv a2, a3
2255; RV32I-NEXT:    mv a3, a6
2256; RV32I-NEXT:    call __atomic_compare_exchange_8
2257; RV32I-NEXT:    lw ra, 12(sp)
2258; RV32I-NEXT:    addi sp, sp, 16
2259; RV32I-NEXT:    ret
2260;
2261; RV32IA-LABEL: cmpxchg_i64_acquire_acquire:
2262; RV32IA:       # %bb.0:
2263; RV32IA-NEXT:    addi sp, sp, -16
2264; RV32IA-NEXT:    sw ra, 12(sp)
2265; RV32IA-NEXT:    mv a6, a4
2266; RV32IA-NEXT:    sw a2, 4(sp)
2267; RV32IA-NEXT:    sw a1, 0(sp)
2268; RV32IA-NEXT:    mv a1, sp
2269; RV32IA-NEXT:    addi a4, zero, 2
2270; RV32IA-NEXT:    addi a5, zero, 2
2271; RV32IA-NEXT:    mv a2, a3
2272; RV32IA-NEXT:    mv a3, a6
2273; RV32IA-NEXT:    call __atomic_compare_exchange_8
2274; RV32IA-NEXT:    lw ra, 12(sp)
2275; RV32IA-NEXT:    addi sp, sp, 16
2276; RV32IA-NEXT:    ret
2277;
2278; RV64I-LABEL: cmpxchg_i64_acquire_acquire:
2279; RV64I:       # %bb.0:
2280; RV64I-NEXT:    addi sp, sp, -16
2281; RV64I-NEXT:    sd ra, 8(sp)
2282; RV64I-NEXT:    sd a1, 0(sp)
2283; RV64I-NEXT:    mv a1, sp
2284; RV64I-NEXT:    addi a3, zero, 2
2285; RV64I-NEXT:    addi a4, zero, 2
2286; RV64I-NEXT:    call __atomic_compare_exchange_8
2287; RV64I-NEXT:    ld ra, 8(sp)
2288; RV64I-NEXT:    addi sp, sp, 16
2289; RV64I-NEXT:    ret
2290;
2291; RV64IA-LABEL: cmpxchg_i64_acquire_acquire:
2292; RV64IA:       # %bb.0:
2293; RV64IA-NEXT:  .LBB32_1: # =>This Inner Loop Header: Depth=1
2294; RV64IA-NEXT:    lr.d.aq a3, (a0)
2295; RV64IA-NEXT:    bne a3, a1, .LBB32_3
2296; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB32_1 Depth=1
2297; RV64IA-NEXT:    sc.d a4, a2, (a0)
2298; RV64IA-NEXT:    bnez a4, .LBB32_1
2299; RV64IA-NEXT:  .LBB32_3:
2300; RV64IA-NEXT:    ret
2301  %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acquire acquire
2302  ret void
2303}
2304
2305define void @cmpxchg_i64_release_monotonic(i64* %ptr, i64 %cmp, i64 %val) nounwind {
2306; RV32I-LABEL: cmpxchg_i64_release_monotonic:
2307; RV32I:       # %bb.0:
2308; RV32I-NEXT:    addi sp, sp, -16
2309; RV32I-NEXT:    sw ra, 12(sp)
2310; RV32I-NEXT:    mv a5, a4
2311; RV32I-NEXT:    sw a2, 4(sp)
2312; RV32I-NEXT:    sw a1, 0(sp)
2313; RV32I-NEXT:    mv a1, sp
2314; RV32I-NEXT:    addi a4, zero, 3
2315; RV32I-NEXT:    mv a2, a3
2316; RV32I-NEXT:    mv a3, a5
2317; RV32I-NEXT:    mv a5, zero
2318; RV32I-NEXT:    call __atomic_compare_exchange_8
2319; RV32I-NEXT:    lw ra, 12(sp)
2320; RV32I-NEXT:    addi sp, sp, 16
2321; RV32I-NEXT:    ret
2322;
2323; RV32IA-LABEL: cmpxchg_i64_release_monotonic:
2324; RV32IA:       # %bb.0:
2325; RV32IA-NEXT:    addi sp, sp, -16
2326; RV32IA-NEXT:    sw ra, 12(sp)
2327; RV32IA-NEXT:    mv a5, a4
2328; RV32IA-NEXT:    sw a2, 4(sp)
2329; RV32IA-NEXT:    sw a1, 0(sp)
2330; RV32IA-NEXT:    mv a1, sp
2331; RV32IA-NEXT:    addi a4, zero, 3
2332; RV32IA-NEXT:    mv a2, a3
2333; RV32IA-NEXT:    mv a3, a5
2334; RV32IA-NEXT:    mv a5, zero
2335; RV32IA-NEXT:    call __atomic_compare_exchange_8
2336; RV32IA-NEXT:    lw ra, 12(sp)
2337; RV32IA-NEXT:    addi sp, sp, 16
2338; RV32IA-NEXT:    ret
2339;
2340; RV64I-LABEL: cmpxchg_i64_release_monotonic:
2341; RV64I:       # %bb.0:
2342; RV64I-NEXT:    addi sp, sp, -16
2343; RV64I-NEXT:    sd ra, 8(sp)
2344; RV64I-NEXT:    sd a1, 0(sp)
2345; RV64I-NEXT:    mv a1, sp
2346; RV64I-NEXT:    addi a3, zero, 3
2347; RV64I-NEXT:    mv a4, zero
2348; RV64I-NEXT:    call __atomic_compare_exchange_8
2349; RV64I-NEXT:    ld ra, 8(sp)
2350; RV64I-NEXT:    addi sp, sp, 16
2351; RV64I-NEXT:    ret
2352;
2353; RV64IA-LABEL: cmpxchg_i64_release_monotonic:
2354; RV64IA:       # %bb.0:
2355; RV64IA-NEXT:  .LBB33_1: # =>This Inner Loop Header: Depth=1
2356; RV64IA-NEXT:    lr.d a3, (a0)
2357; RV64IA-NEXT:    bne a3, a1, .LBB33_3
2358; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB33_1 Depth=1
2359; RV64IA-NEXT:    sc.d.rl a4, a2, (a0)
2360; RV64IA-NEXT:    bnez a4, .LBB33_1
2361; RV64IA-NEXT:  .LBB33_3:
2362; RV64IA-NEXT:    ret
2363  %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val release monotonic
2364  ret void
2365}
2366
2367define void @cmpxchg_i64_release_acquire(i64* %ptr, i64 %cmp, i64 %val) nounwind {
2368; RV32I-LABEL: cmpxchg_i64_release_acquire:
2369; RV32I:       # %bb.0:
2370; RV32I-NEXT:    addi sp, sp, -16
2371; RV32I-NEXT:    sw ra, 12(sp)
2372; RV32I-NEXT:    mv a6, a4
2373; RV32I-NEXT:    sw a2, 4(sp)
2374; RV32I-NEXT:    sw a1, 0(sp)
2375; RV32I-NEXT:    mv a1, sp
2376; RV32I-NEXT:    addi a4, zero, 3
2377; RV32I-NEXT:    addi a5, zero, 2
2378; RV32I-NEXT:    mv a2, a3
2379; RV32I-NEXT:    mv a3, a6
2380; RV32I-NEXT:    call __atomic_compare_exchange_8
2381; RV32I-NEXT:    lw ra, 12(sp)
2382; RV32I-NEXT:    addi sp, sp, 16
2383; RV32I-NEXT:    ret
2384;
2385; RV32IA-LABEL: cmpxchg_i64_release_acquire:
2386; RV32IA:       # %bb.0:
2387; RV32IA-NEXT:    addi sp, sp, -16
2388; RV32IA-NEXT:    sw ra, 12(sp)
2389; RV32IA-NEXT:    mv a6, a4
2390; RV32IA-NEXT:    sw a2, 4(sp)
2391; RV32IA-NEXT:    sw a1, 0(sp)
2392; RV32IA-NEXT:    mv a1, sp
2393; RV32IA-NEXT:    addi a4, zero, 3
2394; RV32IA-NEXT:    addi a5, zero, 2
2395; RV32IA-NEXT:    mv a2, a3
2396; RV32IA-NEXT:    mv a3, a6
2397; RV32IA-NEXT:    call __atomic_compare_exchange_8
2398; RV32IA-NEXT:    lw ra, 12(sp)
2399; RV32IA-NEXT:    addi sp, sp, 16
2400; RV32IA-NEXT:    ret
2401;
2402; RV64I-LABEL: cmpxchg_i64_release_acquire:
2403; RV64I:       # %bb.0:
2404; RV64I-NEXT:    addi sp, sp, -16
2405; RV64I-NEXT:    sd ra, 8(sp)
2406; RV64I-NEXT:    sd a1, 0(sp)
2407; RV64I-NEXT:    mv a1, sp
2408; RV64I-NEXT:    addi a3, zero, 3
2409; RV64I-NEXT:    addi a4, zero, 2
2410; RV64I-NEXT:    call __atomic_compare_exchange_8
2411; RV64I-NEXT:    ld ra, 8(sp)
2412; RV64I-NEXT:    addi sp, sp, 16
2413; RV64I-NEXT:    ret
2414;
2415; RV64IA-LABEL: cmpxchg_i64_release_acquire:
2416; RV64IA:       # %bb.0:
2417; RV64IA-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
2418; RV64IA-NEXT:    lr.d a3, (a0)
2419; RV64IA-NEXT:    bne a3, a1, .LBB34_3
2420; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB34_1 Depth=1
2421; RV64IA-NEXT:    sc.d.rl a4, a2, (a0)
2422; RV64IA-NEXT:    bnez a4, .LBB34_1
2423; RV64IA-NEXT:  .LBB34_3:
2424; RV64IA-NEXT:    ret
2425  %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val release acquire
2426  ret void
2427}
2428
2429define void @cmpxchg_i64_acq_rel_monotonic(i64* %ptr, i64 %cmp, i64 %val) nounwind {
2430; RV32I-LABEL: cmpxchg_i64_acq_rel_monotonic:
2431; RV32I:       # %bb.0:
2432; RV32I-NEXT:    addi sp, sp, -16
2433; RV32I-NEXT:    sw ra, 12(sp)
2434; RV32I-NEXT:    mv a5, a4
2435; RV32I-NEXT:    sw a2, 4(sp)
2436; RV32I-NEXT:    sw a1, 0(sp)
2437; RV32I-NEXT:    mv a1, sp
2438; RV32I-NEXT:    addi a4, zero, 4
2439; RV32I-NEXT:    mv a2, a3
2440; RV32I-NEXT:    mv a3, a5
2441; RV32I-NEXT:    mv a5, zero
2442; RV32I-NEXT:    call __atomic_compare_exchange_8
2443; RV32I-NEXT:    lw ra, 12(sp)
2444; RV32I-NEXT:    addi sp, sp, 16
2445; RV32I-NEXT:    ret
2446;
2447; RV32IA-LABEL: cmpxchg_i64_acq_rel_monotonic:
2448; RV32IA:       # %bb.0:
2449; RV32IA-NEXT:    addi sp, sp, -16
2450; RV32IA-NEXT:    sw ra, 12(sp)
2451; RV32IA-NEXT:    mv a5, a4
2452; RV32IA-NEXT:    sw a2, 4(sp)
2453; RV32IA-NEXT:    sw a1, 0(sp)
2454; RV32IA-NEXT:    mv a1, sp
2455; RV32IA-NEXT:    addi a4, zero, 4
2456; RV32IA-NEXT:    mv a2, a3
2457; RV32IA-NEXT:    mv a3, a5
2458; RV32IA-NEXT:    mv a5, zero
2459; RV32IA-NEXT:    call __atomic_compare_exchange_8
2460; RV32IA-NEXT:    lw ra, 12(sp)
2461; RV32IA-NEXT:    addi sp, sp, 16
2462; RV32IA-NEXT:    ret
2463;
2464; RV64I-LABEL: cmpxchg_i64_acq_rel_monotonic:
2465; RV64I:       # %bb.0:
2466; RV64I-NEXT:    addi sp, sp, -16
2467; RV64I-NEXT:    sd ra, 8(sp)
2468; RV64I-NEXT:    sd a1, 0(sp)
2469; RV64I-NEXT:    mv a1, sp
2470; RV64I-NEXT:    addi a3, zero, 4
2471; RV64I-NEXT:    mv a4, zero
2472; RV64I-NEXT:    call __atomic_compare_exchange_8
2473; RV64I-NEXT:    ld ra, 8(sp)
2474; RV64I-NEXT:    addi sp, sp, 16
2475; RV64I-NEXT:    ret
2476;
2477; RV64IA-LABEL: cmpxchg_i64_acq_rel_monotonic:
2478; RV64IA:       # %bb.0:
2479; RV64IA-NEXT:  .LBB35_1: # =>This Inner Loop Header: Depth=1
2480; RV64IA-NEXT:    lr.d.aq a3, (a0)
2481; RV64IA-NEXT:    bne a3, a1, .LBB35_3
2482; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB35_1 Depth=1
2483; RV64IA-NEXT:    sc.d.rl a4, a2, (a0)
2484; RV64IA-NEXT:    bnez a4, .LBB35_1
2485; RV64IA-NEXT:  .LBB35_3:
2486; RV64IA-NEXT:    ret
2487  %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acq_rel monotonic
2488  ret void
2489}
2490
2491define void @cmpxchg_i64_acq_rel_acquire(i64* %ptr, i64 %cmp, i64 %val) nounwind {
2492; RV32I-LABEL: cmpxchg_i64_acq_rel_acquire:
2493; RV32I:       # %bb.0:
2494; RV32I-NEXT:    addi sp, sp, -16
2495; RV32I-NEXT:    sw ra, 12(sp)
2496; RV32I-NEXT:    mv a6, a4
2497; RV32I-NEXT:    sw a2, 4(sp)
2498; RV32I-NEXT:    sw a1, 0(sp)
2499; RV32I-NEXT:    mv a1, sp
2500; RV32I-NEXT:    addi a4, zero, 4
2501; RV32I-NEXT:    addi a5, zero, 2
2502; RV32I-NEXT:    mv a2, a3
2503; RV32I-NEXT:    mv a3, a6
2504; RV32I-NEXT:    call __atomic_compare_exchange_8
2505; RV32I-NEXT:    lw ra, 12(sp)
2506; RV32I-NEXT:    addi sp, sp, 16
2507; RV32I-NEXT:    ret
2508;
2509; RV32IA-LABEL: cmpxchg_i64_acq_rel_acquire:
2510; RV32IA:       # %bb.0:
2511; RV32IA-NEXT:    addi sp, sp, -16
2512; RV32IA-NEXT:    sw ra, 12(sp)
2513; RV32IA-NEXT:    mv a6, a4
2514; RV32IA-NEXT:    sw a2, 4(sp)
2515; RV32IA-NEXT:    sw a1, 0(sp)
2516; RV32IA-NEXT:    mv a1, sp
2517; RV32IA-NEXT:    addi a4, zero, 4
2518; RV32IA-NEXT:    addi a5, zero, 2
2519; RV32IA-NEXT:    mv a2, a3
2520; RV32IA-NEXT:    mv a3, a6
2521; RV32IA-NEXT:    call __atomic_compare_exchange_8
2522; RV32IA-NEXT:    lw ra, 12(sp)
2523; RV32IA-NEXT:    addi sp, sp, 16
2524; RV32IA-NEXT:    ret
2525;
2526; RV64I-LABEL: cmpxchg_i64_acq_rel_acquire:
2527; RV64I:       # %bb.0:
2528; RV64I-NEXT:    addi sp, sp, -16
2529; RV64I-NEXT:    sd ra, 8(sp)
2530; RV64I-NEXT:    sd a1, 0(sp)
2531; RV64I-NEXT:    mv a1, sp
2532; RV64I-NEXT:    addi a3, zero, 4
2533; RV64I-NEXT:    addi a4, zero, 2
2534; RV64I-NEXT:    call __atomic_compare_exchange_8
2535; RV64I-NEXT:    ld ra, 8(sp)
2536; RV64I-NEXT:    addi sp, sp, 16
2537; RV64I-NEXT:    ret
2538;
2539; RV64IA-LABEL: cmpxchg_i64_acq_rel_acquire:
2540; RV64IA:       # %bb.0:
2541; RV64IA-NEXT:  .LBB36_1: # =>This Inner Loop Header: Depth=1
2542; RV64IA-NEXT:    lr.d.aq a3, (a0)
2543; RV64IA-NEXT:    bne a3, a1, .LBB36_3
2544; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB36_1 Depth=1
2545; RV64IA-NEXT:    sc.d.rl a4, a2, (a0)
2546; RV64IA-NEXT:    bnez a4, .LBB36_1
2547; RV64IA-NEXT:  .LBB36_3:
2548; RV64IA-NEXT:    ret
2549  %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acq_rel acquire
2550  ret void
2551}
2552
2553define void @cmpxchg_i64_seq_cst_monotonic(i64* %ptr, i64 %cmp, i64 %val) nounwind {
2554; RV32I-LABEL: cmpxchg_i64_seq_cst_monotonic:
2555; RV32I:       # %bb.0:
2556; RV32I-NEXT:    addi sp, sp, -16
2557; RV32I-NEXT:    sw ra, 12(sp)
2558; RV32I-NEXT:    mv a5, a4
2559; RV32I-NEXT:    sw a2, 4(sp)
2560; RV32I-NEXT:    sw a1, 0(sp)
2561; RV32I-NEXT:    mv a1, sp
2562; RV32I-NEXT:    addi a4, zero, 5
2563; RV32I-NEXT:    mv a2, a3
2564; RV32I-NEXT:    mv a3, a5
2565; RV32I-NEXT:    mv a5, zero
2566; RV32I-NEXT:    call __atomic_compare_exchange_8
2567; RV32I-NEXT:    lw ra, 12(sp)
2568; RV32I-NEXT:    addi sp, sp, 16
2569; RV32I-NEXT:    ret
2570;
2571; RV32IA-LABEL: cmpxchg_i64_seq_cst_monotonic:
2572; RV32IA:       # %bb.0:
2573; RV32IA-NEXT:    addi sp, sp, -16
2574; RV32IA-NEXT:    sw ra, 12(sp)
2575; RV32IA-NEXT:    mv a5, a4
2576; RV32IA-NEXT:    sw a2, 4(sp)
2577; RV32IA-NEXT:    sw a1, 0(sp)
2578; RV32IA-NEXT:    mv a1, sp
2579; RV32IA-NEXT:    addi a4, zero, 5
2580; RV32IA-NEXT:    mv a2, a3
2581; RV32IA-NEXT:    mv a3, a5
2582; RV32IA-NEXT:    mv a5, zero
2583; RV32IA-NEXT:    call __atomic_compare_exchange_8
2584; RV32IA-NEXT:    lw ra, 12(sp)
2585; RV32IA-NEXT:    addi sp, sp, 16
2586; RV32IA-NEXT:    ret
2587;
2588; RV64I-LABEL: cmpxchg_i64_seq_cst_monotonic:
2589; RV64I:       # %bb.0:
2590; RV64I-NEXT:    addi sp, sp, -16
2591; RV64I-NEXT:    sd ra, 8(sp)
2592; RV64I-NEXT:    sd a1, 0(sp)
2593; RV64I-NEXT:    mv a1, sp
2594; RV64I-NEXT:    addi a3, zero, 5
2595; RV64I-NEXT:    mv a4, zero
2596; RV64I-NEXT:    call __atomic_compare_exchange_8
2597; RV64I-NEXT:    ld ra, 8(sp)
2598; RV64I-NEXT:    addi sp, sp, 16
2599; RV64I-NEXT:    ret
2600;
2601; RV64IA-LABEL: cmpxchg_i64_seq_cst_monotonic:
2602; RV64IA:       # %bb.0:
2603; RV64IA-NEXT:  .LBB37_1: # =>This Inner Loop Header: Depth=1
2604; RV64IA-NEXT:    lr.d.aqrl a3, (a0)
2605; RV64IA-NEXT:    bne a3, a1, .LBB37_3
2606; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB37_1 Depth=1
2607; RV64IA-NEXT:    sc.d.aqrl a4, a2, (a0)
2608; RV64IA-NEXT:    bnez a4, .LBB37_1
2609; RV64IA-NEXT:  .LBB37_3:
2610; RV64IA-NEXT:    ret
2611  %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst monotonic
2612  ret void
2613}
2614
2615define void @cmpxchg_i64_seq_cst_acquire(i64* %ptr, i64 %cmp, i64 %val) nounwind {
2616; RV32I-LABEL: cmpxchg_i64_seq_cst_acquire:
2617; RV32I:       # %bb.0:
2618; RV32I-NEXT:    addi sp, sp, -16
2619; RV32I-NEXT:    sw ra, 12(sp)
2620; RV32I-NEXT:    mv a6, a4
2621; RV32I-NEXT:    sw a2, 4(sp)
2622; RV32I-NEXT:    sw a1, 0(sp)
2623; RV32I-NEXT:    mv a1, sp
2624; RV32I-NEXT:    addi a4, zero, 5
2625; RV32I-NEXT:    addi a5, zero, 2
2626; RV32I-NEXT:    mv a2, a3
2627; RV32I-NEXT:    mv a3, a6
2628; RV32I-NEXT:    call __atomic_compare_exchange_8
2629; RV32I-NEXT:    lw ra, 12(sp)
2630; RV32I-NEXT:    addi sp, sp, 16
2631; RV32I-NEXT:    ret
2632;
2633; RV32IA-LABEL: cmpxchg_i64_seq_cst_acquire:
2634; RV32IA:       # %bb.0:
2635; RV32IA-NEXT:    addi sp, sp, -16
2636; RV32IA-NEXT:    sw ra, 12(sp)
2637; RV32IA-NEXT:    mv a6, a4
2638; RV32IA-NEXT:    sw a2, 4(sp)
2639; RV32IA-NEXT:    sw a1, 0(sp)
2640; RV32IA-NEXT:    mv a1, sp
2641; RV32IA-NEXT:    addi a4, zero, 5
2642; RV32IA-NEXT:    addi a5, zero, 2
2643; RV32IA-NEXT:    mv a2, a3
2644; RV32IA-NEXT:    mv a3, a6
2645; RV32IA-NEXT:    call __atomic_compare_exchange_8
2646; RV32IA-NEXT:    lw ra, 12(sp)
2647; RV32IA-NEXT:    addi sp, sp, 16
2648; RV32IA-NEXT:    ret
2649;
2650; RV64I-LABEL: cmpxchg_i64_seq_cst_acquire:
2651; RV64I:       # %bb.0:
2652; RV64I-NEXT:    addi sp, sp, -16
2653; RV64I-NEXT:    sd ra, 8(sp)
2654; RV64I-NEXT:    sd a1, 0(sp)
2655; RV64I-NEXT:    mv a1, sp
2656; RV64I-NEXT:    addi a3, zero, 5
2657; RV64I-NEXT:    addi a4, zero, 2
2658; RV64I-NEXT:    call __atomic_compare_exchange_8
2659; RV64I-NEXT:    ld ra, 8(sp)
2660; RV64I-NEXT:    addi sp, sp, 16
2661; RV64I-NEXT:    ret
2662;
2663; RV64IA-LABEL: cmpxchg_i64_seq_cst_acquire:
2664; RV64IA:       # %bb.0:
2665; RV64IA-NEXT:  .LBB38_1: # =>This Inner Loop Header: Depth=1
2666; RV64IA-NEXT:    lr.d.aqrl a3, (a0)
2667; RV64IA-NEXT:    bne a3, a1, .LBB38_3
2668; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB38_1 Depth=1
2669; RV64IA-NEXT:    sc.d.aqrl a4, a2, (a0)
2670; RV64IA-NEXT:    bnez a4, .LBB38_1
2671; RV64IA-NEXT:  .LBB38_3:
2672; RV64IA-NEXT:    ret
2673  %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst acquire
2674  ret void
2675}
2676
2677define void @cmpxchg_i64_seq_cst_seq_cst(i64* %ptr, i64 %cmp, i64 %val) nounwind {
2678; RV32I-LABEL: cmpxchg_i64_seq_cst_seq_cst:
2679; RV32I:       # %bb.0:
2680; RV32I-NEXT:    addi sp, sp, -16
2681; RV32I-NEXT:    sw ra, 12(sp)
2682; RV32I-NEXT:    mv a6, a4
2683; RV32I-NEXT:    sw a2, 4(sp)
2684; RV32I-NEXT:    sw a1, 0(sp)
2685; RV32I-NEXT:    mv a1, sp
2686; RV32I-NEXT:    addi a4, zero, 5
2687; RV32I-NEXT:    addi a5, zero, 5
2688; RV32I-NEXT:    mv a2, a3
2689; RV32I-NEXT:    mv a3, a6
2690; RV32I-NEXT:    call __atomic_compare_exchange_8
2691; RV32I-NEXT:    lw ra, 12(sp)
2692; RV32I-NEXT:    addi sp, sp, 16
2693; RV32I-NEXT:    ret
2694;
2695; RV32IA-LABEL: cmpxchg_i64_seq_cst_seq_cst:
2696; RV32IA:       # %bb.0:
2697; RV32IA-NEXT:    addi sp, sp, -16
2698; RV32IA-NEXT:    sw ra, 12(sp)
2699; RV32IA-NEXT:    mv a6, a4
2700; RV32IA-NEXT:    sw a2, 4(sp)
2701; RV32IA-NEXT:    sw a1, 0(sp)
2702; RV32IA-NEXT:    mv a1, sp
2703; RV32IA-NEXT:    addi a4, zero, 5
2704; RV32IA-NEXT:    addi a5, zero, 5
2705; RV32IA-NEXT:    mv a2, a3
2706; RV32IA-NEXT:    mv a3, a6
2707; RV32IA-NEXT:    call __atomic_compare_exchange_8
2708; RV32IA-NEXT:    lw ra, 12(sp)
2709; RV32IA-NEXT:    addi sp, sp, 16
2710; RV32IA-NEXT:    ret
2711;
2712; RV64I-LABEL: cmpxchg_i64_seq_cst_seq_cst:
2713; RV64I:       # %bb.0:
2714; RV64I-NEXT:    addi sp, sp, -16
2715; RV64I-NEXT:    sd ra, 8(sp)
2716; RV64I-NEXT:    sd a1, 0(sp)
2717; RV64I-NEXT:    mv a1, sp
2718; RV64I-NEXT:    addi a3, zero, 5
2719; RV64I-NEXT:    addi a4, zero, 5
2720; RV64I-NEXT:    call __atomic_compare_exchange_8
2721; RV64I-NEXT:    ld ra, 8(sp)
2722; RV64I-NEXT:    addi sp, sp, 16
2723; RV64I-NEXT:    ret
2724;
2725; RV64IA-LABEL: cmpxchg_i64_seq_cst_seq_cst:
2726; RV64IA:       # %bb.0:
2727; RV64IA-NEXT:  .LBB39_1: # =>This Inner Loop Header: Depth=1
2728; RV64IA-NEXT:    lr.d.aqrl a3, (a0)
2729; RV64IA-NEXT:    bne a3, a1, .LBB39_3
2730; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB39_1 Depth=1
2731; RV64IA-NEXT:    sc.d.aqrl a4, a2, (a0)
2732; RV64IA-NEXT:    bnez a4, .LBB39_1
2733; RV64IA-NEXT:  .LBB39_3:
2734; RV64IA-NEXT:    ret
2735  %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst seq_cst
2736  ret void
2737}
2738