1; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck -check-prefix=P32 %s
2; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck -check-prefix=P64 %s
3; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefix=P64 %s
4
5; PR8327
6define i8* @test1(i8** %foo) nounwind {
7  %A = va_arg i8** %foo, i8*
8  ret i8* %A
9}
10
11; P32-LABEL: test1:
12; P32:  lbz [[REG1:r[0-9]+]], 0(r3)
13; P32:  addi [[REG2:r[0-9]+]], [[REG1]], 1
14;	P32:  stb [[REG2]], 0(r3)
15;	P32:  cmpwi	[[REG1]], 8
16;	P32:  lwz [[REG3:r[0-9]+]], 4(r3)
17;	P32:  slwi [[REG4:r[0-9]+]], [[REG1]], 2
18;	P32:  addi [[REG5:r[0-9]+]], [[REG3]], 4
19;	P32:  bc 12, lt, .LBB0_1
20;	P32:  b .LBB0_2
21; P32:  .LBB0_1:
22; P32:  addi [[REG5]], [[REG3]], 0
23;	P32: .LBB0_2:
24;	P32:  stw [[REG5]], 4(r3)
25;	P32:  lwz [[REG6:r[0-9]+]], 8(r3)
26;	P32:  add [[REG6]], [[REG6]], [[REG4]]
27; P32:  bc 12, lt, .LBB0_4
28;	P32: # %bb.3:
29;	P32:  ori [[REG6]], [[REG2]], 0
30;	P32:  b .LBB0_4
31;	P32: .LBB0_4:
32;	P32:  lwz r3, 0([[REG6]])
33;	P32:  blr
34
35; P64-LABEL: test1:
36; P64: ld [[REG1:r[0-9]+]], 0(r3)
37; P64: addi [[REG2:r[0-9]+]], [[REG1]], 8
38; P64: std [[REG2]], 0(r3)
39; P64: ld r3, 0([[REG1]])
40; P64: blr
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