1; XFAIL: *
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = common local_unnamed_addr global i16 0, align 2
10
11; Function Attrs: norecurse nounwind readnone
12define i64 @test_llltus(i16 zeroext %a, i16 zeroext %b) {
13; CHECK-LABEL: test_llltus:
14; CHECK:       # BB#0: # %entry
15; CHECK-NEXT:    sub [[REG:r[0-9]+]], r3, r4
16; CHECK-NEXT:    rldicl r3, [[REG]], 1, 63
17; CHECK-NEXT:    blr
18entry:
19  %cmp = icmp ult i16 %a, %b
20  %conv3 = zext i1 %cmp to i64
21  ret i64 %conv3
22}
23
24; Function Attrs: norecurse nounwind readnone
25define i64 @test_llltus_sext(i16 zeroext %a, i16 zeroext %b) {
26; CHECK-LABEL: test_llltus_sext:
27; CHECK:       # BB#0: # %entry
28; CHECK-NEXT:    sub [[REG:r[0-9]+]], r3, r4
29; CHECK-NEXT:    sradi r3, [[REG]], 63
30; CHECK-NEXT:    blr
31entry:
32  %cmp = icmp ult i16 %a, %b
33  %conv3 = sext i1 %cmp to i64
34  ret i64 %conv3
35}
36
37; Function Attrs: norecurse nounwind
38define void @test_llltus_store(i16 zeroext %a, i16 zeroext %b) {
39; CHECK-LABEL: test_llltus_store:
40; CHECK:         sub [[REG:r[2-9]+]], r3, r4
41; CHECK:         rldicl {{r[0-9]+}}, [[REG]], 1, 63
42entry:
43  %cmp = icmp ult i16 %a, %b
44  %conv3 = zext i1 %cmp to i16
45  store i16 %conv3, i16* @glob, align 2
46  ret void
47}
48
49; Function Attrs: norecurse nounwind
50define void @test_llltus_sext_store(i16 zeroext %a, i16 zeroext %b) {
51; CHECK-LABEL: test_llltus_sext_store:
52; CHECK:       # BB#0: # %entry
53; CHECK:         sub [[REG:r[0-9]+]], r3, r4
54; CHECK:         sradi {{r[0-9]+}}, [[REG]], 63
55entry:
56  %cmp = icmp ult i16 %a, %b
57  %conv3 = sext i1 %cmp to i16
58  store i16 %conv3, i16* @glob, align 2
59  ret void
60}
61