1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
2; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
3; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
5; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
6; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
7
8@glob = common local_unnamed_addr global i32 0, align 4
9
10; Function Attrs: norecurse nounwind readnone
11define i64 @test_llltui(i32 zeroext %a, i32 zeroext %b) {
12; CHECK-LABEL: test_llltui:
13; CHECK:       # %bb.0: # %entry
14; CHECK-NOT:     clrldi
15; CHECK-NEXT:    sub [[REG:r[0-9]+]], r3, r4
16; CHECK-NEXT:    rldicl r3, [[REG]], 1, 63
17; CHECK-NEXT:    blr
18entry:
19  %cmp = icmp ult i32 %a, %b
20  %conv1 = zext i1 %cmp to i64
21  ret i64 %conv1
22}
23
24; Function Attrs: norecurse nounwind readnone
25define i64 @test_llltui_sext(i32 zeroext %a, i32 zeroext %b) {
26; CHECK-LABEL: test_llltui_sext:
27; CHECK:       # %bb.0: # %entry
28; CHECK-NEXT:    sub [[REG:r[0-9]+]], r3, r4
29; CHECK-NEXT:    sradi r3, [[REG]], 63
30; CHECK-NEXT:    blr
31entry:
32  %cmp = icmp ult i32 %a, %b
33  %conv1 = sext i1 %cmp to i64
34  ret i64 %conv1
35}
36
37; Function Attrs: norecurse nounwind readnone
38define i64 @test_llltui_z(i32 zeroext %a) {
39; CHECK-LABEL: test_llltui_z:
40; CHECK:       # %bb.0: # %entry
41; CHECK-NEXT:    li r3, 0
42; CHECK-NEXT:    blr
43entry:
44  ret i64 0
45}
46
47; Function Attrs: norecurse nounwind readnone
48define i64 @test_llltui_sext_z(i32 zeroext %a) {
49; CHECK-LABEL: test_llltui_sext_z:
50; CHECK:       # %bb.0: # %entry
51; CHECK-NEXT:    li r3, 0
52; CHECK-NEXT:    blr
53entry:
54  ret i64 0
55}
56
57; Function Attrs: norecurse nounwind
58define void @test_llltui_store(i32 zeroext %a, i32 zeroext %b) {
59; CHECK-LABEL: test_llltui_store:
60; CHECK:       # %bb.0: # %entry
61; CHECK-NOT:     clrldi
62; CHECK:         sub [[REG:r[2-9]+]], r3, r4
63; CHECK:         rldicl {{r[0-9]+}}, [[REG]], 1, 63
64entry:
65  %cmp = icmp ult i32 %a, %b
66  %conv = zext i1 %cmp to i32
67  store i32 %conv, i32* @glob, align 4
68  ret void
69}
70
71; Function Attrs: norecurse nounwind
72define void @test_llltui_sext_store(i32 zeroext %a, i32 zeroext %b) {
73; CHECK-LABEL: test_llltui_sext_store:
74; CHECK:       # %bb.0: # %entry
75; CHECK-NOT:     clrldi
76; CHECK:         sub [[REG:r[0-9]+]], r3, r4
77; CHECK:         sradi {{r[0-9]+}}, [[REG]], 63
78entry:
79  %cmp = icmp ult i32 %a, %b
80  %sub = sext i1 %cmp to i32
81  store i32 %sub, i32* @glob, align 4
82  ret void
83}
84
85; Function Attrs: norecurse nounwind
86define void @test_llltui_z_store(i32 zeroext %a) {
87; CHECK-LABEL: test_llltui_z_store:
88; CHECK:       # %bb.0: # %entry
89; CHECK:         li [[REG:r[0-9]+]], 0
90; CHECK:         stw [[REG]], 0(r3)
91; CHECK-NEXT:    blr
92entry:
93  store i32 0, i32* @glob, align 4
94  ret void
95}
96
97; Function Attrs: norecurse nounwind
98define void @test_llltui_sext_z_store(i32 zeroext %a) {
99; CHECK-LABEL: test_llltui_sext_z_store:
100; CHECK:       # %bb.0: # %entry
101; CHECK:         li [[REG:r[0-9]+]], 0
102; CHECK:         stw [[REG]], 0(r3)
103; CHECK-NEXT:    blr
104entry:
105  store i32 0, i32* @glob, align 4
106  ret void
107}
108
109