1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
2; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
3; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
5; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
6; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
7
8@glob = common local_unnamed_addr global i8 0, align 1
9
10; Function Attrs: norecurse nounwind readnone
11define i64 @test_llltuc(i8 zeroext %a, i8 zeroext %b) {
12; CHECK-LABEL: test_llltuc:
13; CHECK:       # %bb.0: # %entry
14; CHECK-NEXT:    sub [[REG:r[0-9]+]], r3, r4
15; CHECK-NEXT:    rldicl r3, [[REG]], 1, 63
16; CHECK-NEXT:    blr
17entry:
18  %cmp = icmp ult i8 %a, %b
19  %conv3 = zext i1 %cmp to i64
20  ret i64 %conv3
21}
22
23; Function Attrs: norecurse nounwind readnone
24define i64 @test_llltuc_sext(i8 zeroext %a, i8 zeroext %b) {
25; CHECK-LABEL: test_llltuc_sext:
26; CHECK:       # %bb.0: # %entry
27; CHECK-NEXT:    sub [[REG:r[0-9]+]], r3, r4
28; CHECK-NEXT:    sradi r3, [[REG]], 63
29; CHECK-NEXT:    blr
30entry:
31  %cmp = icmp ult i8 %a, %b
32  %conv3 = sext i1 %cmp to i64
33  ret i64 %conv3
34}
35
36; Function Attrs: norecurse nounwind
37define void @test_llltuc_store(i8 zeroext %a, i8 zeroext %b) {
38; CHECK-LABEL: test_llltuc_store:
39; CHECK:       # %bb.0: # %entry
40; CHECK:         sub [[REG:r[2-9]+]], r3, r4
41; CHECK:         rldicl {{r[0-9]+}}, [[REG]], 1, 63
42entry:
43  %cmp = icmp ult i8 %a, %b
44  %conv3 = zext i1 %cmp to i8
45  store i8 %conv3, i8* @glob, align 1
46  ret void
47}
48
49; Function Attrs: norecurse nounwind
50define void @test_llltuc_sext_store(i8 zeroext %a, i8 zeroext %b) {
51; CHECK-LABEL: test_llltuc_sext_store:
52; CHECK:       # %bb.0: # %entry
53; CHECK:         sub [[REG:r[0-9]+]], r3, r4
54; CHECK:         sradi {{r[0-9]+}}, [[REG]], 63
55entry:
56  %cmp = icmp ult i8 %a, %b
57  %conv3 = sext i1 %cmp to i8
58  store i8 %conv3, i8* @glob, align 1
59  ret void
60}
61