1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
2; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
3; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
5; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
6; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
7
8@glob = common local_unnamed_addr global i64 0, align 8
9
10; Function Attrs: norecurse nounwind readnone
11define i64 @test_llleull(i64 %a, i64 %b) {
12entry:
13  %cmp = icmp ule i64 %a, %b
14  %conv1 = zext i1 %cmp to i64
15  ret i64 %conv1
16; CHECK-LABEL: test_llleull:
17; CHECK: subfc {{r[0-9]+}}, r3, r4
18; CHECK-NEXT: subfe [[REG1:r[0-9]+]], r3, r3
19; CHECK-NEXT: addi r3, [[REG1]], 1
20; CHECK: blr
21}
22
23; Function Attrs: norecurse nounwind readnone
24define i64 @test_llleull_sext(i64 %a, i64 %b) {
25entry:
26  %cmp = icmp ule i64 %a, %b
27  %conv1 = sext i1 %cmp to i64
28  ret i64 %conv1
29; CHECK-LABEL: @test_llleull_sext
30; CHECK: subfc [[REG1:r[0-9]+]], r3, r4
31; CHECK: subfe [[REG2:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}
32; CHECK: not [[REG3:r[0-9]+]], [[REG2]]
33; CHECK: blr
34}
35
36; Function Attrs: norecurse nounwind readnone
37define i64 @test_llleull_z(i64 %a) {
38entry:
39  %cmp = icmp ule i64 %a, 0
40  %conv1 = zext i1 %cmp to i64
41  ret i64 %conv1
42; CHECK-LABEL: test_llleull_z
43; CHECK: cntlzd [[REG1:r[0-9]+]], r3
44; CHECK-NEXT: rldicl r3, [[REG1]], 58, 63
45; CHECK-NEXT: blr
46}
47
48; Function Attrs: norecurse nounwind readnone
49define i64 @test_llleull_sext_z(i64 %a) {
50entry:
51  %cmp = icmp ule i64 %a, 0
52  %conv1 = sext i1 %cmp to i64
53  ret i64 %conv1
54; CHECK-LABEL: @test_llleull_sext_z
55; CHECK: addic [[REG1:r[0-9]+]], r3, -1
56; CHECK: subfe r3, [[REG1]]
57; CHECK: blr
58}
59
60; Function Attrs: norecurse nounwind
61define void @test_llleull_store(i64 %a, i64 %b) {
62entry:
63  %cmp = icmp ule i64 %a, %b
64  %conv1 = zext i1 %cmp to i64
65  store i64 %conv1, i64* @glob
66  ret void
67; CHECK-LABEL: test_llleull_store:
68; CHECK: subfc {{r[0-9]+}}, r3, r4
69; CHECK: subfe [[REG1:r[0-9]+]], r3, r3
70; CHECK: addi r3, [[REG1]], 1
71; CHECK: blr
72}
73
74; Function Attrs: norecurse nounwind
75define void @test_llleull_sext_store(i64 %a, i64 %b) {
76entry:
77  %cmp = icmp ule i64 %a, %b
78  %conv1 = sext i1 %cmp to i64
79  store i64 %conv1, i64* @glob
80  ret void
81; CHECK-LABEL: @test_llleull_sext_store
82; CHECK: subfc [[REG1:r[0-9]+]], r3, r4
83; CHECK: subfe [[REG2:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}
84; CHECK: not [[REG3:r[0-9]+]], [[REG2]]
85; CHECK: std [[REG3]]
86; CHECK: blr
87}
88
89; Function Attrs: norecurse nounwind
90define void @test_llleull_z_store(i64 %a) {
91entry:
92  %cmp = icmp ule i64 %a, 0
93  %conv1 = zext i1 %cmp to i64
94  store i64 %conv1, i64* @glob
95  ret void
96; CHECK-LABEL: test_llleull_z_store:
97; CHECK: cntlzd [[REG1:r[0-9]+]], r3
98; CHECK: rldicl {{r[0-9]+}}, [[REG1]], 58, 63
99; CHECK: blr
100}
101
102; Function Attrs: norecurse nounwind
103define void @test_llleull_sext_z_store(i64 %a) {
104entry:
105  %cmp = icmp ule i64 %a, 0
106  %conv1 = sext i1 %cmp to i64
107  store i64 %conv1, i64* @glob
108  ret void
109; CHECK-LABEL: @test_llleull_sext_z_store
110; CHECK: addic [[REG1:r[0-9]+]], r3, -1
111; CHECK: subfe [[REG2:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}
112; CHECK: std [[REG2]]
113; CHECK: blr
114}
115
116