1; XFAIL: *
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
9
10@glob = common local_unnamed_addr global i16 0, align 2
11
12define i64 @test_llless(i16 signext %a, i16 signext %b)  {
13; CHECK-LABEL: test_llless:
14; CHECK:       # BB#0: # %entry
15; CHECK-NEXT:    sub r3, r4, r3
16; CHECK-NEXT:    rldicl r3, r3, 1, 63
17; CHECK-NEXT:    xori r3, r3, 1
18; CHECK-NEXT:    blr
19entry:
20  %cmp = icmp sle i16 %a, %b
21  %conv3 = zext i1 %cmp to i64
22  ret i64 %conv3
23}
24
25define i64 @test_llless_sext(i16 signext %a, i16 signext %b)  {
26; CHECK-LABEL: test_llless_sext:
27; CHECK:       # BB#0: # %entry
28; CHECK-NEXT:    sub r3, r4, r3
29; CHECK-NEXT:    rldicl r3, r3, 1, 63
30; CHECK-NEXT:    addi r3, r3, -1
31; CHECK-NEXT:    blr
32entry:
33  %cmp = icmp sle i16 %a, %b
34  %conv3 = sext i1 %cmp to i64
35  ret i64 %conv3
36}
37
38define void @test_llless_store(i16 signext %a, i16 signext %b) {
39; CHECK-LABEL: test_llless_store:
40; CHECK:       # BB#0: # %entry
41; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
42; CHECK-NEXT:    sub r3, r4, r3
43; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
44; CHECK-NEXT:    rldicl r3, r3, 1, 63
45; CHECK-NEXT:    xori r3, r3, 1
46; CHECK-NEXT:    sth r3, 0(r12)
47; CHECK-NEXT:    blr
48entry:
49  %cmp = icmp sle i16 %a, %b
50  %conv3 = zext i1 %cmp to i16
51  store i16 %conv3, i16* @glob, align 2
52  ret void
53}
54
55define void @test_llless_sext_store(i16 signext %a, i16 signext %b) {
56; CHECK-LABEL: test_llless_sext_store:
57; CHECK:       # BB#0: # %entry
58; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
59; CHECK-NEXT:    sub r3, r4, r3
60; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
61; CHECK-NEXT:    rldicl r3, r3, 1, 63
62; CHECK-NEXT:    addi r3, r3, -1
63; CHECK-NEXT:    sth r3, 0(r12)
64; CHECK-NEXT:    blr
65entry:
66  %cmp = icmp sle i16 %a, %b
67  %conv3 = sext i1 %cmp to i16
68  store i16 %conv3, i16* @glob, align 2
69  ret void
70}
71