1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = common local_unnamed_addr global i8 0, align 1
10
11define i64 @test_lllesc(i8 signext %a, i8 signext %b) {
12; CHECK-LABEL: test_lllesc:
13; CHECK:       # %bb.0: # %entry
14; CHECK-NEXT:    sub r3, r4, r3
15; CHECK-NEXT:    rldicl r3, r3, 1, 63
16; CHECK-NEXT:    xori r3, r3, 1
17; CHECK-NEXT:    blr
18entry:
19  %cmp = icmp sle i8 %a, %b
20  %conv3 = zext i1 %cmp to i64
21  ret i64 %conv3
22}
23
24define i64 @test_lllesc_sext(i8 signext %a, i8 signext %b) {
25; CHECK-LABEL: test_lllesc_sext:
26; CHECK:       # %bb.0: # %entry
27; CHECK-NEXT:    sub r3, r4, r3
28; CHECK-NEXT:    rldicl r3, r3, 1, 63
29; CHECK-NEXT:    addi r3, r3, -1
30; CHECK-NEXT:    blr
31entry:
32  %cmp = icmp sle i8 %a, %b
33  %conv3 = sext i1 %cmp to i64
34  ret i64 %conv3
35}
36
37define void @test_lllesc_store(i8 signext %a, i8 signext %b) {
38; CHECK-LABEL: test_lllesc_store:
39; CHECK:       # %bb.0: # %entry
40; CHECK-NEXT:    sub r3, r4, r3
41; CHECK-NEXT:    addis r5, r2, glob@toc@ha
42; CHECK-NEXT:    rldicl r3, r3, 1, 63
43; CHECK-NEXT:    xori r3, r3, 1
44; CHECK-NEXT:    stb r3, glob@toc@l(r5)
45; CHECK-NEXT:    blr
46entry:
47  %cmp = icmp sle i8 %a, %b
48  %conv3 = zext i1 %cmp to i8
49  store i8 %conv3, i8* @glob, align 1
50  ret void
51}
52
53define void @test_lllesc_sext_store(i8 signext %a, i8 signext %b) {
54; CHECK-LABEL: test_lllesc_sext_store:
55; CHECK:       # %bb.0: # %entry
56; CHECK-NEXT:    sub r3, r4, r3
57; CHECK-NEXT:    addis r5, r2, glob@toc@ha
58; CHECK-NEXT:    rldicl r3, r3, 1, 63
59; CHECK-NEXT:    addi r3, r3, -1
60; CHECK-NEXT:    stb r3, glob@toc@l(r5)
61; CHECK-NEXT:    blr
62entry:
63  %cmp = icmp sle i8 %a, %b
64  %conv3 = sext i1 %cmp to i8
65  store i8 %conv3, i8* @glob, align 1
66  ret void
67}
68