1; XFAIL: * 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 6; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 8 9@glob = common local_unnamed_addr global i32 0, align 4 10 11; Function Attrs: norecurse nounwind readnone 12define i64 @test_llgtui(i32 zeroext %a, i32 zeroext %b) { 13; CHECK-LABEL: test_llgtui: 14; CHECK-NOT: clrldi 15; CHECK: sub [[REG:r[0-9]+]], r4, r3 16; CHECK-NEXT: rldicl r3, [[REG]], 1, 63 17entry: 18 %cmp = icmp ugt i32 %a, %b 19 %conv1 = zext i1 %cmp to i64 20 ret i64 %conv1 21} 22 23; Function Attrs: norecurse nounwind readnone 24define i64 @test_llgtui_sext(i32 zeroext %a, i32 zeroext %b) { 25; CHECK-LABEL: test_llgtui_sext: 26; CHECK: sub [[REG:r[0-9]+]], r4, r3 27; CHECK-NEXT: sradi r3, [[REG]], 63 28; CHECK-NEXT: blr 29entry: 30 %cmp = icmp ugt i32 %a, %b 31 %conv1 = sext i1 %cmp to i64 32 ret i64 %conv1 33} 34 35; Function Attrs: norecurse nounwind readnone 36define i64 @test_llgtui_z(i32 zeroext %a) { 37; CHECK-LABEL: test_llgtui_z: 38; CHECK: cntlzw r3, r3 39; CHECK-NEXT: srwi r3, r3, 5 40; CHECK-NEXT: xori r3, r3, 1 41; CHECK-NEXT: blr 42entry: 43 %cmp = icmp ne i32 %a, 0 44 %conv1 = zext i1 %cmp to i64 45 ret i64 %conv1 46} 47 48; Function Attrs: norecurse nounwind readnone 49define i64 @test_llgtui_sext_z(i32 zeroext %a) { 50; CHECK-LABEL: test_llgtui_sext_z: 51; CHECK: cntlzw r3, r3 52; CHECK-NEXT: srwi r3, r3, 5 53; CHECK-NEXT: xori r3, r3, 1 54; CHECK-NEXT: neg r3, r3 55; CHECK-NEXT: blr 56entry: 57 %cmp = icmp ne i32 %a, 0 58 %conv1 = sext i1 %cmp to i64 59 ret i64 %conv1 60} 61 62; Function Attrs: norecurse nounwind 63define void @test_llgtui_store(i32 zeroext %a, i32 zeroext %b) { 64; CHECK-LABEL: test_llgtui_store: 65; CHECK: sub [[REG:r[0-9]+]], r4, r3 66; CHECK: rldicl {{r[0-9]+}}, [[REG]], 1, 63 67entry: 68 %cmp = icmp ugt i32 %a, %b 69 %conv = zext i1 %cmp to i32 70 store i32 %conv, i32* @glob, align 4 71 ret void 72} 73 74; Function Attrs: norecurse nounwind 75define void @test_llgtui_sext_store(i32 zeroext %a, i32 zeroext %b) { 76; CHECK-LABEL: test_llgtui_sext_store: 77; CHECK: sub [[REG:r[0-9]+]], r4, r3 78; CHECK: sradi {{r[0-9]+}}, [[REG]], 63 79entry: 80 %cmp = icmp ugt i32 %a, %b 81 %sub = sext i1 %cmp to i32 82 store i32 %sub, i32* @glob, align 4 83 ret void 84} 85 86; Function Attrs: norecurse nounwind 87define void @test_llgtui_z_store(i32 zeroext %a) { 88; CHECK-LABEL: test_llgtui_z_store: 89; CHECK: cntlzw r3, r3 90; CHECK: srwi r3, r3, 5 91; CHECK: xori r3, r3, 1 92; CHECK: stw r3, 0(r4) 93; CHECK-NEXT: blr 94entry: 95 %cmp = icmp ne i32 %a, 0 96 %conv = zext i1 %cmp to i32 97 store i32 %conv, i32* @glob, align 4 98 ret void 99} 100 101; Function Attrs: norecurse nounwind 102define void @test_llgtui_sext_z_store(i32 zeroext %a) { 103; CHECK-LABEL: test_llgtui_sext_z_store: 104; CHECK: cntlzw r3, r3 105; CHECK: srwi r3, r3, 5 106; CHECK: xori r3, r3, 1 107; CHECK: neg r3, r3 108; CHECK: stw r3, 0(r4) 109; CHECK-NEXT: blr 110entry: 111 %cmp = icmp ne i32 %a, 0 112 %sub = sext i1 %cmp to i32 113 store i32 %sub, i32* @glob, align 4 114 ret void 115} 116