1; XFAIL: *
2; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
3; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
4; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
5; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
6; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
7; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
8; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
9; ModuleID = 'ComparisonTestCases/testCompareslleqsc.c'
10
11@glob = common local_unnamed_addr global i8 0, align 1
12
13; Function Attrs: norecurse nounwind readnone
14define i64 @test_lleqsc(i8 signext %a, i8 signext %b) {
15; CHECK-LABEL: test_lleqsc:
16; CHECK:       # BB#0: # %entry
17; CHECK-NEXT:    xor r3, r3, r4
18; CHECK-NEXT:    cntlzw r3, r3
19; CHECK-NEXT:    srwi r3, r3, 5
20; CHECK-NEXT:    blr
21entry:
22  %cmp = icmp eq i8 %a, %b
23  %conv3 = zext i1 %cmp to i64
24  ret i64 %conv3
25}
26
27; Function Attrs: norecurse nounwind readnone
28define i64 @test_lleqsc_sext(i8 signext %a, i8 signext %b) {
29; CHECK-LABEL: test_lleqsc_sext:
30; CHECK:       # BB#0: # %entry
31; CHECK-NEXT:    xor r3, r3, r4
32; CHECK-NEXT:    cntlzw r3, r3
33; CHECK-NEXT:    srwi r3, r3, 5
34; CHECK-NEXT:    neg r3, r3
35; CHECK-NEXT:    blr
36entry:
37  %cmp = icmp eq i8 %a, %b
38  %conv3 = sext i1 %cmp to i64
39  ret i64 %conv3
40}
41
42; Function Attrs: norecurse nounwind readnone
43define i64 @test_lleqsc_z(i8 signext %a) {
44; CHECK-LABEL: test_lleqsc_z:
45; CHECK:       # BB#0: # %entry
46; CHECK-NEXT:    cntlzw r3, r3
47; CHECK-NEXT:    srwi r3, r3, 5
48; CHECK-NEXT:    blr
49entry:
50  %cmp = icmp eq i8 %a, 0
51  %conv2 = zext i1 %cmp to i64
52  ret i64 %conv2
53}
54
55; Function Attrs: norecurse nounwind readnone
56define i64 @test_lleqsc_sext_z(i8 signext %a) {
57; CHECK-LABEL: test_lleqsc_sext_z:
58; CHECK:       # BB#0: # %entry
59; CHECK-NEXT:    cntlzw r3, r3
60; CHECK-NEXT:    srwi r3, r3, 5
61; CHECK-NEXT:    neg r3, r3
62; CHECK-NEXT:    blr
63entry:
64  %cmp = icmp eq i8 %a, 0
65  %conv2 = sext i1 %cmp to i64
66  ret i64 %conv2
67}
68
69; Function Attrs: norecurse nounwind
70define void @test_lleqsc_store(i8 signext %a, i8 signext %b) {
71; CHECK-LABEL: test_lleqsc_store:
72; CHECK:       # BB#0: # %entry
73; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
74; CHECK-NEXT:    xor r3, r3, r4
75; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
76; CHECK-NEXT:    cntlzw r3, r3
77; CHECK-NEXT:    srwi r3, r3, 5
78; CHECK-NEXT:    stb r3, 0(r12)
79; CHECK-NEXT:    blr
80entry:
81  %cmp = icmp eq i8 %a, %b
82  %conv3 = zext i1 %cmp to i8
83  store i8 %conv3, i8* @glob, align 1
84  ret void
85}
86
87; Function Attrs: norecurse nounwind
88define void @test_lleqsc_sext_store(i8 signext %a, i8 signext %b) {
89; CHECK-LABEL: test_lleqsc_sext_store:
90; CHECK:       # BB#0: # %entry
91; CHECK-NEXT:    xor r3, r3, r4
92; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
93; CHECK-NEXT:    cntlzw r3, r3
94; CHECK-NEXT:    ld r4, .LC0@toc@l(r5)
95; CHECK-NEXT:    srwi r3, r3, 5
96; CHECK-NEXT:    neg r3, r3
97; CHECK-NEXT:    stb r3, 0(r4)
98; CHECK-NEXT:    blr
99entry:
100  %cmp = icmp eq i8 %a, %b
101  %conv3 = sext i1 %cmp to i8
102  store i8 %conv3, i8* @glob, align 1
103  ret void
104}
105
106; Function Attrs: norecurse nounwind
107define void @test_lleqsc_z_store(i8 signext %a) {
108; CHECK-LABEL: test_lleqsc_z_store:
109; CHECK:       # BB#0: # %entry
110; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
111; CHECK-NEXT:    cntlzw r3, r3
112; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
113; CHECK-NEXT:    srwi r3, r3, 5
114; CHECK-NEXT:    stb r3, 0(r4)
115; CHECK-NEXT:    blr
116entry:
117  %cmp = icmp eq i8 %a, 0
118  %conv2 = zext i1 %cmp to i8
119  store i8 %conv2, i8* @glob, align 1
120  ret void
121}
122
123; Function Attrs: norecurse nounwind
124define void @test_lleqsc_sext_z_store(i8 signext %a) {
125; CHECK-LABEL: test_lleqsc_sext_z_store:
126; CHECK:       # BB#0: # %entry
127; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
128; CHECK-NEXT:    cntlzw r3, r3
129; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
130; CHECK-NEXT:    srwi r3, r3, 5
131; CHECK-NEXT:    neg r3, r3
132; CHECK-NEXT:    stb r3, 0(r4)
133; CHECK-NEXT:    blr
134entry:
135  %cmp = icmp eq i8 %a, 0
136  %conv2 = sext i1 %cmp to i8
137  store i8 %conv2, i8* @glob, align 1
138  ret void
139}
140