1; XFAIL: * 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 6; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 8; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 9 10@glob = common local_unnamed_addr global i32 0, align 4 11 12define signext i32 @test_inesi(i32 signext %a, i32 signext %b) { 13; CHECK-LABEL: test_inesi: 14; CHECK: xor r3, r3, r4 15; CHECK-NEXT: cntlzw r3, r3 16; CHECK-NEXT: srwi r3, r3, 5 17; CHECK-NEXT: xori r3, r3, 1 18; CHECK-NEXT: blr 19entry: 20 %cmp = icmp ne i32 %a, %b 21 %conv = zext i1 %cmp to i32 22 ret i32 %conv 23} 24 25define signext i32 @test_inesi_sext(i32 signext %a, i32 signext %b) { 26; CHECK-LABEL: test_inesi_sext: 27; CHECK: xor r3, r3, r4 28; CHECK-NEXT: cntlzw r3, r3 29; CHECK-NEXT: srwi r3, r3, 5 30; CHECK-NEXT: xori r3, r3, 1 31; CHECK-NEXT: neg r3, r3 32; CHECK-NEXT: blr 33entry: 34 %cmp = icmp ne i32 %a, %b 35 %sub = sext i1 %cmp to i32 36 ret i32 %sub 37} 38 39define signext i32 @test_inesi_z(i32 signext %a) { 40; CHECK-LABEL: test_inesi_z: 41; CHECK: cntlzw r3, r3 42; CHECK-NEXT: srwi r3, r3, 5 43; CHECK-NEXT: xori r3, r3, 1 44; CHECK-NEXT: blr 45entry: 46 %cmp = icmp ne i32 %a, 0 47 %conv = zext i1 %cmp to i32 48 ret i32 %conv 49} 50 51define signext i32 @test_inesi_sext_z(i32 signext %a) { 52; CHECK-LABEL: test_inesi_sext_z: 53; CHECK: cntlzw r3, r3 54; CHECK-NEXT: srwi r3, r3, 5 55; CHECK-NEXT: xori r3, r3, 1 56; CHECK-NEXT: neg r3, r3 57; CHECK-NEXT: blr 58entry: 59 %cmp = icmp ne i32 %a, 0 60 %sub = sext i1 %cmp to i32 61 ret i32 %sub 62} 63 64define void @test_inesi_store(i32 signext %a, i32 signext %b) { 65; CHECK-LABEL: test_inesi_store: 66; CHECK: xor r3, r3, r4 67; CHECK: cntlzw r3, r3 68; CHECK: srwi r3, r3, 5 69; CHECK: xori r3, r3, 1 70; CHECK: stw r3, 0(r4) 71; CHECK-NEXT: blr 72entry: 73 %cmp = icmp ne i32 %a, %b 74 %conv = zext i1 %cmp to i32 75 store i32 %conv, i32* @glob, align 4 76 ret void 77} 78 79define void @test_inesi_sext_store(i32 signext %a, i32 signext %b) { 80; CHECK-LABEL: test_inesi_sext_store: 81; CHECK: xor r3, r3, r4 82; CHECK: cntlzw r3, r3 83; CHECK: srwi r3, r3, 5 84; CHECK: xori r3, r3, 1 85; CHECK: neg r3, r3 86; CHECK: stw r3, 0(r4) 87; CHECK-NEXT: blr 88entry: 89 %cmp = icmp ne i32 %a, %b 90 %sub = sext i1 %cmp to i32 91 store i32 %sub, i32* @glob, align 4 92 ret void 93} 94 95define void @test_inesi_z_store(i32 signext %a) { 96; CHECK-LABEL: test_inesi_z_store: 97; CHECK: cntlzw r3, r3 98; CHECK: srwi r3, r3, 5 99; CHECK: xori r3, r3, 1 100; CHECK: stw r3, 0(r4) 101; CHECK-NEXT: blr 102entry: 103 %cmp = icmp ne i32 %a, 0 104 %conv = zext i1 %cmp to i32 105 store i32 %conv, i32* @glob, align 4 106 ret void 107} 108 109define void @test_inesi_sext_z_store(i32 signext %a) { 110; CHECK-LABEL: test_inesi_sext_z_store: 111; CHECK: cntlzw r3, r3 112; CHECK: srwi r3, r3, 5 113; CHECK: xori r3, r3, 1 114; CHECK: neg r3, r3 115; CHECK: stw r3, 0(r4) 116; CHECK-NEXT: blr 117entry: 118 %cmp = icmp ne i32 %a, 0 119 %sub = sext i1 %cmp to i32 120 store i32 %sub, i32* @glob, align 4 121 ret void 122} 123