1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
2; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
3; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
5; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
6; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
7
8@glob = common local_unnamed_addr global i16 0, align 2
9
10; Function Attrs: norecurse nounwind readnone
11define signext i32 @test_iltus(i16 zeroext %a, i16 zeroext %b) {
12; CHECK-LABEL: test_iltus:
13; CHECK:    sub [[REG:r[0-9]+]], r3, r4
14; CHECK-NEXT:    rldicl r3, [[REG]], 1, 63
15; CHECK-NEXT:    blr
16entry:
17  %cmp = icmp ult i16 %a, %b
18  %conv2 = zext i1 %cmp to i32
19  ret i32 %conv2
20}
21
22; Function Attrs: norecurse nounwind readnone
23define signext i32 @test_iltus_sext(i16 zeroext %a, i16 zeroext %b) {
24; CHECK-LABEL: test_iltus_sext:
25; CHECK:    sub [[REG:r[0-9]+]], r3, r4
26; CHECK-NEXT:    sradi r3, [[REG]], 63
27; CHECK-NEXT:    blr
28entry:
29  %cmp = icmp ult i16 %a, %b
30  %sub = sext i1 %cmp to i32
31  ret i32 %sub
32}
33
34; Function Attrs: norecurse nounwind
35define void @test_iltus_store(i16 zeroext %a, i16 zeroext %b) {
36; CHECK-LABEL: test_iltus_store:
37; CHECK:         sub [[REG:r[2-9]+]], r3, r4
38; CHECK:         rldicl {{r[0-9]+}}, [[REG]], 1, 63
39entry:
40  %cmp = icmp ult i16 %a, %b
41  %conv3 = zext i1 %cmp to i16
42  store i16 %conv3, i16* @glob, align 2
43  ret void
44}
45
46; Function Attrs: norecurse nounwind
47define void @test_iltus_sext_store(i16 zeroext %a, i16 zeroext %b) {
48; CHECK-LABEL: test_iltus_sext_store:
49; CHECK:         sub [[REG:r[0-9]+]], r3, r4
50; CHECK:         sradi {{r[0-9]+}}, [[REG]], 63
51entry:
52  %cmp = icmp ult i16 %a, %b
53  %conv3 = sext i1 %cmp to i16
54  store i16 %conv3, i16* @glob, align 2
55  ret void
56}
57