1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
5; RUN:  --check-prefixes=CHECK,BE
6; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
7; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
8; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
9; RUN:  --check-prefixes=CHECK,LE
10
11@glob = dso_local local_unnamed_addr global i8 0, align 1
12
13; Function Attrs: norecurse nounwind readnone
14define dso_local signext i32 @test_ileuc(i8 zeroext %a, i8 zeroext %b) {
15; CHECK-LABEL: test_ileuc:
16; CHECK:       # %bb.0: # %entry
17; CHECK-NEXT:    sub r3, r4, r3
18; CHECK-NEXT:    not r3, r3
19; CHECK-NEXT:    rldicl r3, r3, 1, 63
20; CHECK-NEXT:    blr
21entry:
22  %cmp = icmp ule i8 %a, %b
23  %conv2 = zext i1 %cmp to i32
24  ret i32 %conv2
25}
26
27; Function Attrs: norecurse nounwind readnone
28define dso_local signext i32 @test_ileuc_sext(i8 zeroext %a, i8 zeroext %b) {
29; CHECK-LABEL: test_ileuc_sext:
30; CHECK:       # %bb.0: # %entry
31; CHECK-NEXT:    sub r3, r4, r3
32; CHECK-NEXT:    rldicl r3, r3, 1, 63
33; CHECK-NEXT:    addi r3, r3, -1
34; CHECK-NEXT:    blr
35entry:
36  %cmp = icmp ule i8 %a, %b
37  %sub = sext i1 %cmp to i32
38  ret i32 %sub
39}
40
41; Function Attrs: norecurse nounwind readnone
42define dso_local signext i32 @test_ileuc_z(i8 zeroext %a) {
43; CHECK-LABEL: test_ileuc_z:
44; CHECK:       # %bb.0: # %entry
45; CHECK-NEXT:    cntlzw r3, r3
46; CHECK-NEXT:    srwi r3, r3, 5
47; CHECK-NEXT:    blr
48entry:
49  %cmp = icmp eq i8 %a, 0
50  %conv1 = zext i1 %cmp to i32
51  ret i32 %conv1
52}
53
54; Function Attrs: norecurse nounwind readnone
55define dso_local signext i32 @test_ileuc_sext_z(i8 zeroext %a) {
56; CHECK-LABEL: test_ileuc_sext_z:
57; CHECK:       # %bb.0: # %entry
58; CHECK-NEXT:    cntlzw r3, r3
59; CHECK-NEXT:    srwi r3, r3, 5
60; CHECK-NEXT:    neg r3, r3
61; CHECK-NEXT:    blr
62entry:
63  %cmp = icmp ule i8 %a, 0
64  %sub = sext i1 %cmp to i32
65  ret i32 %sub
66}
67
68; Function Attrs: norecurse nounwind
69define dso_local void @test_ileuc_store(i8 zeroext %a, i8 zeroext %b) {
70; CHECK-LABEL: test_ileuc_store:
71; CHECK:       # %bb.0: # %entry
72; CHECK-NEXT:    sub r3, r4, r3
73; CHECK-NEXT:    addis r5, r2, glob@toc@ha
74; CHECK-NEXT:    not r3, r3
75; CHECK-NEXT:    rldicl r3, r3, 1, 63
76; CHECK-NEXT:    stb r3, glob@toc@l(r5)
77; CHECK-NEXT:    blr
78entry:
79  %cmp = icmp ule i8 %a, %b
80  %conv3 = zext i1 %cmp to i8
81  store i8 %conv3, i8* @glob
82  ret void
83}
84
85; Function Attrs: norecurse nounwind
86define dso_local void @test_ileuc_sext_store(i8 zeroext %a, i8 zeroext %b) {
87; CHECK-LABEL: test_ileuc_sext_store:
88; CHECK:       # %bb.0: # %entry
89; CHECK-NEXT:    sub r3, r4, r3
90; CHECK-NEXT:    addis r5, r2, glob@toc@ha
91; CHECK-NEXT:    rldicl r3, r3, 1, 63
92; CHECK-NEXT:    addi r3, r3, -1
93; CHECK-NEXT:    stb r3, glob@toc@l(r5)
94; CHECK-NEXT:    blr
95entry:
96  %cmp = icmp ule i8 %a, %b
97  %conv3 = sext i1 %cmp to i8
98  store i8 %conv3, i8* @glob
99  ret void
100}
101
102; Function Attrs: norecurse nounwind
103define dso_local void @test_ileuc_z_store(i8 zeroext %a) {
104; CHECK-LABEL: test_ileuc_z_store:
105; CHECK:       # %bb.0: # %entry
106; CHECK-NEXT:    cntlzw r3, r3
107; CHECK-NEXT:    addis r4, r2, glob@toc@ha
108; CHECK-NEXT:    srwi r3, r3, 5
109; CHECK-NEXT:    stb r3, glob@toc@l(r4)
110; CHECK-NEXT:    blr
111entry:
112  %cmp = icmp eq i8 %a, 0
113  %conv2 = zext i1 %cmp to i8
114  store i8 %conv2, i8* @glob
115  ret void
116}
117
118; Function Attrs: norecurse nounwind
119define dso_local void @test_ileuc_sext_z_store(i8 zeroext %a) {
120; CHECK-LABEL: test_ileuc_sext_z_store:
121; CHECK:       # %bb.0: # %entry
122; CHECK-NEXT:    cntlzw r3, r3
123; CHECK-NEXT:    addis r4, r2, glob@toc@ha
124; CHECK-NEXT:    srwi r3, r3, 5
125; CHECK-NEXT:    neg r3, r3
126; CHECK-NEXT:    stb r3, glob@toc@l(r4)
127; CHECK-NEXT:    blr
128entry:
129  %cmp = icmp eq i8 %a, 0
130  %conv2 = sext i1 %cmp to i8
131  store i8 %conv2, i8* @glob
132  ret void
133}
134
135