1; XFAIL: *
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = common local_unnamed_addr global i16 0, align 2
10
11; Function Attrs: norecurse nounwind readnone
12define signext i32 @test_igtss(i16 signext %a, i16 signext %b) {
13; CHECK-LABEL: test_igtss:
14; CHECK:       # BB#0: # %entry
15; CHECK-NEXT:    sub [[REG1:r[0-9]+]], r4, r3
16; CHECK-NEXT:    rldicl r3, [[REG1]], 1, 63
17; CHECK-NEXT:    blr
18entry:
19  %cmp = icmp sgt i16 %a, %b
20  %conv2 = zext i1 %cmp to i32
21  ret i32 %conv2
22}
23
24; Function Attrs: norecurse nounwind readnone
25define signext i32 @test_igtss_sext(i16 signext %a, i16 signext %b) {
26; CHECK-LABEL: test_igtss_sext:
27; CHECK:       # BB#0: # %entry
28; CHECK-NEXT:    sub [[REG:r[0-9]+]], r4, r3
29; CHECK-NEXT:    sradi r3, [[REG]], 63
30; CHECK-NEXT:    blr
31entry:
32  %cmp = icmp sgt i16 %a, %b
33  %sub = sext i1 %cmp to i32
34  ret i32 %sub
35}
36
37; FIXME
38; Function Attrs: norecurse nounwind readnone
39define signext i32 @test_igtss_z(i16 signext %a) {
40; CHECK-LABEL: test_igtss_z:
41; CHECK:       # BB#0: # %entry
42; CHECK-NEXT:    neg r3, r3
43; CHECK-NEXT:    rldicl r3, r3, 1, 63
44; CHECK-NEXT:    blr
45entry:
46  %cmp = icmp sgt i16 %a, 0
47  %conv1 = zext i1 %cmp to i32
48  ret i32 %conv1
49}
50
51; Function Attrs: norecurse nounwind readnone
52define signext i32 @test_igtss_sext_z(i16 signext %a) {
53; CHECK-LABEL: test_igtss_sext_z:
54; CHECK:       # BB#0: # %entry
55; CHECK:    neg [[REG2:r[0-9]+]], r3
56; CHECK-NEXT:    sradi r3, [[REG2]], 63
57; CHECK-NEXT:    blr
58entry:
59  %cmp = icmp sgt i16 %a, 0
60  %sub = sext i1 %cmp to i32
61  ret i32 %sub
62}
63
64; Function Attrs: norecurse nounwind
65define void @test_igtss_store(i16 signext %a, i16 signext %b) {
66; CHECK-LABEL: test_igtss_store:
67; CHECK:       # BB#0: # %entry
68; CHECK:         sub [[REG1:r[0-9]+]], r4, r3
69; CHECK:         rldicl {{r[0-9]+}}, [[REG1]], 1, 63
70entry:
71  %cmp = icmp sgt i16 %a, %b
72  %conv3 = zext i1 %cmp to i16
73  store i16 %conv3, i16* @glob, align 2
74  ret void
75}
76
77; Function Attrs: norecurse nounwind
78define void @test_igtss_sext_store(i16 signext %a, i16 signext %b) {
79; CHECK-LABEL: test_igtss_sext_store:
80; CHECK:       # BB#0: # %entry
81; CHECK:         sub [[REG:r[0-9]+]], r4, r3
82; CHECK:         sradi {{r[0-9]+}}, [[REG]], 63
83entry:
84  %cmp = icmp sgt i16 %a, %b
85  %conv3 = sext i1 %cmp to i16
86  store i16 %conv3, i16* @glob, align 2
87  ret void
88}
89
90; FIXME
91; Function Attrs: norecurse nounwind
92define void @test_igtss_z_store(i16 signext %a) {
93; CHECK-LABEL: test_igtss_z_store:
94; CHECK:       # BB#0: # %entry
95; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
96; CHECK-NEXT:    neg r3, r3
97; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
98; CHECK-NEXT:    rldicl r3, r3, 1, 63
99; CHECK-NEXT:    sth r3, 0(r4)
100; CHECK-NEXT:    blr
101entry:
102  %cmp = icmp sgt i16 %a, 0
103  %conv2 = zext i1 %cmp to i16
104  store i16 %conv2, i16* @glob, align 2
105  ret void
106}
107
108; Function Attrs: norecurse nounwind
109define void @test_igtss_sext_z_store(i16 signext %a) {
110; CHECK-LABEL: test_igtss_sext_z_store:
111; CHECK:       neg [[REG2:r[0-9]+]], r3
112; CHECK:       sradi {{r[0-9]+}}, [[REG2]], 63
113entry:
114  %cmp = icmp sgt i16 %a, 0
115  %conv2 = sext i1 %cmp to i16
116  store i16 %conv2, i16* @glob, align 2
117  ret void
118}
119