1; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
2; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
3; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
4; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
5; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
6; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
7
8@glob = common local_unnamed_addr global i16 0, align 2
9
10; Function Attrs: norecurse nounwind readnone
11define signext i32 @test_igtss(i16 signext %a, i16 signext %b) {
12; CHECK-LABEL: test_igtss:
13; CHECK:       # %bb.0: # %entry
14; CHECK-NEXT:    sub [[REG1:r[0-9]+]], r4, r3
15; CHECK-NEXT:    rldicl r3, [[REG1]], 1, 63
16; CHECK-NEXT:    blr
17entry:
18  %cmp = icmp sgt i16 %a, %b
19  %conv2 = zext i1 %cmp to i32
20  ret i32 %conv2
21}
22
23; Function Attrs: norecurse nounwind readnone
24define signext i32 @test_igtss_sext(i16 signext %a, i16 signext %b) {
25; CHECK-LABEL: test_igtss_sext:
26; CHECK:       # %bb.0: # %entry
27; CHECK-NEXT:    sub [[REG:r[0-9]+]], r4, r3
28; CHECK-NEXT:    sradi r3, [[REG]], 63
29; CHECK-NEXT:    blr
30entry:
31  %cmp = icmp sgt i16 %a, %b
32  %sub = sext i1 %cmp to i32
33  ret i32 %sub
34}
35
36; FIXME
37; Function Attrs: norecurse nounwind readnone
38define signext i32 @test_igtss_z(i16 signext %a) {
39; CHECK-LABEL: test_igtss_z:
40; CHECK:       # %bb.0: # %entry
41; CHECK-NEXT:    neg r3, r3
42; CHECK-NEXT:    rldicl r3, r3, 1, 63
43; CHECK-NEXT:    blr
44entry:
45  %cmp = icmp sgt i16 %a, 0
46  %conv1 = zext i1 %cmp to i32
47  ret i32 %conv1
48}
49
50; Function Attrs: norecurse nounwind readnone
51define signext i32 @test_igtss_sext_z(i16 signext %a) {
52; CHECK-LABEL: test_igtss_sext_z:
53; CHECK:       # %bb.0: # %entry
54; CHECK:    neg [[REG2:r[0-9]+]], r3
55; CHECK-NEXT:    sradi r3, [[REG2]], 63
56; CHECK-NEXT:    blr
57entry:
58  %cmp = icmp sgt i16 %a, 0
59  %sub = sext i1 %cmp to i32
60  ret i32 %sub
61}
62
63; Function Attrs: norecurse nounwind
64define void @test_igtss_store(i16 signext %a, i16 signext %b) {
65; CHECK-LABEL: test_igtss_store:
66; CHECK:       # %bb.0: # %entry
67; CHECK:         sub [[REG1:r[0-9]+]], r4, r3
68; CHECK:         rldicl {{r[0-9]+}}, [[REG1]], 1, 63
69entry:
70  %cmp = icmp sgt i16 %a, %b
71  %conv3 = zext i1 %cmp to i16
72  store i16 %conv3, i16* @glob, align 2
73  ret void
74}
75
76; Function Attrs: norecurse nounwind
77define void @test_igtss_sext_store(i16 signext %a, i16 signext %b) {
78; CHECK-LABEL: test_igtss_sext_store:
79; CHECK:       # %bb.0: # %entry
80; CHECK:         sub [[REG:r[0-9]+]], r4, r3
81; CHECK:         sradi {{r[0-9]+}}, [[REG]], 63
82entry:
83  %cmp = icmp sgt i16 %a, %b
84  %conv3 = sext i1 %cmp to i16
85  store i16 %conv3, i16* @glob, align 2
86  ret void
87}
88
89; FIXME
90; Function Attrs: norecurse nounwind
91define void @test_igtss_z_store(i16 signext %a) {
92; CHECK-LABEL: test_igtss_z_store:
93; CHECK:       # %bb.0: # %entry
94; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
95; CHECK-NEXT:    neg r3, r3
96; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
97; CHECK-NEXT:    rldicl r3, r3, 1, 63
98; CHECK-NEXT:    sth r3, 0(r4)
99; CHECK-NEXT:    blr
100entry:
101  %cmp = icmp sgt i16 %a, 0
102  %conv2 = zext i1 %cmp to i16
103  store i16 %conv2, i16* @glob, align 2
104  ret void
105}
106
107; Function Attrs: norecurse nounwind
108define void @test_igtss_sext_z_store(i16 signext %a) {
109; CHECK-LABEL: test_igtss_sext_z_store:
110; CHECK:       neg [[REG2:r[0-9]+]], r3
111; CHECK:       sradi {{r[0-9]+}}, [[REG2]], 63
112entry:
113  %cmp = icmp sgt i16 %a, 0
114  %conv2 = sext i1 %cmp to i16
115  store i16 %conv2, i16* @glob, align 2
116  ret void
117}
118