1; XFAIL: *
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = common local_unnamed_addr global i32 0, align 4
10
11; Function Attrs: norecurse nounwind readnone
12define signext i32 @test_igtsi(i32 signext %a, i32 signext %b) {
13; CHECK-LABEL: test_igtsi:
14; CHECK:       # BB#0: # %entry
15; CHECK-NEXT:    sub [[REG:r[0-9]+]], r4, r3
16; CHECK-NEXT:    rldicl r3, [[REG]], 1, 63
17; CHECK-NEXT:    blr
18entry:
19  %cmp = icmp sgt i32 %a, %b
20  %conv = zext i1 %cmp to i32
21  ret i32 %conv
22}
23
24; Function Attrs: norecurse nounwind readnone
25define signext i32 @test_igtsi_sext(i32 signext %a, i32 signext %b) {
26; CHECK-LABEL: test_igtsi_sext:
27; CHECK:       # BB#0: # %entry
28; CHECK-NEXT:    sub [[REG:r[0-9]+]], r4, r3
29; CHECK-NEXT:    sradi r3, [[REG]], 63
30; CHECK-NEXT:    blr
31entry:
32  %cmp = icmp sgt i32 %a, %b
33  %sub = sext i1 %cmp to i32
34  ret i32 %sub
35}
36
37; FIXME
38; Function Attrs: norecurse nounwind readnone
39define signext i32 @test_igtsi_z(i32 signext %a) {
40; CHECK-LABEL: test_igtsi_z:
41; CHECK:       # BB#0: # %entry
42; CHECK-NEXT:    neg r3, r3
43; CHECK-NEXT:    rldicl r3, r3, 1, 63
44; CHECK-NEXT:    blr
45entry:
46  %cmp = icmp sgt i32 %a, 0
47  %conv = zext i1 %cmp to i32
48  ret i32 %conv
49}
50
51; Function Attrs: norecurse nounwind readnone
52define signext i32 @test_igtsi_sext_z(i32 signext %a) {
53; CHECK-LABEL: test_igtsi_sext_z:
54; CHECK:  neg [[REG2:r[0-9]+]], r3
55; CHECK-NEXT: sradi r3, [[REG2]], 63
56; CHECK-NEXT: blr
57entry:
58  %cmp = icmp sgt i32 %a, 0
59  %sub = sext i1 %cmp to i32
60  ret i32 %sub
61}
62
63; Function Attrs: norecurse nounwind
64define void @test_igtsi_store(i32 signext %a, i32 signext %b) {
65; CHECK-LABEL: test_igtsi_store:
66; CHECK:       # BB#0: # %entry
67; CHECK:         sub [[REG:r[0-9]+]], r4, r3
68; CHECK:         rldicl {{r[0-9]+}}, [[REG]], 1, 63
69entry:
70  %cmp = icmp sgt i32 %a, %b
71  %conv = zext i1 %cmp to i32
72  store i32 %conv, i32* @glob, align 4
73  ret void
74}
75
76; Function Attrs: norecurse nounwind
77define void @test_igtsi_sext_store(i32 signext %a, i32 signext %b) {
78; CHECK-LABEL: test_igtsi_sext_store:
79; CHECK:       # BB#0: # %entry
80; CHECK:         sub [[REG:r[0-9]+]], r4, r3
81; CHECK:         sradi {{r[0-9]+}}, [[REG]], 63
82entry:
83  %cmp = icmp sgt i32 %a, %b
84  %sub = sext i1 %cmp to i32
85  store i32 %sub, i32* @glob, align 4
86  ret void
87}
88
89; FIXME
90; Function Attrs: norecurse nounwind
91define void @test_igtsi_z_store(i32 signext %a) {
92; CHECK-LABEL: test_igtsi_z_store:
93; CHECK:       # BB#0: # %entry
94; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
95; CHECK-NEXT:    neg r3, r3
96; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
97; CHECK-NEXT:    rldicl r3, r3, 1, 63
98; CHECK-NEXT:    stw r3, 0(r4)
99; CHECK-NEXT:    blr
100entry:
101  %cmp = icmp sgt i32 %a, 0
102  %conv = zext i1 %cmp to i32
103  store i32 %conv, i32* @glob, align 4
104  ret void
105}
106
107; Function Attrs: norecurse nounwind
108define void @test_igtsi_sext_z_store(i32 signext %a) {
109; CHECK-LABEL: test_igtsi_sext_z_store:
110; CHECK: neg [[REG:r[0-9]+]], r3
111; CHECK: sradi {{r[0-9]+}}, [[REG]], 63
112entry:
113  %cmp = icmp sgt i32 %a, 0
114  %sub = sext i1 %cmp to i32
115  store i32 %sub, i32* @glob, align 4
116  ret void
117}
118