1; XFAIL: *
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = common local_unnamed_addr global i16 0, align 2
10
11; Function Attrs: norecurse nounwind readnone
12define signext i32 @test_igeus(i16 zeroext %a, i16 zeroext %b) {
13entry:
14  %cmp = icmp uge i16 %a, %b
15  %conv2 = zext i1 %cmp to i32
16  ret i32 %conv2
17; CHECK-LABEL: test_igeus:
18; CHECK: sub [[REG1:r[0-9]+]], r3, r4
19; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], [[REG2]], 1, 63
20; CHECK-NEXT: xori r3, [[REG2]], 1
21; CHECK: blr
22}
23
24; Function Attrs: norecurse nounwind readnone
25define signext i32 @test_igeus_sext(i16 zeroext %a, i16 zeroext %b) {
26entry:
27  %cmp = icmp uge i16 %a, %b
28  %sub = sext i1 %cmp to i32
29  ret i32 %sub
30; CHECK-LABEL: @test_igeus_sext
31; CHECK: sub [[REG1:r[0-9]+]], r3, r4
32; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63
33; CHECK-NEXT: addi [[REG3:r[0-9]+]], [[REG2]], -1
34; CHECK-NEXT: blr
35}
36
37; Function Attrs: norecurse nounwind readnone
38define signext i32 @test_igeus_z(i16 zeroext %a) {
39entry:
40  %cmp = icmp uge i16 %a, 0
41  %conv2 = zext i1 %cmp to i32
42  ret i32 %conv2
43; CHECK-LABEL: @test_igeus_z
44; CHECK: li r3, 1
45; CHECK-NEXT: blr
46}
47
48; Function Attrs: norecurse nounwind readnone
49define signext i32 @test_igeus_sext_z(i16 zeroext %a) {
50entry:
51  %cmp = icmp uge i16 %a, 0
52  %conv2 = zext i1 %cmp to i32
53  ret i32 %conv2
54; CHECK-LABEL: @test_igeus_sext_z
55; CHECK: li r3, 1
56; CHECK-NEXT: blr
57}
58
59; Function Attrs: norecurse nounwind
60define void @test_igeus_store(i16 zeroext %a, i16 zeroext %b) {
61entry:
62  %cmp = icmp uge i16 %a, %b
63  %conv3 = zext i1 %cmp to i16
64  store i16 %conv3, i16* @glob
65  ret void
66; CHECK_LABEL: test_igeus_store:
67; CHECK: sub [[REG1:r[0-9]+]], r3, r4
68; CHECK: rldicl [[REG2:r[0-9]+]], [[REG2]], 1, 63
69; CHECK: xori {{r[0-9]+}}, [[REG2]], 1
70; CHECK: blr
71}
72
73; Function Attrs: norecurse nounwind
74define void @test_igeus_sext_store(i16 zeroext %a, i16 zeroext %b) {
75entry:
76  %cmp = icmp uge i16 %a, %b
77  %conv3 = sext i1 %cmp to i16
78  store i16 %conv3, i16* @glob
79  ret void
80; CHECK-LABEL: @test_igeus_sext_store
81; CHECK: sub [[REG1:r[0-9]+]], r3, r4
82; CHECK: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63
83; CHECK: addi [[REG3:r[0-9]+]], [[REG2]], -1
84; CHECK: sth  [[REG3]]
85; CHECK: blr
86}
87
88; Function Attrs: norecurse nounwind
89define void @test_igeus_z_store(i16 zeroext %a) {
90entry:
91  %cmp = icmp uge i16 %a, 0
92  %conv3 = zext i1 %cmp to i16
93  store i16 %conv3, i16* @glob
94  ret void
95; CHECK-LABEL: @test_igeus_z_store
96; CHECK: li [[REG1:r[0-9]+]], 1
97; CHECK: sth [[REG1]]
98; CHECK: blr
99}
100
101; Function Attrs: norecurse nounwind
102define void @test_igeus_sext_z_store(i16 zeroext %a) {
103entry:
104  %cmp = icmp uge i16 %a, 0
105  %conv3 = sext i1 %cmp to i16
106  store i16 %conv3, i16* @glob
107  ret void
108; CHECK-LABEL: @test_igeus_sext_z_store
109; CHECK: lis [[REG1:r[0-9]+]], 0
110; CHECK: ori [[REG2:r[0-9]+]], [[REG1]], 65535
111; CHECK: sth [[REG2]]
112; CHECK: blr
113}
114
115