1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
2; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
3; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
5; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
6; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
7
8@glob = common local_unnamed_addr global i32 0, align 4
9
10; Function Attrs: norecurse nounwind readnone
11define signext i32 @test_igeui(i32 zeroext %a, i32 zeroext %b) {
12entry:
13  %cmp = icmp uge i32 %a, %b
14  %conv = zext i1 %cmp to i32
15  ret i32 %conv
16; CHECK-LABEL: test_igeui:
17; CHECK: sub [[REG1:r[0-9]+]], r3, r4
18; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], [[REG2]], 1, 63
19; CHECK-NEXT: xori r3, [[REG2]], 1
20; CHECK: blr
21}
22
23; Function Attrs: norecurse nounwind readnone
24define signext i32 @test_igeui_sext(i32 zeroext %a, i32 zeroext %b) {
25entry:
26  %cmp = icmp uge i32 %a, %b
27  %sub = sext i1 %cmp to i32
28  ret i32 %sub
29; CHECK-LABEL: @test_igeui_sext
30; CHECK: sub [[REG1:r[0-9]+]], r3, r4
31; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63
32; CHECK-NEXT: addi [[REG3:r[0-9]+]], [[REG2]], -1
33; CHECK-NEXT: blr
34}
35
36; Function Attrs: norecurse nounwind readnone
37define signext i32 @test_igeui_z(i32 zeroext %a) {
38entry:
39  %cmp = icmp uge i32 %a, 0
40  %sub = zext i1 %cmp to i32
41  ret i32 %sub
42; CHECK-LABEL: @test_igeui_z
43; CHECK: li r3, 1
44; CHECK-NEXT: blr
45}
46
47; Function Attrs: norecurse nounwind readnone
48define signext i32 @test_igeui_sext_z(i32 zeroext %a) {
49entry:
50  %cmp = icmp uge i32 %a, 0
51  %sub = sext i1 %cmp to i32
52  ret i32 %sub
53; CHECK-LABEL: @test_igeui_sext_z
54; CHECK: li r3, -1
55; CHECK-NEXT: blr
56}
57
58; Function Attrs: norecurse nounwind
59define void @test_igeui_store(i32 zeroext %a, i32 zeroext %b) {
60entry:
61  %cmp = icmp uge i32 %a, %b
62  %conv = zext i1 %cmp to i32
63  store i32 %conv, i32* @glob
64  ret void
65; CHECK_LABEL: test_igeuc_store:
66; CHECK: sub [[REG1:r[0-9]+]], r3, r4
67; CHECK: rldicl [[REG2:r[0-9]+]], [[REG2]], 1, 63
68; CHECK: xori {{r[0-9]+}}, [[REG2]], 1
69; CHECK: blr
70}
71
72; Function Attrs: norecurse nounwind
73define void @test_igeui_sext_store(i32 zeroext %a, i32 zeroext %b) {
74entry:
75  %cmp = icmp uge i32 %a, %b
76  %sub = sext i1 %cmp to i32
77  store i32 %sub, i32* @glob
78  ret void
79; CHECK-LABEL: @test_igeui_sext_store
80; CHECK: sub [[REG1:r[0-9]+]], r3, r4
81; CHECK: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63
82; CHECK: addi [[REG3:r[0-9]+]], [[REG2]], -1
83; CHECK: stw  [[REG3]]
84; CHECK: blr
85}
86
87; Function Attrs: norecurse nounwind
88define void @test_igeui_z_store(i32 zeroext %a) {
89entry:
90  %cmp = icmp uge i32 %a, 0
91  %conv1 = zext i1 %cmp to i32
92  store i32 %conv1, i32* @glob
93  ret void
94; CHECK-LABEL: @test_igeui_z_store
95; CHECK: li [[REG1:r[0-9]+]], 1
96; CHECK: stw [[REG1]]
97; CHECK: blr
98}
99
100; Function Attrs: norecurse nounwind
101define void @test_igeui_sext_z_store(i32 zeroext %a) {
102entry:
103  %cmp = icmp uge i32 %a, 0
104  %conv1 = sext i1 %cmp to i32
105  store i32 %conv1, i32* @glob
106  ret void
107; CHECK-LABEL: @test_igeui_sext_z_store
108; CHECK: li [[REG1:r[0-9]+]], -1
109; CHECK: stw [[REG1]]
110; CHECK: blr
111}
112
113