1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = dso_local local_unnamed_addr global i32 0, align 4
10
11; Function Attrs: norecurse nounwind readnone
12define dso_local signext i32 @test_igeui(i32 zeroext %a, i32 zeroext %b) {
13; CHECK-LABEL: test_igeui:
14; CHECK:       # %bb.0: # %entry
15; CHECK-NEXT:    sub r3, r3, r4
16; CHECK-NEXT:    not r3, r3
17; CHECK-NEXT:    rldicl r3, r3, 1, 63
18; CHECK-NEXT:    blr
19entry:
20  %cmp = icmp uge i32 %a, %b
21  %conv = zext i1 %cmp to i32
22  ret i32 %conv
23}
24
25; Function Attrs: norecurse nounwind readnone
26define dso_local signext i32 @test_igeui_sext(i32 zeroext %a, i32 zeroext %b) {
27; CHECK-LABEL: test_igeui_sext:
28; CHECK:       # %bb.0: # %entry
29; CHECK-NEXT:    sub r3, r3, r4
30; CHECK-NEXT:    rldicl r3, r3, 1, 63
31; CHECK-NEXT:    addi r3, r3, -1
32; CHECK-NEXT:    blr
33entry:
34  %cmp = icmp uge i32 %a, %b
35  %sub = sext i1 %cmp to i32
36  ret i32 %sub
37}
38
39; Function Attrs: norecurse nounwind readnone
40define dso_local signext i32 @test_igeui_z(i32 zeroext %a) {
41; CHECK-LABEL: test_igeui_z:
42; CHECK:       # %bb.0: # %entry
43; CHECK-NEXT:    li r3, 1
44; CHECK-NEXT:    blr
45entry:
46  %cmp = icmp uge i32 %a, 0
47  %sub = zext i1 %cmp to i32
48  ret i32 %sub
49}
50
51; Function Attrs: norecurse nounwind readnone
52define dso_local signext i32 @test_igeui_sext_z(i32 zeroext %a) {
53; CHECK-LABEL: test_igeui_sext_z:
54; CHECK:       # %bb.0: # %entry
55; CHECK-NEXT:    li r3, -1
56; CHECK-NEXT:    blr
57entry:
58  %cmp = icmp uge i32 %a, 0
59  %sub = sext i1 %cmp to i32
60  ret i32 %sub
61}
62
63; Function Attrs: norecurse nounwind
64define dso_local void @test_igeui_store(i32 zeroext %a, i32 zeroext %b) {
65; CHECK-LABEL: test_igeui_store:
66; CHECK:       # %bb.0: # %entry
67; CHECK-NEXT:    sub r3, r3, r4
68; CHECK-NEXT:    addis r5, r2, glob@toc@ha
69; CHECK-NEXT:    not r3, r3
70; CHECK-NEXT:    rldicl r3, r3, 1, 63
71; CHECK-NEXT:    stw r3, glob@toc@l(r5)
72; CHECK-NEXT:    blr
73entry:
74  %cmp = icmp uge i32 %a, %b
75  %conv = zext i1 %cmp to i32
76  store i32 %conv, i32* @glob
77  ret void
78; CHECK_LABEL: test_igeuc_store:
79}
80
81; Function Attrs: norecurse nounwind
82define dso_local void @test_igeui_sext_store(i32 zeroext %a, i32 zeroext %b) {
83; CHECK-LABEL: test_igeui_sext_store:
84; CHECK:       # %bb.0: # %entry
85; CHECK-NEXT:    sub r3, r3, r4
86; CHECK-NEXT:    addis r5, r2, glob@toc@ha
87; CHECK-NEXT:    rldicl r3, r3, 1, 63
88; CHECK-NEXT:    addi r3, r3, -1
89; CHECK-NEXT:    stw r3, glob@toc@l(r5)
90; CHECK-NEXT:    blr
91entry:
92  %cmp = icmp uge i32 %a, %b
93  %sub = sext i1 %cmp to i32
94  store i32 %sub, i32* @glob
95  ret void
96}
97
98; Function Attrs: norecurse nounwind
99define dso_local void @test_igeui_z_store(i32 zeroext %a) {
100; CHECK-LABEL: test_igeui_z_store:
101; CHECK:       # %bb.0: # %entry
102; CHECK-NEXT:    addis r3, r2, glob@toc@ha
103; CHECK-NEXT:    li r4, 1
104; CHECK-NEXT:    stw r4, glob@toc@l(r3)
105; CHECK-NEXT:    blr
106entry:
107  %cmp = icmp uge i32 %a, 0
108  %conv1 = zext i1 %cmp to i32
109  store i32 %conv1, i32* @glob
110  ret void
111}
112
113; Function Attrs: norecurse nounwind
114define dso_local void @test_igeui_sext_z_store(i32 zeroext %a) {
115; CHECK-LABEL: test_igeui_sext_z_store:
116; CHECK:       # %bb.0: # %entry
117; CHECK-NEXT:    addis r3, r2, glob@toc@ha
118; CHECK-NEXT:    li r4, -1
119; CHECK-NEXT:    stw r4, glob@toc@l(r3)
120; CHECK-NEXT:    blr
121entry:
122  %cmp = icmp uge i32 %a, 0
123  %conv1 = sext i1 %cmp to i32
124  store i32 %conv1, i32* @glob
125  ret void
126}
127
128