1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
5; RUN:  --check-prefixes=CHECK,BE
6; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
7; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
8; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
9; RUN:  --check-prefixes=CHECK,LE
10
11@glob = dso_local local_unnamed_addr global i32 0, align 4
12
13; Function Attrs: norecurse nounwind readnone
14define dso_local signext i32 @test_igeui(i32 zeroext %a, i32 zeroext %b) {
15; CHECK-LABEL: test_igeui:
16; CHECK:       # %bb.0: # %entry
17; CHECK-NEXT:    sub r3, r3, r4
18; CHECK-NEXT:    not r3, r3
19; CHECK-NEXT:    rldicl r3, r3, 1, 63
20; CHECK-NEXT:    blr
21entry:
22  %cmp = icmp uge i32 %a, %b
23  %conv = zext i1 %cmp to i32
24  ret i32 %conv
25}
26
27; Function Attrs: norecurse nounwind readnone
28define dso_local signext i32 @test_igeui_sext(i32 zeroext %a, i32 zeroext %b) {
29; CHECK-LABEL: test_igeui_sext:
30; CHECK:       # %bb.0: # %entry
31; CHECK-NEXT:    sub r3, r3, r4
32; CHECK-NEXT:    rldicl r3, r3, 1, 63
33; CHECK-NEXT:    addi r3, r3, -1
34; CHECK-NEXT:    blr
35entry:
36  %cmp = icmp uge i32 %a, %b
37  %sub = sext i1 %cmp to i32
38  ret i32 %sub
39}
40
41; Function Attrs: norecurse nounwind readnone
42define dso_local signext i32 @test_igeui_z(i32 zeroext %a) {
43; CHECK-LABEL: test_igeui_z:
44; CHECK:       # %bb.0: # %entry
45; CHECK-NEXT:    li r3, 1
46; CHECK-NEXT:    blr
47entry:
48  %cmp = icmp uge i32 %a, 0
49  %sub = zext i1 %cmp to i32
50  ret i32 %sub
51}
52
53; Function Attrs: norecurse nounwind readnone
54define dso_local signext i32 @test_igeui_sext_z(i32 zeroext %a) {
55; CHECK-LABEL: test_igeui_sext_z:
56; CHECK:       # %bb.0: # %entry
57; CHECK-NEXT:    li r3, -1
58; CHECK-NEXT:    blr
59entry:
60  %cmp = icmp uge i32 %a, 0
61  %sub = sext i1 %cmp to i32
62  ret i32 %sub
63}
64
65; Function Attrs: norecurse nounwind
66define dso_local void @test_igeui_store(i32 zeroext %a, i32 zeroext %b) {
67; CHECK-LABEL: test_igeui_store:
68; CHECK:       # %bb.0: # %entry
69; CHECK-NEXT:    sub r3, r3, r4
70; CHECK-NEXT:    addis r5, r2, glob@toc@ha
71; CHECK-NEXT:    not r3, r3
72; CHECK-NEXT:    rldicl r3, r3, 1, 63
73; CHECK-NEXT:    stw r3, glob@toc@l(r5)
74; CHECK-NEXT:    blr
75entry:
76  %cmp = icmp uge i32 %a, %b
77  %conv = zext i1 %cmp to i32
78  store i32 %conv, i32* @glob
79  ret void
80; CHECK_LABEL: test_igeuc_store:
81}
82
83; Function Attrs: norecurse nounwind
84define dso_local void @test_igeui_sext_store(i32 zeroext %a, i32 zeroext %b) {
85; CHECK-LABEL: test_igeui_sext_store:
86; CHECK:       # %bb.0: # %entry
87; CHECK-NEXT:    sub r3, r3, r4
88; CHECK-NEXT:    addis r5, r2, glob@toc@ha
89; CHECK-NEXT:    rldicl r3, r3, 1, 63
90; CHECK-NEXT:    addi r3, r3, -1
91; CHECK-NEXT:    stw r3, glob@toc@l(r5)
92; CHECK-NEXT:    blr
93entry:
94  %cmp = icmp uge i32 %a, %b
95  %sub = sext i1 %cmp to i32
96  store i32 %sub, i32* @glob
97  ret void
98}
99
100; Function Attrs: norecurse nounwind
101define dso_local void @test_igeui_z_store(i32 zeroext %a) {
102; CHECK-LABEL: test_igeui_z_store:
103; CHECK:       # %bb.0: # %entry
104; CHECK-NEXT:    addis r3, r2, glob@toc@ha
105; CHECK-NEXT:    li r4, 1
106; CHECK-NEXT:    stw r4, glob@toc@l(r3)
107; CHECK-NEXT:    blr
108entry:
109  %cmp = icmp uge i32 %a, 0
110  %conv1 = zext i1 %cmp to i32
111  store i32 %conv1, i32* @glob
112  ret void
113}
114
115; Function Attrs: norecurse nounwind
116define dso_local void @test_igeui_sext_z_store(i32 zeroext %a) {
117; CHECK-LABEL: test_igeui_sext_z_store:
118; CHECK:       # %bb.0: # %entry
119; CHECK-NEXT:    addis r3, r2, glob@toc@ha
120; CHECK-NEXT:    li r4, -1
121; CHECK-NEXT:    stw r4, glob@toc@l(r3)
122; CHECK-NEXT:    blr
123entry:
124  %cmp = icmp uge i32 %a, 0
125  %conv1 = sext i1 %cmp to i32
126  store i32 %conv1, i32* @glob
127  ret void
128}
129
130