1; XFAIL: *
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = common local_unnamed_addr global i8 0, align 1
10
11; Function Attrs: norecurse nounwind readnone
12define signext i32 @test_igeuc(i8 zeroext %a, i8 zeroext %b) {
13entry:
14  %cmp = icmp uge i8 %a, %b
15  %conv2 = zext i1 %cmp to i32
16  ret i32 %conv2
17; CHECK-LABEL: test_igeuc:
18; CHECK: sub [[REG1:r[0-9]+]], r3, r4
19; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], [[REG2]], 1, 63
20; CHECK-NEXT: xori r3, [[REG2]], 1
21; CHECK: blr
22}
23
24; Function Attrs: norecurse nounwind readnone
25define signext i32 @test_igeuc_sext(i8 zeroext %a, i8 zeroext %b) {
26entry:
27  %cmp = icmp uge i8 %a, %b
28  %sub = sext i1 %cmp to i32
29  ret i32 %sub
30; CHECK-LABEL: @test_igeuc_sext
31; CHECK: sub [[REG1:r[0-9]+]], r3, r4
32; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63
33; CHECK-NEXT: addi [[REG3:r[0-9]+]], [[REG2]], -1
34; CHECK-NEXT: blr
35
36}
37
38; Function Attrs: norecurse nounwind readnone
39define signext i32 @test_igeuc_z(i8 zeroext %a) {
40entry:
41  %cmp = icmp uge i8 %a, 0
42  %conv2 = zext i1 %cmp to i32
43  ret i32 %conv2
44; CHECK-LABEL: @test_igeuc_z
45; CHECK: li r3, 1
46; CHECK-NEXT: blr
47}
48
49; Function Attrs: norecurse nounwind readnone
50define signext i32 @test_igeuc_sext_z(i8 zeroext %a) {
51entry:
52  %cmp = icmp uge i8 %a, 0
53  %conv2 = sext i1 %cmp to i32
54  ret i32 %conv2
55; CHECK-LABEL: @test_igeuc_sext_z
56; CHECK: li r3, -1
57; CHECK-NEXT: blr
58}
59
60; Function Attrs: norecurse nounwind
61define void @test_igeuc_store(i8 zeroext %a, i8 zeroext %b) {
62entry:
63  %cmp = icmp uge i8 %a, %b
64  %conv3 = zext i1 %cmp to i8
65  store i8 %conv3, i8* @glob
66  ret void
67; CHECK_LABEL: test_igeuc_store:
68; CHECK: sub [[REG1:r[0-9]+]], r3, r4
69; CHECK: rldicl [[REG2:r[0-9]+]], [[REG2]], 1, 63
70; CHECK: xori {{r[0-9]+}}, [[REG2]], 1
71; CHECK: blr
72}
73
74; Function Attrs: norecurse nounwind
75define void @test_igeuc_sext_store(i8 zeroext %a, i8 zeroext %b) {
76entry:
77  %cmp = icmp uge i8 %a, %b
78  %conv3 = sext i1 %cmp to i8
79  store i8 %conv3, i8* @glob
80  ret void
81; CHECK-TBD-LABEL: @test_igeuc_sext_store
82; CHECK-TBD: subf [[REG1:r[0-9]+]], r3, r4
83; CHECK-TBD: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63
84; CHECK-TBD: addi [[REG3:r[0-9]+]], [[REG2]], -1
85; CHECK-TBD: stb  [[REG3]]
86; CHECK-TBD: blr
87}
88
89; Function Attrs : norecurse nounwind
90define void @test_igeuc_z_store(i8 zeroext %a) {
91entry:
92  %cmp = icmp uge i8 %a, 0
93  %conv3 = zext i1 %cmp to i8
94  store i8 %conv3, i8* @glob
95  ret void
96; CHECK-LABEL: @test_igeuc_z_store
97; CHECK: li [[REG1:r[0-9]+]], 1
98; CHECK: stb [[REG1]]
99; CHECK: blr
100}
101
102; Function Attrs: norecurse nounwind
103define void @test_igeuc_sext_z_store(i8 zeroext %a) {
104entry:
105  %cmp = icmp uge i8 %a, 0
106  %conv3 = sext i1 %cmp to i8
107  store i8 %conv3, i8* @glob
108  ret void
109; CHECK-LABEL: @test_igeuc_sext_z_store
110; CHECK: li [[REG1:r[0-9]+]], 255
111; CHECK: stb [[REG1]]
112; CHECK: blr
113}
114