1; XFAIL: *
2; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
3; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
4; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
5; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
6; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
7; RUN:   -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
8; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
9; ModuleID = 'ComparisonTestCases/testComparesieqsll.c'
10
11@glob = common local_unnamed_addr global i64 0, align 8
12
13; Function Attrs: norecurse nounwind readnone
14define signext i32 @test_ieqsll(i64 %a, i64 %b) {
15; CHECK-LABEL: test_ieqsll:
16; CHECK:       # BB#0: # %entry
17; CHECK-NEXT:    xor r3, r3, r4
18; CHECK-NEXT:    cntlzd r3, r3
19; CHECK-NEXT:    rldicl r3, r3, 58, 63
20; CHECK-NEXT:    blr
21entry:
22  %cmp = icmp eq i64 %a, %b
23  %conv = zext i1 %cmp to i32
24  ret i32 %conv
25}
26
27; Function Attrs: norecurse nounwind readnone
28define signext i32 @test_ieqsll_sext(i64 %a, i64 %b) {
29; CHECK-LABEL: test_ieqsll_sext:
30; CHECK:       # BB#0: # %entry
31; CHECK-NEXT:    xor r3, r3, r4
32; CHECK-NEXT:    addic r3, r3, -1
33; CHECK-NEXT:    subfe r3, r3, r3
34; CHECK-NEXT:    blr
35entry:
36  %cmp = icmp eq i64 %a, %b
37  %sub = sext i1 %cmp to i32
38  ret i32 %sub
39}
40
41; Function Attrs: norecurse nounwind readnone
42define signext i32 @test_ieqsll_z(i64 %a) {
43; CHECK-LABEL: test_ieqsll_z:
44; CHECK:       # BB#0: # %entry
45; CHECK-NEXT:    cntlzd r3, r3
46; CHECK-NEXT:    rldicl r3, r3, 58, 63
47; CHECK-NEXT:    blr
48entry:
49  %cmp = icmp eq i64 %a, 0
50  %conv = zext i1 %cmp to i32
51  ret i32 %conv
52}
53
54; Function Attrs: norecurse nounwind readnone
55define signext i32 @test_ieqsll_sext_z(i64 %a) {
56; CHECK-LABEL: test_ieqsll_sext_z:
57; CHECK:       # BB#0: # %entry
58; CHECK-NEXT:    addic r3, r3, -1
59; CHECK-NEXT:    subfe r3, r3, r3
60; CHECK-NEXT:    blr
61entry:
62  %cmp = icmp eq i64 %a, 0
63  %sub = sext i1 %cmp to i32
64  ret i32 %sub
65}
66
67; Function Attrs: norecurse nounwind
68define void @test_ieqsll_store(i64 %a, i64 %b) {
69; CHECK-LABEL: test_ieqsll_store:
70; CHECK:       # BB#0: # %entry
71; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
72; CHECK-NEXT:    xor r3, r3, r4
73; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
74; CHECK-NEXT:    cntlzd r3, r3
75; CHECK-NEXT:    rldicl r3, r3, 58, 63
76; CHECK-NEXT:    std r3, 0(r12)
77; CHECK-NEXT:    blr
78entry:
79  %cmp = icmp eq i64 %a, %b
80  %conv1 = zext i1 %cmp to i64
81  store i64 %conv1, i64* @glob, align 8
82  ret void
83}
84
85; Function Attrs: norecurse nounwind
86define void @test_ieqsll_sext_store(i64 %a, i64 %b) {
87; CHECK-LABEL: test_ieqsll_sext_store:
88; CHECK:       # BB#0: # %entry
89; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
90; CHECK-NEXT:    xor r3, r3, r4
91; CHECK-NEXT:    ld r12, .LC0@toc@l(r5)
92; CHECK-NEXT:    addic r3, r3, -1
93; CHECK-NEXT:    subfe r3, r3, r3
94; CHECK-NEXT:    std r3, 0(r12)
95; CHECK-NEXT:    blr
96entry:
97  %cmp = icmp eq i64 %a, %b
98  %conv1 = sext i1 %cmp to i64
99  store i64 %conv1, i64* @glob, align 8
100  ret void
101}
102
103; Function Attrs: norecurse nounwind
104define void @test_ieqsll_z_store(i64 %a) {
105; CHECK-LABEL: test_ieqsll_z_store:
106; CHECK:       # BB#0: # %entry
107; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
108; CHECK-NEXT:    cntlzd r3, r3
109; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
110; CHECK-NEXT:    rldicl r3, r3, 58, 63
111; CHECK-NEXT:    std r3, 0(r4)
112; CHECK-NEXT:    blr
113entry:
114  %cmp = icmp eq i64 %a, 0
115  %conv1 = zext i1 %cmp to i64
116  store i64 %conv1, i64* @glob, align 8
117  ret void
118}
119
120; Function Attrs: norecurse nounwind
121define void @test_ieqsll_sext_z_store(i64 %a) {
122; CHECK-LABEL: test_ieqsll_sext_z_store:
123; CHECK:       # BB#0: # %entry
124; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
125; CHECK-NEXT:    addic r3, r3, -1
126; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
127; CHECK-NEXT:    subfe r3, r3, r3
128; CHECK-NEXT:    std r3, 0(r4)
129; CHECK-NEXT:    blr
130entry:
131  %cmp = icmp eq i64 %a, 0
132  %conv1 = sext i1 %cmp to i64
133  store i64 %conv1, i64* @glob, align 8
134  ret void
135}
136