1; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
2; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
3; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
4; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
5; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
6; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
7
8%struct.tree_common = type { i8, [3 x i8] }
9declare signext i32 @fn2(...) local_unnamed_addr #1
10
11; Function Attrs: nounwind
12define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) {
13; CHECK-LABEL: testCompare1:
14; CHECK:       # %bb.0: # %entry
15; CHECK:         lbz r3, 0(r3)
16; CHECK-DAG:     clrlwi r3, r3, 31
17; CHECK-DAG:     clrldi r3, r3, 32
18; CHECK:         lbz  r4, 0(r4)
19; CHECK-DAG:     clrlwi r4, r4, 31
20; CHECK-DAG:     clrldi r4, r4, 32
21; CHECK:         sub r3, r3, r4
22; CHECK-NEXT:    rldicl r3, r3, 1, 63
23entry:
24  %bf.load = load i8, i8* bitcast (i32 (%struct.tree_common*)* @testCompare1 to i8*), align 4
25  %bf.clear = and i8 %bf.load, 1
26  %0 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %arg1, i64 0, i32 0
27  %bf.load1 = load i8, i8* %0, align 4
28  %bf.clear2 = and i8 %bf.load1, 1
29  %cmp = icmp ugt i8 %bf.clear, %bf.clear2
30  %conv = zext i1 %cmp to i32
31  %call = tail call signext i32 bitcast (i32 (...)* @fn2 to i32 (i32)*)(i32 signext %conv) #2
32  ret i32 undef
33}
34
35; Function Attrs: norecurse nounwind readnone
36define signext i32 @testCompare2(i32 zeroext %a, i32 zeroext %b) {
37; CHECK-LABEL: testCompare2:
38; CHECK:       # %bb.0: # %entry
39; CHECK-DAG:     rlwinm r3, r3, 0, 31, 31
40; CHECK-DAG:     rlwinm r4, r4, 0, 31, 31
41; CHECK-DAG:     clrldi r3, r3, 32
42; CHECK-DAG:     clrldi r4, r4, 32
43; CHECK:         sub r3, r4, r3
44; CHECK-NEXT:    rldicl r3, r3, 1, 63
45; CHECK-NEXT:    blr
46entry:
47  %and = and i32 %a, 1
48  %and1 = and i32 %b, 1
49  %cmp = icmp ugt i32 %and, %and1
50  %conv = zext i1 %cmp to i32
51  ret i32 %conv
52}
53