1; RUN: llc -verify-machineinstrs -mcpu=pwr8 \
2; RUN:   -mtriple=powerpc64le-unknown-linux-gnu -O3 < %s | FileCheck %s
3
4; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu -O3 \
5; RUN:   -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-P9 \
6; RUN:   --implicit-check-not xxswapd
7
8; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu -O3 \
9; RUN:   -verify-machineinstrs -mattr=-power9-vector < %s | FileCheck %s
10
11; These tests verify that VSX swap optimization works when loading a scalar
12; into a vector register.
13
14
15@x = global <2 x double> <double 9.970000e+01, double -1.032220e+02>, align 16
16@z = global <2 x double> <double 2.332000e+01, double 3.111111e+01>, align 16
17@y = global double 1.780000e+00, align 8
18
19define void @bar0() {
20entry:
21  %0 = load <2 x double>, <2 x double>* @x, align 16
22  %1 = load double, double* @y, align 8
23  %vecins = insertelement <2 x double> %0, double %1, i32 0
24  store <2 x double> %vecins, <2 x double>* @z, align 16
25  ret void
26}
27
28; CHECK-LABEL: @bar0
29; CHECK-DAG: lxvd2x [[REG1:[0-9]+]]
30; CHECK-DAG: lxsdx [[REG2:[0-9]+]]
31; CHECK: xxspltd [[REG4:[0-9]+]], [[REG2]], 0
32; CHECK: xxpermdi [[REG5:[0-9]+]], [[REG4]], [[REG1]], 1
33; CHECK: stxvd2x [[REG5]]
34
35; CHECK-P9-LABEL: @bar0
36; CHECK-P9-DAG: lxvx [[REG1:[0-9]+]]
37; CHECK-P9-DAG: lfd [[REG2:[0-9]+]], 0(3)
38; CHECK-P9: xxspltd [[REG4:[0-9]+]], [[REG2]], 0
39; CHECK-P9: xxpermdi [[REG5:[0-9]+]], [[REG1]], [[REG4]], 1
40; CHECK-P9: stxvx [[REG5]]
41
42define void @bar1() {
43entry:
44  %0 = load <2 x double>, <2 x double>* @x, align 16
45  %1 = load double, double* @y, align 8
46  %vecins = insertelement <2 x double> %0, double %1, i32 1
47  store <2 x double> %vecins, <2 x double>* @z, align 16
48  ret void
49}
50
51; CHECK-LABEL: @bar1
52; CHECK-DAG: lxvd2x [[REG1:[0-9]+]]
53; CHECK-DAG: lxsdx [[REG2:[0-9]+]]
54; CHECK: xxspltd [[REG4:[0-9]+]], [[REG2]], 0
55; CHECK: xxmrghd [[REG5:[0-9]+]], [[REG1]], [[REG4]]
56; CHECK: stxvd2x [[REG5]]
57
58; CHECK-P9-LABEL: @bar1
59; CHECK-P9-DAG: lxvx [[REG1:[0-9]+]]
60; CHECK-P9-DAG: lfd [[REG2:[0-9]+]], 0(3)
61; CHECK-P9: xxspltd [[REG4:[0-9]+]], [[REG2]], 0
62; CHECK-P9: xxmrgld [[REG5:[0-9]+]], [[REG4]], [[REG1]]
63; CHECK-P9: stxvx [[REG5]]
64
65