1; RUN: llc -mcpu=pwr7 -O0 -disable-fp-elim < %s | FileCheck %s 2 3; FIXME: The code generation for packed structs is very poor because the 4; PowerPC target wrongly rejects all unaligned loads. This test case will 5; need to be revised when that is fixed. 6 7target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" 8target triple = "powerpc64-unknown-linux-gnu" 9 10%struct.s1 = type { i8 } 11%struct.s2 = type { i16 } 12%struct.s4 = type { i32 } 13%struct.t1 = type { i8 } 14%struct.t3 = type <{ i16, i8 }> 15%struct.t5 = type <{ i32, i8 }> 16%struct.t6 = type <{ i32, i16 }> 17%struct.t7 = type <{ i32, i16, i8 }> 18%struct.s3 = type { i16, i8 } 19%struct.s5 = type { i32, i8 } 20%struct.s6 = type { i32, i16 } 21%struct.s7 = type { i32, i16, i8 } 22%struct.t2 = type <{ i16 }> 23%struct.t4 = type <{ i32 }> 24 25@caller1.p1 = private unnamed_addr constant %struct.s1 { i8 1 }, align 1 26@caller1.p2 = private unnamed_addr constant %struct.s2 { i16 2 }, align 2 27@caller1.p3 = private unnamed_addr constant { i16, i8, i8 } { i16 4, i8 8, i8 undef }, align 2 28@caller1.p4 = private unnamed_addr constant %struct.s4 { i32 16 }, align 4 29@caller1.p5 = private unnamed_addr constant { i32, i8, [3 x i8] } { i32 32, i8 64, [3 x i8] undef }, align 4 30@caller1.p6 = private unnamed_addr constant { i32, i16, [2 x i8] } { i32 128, i16 256, [2 x i8] undef }, align 4 31@caller1.p7 = private unnamed_addr constant { i32, i16, i8, i8 } { i32 512, i16 1024, i8 -3, i8 undef }, align 4 32@caller2.p1 = private unnamed_addr constant %struct.t1 { i8 1 }, align 1 33@caller2.p2 = private unnamed_addr constant { i16 } { i16 2 }, align 1 34@caller2.p3 = private unnamed_addr constant %struct.t3 <{ i16 4, i8 8 }>, align 1 35@caller2.p4 = private unnamed_addr constant { i32 } { i32 16 }, align 1 36@caller2.p5 = private unnamed_addr constant %struct.t5 <{ i32 32, i8 64 }>, align 1 37@caller2.p6 = private unnamed_addr constant %struct.t6 <{ i32 128, i16 256 }>, align 1 38@caller2.p7 = private unnamed_addr constant %struct.t7 <{ i32 512, i16 1024, i8 -3 }>, align 1 39 40define i32 @caller1() nounwind { 41entry: 42 %p1 = alloca %struct.s1, align 1 43 %p2 = alloca %struct.s2, align 2 44 %p3 = alloca %struct.s3, align 2 45 %p4 = alloca %struct.s4, align 4 46 %p5 = alloca %struct.s5, align 4 47 %p6 = alloca %struct.s6, align 4 48 %p7 = alloca %struct.s7, align 4 49 %0 = bitcast %struct.s1* %p1 to i8* 50 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* getelementptr inbounds (%struct.s1* @caller1.p1, i32 0, i32 0), i64 1, i32 1, i1 false) 51 %1 = bitcast %struct.s2* %p2 to i8* 52 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast (%struct.s2* @caller1.p2 to i8*), i64 2, i32 2, i1 false) 53 %2 = bitcast %struct.s3* %p3 to i8* 54 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* bitcast ({ i16, i8, i8 }* @caller1.p3 to i8*), i64 4, i32 2, i1 false) 55 %3 = bitcast %struct.s4* %p4 to i8* 56 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %3, i8* bitcast (%struct.s4* @caller1.p4 to i8*), i64 4, i32 4, i1 false) 57 %4 = bitcast %struct.s5* %p5 to i8* 58 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* bitcast ({ i32, i8, [3 x i8] }* @caller1.p5 to i8*), i64 8, i32 4, i1 false) 59 %5 = bitcast %struct.s6* %p6 to i8* 60 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast ({ i32, i16, [2 x i8] }* @caller1.p6 to i8*), i64 8, i32 4, i1 false) 61 %6 = bitcast %struct.s7* %p7 to i8* 62 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast ({ i32, i16, i8, i8 }* @caller1.p7 to i8*), i64 8, i32 4, i1 false) 63 %call = call i32 @callee1(%struct.s1* byval %p1, %struct.s2* byval %p2, %struct.s3* byval %p3, %struct.s4* byval %p4, %struct.s5* byval %p5, %struct.s6* byval %p6, %struct.s7* byval %p7) 64 ret i32 %call 65 66; CHECK: ld 9, 128(31) 67; CHECK: ld 8, 136(31) 68; CHECK: ld 7, 144(31) 69; CHECK: lwz 6, 152(31) 70; CHECK: lwz 5, 160(31) 71; CHECK: lhz 4, 168(31) 72; CHECK: lbz 3, 176(31) 73} 74 75declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind 76 77define internal i32 @callee1(%struct.s1* byval %v1, %struct.s2* byval %v2, %struct.s3* byval %v3, %struct.s4* byval %v4, %struct.s5* byval %v5, %struct.s6* byval %v6, %struct.s7* byval %v7) nounwind { 78entry: 79 %a = getelementptr inbounds %struct.s1* %v1, i32 0, i32 0 80 %0 = load i8* %a, align 1 81 %conv = zext i8 %0 to i32 82 %a1 = getelementptr inbounds %struct.s2* %v2, i32 0, i32 0 83 %1 = load i16* %a1, align 2 84 %conv2 = sext i16 %1 to i32 85 %add = add nsw i32 %conv, %conv2 86 %a3 = getelementptr inbounds %struct.s3* %v3, i32 0, i32 0 87 %2 = load i16* %a3, align 2 88 %conv4 = sext i16 %2 to i32 89 %add5 = add nsw i32 %add, %conv4 90 %a6 = getelementptr inbounds %struct.s4* %v4, i32 0, i32 0 91 %3 = load i32* %a6, align 4 92 %add7 = add nsw i32 %add5, %3 93 %a8 = getelementptr inbounds %struct.s5* %v5, i32 0, i32 0 94 %4 = load i32* %a8, align 4 95 %add9 = add nsw i32 %add7, %4 96 %a10 = getelementptr inbounds %struct.s6* %v6, i32 0, i32 0 97 %5 = load i32* %a10, align 4 98 %add11 = add nsw i32 %add9, %5 99 %a12 = getelementptr inbounds %struct.s7* %v7, i32 0, i32 0 100 %6 = load i32* %a12, align 4 101 %add13 = add nsw i32 %add11, %6 102 ret i32 %add13 103 104; CHECK: std 9, 96(1) 105; CHECK: std 8, 88(1) 106; CHECK: std 7, 80(1) 107; CHECK: stw 6, 76(1) 108; CHECK: stw 5, 68(1) 109; CHECK: sth 4, 62(1) 110; CHECK: stb 3, 55(1) 111; CHECK: lha {{[0-9]+}}, 62(1) 112; CHECK: lbz {{[0-9]+}}, 55(1) 113; CHECK: lha {{[0-9]+}}, 68(1) 114; CHECK: lwz {{[0-9]+}}, 76(1) 115; CHECK: lwz {{[0-9]+}}, 80(1) 116; CHECK: lwz {{[0-9]+}}, 88(1) 117; CHECK: lwz {{[0-9]+}}, 96(1) 118} 119 120define i32 @caller2() nounwind { 121entry: 122 %p1 = alloca %struct.t1, align 1 123 %p2 = alloca %struct.t2, align 1 124 %p3 = alloca %struct.t3, align 1 125 %p4 = alloca %struct.t4, align 1 126 %p5 = alloca %struct.t5, align 1 127 %p6 = alloca %struct.t6, align 1 128 %p7 = alloca %struct.t7, align 1 129 %0 = bitcast %struct.t1* %p1 to i8* 130 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* getelementptr inbounds (%struct.t1* @caller2.p1, i32 0, i32 0), i64 1, i32 1, i1 false) 131 %1 = bitcast %struct.t2* %p2 to i8* 132 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast ({ i16 }* @caller2.p2 to i8*), i64 2, i32 1, i1 false) 133 %2 = bitcast %struct.t3* %p3 to i8* 134 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* bitcast (%struct.t3* @caller2.p3 to i8*), i64 3, i32 1, i1 false) 135 %3 = bitcast %struct.t4* %p4 to i8* 136 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %3, i8* bitcast ({ i32 }* @caller2.p4 to i8*), i64 4, i32 1, i1 false) 137 %4 = bitcast %struct.t5* %p5 to i8* 138 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* bitcast (%struct.t5* @caller2.p5 to i8*), i64 5, i32 1, i1 false) 139 %5 = bitcast %struct.t6* %p6 to i8* 140 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast (%struct.t6* @caller2.p6 to i8*), i64 6, i32 1, i1 false) 141 %6 = bitcast %struct.t7* %p7 to i8* 142 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast (%struct.t7* @caller2.p7 to i8*), i64 7, i32 1, i1 false) 143 %call = call i32 @callee2(%struct.t1* byval %p1, %struct.t2* byval %p2, %struct.t3* byval %p3, %struct.t4* byval %p4, %struct.t5* byval %p5, %struct.t6* byval %p6, %struct.t7* byval %p7) 144 ret i32 %call 145 146; CHECK: stb {{[0-9]+}}, 71(1) 147; CHECK: sth {{[0-9]+}}, 69(1) 148; CHECK: stb {{[0-9]+}}, 87(1) 149; CHECK: stw {{[0-9]+}}, 83(1) 150; CHECK: sth {{[0-9]+}}, 94(1) 151; CHECK: stw {{[0-9]+}}, 90(1) 152; CHECK: stb {{[0-9]+}}, 103(1) 153; CHECK: sth {{[0-9]+}}, 101(1) 154; CHECK: stw {{[0-9]+}}, 97(1) 155; CHECK: ld 9, 96(1) 156; CHECK: ld 8, 88(1) 157; CHECK: ld 7, 80(1) 158; CHECK: lwz 6, 152(31) 159; CHECK: ld 5, 64(1) 160; CHECK: lhz 4, 168(31) 161; CHECK: lbz 3, 176(31) 162} 163 164define internal i32 @callee2(%struct.t1* byval %v1, %struct.t2* byval %v2, %struct.t3* byval %v3, %struct.t4* byval %v4, %struct.t5* byval %v5, %struct.t6* byval %v6, %struct.t7* byval %v7) nounwind { 165entry: 166 %a = getelementptr inbounds %struct.t1* %v1, i32 0, i32 0 167 %0 = load i8* %a, align 1 168 %conv = zext i8 %0 to i32 169 %a1 = getelementptr inbounds %struct.t2* %v2, i32 0, i32 0 170 %1 = load i16* %a1, align 1 171 %conv2 = sext i16 %1 to i32 172 %add = add nsw i32 %conv, %conv2 173 %a3 = getelementptr inbounds %struct.t3* %v3, i32 0, i32 0 174 %2 = load i16* %a3, align 1 175 %conv4 = sext i16 %2 to i32 176 %add5 = add nsw i32 %add, %conv4 177 %a6 = getelementptr inbounds %struct.t4* %v4, i32 0, i32 0 178 %3 = load i32* %a6, align 1 179 %add7 = add nsw i32 %add5, %3 180 %a8 = getelementptr inbounds %struct.t5* %v5, i32 0, i32 0 181 %4 = load i32* %a8, align 1 182 %add9 = add nsw i32 %add7, %4 183 %a10 = getelementptr inbounds %struct.t6* %v6, i32 0, i32 0 184 %5 = load i32* %a10, align 1 185 %add11 = add nsw i32 %add9, %5 186 %a12 = getelementptr inbounds %struct.t7* %v7, i32 0, i32 0 187 %6 = load i32* %a12, align 1 188 %add13 = add nsw i32 %add11, %6 189 ret i32 %add13 190 191; CHECK: std 9, 96(1) 192; CHECK: std 8, 88(1) 193; CHECK: std 7, 80(1) 194; CHECK: stw 6, 76(1) 195; CHECK: std 5, 64(1) 196; CHECK: sth 4, 62(1) 197; CHECK: stb 3, 55(1) 198; CHECK: lbz {{[0-9]+}}, 85(1) 199; CHECK: lbz {{[0-9]+}}, 86(1) 200; CHECK: lbz {{[0-9]+}}, 83(1) 201; CHECK: lbz {{[0-9]+}}, 84(1) 202; CHECK: lbz {{[0-9]+}}, 69(1) 203; CHECK: lbz {{[0-9]+}}, 70(1) 204; CHECK: lha {{[0-9]+}}, 62(1) 205; CHECK: lbz {{[0-9]+}}, 55(1) 206; CHECK: lwz {{[0-9]+}}, 76(1) 207; CHECK: lhz {{[0-9]+}}, 90(1) 208; CHECK: lhz {{[0-9]+}}, 92(1) 209; CHECK: lbz {{[0-9]+}}, 99(1) 210; CHECK: lbz {{[0-9]+}}, 100(1) 211; CHECK: lbz {{[0-9]+}}, 97(1) 212; CHECK: lbz {{[0-9]+}}, 98(1) 213} 214