1; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -ppc-vsr-nums-as-vr \
2; RUN:   -verify-machineinstrs < %s | FileCheck %s
3; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -ppc-vsr-nums-as-vr \
4; RUN:   -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-PWR8 %s
5
6; ==========================================
7; Tests for store of fp_to_sint converstions
8; ==========================================
9
10; Function Attrs: norecurse nounwind
11define void @dpConv2sdw(double* nocapture readonly %a, i64* nocapture %b) {
12entry:
13  %0 = load double, double* %a, align 8
14  %conv = fptosi double %0 to i64
15  store i64 %conv, i64* %b, align 8
16  ret void
17
18; CHECK-LABEL: dpConv2sdw
19; CHECK: lfd [[LD:[0-9]+]], 0(3)
20; CHECK: xscvdpsxds [[CONV:[0-9]+]], [[LD]]
21; CHECK-NEXT: stxsd [[CONV]], 0(4)
22; CHECK-NEXT: blr
23
24; CHECK-PWR8-LABEL: dpConv2sdw
25; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
26; CHECK-PWR8-NEXT: xscvdpsxds [[CONV:[0-9]+]], [[LD]]
27; CHECK-PWR8-NEXT: stxsdx [[CONV]], 0, 4
28; CHECK-PWR8-NEXT: blr
29}
30
31; Function Attrs: norecurse nounwind
32define void @dpConv2sw(double* nocapture readonly %a, i32* nocapture %b) {
33entry:
34  %0 = load double, double* %a, align 8
35  %conv = fptosi double %0 to i32
36  store i32 %conv, i32* %b, align 4
37  ret void
38
39; CHECK-LABEL: dpConv2sw
40; CHECK: lfd [[LD:[0-9]+]], 0(3)
41; CHECK-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
42; CHECK-NEXT: stfiwx [[CONV]], 0, 4
43; CHECK-NEXT: blr
44
45; CHECK-PWR8-LABEL: dpConv2sw
46; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
47; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
48; CHECK-PWR8-NEXT: stfiwx [[CONV]], 0, 4
49; CHECK-PWR8-NEXT: blr
50}
51
52; Function Attrs: norecurse nounwind
53define void @dpConv2shw(double* nocapture readonly %a, i16* nocapture %b) {
54entry:
55  %0 = load double, double* %a, align 8
56  %conv = fptosi double %0 to i16
57  store i16 %conv, i16* %b, align 2
58  ret void
59
60; CHECK-LABEL: dpConv2shw
61; CHECK: lfd [[LD:[0-9]+]], 0(3)
62; CHECK-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
63; CHECK-NEXT: stxsihx [[CONV]], 0, 4
64; CHECK-NEXT: blr
65
66; CHECK-PWR8-LABEL: dpConv2shw
67; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
68; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
69; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
70; CHECK-PWR8-NEXT: sth [[REG]], 0(4)
71; CHECK-PWR8-NEXT: blr
72}
73
74; Function Attrs: norecurse nounwind
75define void @dpConv2sb(double* nocapture readonly %a, i8* nocapture %b) {
76entry:
77  %0 = load double, double* %a, align 8
78  %conv = fptosi double %0 to i8
79  store i8 %conv, i8* %b, align 1
80  ret void
81
82; CHECK-LABEL: dpConv2sb
83; CHECK: lfd [[LD:[0-9]+]], 0(3)
84; CHECK-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
85; CHECK-NEXT: stxsibx [[CONV]], 0, 4
86; CHECK-NEXT: blr
87
88; CHECK-PWR8-LABEL: dpConv2sb
89; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
90; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
91; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
92; CHECK-PWR8-NEXT: stb [[REG]], 0(4)
93; CHECK-PWR8-NEXT: blr
94}
95
96; Function Attrs: norecurse nounwind
97define void @spConv2sdw(float* nocapture readonly %a, i64* nocapture %b) {
98entry:
99  %0 = load float, float* %a, align 4
100  %conv = fptosi float %0 to i64
101  store i64 %conv, i64* %b, align 8
102  ret void
103
104; CHECK-LABEL: spConv2sdw
105; CHECK: lfs [[LD:[0-9]+]], 0(3)
106; CHECK-NEXT: xscvdpsxds [[CONV:[0-9]+]], [[LD]]
107; CHECK-NEXT: stxsd [[CONV]], 0(4)
108; CHECK-NEXT: blr
109
110; CHECK-PWR8-LABEL: spConv2sdw
111; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
112; CHECK-PWR8-NEXT: xscvdpsxds [[CONV:[0-9]+]], [[LD]]
113; CHECK-PWR8-NEXT: stxsdx [[CONV]], 0, 4
114; CHECK-PWR8-NEXT: blr
115}
116
117; Function Attrs: norecurse nounwind
118define void @spConv2sw(float* nocapture readonly %a, i32* nocapture %b) {
119entry:
120  %0 = load float, float* %a, align 4
121  %conv = fptosi float %0 to i32
122  store i32 %conv, i32* %b, align 4
123  ret void
124
125; CHECK-LABEL: spConv2sw
126; CHECK: lfs [[LD:[0-9]+]], 0(3)
127; CHECK-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
128; CHECK-NEXT: stfiwx [[CONV]], 0, 4
129; CHECK-NEXT: blr
130
131; CHECK-PWR8-LABEL: spConv2sw
132; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
133; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
134; CHECK-PWR8-NEXT: stfiwx [[CONV]], 0, 4
135; CHECK-PWR8-NEXT: blr
136}
137
138; Function Attrs: norecurse nounwind
139define void @spConv2shw(float* nocapture readonly %a, i16* nocapture %b) {
140entry:
141  %0 = load float, float* %a, align 4
142  %conv = fptosi float %0 to i16
143  store i16 %conv, i16* %b, align 2
144  ret void
145
146; CHECK-LABEL: spConv2shw
147; CHECK: lfs [[LD:[0-9]+]], 0(3)
148; CHECK-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
149; CHECK-NEXT: stxsihx [[CONV]], 0, 4
150; CHECK-NEXT: blr
151
152; CHECK-PWR8-LABEL: spConv2shw
153; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
154; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
155; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
156; CHECK-PWR8-NEXT: sth [[REG]], 0(4)
157; CHECK-PWR8-NEXT: blr
158}
159
160; Function Attrs: norecurse nounwind
161define void @spConv2sb(float* nocapture readonly %a, i8* nocapture %b) {
162entry:
163  %0 = load float, float* %a, align 4
164  %conv = fptosi float %0 to i8
165  store i8 %conv, i8* %b, align 1
166  ret void
167
168; CHECK-LABEL: spConv2sb
169; CHECK: lfs [[LD:[0-9]+]], 0(3)
170; CHECK-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
171; CHECK-NEXT: stxsibx [[CONV]], 0, 4
172; CHECK-NEXT: blr
173
174; CHECK-PWR8-LABEL: spConv2sb
175; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
176; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
177; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
178; CHECK-PWR8-NEXT: stb [[REG]], 0(4)
179; CHECK-PWR8-NEXT: blr
180}
181
182; Function Attrs: norecurse nounwind
183define void @dpConv2sdw_x(double* nocapture readonly %a, i64* nocapture %b,
184                          i32 signext %idx) {
185entry:
186  %0 = load double, double* %a, align 8
187  %conv = fptosi double %0 to i64
188  %idxprom = sext i32 %idx to i64
189  %arrayidx = getelementptr inbounds i64, i64* %b, i64 %idxprom
190  store i64 %conv, i64* %arrayidx, align 8
191  ret void
192
193; CHECK-LABEL: dpConv2sdw_x
194; CHECK: lfd [[LD:[0-9]+]], 0(3)
195; CHECK-NEXT: sldi [[REG:[0-9]+]], 5, 3
196; CHECK-NEXT: xscvdpsxds [[CONV:[0-9]+]], [[LD]]
197; CHECK-NEXT: stxsdx [[CONV]], 4, [[REG]]
198; CHECK-NEXT: blr
199
200; CHECK-PWR8-LABEL: dpConv2sdw_x
201; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
202; CHECK-PWR8: sldi [[REG:[0-9]+]], 5, 3
203; CHECK-PWR8-NEXT: xscvdpsxds [[CONV:[0-9]+]], [[LD]]
204; CHECK-PWR8-NEXT: stxsdx [[CONV]], 4, [[REG]]
205; CHECK-PWR8-NEXT: blr
206}
207
208; Function Attrs: norecurse nounwind
209define void @dpConv2sw_x(double* nocapture readonly %a, i32* nocapture %b,
210                          i32 signext %idx) {
211entry:
212  %0 = load double, double* %a, align 8
213  %conv = fptosi double %0 to i32
214  %idxprom = sext i32 %idx to i64
215  %arrayidx = getelementptr inbounds i32, i32* %b, i64 %idxprom
216  store i32 %conv, i32* %arrayidx, align 4
217  ret void
218
219; CHECK-LABEL: dpConv2sw_x
220; CHECK: lfd [[LD:[0-9]+]], 0(3)
221; CHECK-NEXT: sldi [[REG:[0-9]+]], 5, 2
222; CHECK-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
223; CHECK-NEXT: stfiwx [[CONV]], 4, [[REG]]
224; CHECK-NEXT: blr
225
226; CHECK-PWR8-LABEL: dpConv2sw_x
227; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
228; CHECK-PWR8-NEXT: sldi [[REG:[0-9]+]], 5, 2
229; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
230; CHECK-PWR8-NEXT: stfiwx [[CONV]], 4, [[REG]]
231; CHECK-PWR8-NEXT: blr
232}
233
234; Function Attrs: norecurse nounwind
235define void @dpConv2shw_x(double* nocapture readonly %a, i16* nocapture %b,
236                          i32 signext %idx) {
237entry:
238  %0 = load double, double* %a, align 8
239  %conv = fptosi double %0 to i16
240  %idxprom = sext i32 %idx to i64
241  %arrayidx = getelementptr inbounds i16, i16* %b, i64 %idxprom
242  store i16 %conv, i16* %arrayidx, align 2
243  ret void
244
245; CHECK-LABEL: dpConv2shw_x
246; CHECK: lfd [[LD:[0-9]+]], 0(3)
247; CHECK-NEXT: sldi [[REG:[0-9]+]], 5, 1
248; CHECK-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
249; CHECK-NEXT: stxsihx [[CONV]], 4, [[REG]]
250; CHECK-NEXT: blr
251
252; CHECK-PWR8-LABEL: dpConv2shw_x
253; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
254; CHECK-PWR8-NEXT: sldi [[REG:[0-9]+]], 5, 1
255; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
256; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
257; CHECK-PWR8-NEXT: sthx [[REG]], 4, 5
258; CHECK-PWR8-NEXT: blr
259}
260
261; Function Attrs: norecurse nounwind
262define void @dpConv2sb_x(double* nocapture readonly %a, i8* nocapture %b,
263                          i32 signext %idx) {
264entry:
265  %0 = load double, double* %a, align 8
266  %conv = fptosi double %0 to i8
267  %idxprom = sext i32 %idx to i64
268  %arrayidx = getelementptr inbounds i8, i8* %b, i64 %idxprom
269  store i8 %conv, i8* %arrayidx, align 1
270  ret void
271
272; CHECK-LABEL: dpConv2sb_x
273; CHECK: lfd [[LD:[0-9]+]], 0(3)
274; CHECK-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
275; CHECK-NEXT: stxsibx [[CONV]], 4, 5
276; CHECK-NEXT: blr
277
278; CHECK-PWR8-LABEL: dpConv2sb_x
279; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
280; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
281; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
282; CHECK-PWR8-NEXT: stbx [[REG]], 4, 5
283; CHECK-PWR8-NEXT: blr
284}
285
286; Function Attrs: norecurse nounwind
287define void @spConv2sdw_x(float* nocapture readonly %a, i64* nocapture %b,
288                          i32 signext %idx) {
289entry:
290  %0 = load float, float* %a, align 4
291  %conv = fptosi float %0 to i64
292  %idxprom = sext i32 %idx to i64
293  %arrayidx = getelementptr inbounds i64, i64* %b, i64 %idxprom
294  store i64 %conv, i64* %arrayidx, align 8
295  ret void
296
297; CHECK-LABEL: spConv2sdw_x
298; CHECK: lfs [[LD:[0-9]+]], 0(3)
299; CHECK-DAG:  sldi [[REG:[0-9]+]], 5, 3
300; CHECK-DAG:  xscvdpsxds [[CONV:[0-9]+]], [[LD]]
301; CHECK-NEXT: stxsdx [[CONV]], 4, [[REG]]
302; CHECK-NEXT: blr
303
304; CHECK-PWR8-LABEL: spConv2sdw_x
305; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
306; CHECK-PWR8-NEXT: sldi [[REG:[0-9]+]], 5, 3
307; CHECK-PWR8-NEXT: xscvdpsxds [[CONV:[0-9]+]], [[LD]]
308; CHECK-PWR8-NEXT: stxsdx [[CONV]], 4, [[REG]]
309; CHECK-PWR8-NEXT: blr
310}
311
312; Function Attrs: norecurse nounwind
313define void @spConv2sw_x(float* nocapture readonly %a, i32* nocapture %b,
314                          i32 signext %idx) {
315entry:
316  %0 = load float, float* %a, align 4
317  %conv = fptosi float %0 to i32
318  %idxprom = sext i32 %idx to i64
319  %arrayidx = getelementptr inbounds i32, i32* %b, i64 %idxprom
320  store i32 %conv, i32* %arrayidx, align 4
321  ret void
322
323; CHECK-LABEL: spConv2sw_x
324; CHECK: lfs [[LD:[0-9]+]], 0(3)
325; CHECK-DAG: sldi [[REG:[0-9]+]], 5, 2
326; CHECK-DAG: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
327; CHECK-NEXT: stfiwx [[CONV]], 4, [[REG]]
328; CHECK-NEXT: blr
329
330; CHECK-PWR8-LABEL: spConv2sw_x
331; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
332; CHECK-PWR8-NEXT: sldi [[REG:[0-9]+]], 5, 2
333; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
334; CHECK-PWR8-NEXT: stfiwx [[CONV]], 4, [[REG]]
335; CHECK-PWR8-NEXT: blr
336}
337
338; Function Attrs: norecurse nounwind
339define void @spConv2shw_x(float* nocapture readonly %a, i16* nocapture %b,
340                          i32 signext %idx) {
341entry:
342  %0 = load float, float* %a, align 4
343  %conv = fptosi float %0 to i16
344  %idxprom = sext i32 %idx to i64
345  %arrayidx = getelementptr inbounds i16, i16* %b, i64 %idxprom
346  store i16 %conv, i16* %arrayidx, align 2
347  ret void
348
349; CHECK-LABEL: spConv2shw_x
350; CHECK: lfs [[LD:[0-9]+]], 0(3)
351; CHECK-DAG: sldi [[REG:[0-9]+]], 5, 1
352; CHECK-DAG: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
353; CHECK-NEXT: stxsihx [[CONV]], 4, [[REG]]
354; CHECK-NEXT: blr
355
356; CHECK-PWR8-LABEL: spConv2shw_x
357; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
358; CHECK-PWR8-NEXT: sldi [[REG:[0-9]+]], 5, 1
359; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
360; CHECK-PWR8-NEXT: mfvsrwz [[REG2:[0-9]+]], [[CONV]]
361; CHECK-PWR8-NEXT: sthx [[REG2]], 4, [[REG]]
362; CHECK-PWR8-NEXT: blr
363}
364
365; Function Attrs: norecurse nounwind
366define void @spConv2sb_x(float* nocapture readonly %a, i8* nocapture %b,
367                          i32 signext %idx) {
368entry:
369  %0 = load float, float* %a, align 4
370  %conv = fptosi float %0 to i8
371  %idxprom = sext i32 %idx to i64
372  %arrayidx = getelementptr inbounds i8, i8* %b, i64 %idxprom
373  store i8 %conv, i8* %arrayidx, align 1
374  ret void
375
376; CHECK-LABEL: spConv2sb_x
377; CHECK: lfs [[LD:[0-9]+]], 0(3)
378; CHECK-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
379; CHECK-NEXT: stxsibx [[CONV]], 4, 5
380; CHECK-NEXT: blr
381
382; CHECK-PWR8-LABEL: spConv2sb_x
383; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
384; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
385; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
386; CHECK-PWR8-NEXT: stbx [[REG]], 4, 5
387; CHECK-PWR8-NEXT: blr
388}
389
390; ==========================================
391; Tests for store of fp_to_uint converstions
392; ==========================================
393
394; Function Attrs: norecurse nounwind
395define void @dpConv2udw(double* nocapture readonly %a, i64* nocapture %b) {
396entry:
397  %0 = load double, double* %a, align 8
398  %conv = fptoui double %0 to i64
399  store i64 %conv, i64* %b, align 8
400  ret void
401
402; CHECK-LABEL: dpConv2udw
403; CHECK: lfd [[LD:[0-9]+]], 0(3)
404; CHECK: xscvdpuxds [[CONV:[0-9]+]], [[LD]]
405; CHECK-NEXT: stxsd [[CONV]], 0(4)
406; CHECK-NEXT: blr
407
408; CHECK-PWR8-LABEL: dpConv2udw
409; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
410; CHECK-PWR8-NEXT: xscvdpuxds [[CONV:[0-9]+]], [[LD]]
411; CHECK-PWR8-NEXT: stxsdx [[CONV]], 0, 4
412; CHECK-PWR8-NEXT: blr
413}
414
415; Function Attrs: norecurse nounwind
416define void @dpConv2uw(double* nocapture readonly %a, i32* nocapture %b) {
417entry:
418  %0 = load double, double* %a, align 8
419  %conv = fptoui double %0 to i32
420  store i32 %conv, i32* %b, align 4
421  ret void
422
423; CHECK-LABEL: dpConv2uw
424; CHECK: lfd [[LD:[0-9]+]], 0(3)
425; CHECK-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
426; CHECK-NEXT: stfiwx [[CONV]], 0, 4
427; CHECK-NEXT: blr
428
429; CHECK-PWR8-LABEL: dpConv2uw
430; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
431; CHECK-PWR8-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
432; CHECK-PWR8-NEXT: stfiwx [[CONV]], 0, 4
433; CHECK-PWR8-NEXT: blr
434}
435
436; Function Attrs: norecurse nounwind
437define void @dpConv2uhw(double* nocapture readonly %a, i16* nocapture %b) {
438entry:
439  %0 = load double, double* %a, align 8
440  %conv = fptoui double %0 to i16
441  store i16 %conv, i16* %b, align 2
442  ret void
443
444; CHECK-LABEL: dpConv2uhw
445; CHECK: lfd [[LD:[0-9]+]], 0(3)
446; CHECK-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
447; CHECK-NEXT: stxsihx [[CONV]], 0, 4
448; CHECK-NEXT: blr
449
450; CHECK-PWR8-LABEL: dpConv2uhw
451; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
452; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
453; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
454; CHECK-PWR8-NEXT: sth [[REG]], 0(4)
455; CHECK-PWR8-NEXT: blr
456}
457
458; Function Attrs: norecurse nounwind
459define void @dpConv2ub(double* nocapture readonly %a, i8* nocapture %b) {
460entry:
461  %0 = load double, double* %a, align 8
462  %conv = fptoui double %0 to i8
463  store i8 %conv, i8* %b, align 1
464  ret void
465
466; CHECK-LABEL: dpConv2ub
467; CHECK: lfd [[LD:[0-9]+]], 0(3)
468; CHECK-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
469; CHECK-NEXT: stxsibx [[CONV]], 0, 4
470; CHECK-NEXT: blr
471
472; CHECK-PWR8-LABEL: dpConv2ub
473; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
474; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
475; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
476; CHECK-PWR8-NEXT: stb [[REG]], 0(4)
477; CHECK-PWR8-NEXT: blr
478}
479
480; Function Attrs: norecurse nounwind
481define void @spConv2udw(float* nocapture readonly %a, i64* nocapture %b) {
482entry:
483  %0 = load float, float* %a, align 4
484  %conv = fptoui float %0 to i64
485  store i64 %conv, i64* %b, align 8
486  ret void
487
488; CHECK-LABEL: spConv2udw
489; CHECK: lfs [[LD:[0-9]+]], 0(3)
490; CHECK-NEXT: xscvdpuxds [[CONV:[0-9]+]], [[LD]]
491; CHECK-NEXT: stxsd [[CONV]], 0(4)
492; CHECK-NEXT: blr
493
494; CHECK-PWR8-LABEL: spConv2udw
495; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
496; CHECK-PWR8-NEXT: xscvdpuxds [[CONV:[0-9]+]], [[LD]]
497; CHECK-PWR8-NEXT: stxsdx [[CONV]], 0, 4
498; CHECK-PWR8-NEXT: blr
499}
500
501; Function Attrs: norecurse nounwind
502define void @spConv2uw(float* nocapture readonly %a, i32* nocapture %b) {
503entry:
504  %0 = load float, float* %a, align 4
505  %conv = fptoui float %0 to i32
506  store i32 %conv, i32* %b, align 4
507  ret void
508
509; CHECK-LABEL: spConv2uw
510; CHECK: lfs [[LD:[0-9]+]], 0(3)
511; CHECK-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
512; CHECK-NEXT: stfiwx [[CONV]], 0, 4
513; CHECK-NEXT: blr
514
515; CHECK-PWR8-LABEL: spConv2uw
516; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
517; CHECK-PWR8-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
518; CHECK-PWR8-NEXT: stfiwx [[CONV]], 0, 4
519; CHECK-PWR8-NEXT: blr
520}
521
522; Function Attrs: norecurse nounwind
523define void @spConv2uhw(float* nocapture readonly %a, i16* nocapture %b) {
524entry:
525  %0 = load float, float* %a, align 4
526  %conv = fptoui float %0 to i16
527  store i16 %conv, i16* %b, align 2
528  ret void
529
530; CHECK-LABEL: spConv2uhw
531; CHECK: lfs [[LD:[0-9]+]], 0(3)
532; CHECK-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
533; CHECK-NEXT: stxsihx [[CONV]], 0, 4
534; CHECK-NEXT: blr
535
536; CHECK-PWR8-LABEL: spConv2uhw
537; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
538; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
539; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
540; CHECK-PWR8-NEXT: sth [[REG]], 0(4)
541; CHECK-PWR8-NEXT: blr
542}
543
544; Function Attrs: norecurse nounwind
545define void @spConv2ub(float* nocapture readonly %a, i8* nocapture %b) {
546entry:
547  %0 = load float, float* %a, align 4
548  %conv = fptoui float %0 to i8
549  store i8 %conv, i8* %b, align 1
550  ret void
551
552; CHECK-LABEL: spConv2ub
553; CHECK: lfs [[LD:[0-9]+]], 0(3)
554; CHECK-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
555; CHECK-NEXT: stxsibx [[CONV]], 0, 4
556; CHECK-NEXT: blr
557
558; CHECK-PWR8-LABEL: spConv2ub
559; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
560; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
561; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
562; CHECK-PWR8-NEXT: stb [[REG]], 0(4)
563; CHECK-PWR8-NEXT: blr
564}
565
566; Function Attrs: norecurse nounwind
567define void @dpConv2udw_x(double* nocapture readonly %a, i64* nocapture %b,
568                          i32 zeroext %idx) {
569entry:
570  %0 = load double, double* %a, align 8
571  %conv = fptoui double %0 to i64
572  %idxprom = zext i32 %idx to i64
573  %arrayidx = getelementptr inbounds i64, i64* %b, i64 %idxprom
574  store i64 %conv, i64* %arrayidx, align 8
575  ret void
576
577; CHECK-LABEL: dpConv2udw_x
578; CHECK: lfd [[LD:[0-9]+]], 0(3)
579; CHECK-NEXT: sldi [[REG:[0-9]+]], 5, 3
580; CHECK-NEXT: xscvdpuxds [[CONV:[0-9]+]], [[LD]]
581; CHECK-NEXT: stxsdx [[CONV]], 4, [[REG]]
582; CHECK-NEXT: blr
583
584; CHECK-PWR8-LABEL: dpConv2udw_x
585; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
586; CHECK-PWR8: sldi [[REG:[0-9]+]], 5, 3
587; CHECK-PWR8-NEXT: xscvdpuxds [[CONV:[0-9]+]], [[LD]]
588; CHECK-PWR8-NEXT: stxsdx [[CONV]], 4, [[REG]]
589; CHECK-PWR8-NEXT: blr
590}
591
592; Function Attrs: norecurse nounwind
593define void @dpConv2uw_x(double* nocapture readonly %a, i32* nocapture %b,
594                          i32 zeroext %idx) {
595entry:
596  %0 = load double, double* %a, align 8
597  %conv = fptoui double %0 to i32
598  %idxprom = zext i32 %idx to i64
599  %arrayidx = getelementptr inbounds i32, i32* %b, i64 %idxprom
600  store i32 %conv, i32* %arrayidx, align 4
601  ret void
602
603; CHECK-LABEL: dpConv2uw_x
604; CHECK: lfd [[LD:[0-9]+]], 0(3)
605; CHECK-NEXT: sldi [[REG:[0-9]+]], 5, 2
606; CHECK-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
607; CHECK-NEXT: stfiwx [[CONV]], 4, [[REG]]
608; CHECK-NEXT: blr
609
610; CHECK-PWR8-LABEL: dpConv2uw_x
611; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
612; CHECK-PWR8-NEXT: sldi [[REG:[0-9]+]], 5, 2
613; CHECK-PWR8-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
614; CHECK-PWR8-NEXT: stfiwx [[CONV]], 4, [[REG]]
615; CHECK-PWR8-NEXT: blr
616}
617
618; Function Attrs: norecurse nounwind
619define void @dpConv2uhw_x(double* nocapture readonly %a, i16* nocapture %b,
620                          i32 zeroext %idx) {
621entry:
622  %0 = load double, double* %a, align 8
623  %conv = fptoui double %0 to i16
624  %idxprom = zext i32 %idx to i64
625  %arrayidx = getelementptr inbounds i16, i16* %b, i64 %idxprom
626  store i16 %conv, i16* %arrayidx, align 2
627  ret void
628
629; CHECK-LABEL: dpConv2uhw_x
630; CHECK: lfd [[LD:[0-9]+]], 0(3)
631; CHECK-NEXT: sldi [[REG:[0-9]+]], 5, 1
632; CHECK-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
633; CHECK-NEXT: stxsihx [[CONV]], 4, [[REG]]
634; CHECK-NEXT: blr
635
636; CHECK-PWR8-LABEL: dpConv2uhw_x
637; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
638; CHECK-PWR8-NEXT: sldi [[REG:[0-9]+]], 5, 1
639; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
640; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
641; CHECK-PWR8-NEXT: sthx [[REG]], 4, 5
642; CHECK-PWR8-NEXT: blr
643}
644
645; Function Attrs: norecurse nounwind
646define void @dpConv2ub_x(double* nocapture readonly %a, i8* nocapture %b,
647                          i32 zeroext %idx) {
648entry:
649  %0 = load double, double* %a, align 8
650  %conv = fptoui double %0 to i8
651  %idxprom = zext i32 %idx to i64
652  %arrayidx = getelementptr inbounds i8, i8* %b, i64 %idxprom
653  store i8 %conv, i8* %arrayidx, align 1
654  ret void
655
656; CHECK-LABEL: dpConv2ub_x
657; CHECK: lfd [[LD:[0-9]+]], 0(3)
658; CHECK-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
659; CHECK-NEXT: stxsibx [[CONV]], 4, 5
660; CHECK-NEXT: blr
661
662; CHECK-PWR8-LABEL: dpConv2ub_x
663; CHECK-PWR8: lfdx [[LD:[0-9]+]], 0, 3
664; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
665; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
666; CHECK-PWR8-NEXT: stbx [[REG]], 4, 5
667; CHECK-PWR8-NEXT: blr
668}
669
670; Function Attrs: norecurse nounwind
671define void @spConv2udw_x(float* nocapture readonly %a, i64* nocapture %b,
672                          i32 zeroext %idx) {
673entry:
674  %0 = load float, float* %a, align 4
675  %conv = fptoui float %0 to i64
676  %idxprom = zext i32 %idx to i64
677  %arrayidx = getelementptr inbounds i64, i64* %b, i64 %idxprom
678  store i64 %conv, i64* %arrayidx, align 8
679  ret void
680
681; CHECK-LABEL: spConv2udw_x
682; CHECK: lfs [[LD:[0-9]+]], 0(3)
683; CHECK-DAG: sldi [[REG:[0-9]+]], 5, 3
684; CHECK-DAG: xscvdpuxds [[CONV:[0-9]+]], [[LD]]
685; CHECK-NEXT: stxsdx [[CONV]], 4, [[REG]]
686; CHECK-NEXT: blr
687
688; CHECK-PWR8-LABEL: spConv2udw_x
689; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
690; CHECK-PWR8-NEXT: sldi [[REG:[0-9]+]], 5, 3
691; CHECK-PWR8-NEXT: xscvdpuxds [[CONV:[0-9]+]], [[LD]]
692; CHECK-PWR8-NEXT: stxsdx [[CONV]], 4, [[REG]]
693; CHECK-PWR8-NEXT: blr
694}
695
696; Function Attrs: norecurse nounwind
697define void @spConv2uw_x(float* nocapture readonly %a, i32* nocapture %b,
698                          i32 zeroext %idx) {
699entry:
700  %0 = load float, float* %a, align 4
701  %conv = fptoui float %0 to i32
702  %idxprom = zext i32 %idx to i64
703  %arrayidx = getelementptr inbounds i32, i32* %b, i64 %idxprom
704  store i32 %conv, i32* %arrayidx, align 4
705  ret void
706
707; CHECK-LABEL: spConv2uw_x
708; CHECK: lfs [[LD:[0-9]+]], 0(3)
709; CHECK-DAG: sldi [[REG:[0-9]+]], 5, 2
710; CHECK-DAG: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
711; CHECK-NEXT: stfiwx [[CONV]], 4, [[REG]]
712; CHECK-NEXT: blr
713
714; CHECK-PWR8-LABEL: spConv2uw_x
715; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
716; CHECK-PWR8-NEXT: sldi [[REG:[0-9]+]], 5, 2
717; CHECK-PWR8-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
718; CHECK-PWR8-NEXT: stfiwx [[CONV]], 4, [[REG]]
719; CHECK-PWR8-NEXT: blr
720}
721
722; Function Attrs: norecurse nounwind
723define void @spConv2uhw_x(float* nocapture readonly %a, i16* nocapture %b,
724                          i32 zeroext %idx) {
725entry:
726  %0 = load float, float* %a, align 4
727  %conv = fptoui float %0 to i16
728  %idxprom = zext i32 %idx to i64
729  %arrayidx = getelementptr inbounds i16, i16* %b, i64 %idxprom
730  store i16 %conv, i16* %arrayidx, align 2
731  ret void
732
733; CHECK-LABEL: spConv2uhw_x
734; CHECK: lfs [[LD:[0-9]+]], 0(3)
735; CHECK-DAG: sldi [[REG:[0-9]+]], 5, 1
736; CHECK-DAG: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
737; CHECK-NEXT: stxsihx [[CONV]], 4, [[REG]]
738; CHECK-NEXT: blr
739
740; CHECK-PWR8-LABEL: spConv2uhw_x
741; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
742; CHECK-PWR8-NEXT: sldi [[REG:[0-9]+]], 5, 1
743; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
744; CHECK-PWR8-NEXT: mfvsrwz [[REG2:[0-9]+]], [[CONV]]
745; CHECK-PWR8-NEXT: sthx [[REG2]], 4, [[REG]]
746; CHECK-PWR8-NEXT: blr
747}
748
749; Function Attrs: norecurse nounwind
750define void @spConv2ub_x(float* nocapture readonly %a, i8* nocapture %b,
751                          i32 zeroext %idx) {
752entry:
753  %0 = load float, float* %a, align 4
754  %conv = fptoui float %0 to i8
755  %idxprom = zext i32 %idx to i64
756  %arrayidx = getelementptr inbounds i8, i8* %b, i64 %idxprom
757  store i8 %conv, i8* %arrayidx, align 1
758  ret void
759
760; CHECK-LABEL: spConv2ub_x
761; CHECK: lfs [[LD:[0-9]+]], 0(3)
762; CHECK-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
763; CHECK-NEXT: stxsibx [[CONV]], 4, 5
764; CHECK-NEXT: blr
765
766; CHECK-PWR8-LABEL: spConv2ub_x
767; CHECK-PWR8: lfsx [[LD:[0-9]+]], 0, 3
768; CHECK-PWR8-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
769; CHECK-PWR8-NEXT: mfvsrwz [[REG:[0-9]+]], [[CONV]]
770; CHECK-PWR8-NEXT: stbx [[REG]], 4, 5
771; CHECK-PWR8-NEXT: blr
772}
773