1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
3; RUN:   -mtriple=powerpc64le-linux-gnu < %s | FileCheck \
4; RUN:   -check-prefix=CHECK-LE %s
5; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
6; RUN:   -mtriple=powerpc64-linux-gnu < %s | FileCheck \
7; RUN:   -check-prefix=CHECK-BE %s
8; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
9; RUN:   -mtriple=powerpc-linux-gnu < %s | FileCheck \
10; RUN:   -check-prefix=CHECK-32 %s
11
12; Free probe
13define i8 @f0() #0 nounwind {
14; CHECK-LE-LABEL: f0:
15; CHECK-LE:       # %bb.0: # %entry
16; CHECK-LE-NEXT:    li r3, 3
17; CHECK-LE-NEXT:    stb r3, -64(r1)
18; CHECK-LE-NEXT:    lbz r3, -64(r1)
19; CHECK-LE-NEXT:    blr
20;
21; CHECK-BE-LABEL: f0:
22; CHECK-BE:       # %bb.0: # %entry
23; CHECK-BE-NEXT:    li r3, 3
24; CHECK-BE-NEXT:    stb r3, -64(r1)
25; CHECK-BE-NEXT:    lbz r3, -64(r1)
26; CHECK-BE-NEXT:    blr
27;
28; CHECK-32-LABEL: f0:
29; CHECK-32:       # %bb.0: # %entry
30; CHECK-32-NEXT:    stwu r1, -80(r1)
31; CHECK-32-NEXT:    li r3, 3
32; CHECK-32-NEXT:    stb r3, 16(r1)
33; CHECK-32-NEXT:    lbz r3, 16(r1)
34; CHECK-32-NEXT:    addi r1, r1, 80
35; CHECK-32-NEXT:    blr
36entry:
37  %a = alloca i8, i64 64
38  %b = getelementptr inbounds i8, i8* %a, i64 63
39  store volatile i8 3, i8* %a
40  %c = load volatile i8, i8* %a
41  ret i8 %c
42}
43
44define i8 @f1() #0 "stack-probe-size"="0" {
45; CHECK-LE-LABEL: f1:
46; CHECK-LE:       # %bb.0: # %entry
47; CHECK-LE-NEXT:    mr r12, r1
48; CHECK-LE-NEXT:    li r0, 259
49; CHECK-LE-NEXT:    mtctr r0
50; CHECK-LE-NEXT:  .LBB1_1: # %entry
51; CHECK-LE-NEXT:    #
52; CHECK-LE-NEXT:    stdu r12, -16(r1)
53; CHECK-LE-NEXT:    bdnz .LBB1_1
54; CHECK-LE-NEXT:  # %bb.2: # %entry
55; CHECK-LE-NEXT:    .cfi_def_cfa_offset 4144
56; CHECK-LE-NEXT:    li r3, 3
57; CHECK-LE-NEXT:    stb r3, 48(r1)
58; CHECK-LE-NEXT:    lbz r3, 48(r1)
59; CHECK-LE-NEXT:    addi r1, r1, 4144
60; CHECK-LE-NEXT:    blr
61;
62; CHECK-BE-LABEL: f1:
63; CHECK-BE:       # %bb.0: # %entry
64; CHECK-BE-NEXT:    mr r12, r1
65; CHECK-BE-NEXT:    li r0, 260
66; CHECK-BE-NEXT:    mtctr r0
67; CHECK-BE-NEXT:  .LBB1_1: # %entry
68; CHECK-BE-NEXT:    #
69; CHECK-BE-NEXT:    stdu r12, -16(r1)
70; CHECK-BE-NEXT:    bdnz .LBB1_1
71; CHECK-BE-NEXT:  # %bb.2: # %entry
72; CHECK-BE-NEXT:    .cfi_def_cfa_offset 4160
73; CHECK-BE-NEXT:    li r3, 3
74; CHECK-BE-NEXT:    stb r3, 64(r1)
75; CHECK-BE-NEXT:    lbz r3, 64(r1)
76; CHECK-BE-NEXT:    addi r1, r1, 4160
77; CHECK-BE-NEXT:    blr
78;
79; CHECK-32-LABEL: f1:
80; CHECK-32:       # %bb.0: # %entry
81; CHECK-32-NEXT:    mr r12, r1
82; CHECK-32-NEXT:    li r0, 257
83; CHECK-32-NEXT:    mtctr r0
84; CHECK-32-NEXT:  .LBB1_1: # %entry
85; CHECK-32-NEXT:    #
86; CHECK-32-NEXT:    stwu r12, -16(r1)
87; CHECK-32-NEXT:    bdnz .LBB1_1
88; CHECK-32-NEXT:  # %bb.2: # %entry
89; CHECK-32-NEXT:    sub r0, r1, r12
90; CHECK-32-NEXT:    sub r0, r1, r0
91; CHECK-32-NEXT:    .cfi_def_cfa_offset 4112
92; CHECK-32-NEXT:    li r3, 3
93; CHECK-32-NEXT:    stb r3, 16(r1)
94; CHECK-32-NEXT:    lbz r3, 16(r1)
95; CHECK-32-NEXT:    addi r1, r1, 4112
96; CHECK-32-NEXT:    blr
97entry:
98  %a = alloca i8, i64 4096
99  %b = getelementptr inbounds i8, i8* %a, i64 63
100  store volatile i8 3, i8* %a
101  %c = load volatile i8, i8* %a
102  ret i8 %c
103}
104
105define i8 @f2() #0 {
106; CHECK-LE-LABEL: f2:
107; CHECK-LE:       # %bb.0: # %entry
108; CHECK-LE-NEXT:    mr r12, r1
109; CHECK-LE-NEXT:    stdu r12, -48(r1)
110; CHECK-LE-NEXT:    li r0, 16
111; CHECK-LE-NEXT:    mtctr r0
112; CHECK-LE-NEXT:  .LBB2_1: # %entry
113; CHECK-LE-NEXT:    #
114; CHECK-LE-NEXT:    stdu r12, -4096(r1)
115; CHECK-LE-NEXT:    bdnz .LBB2_1
116; CHECK-LE-NEXT:  # %bb.2: # %entry
117; CHECK-LE-NEXT:    .cfi_def_cfa_offset 65584
118; CHECK-LE-NEXT:    li r3, 3
119; CHECK-LE-NEXT:    stb r3, 48(r1)
120; CHECK-LE-NEXT:    lbz r3, 48(r1)
121; CHECK-LE-NEXT:    ld r1, 0(r1)
122; CHECK-LE-NEXT:    blr
123;
124; CHECK-BE-LABEL: f2:
125; CHECK-BE:       # %bb.0: # %entry
126; CHECK-BE-NEXT:    mr r12, r1
127; CHECK-BE-NEXT:    stdu r12, -64(r1)
128; CHECK-BE-NEXT:    li r0, 16
129; CHECK-BE-NEXT:    mtctr r0
130; CHECK-BE-NEXT:  .LBB2_1: # %entry
131; CHECK-BE-NEXT:    #
132; CHECK-BE-NEXT:    stdu r12, -4096(r1)
133; CHECK-BE-NEXT:    bdnz .LBB2_1
134; CHECK-BE-NEXT:  # %bb.2: # %entry
135; CHECK-BE-NEXT:    .cfi_def_cfa_offset 65600
136; CHECK-BE-NEXT:    li r3, 3
137; CHECK-BE-NEXT:    stb r3, 64(r1)
138; CHECK-BE-NEXT:    lbz r3, 64(r1)
139; CHECK-BE-NEXT:    ld r1, 0(r1)
140; CHECK-BE-NEXT:    blr
141;
142; CHECK-32-LABEL: f2:
143; CHECK-32:       # %bb.0: # %entry
144; CHECK-32-NEXT:    mr r12, r1
145; CHECK-32-NEXT:    stwu r12, -16(r1)
146; CHECK-32-NEXT:    li r0, 16
147; CHECK-32-NEXT:    mtctr r0
148; CHECK-32-NEXT:  .LBB2_1: # %entry
149; CHECK-32-NEXT:    #
150; CHECK-32-NEXT:    stwu r12, -4096(r1)
151; CHECK-32-NEXT:    bdnz .LBB2_1
152; CHECK-32-NEXT:  # %bb.2: # %entry
153; CHECK-32-NEXT:    sub r0, r1, r12
154; CHECK-32-NEXT:    sub r0, r1, r0
155; CHECK-32-NEXT:    .cfi_def_cfa_offset 65552
156; CHECK-32-NEXT:    li r3, 3
157; CHECK-32-NEXT:    stb r3, 16(r1)
158; CHECK-32-NEXT:    mr r0, r31
159; CHECK-32-NEXT:    lbz r3, 16(r1)
160; CHECK-32-NEXT:    lwz r31, 0(r1)
161; CHECK-32-NEXT:    mr r1, r31
162; CHECK-32-NEXT:    mr r31, r0
163; CHECK-32-NEXT:    blr
164entry:
165  %a = alloca i8, i64 65536
166  %b = getelementptr inbounds i8, i8* %a, i64 63
167  store volatile i8 3, i8* %a
168  %c = load volatile i8, i8* %a
169  ret i8 %c
170}
171
172define i8 @f3() #0 "stack-probe-size"="32768" {
173; CHECK-LE-LABEL: f3:
174; CHECK-LE:       # %bb.0: # %entry
175; CHECK-LE-NEXT:    mr r12, r1
176; CHECK-LE-NEXT:    stdu r12, -48(r1)
177; CHECK-LE-NEXT:    stdu r12, -32768(r1)
178; CHECK-LE-NEXT:    stdu r12, -32768(r1)
179; CHECK-LE-NEXT:    .cfi_def_cfa_offset 65584
180; CHECK-LE-NEXT:    li r3, 3
181; CHECK-LE-NEXT:    stb r3, 48(r1)
182; CHECK-LE-NEXT:    lbz r3, 48(r1)
183; CHECK-LE-NEXT:    ld r1, 0(r1)
184; CHECK-LE-NEXT:    blr
185;
186; CHECK-BE-LABEL: f3:
187; CHECK-BE:       # %bb.0: # %entry
188; CHECK-BE-NEXT:    mr r12, r1
189; CHECK-BE-NEXT:    stdu r12, -64(r1)
190; CHECK-BE-NEXT:    stdu r12, -32768(r1)
191; CHECK-BE-NEXT:    stdu r12, -32768(r1)
192; CHECK-BE-NEXT:    .cfi_def_cfa_offset 65600
193; CHECK-BE-NEXT:    li r3, 3
194; CHECK-BE-NEXT:    stb r3, 64(r1)
195; CHECK-BE-NEXT:    lbz r3, 64(r1)
196; CHECK-BE-NEXT:    ld r1, 0(r1)
197; CHECK-BE-NEXT:    blr
198;
199; CHECK-32-LABEL: f3:
200; CHECK-32:       # %bb.0: # %entry
201; CHECK-32-NEXT:    mr r12, r1
202; CHECK-32-NEXT:    stwu r12, -16(r1)
203; CHECK-32-NEXT:    stwu r12, -32768(r1)
204; CHECK-32-NEXT:    stwu r12, -32768(r1)
205; CHECK-32-NEXT:    sub r0, r1, r12
206; CHECK-32-NEXT:    sub r0, r1, r0
207; CHECK-32-NEXT:    .cfi_def_cfa_offset 65552
208; CHECK-32-NEXT:    li r3, 3
209; CHECK-32-NEXT:    stb r3, 16(r1)
210; CHECK-32-NEXT:    mr r0, r31
211; CHECK-32-NEXT:    lbz r3, 16(r1)
212; CHECK-32-NEXT:    lwz r31, 0(r1)
213; CHECK-32-NEXT:    mr r1, r31
214; CHECK-32-NEXT:    mr r31, r0
215; CHECK-32-NEXT:    blr
216entry:
217  %a = alloca i8, i64 65536
218  %b = getelementptr inbounds i8, i8* %a, i64 63
219  store volatile i8 3, i8* %a
220  %c = load volatile i8, i8* %a
221  ret i8 %c
222}
223
224; Same as f2, but without protection.
225define i8 @f4() {
226; CHECK-LE-LABEL: f4:
227; CHECK-LE:       # %bb.0: # %entry
228; CHECK-LE-NEXT:    lis r0, -2
229; CHECK-LE-NEXT:    ori r0, r0, 65488
230; CHECK-LE-NEXT:    stdux r1, r1, r0
231; CHECK-LE-NEXT:    .cfi_def_cfa_offset 65584
232; CHECK-LE-NEXT:    li r3, 3
233; CHECK-LE-NEXT:    stb r3, 48(r1)
234; CHECK-LE-NEXT:    lbz r3, 48(r1)
235; CHECK-LE-NEXT:    ld r1, 0(r1)
236; CHECK-LE-NEXT:    blr
237;
238; CHECK-BE-LABEL: f4:
239; CHECK-BE:       # %bb.0: # %entry
240; CHECK-BE-NEXT:    lis r0, -2
241; CHECK-BE-NEXT:    ori r0, r0, 65472
242; CHECK-BE-NEXT:    stdux r1, r1, r0
243; CHECK-BE-NEXT:    .cfi_def_cfa_offset 65600
244; CHECK-BE-NEXT:    li r3, 3
245; CHECK-BE-NEXT:    stb r3, 64(r1)
246; CHECK-BE-NEXT:    lbz r3, 64(r1)
247; CHECK-BE-NEXT:    ld r1, 0(r1)
248; CHECK-BE-NEXT:    blr
249;
250; CHECK-32-LABEL: f4:
251; CHECK-32:       # %bb.0: # %entry
252; CHECK-32-NEXT:    lis r0, -2
253; CHECK-32-NEXT:    ori r0, r0, 65520
254; CHECK-32-NEXT:    stwux r1, r1, r0
255; CHECK-32-NEXT:    sub r0, r1, r0
256; CHECK-32-NEXT:    .cfi_def_cfa_offset 65552
257; CHECK-32-NEXT:    li r3, 3
258; CHECK-32-NEXT:    stb r3, 16(r1)
259; CHECK-32-NEXT:    mr r0, r31
260; CHECK-32-NEXT:    lbz r3, 16(r1)
261; CHECK-32-NEXT:    lwz r31, 0(r1)
262; CHECK-32-NEXT:    mr r1, r31
263; CHECK-32-NEXT:    mr r31, r0
264; CHECK-32-NEXT:    blr
265entry:
266  %a = alloca i8, i64 65536
267  %b = getelementptr inbounds i8, i8* %a, i64 63
268  store volatile i8 3, i8* %a
269  %c = load volatile i8, i8* %a
270  ret i8 %c
271}
272
273define i8 @f5() #0 "stack-probe-size"="65536" {
274; CHECK-LE-LABEL: f5:
275; CHECK-LE:       # %bb.0: # %entry
276; CHECK-LE-NEXT:    mr r12, r1
277; CHECK-LE-NEXT:    stdu r12, -48(r1)
278; CHECK-LE-NEXT:    li r0, 16
279; CHECK-LE-NEXT:    mtctr r0
280; CHECK-LE-NEXT:    lis r0, -1
281; CHECK-LE-NEXT:    nop
282; CHECK-LE-NEXT:  .LBB5_1: # %entry
283; CHECK-LE-NEXT:    #
284; CHECK-LE-NEXT:    stdux r12, r1, r0
285; CHECK-LE-NEXT:    bdnz .LBB5_1
286; CHECK-LE-NEXT:  # %bb.2: # %entry
287; CHECK-LE-NEXT:    .cfi_def_cfa_offset 1048624
288; CHECK-LE-NEXT:    li r3, 3
289; CHECK-LE-NEXT:    stb r3, 48(r1)
290; CHECK-LE-NEXT:    lbz r3, 48(r1)
291; CHECK-LE-NEXT:    ld r1, 0(r1)
292; CHECK-LE-NEXT:    blr
293;
294; CHECK-BE-LABEL: f5:
295; CHECK-BE:       # %bb.0: # %entry
296; CHECK-BE-NEXT:    mr r12, r1
297; CHECK-BE-NEXT:    stdu r12, -64(r1)
298; CHECK-BE-NEXT:    li r0, 16
299; CHECK-BE-NEXT:    mtctr r0
300; CHECK-BE-NEXT:    lis r0, -1
301; CHECK-BE-NEXT:    nop
302; CHECK-BE-NEXT:  .LBB5_1: # %entry
303; CHECK-BE-NEXT:    #
304; CHECK-BE-NEXT:    stdux r12, r1, r0
305; CHECK-BE-NEXT:    bdnz .LBB5_1
306; CHECK-BE-NEXT:  # %bb.2: # %entry
307; CHECK-BE-NEXT:    .cfi_def_cfa_offset 1048640
308; CHECK-BE-NEXT:    li r3, 3
309; CHECK-BE-NEXT:    stb r3, 64(r1)
310; CHECK-BE-NEXT:    lbz r3, 64(r1)
311; CHECK-BE-NEXT:    ld r1, 0(r1)
312; CHECK-BE-NEXT:    blr
313;
314; CHECK-32-LABEL: f5:
315; CHECK-32:       # %bb.0: # %entry
316; CHECK-32-NEXT:    mr r12, r1
317; CHECK-32-NEXT:    stwu r12, -16(r1)
318; CHECK-32-NEXT:    li r0, 16
319; CHECK-32-NEXT:    mtctr r0
320; CHECK-32-NEXT:    lis r0, -1
321; CHECK-32-NEXT:    nop
322; CHECK-32-NEXT:  .LBB5_1: # %entry
323; CHECK-32-NEXT:    #
324; CHECK-32-NEXT:    stwux r12, r1, r0
325; CHECK-32-NEXT:    bdnz .LBB5_1
326; CHECK-32-NEXT:  # %bb.2: # %entry
327; CHECK-32-NEXT:    sub r0, r1, r12
328; CHECK-32-NEXT:    sub r0, r1, r0
329; CHECK-32-NEXT:    .cfi_def_cfa_offset 1048592
330; CHECK-32-NEXT:    li r3, 3
331; CHECK-32-NEXT:    stb r3, 16(r1)
332; CHECK-32-NEXT:    mr r0, r31
333; CHECK-32-NEXT:    lbz r3, 16(r1)
334; CHECK-32-NEXT:    lwz r31, 0(r1)
335; CHECK-32-NEXT:    mr r1, r31
336; CHECK-32-NEXT:    mr r31, r0
337; CHECK-32-NEXT:    blr
338entry:
339  %a = alloca i8, i64 1048576
340  %b = getelementptr inbounds i8, i8* %a, i64 63
341  store volatile i8 3, i8* %a
342  %c = load volatile i8, i8* %a
343  ret i8 %c
344}
345
346define i8 @f6() #0 {
347; CHECK-LE-LABEL: f6:
348; CHECK-LE:       # %bb.0: # %entry
349; CHECK-LE-NEXT:    mr r12, r1
350; CHECK-LE-NEXT:    stdu r12, -48(r1)
351; CHECK-LE-NEXT:    lis r0, 4
352; CHECK-LE-NEXT:    nop
353; CHECK-LE-NEXT:    mtctr r0
354; CHECK-LE-NEXT:  .LBB6_1: # %entry
355; CHECK-LE-NEXT:    #
356; CHECK-LE-NEXT:    stdu r12, -4096(r1)
357; CHECK-LE-NEXT:    bdnz .LBB6_1
358; CHECK-LE-NEXT:  # %bb.2: # %entry
359; CHECK-LE-NEXT:    .cfi_def_cfa_offset 1073741872
360; CHECK-LE-NEXT:    li r3, 3
361; CHECK-LE-NEXT:    stb r3, 48(r1)
362; CHECK-LE-NEXT:    lbz r3, 48(r1)
363; CHECK-LE-NEXT:    ld r1, 0(r1)
364; CHECK-LE-NEXT:    blr
365;
366; CHECK-BE-LABEL: f6:
367; CHECK-BE:       # %bb.0: # %entry
368; CHECK-BE-NEXT:    mr r12, r1
369; CHECK-BE-NEXT:    stdu r12, -64(r1)
370; CHECK-BE-NEXT:    lis r0, 4
371; CHECK-BE-NEXT:    nop
372; CHECK-BE-NEXT:    mtctr r0
373; CHECK-BE-NEXT:  .LBB6_1: # %entry
374; CHECK-BE-NEXT:    #
375; CHECK-BE-NEXT:    stdu r12, -4096(r1)
376; CHECK-BE-NEXT:    bdnz .LBB6_1
377; CHECK-BE-NEXT:  # %bb.2: # %entry
378; CHECK-BE-NEXT:    .cfi_def_cfa_offset 1073741888
379; CHECK-BE-NEXT:    li r3, 3
380; CHECK-BE-NEXT:    stb r3, 64(r1)
381; CHECK-BE-NEXT:    lbz r3, 64(r1)
382; CHECK-BE-NEXT:    ld r1, 0(r1)
383; CHECK-BE-NEXT:    blr
384;
385; CHECK-32-LABEL: f6:
386; CHECK-32:       # %bb.0: # %entry
387; CHECK-32-NEXT:    mr r12, r1
388; CHECK-32-NEXT:    stwu r12, -16(r1)
389; CHECK-32-NEXT:    lis r0, 4
390; CHECK-32-NEXT:    nop
391; CHECK-32-NEXT:    mtctr r0
392; CHECK-32-NEXT:  .LBB6_1: # %entry
393; CHECK-32-NEXT:    #
394; CHECK-32-NEXT:    stwu r12, -4096(r1)
395; CHECK-32-NEXT:    bdnz .LBB6_1
396; CHECK-32-NEXT:  # %bb.2: # %entry
397; CHECK-32-NEXT:    sub r0, r1, r12
398; CHECK-32-NEXT:    sub r0, r1, r0
399; CHECK-32-NEXT:    .cfi_def_cfa_offset 1073741840
400; CHECK-32-NEXT:    li r3, 3
401; CHECK-32-NEXT:    stb r3, 16(r1)
402; CHECK-32-NEXT:    mr r0, r31
403; CHECK-32-NEXT:    lbz r3, 16(r1)
404; CHECK-32-NEXT:    lwz r31, 0(r1)
405; CHECK-32-NEXT:    mr r1, r31
406; CHECK-32-NEXT:    mr r31, r0
407; CHECK-32-NEXT:    blr
408entry:
409  %a = alloca i8, i64 1073741824
410  %b = getelementptr inbounds i8, i8* %a, i64 63
411  store volatile i8 3, i8* %a
412  %c = load volatile i8, i8* %a
413  ret i8 %c
414}
415
416define i8 @f7() #0 "stack-probe-size"="65536" {
417; CHECK-LE-LABEL: f7:
418; CHECK-LE:       # %bb.0: # %entry
419; CHECK-LE-NEXT:    lis r0, -1
420; CHECK-LE-NEXT:    mr r12, r1
421; CHECK-LE-NEXT:    ori r0, r0, 13776
422; CHECK-LE-NEXT:    stdux r12, r1, r0
423; CHECK-LE-NEXT:    li r0, 15258
424; CHECK-LE-NEXT:    mtctr r0
425; CHECK-LE-NEXT:    lis r0, -1
426; CHECK-LE-NEXT:    nop
427; CHECK-LE-NEXT:  .LBB7_1: # %entry
428; CHECK-LE-NEXT:    #
429; CHECK-LE-NEXT:    stdux r12, r1, r0
430; CHECK-LE-NEXT:    bdnz .LBB7_1
431; CHECK-LE-NEXT:  # %bb.2: # %entry
432; CHECK-LE-NEXT:    .cfi_def_cfa_offset 1000000048
433; CHECK-LE-NEXT:    li r3, 3
434; CHECK-LE-NEXT:    stb r3, 41(r1)
435; CHECK-LE-NEXT:    lbz r3, 41(r1)
436; CHECK-LE-NEXT:    ld r1, 0(r1)
437; CHECK-LE-NEXT:    blr
438;
439; CHECK-BE-LABEL: f7:
440; CHECK-BE:       # %bb.0: # %entry
441; CHECK-BE-NEXT:    lis r0, -1
442; CHECK-BE-NEXT:    mr r12, r1
443; CHECK-BE-NEXT:    ori r0, r0, 13760
444; CHECK-BE-NEXT:    stdux r12, r1, r0
445; CHECK-BE-NEXT:    li r0, 15258
446; CHECK-BE-NEXT:    mtctr r0
447; CHECK-BE-NEXT:    lis r0, -1
448; CHECK-BE-NEXT:    nop
449; CHECK-BE-NEXT:  .LBB7_1: # %entry
450; CHECK-BE-NEXT:    #
451; CHECK-BE-NEXT:    stdux r12, r1, r0
452; CHECK-BE-NEXT:    bdnz .LBB7_1
453; CHECK-BE-NEXT:  # %bb.2: # %entry
454; CHECK-BE-NEXT:    .cfi_def_cfa_offset 1000000064
455; CHECK-BE-NEXT:    li r3, 3
456; CHECK-BE-NEXT:    stb r3, 57(r1)
457; CHECK-BE-NEXT:    lbz r3, 57(r1)
458; CHECK-BE-NEXT:    ld r1, 0(r1)
459; CHECK-BE-NEXT:    blr
460;
461; CHECK-32-LABEL: f7:
462; CHECK-32:       # %bb.0: # %entry
463; CHECK-32-NEXT:    lis r0, -1
464; CHECK-32-NEXT:    mr r12, r1
465; CHECK-32-NEXT:    ori r0, r0, 13808
466; CHECK-32-NEXT:    stwux r12, r1, r0
467; CHECK-32-NEXT:    li r0, 15258
468; CHECK-32-NEXT:    mtctr r0
469; CHECK-32-NEXT:    lis r0, -1
470; CHECK-32-NEXT:    nop
471; CHECK-32-NEXT:  .LBB7_1: # %entry
472; CHECK-32-NEXT:    #
473; CHECK-32-NEXT:    stwux r12, r1, r0
474; CHECK-32-NEXT:    bdnz .LBB7_1
475; CHECK-32-NEXT:  # %bb.2: # %entry
476; CHECK-32-NEXT:    sub r0, r1, r12
477; CHECK-32-NEXT:    sub r0, r1, r0
478; CHECK-32-NEXT:    .cfi_def_cfa_offset 1000000016
479; CHECK-32-NEXT:    li r3, 3
480; CHECK-32-NEXT:    stb r3, 9(r1)
481; CHECK-32-NEXT:    mr r0, r31
482; CHECK-32-NEXT:    lbz r3, 9(r1)
483; CHECK-32-NEXT:    lwz r31, 0(r1)
484; CHECK-32-NEXT:    mr r1, r31
485; CHECK-32-NEXT:    mr r31, r0
486; CHECK-32-NEXT:    blr
487entry:
488  %a = alloca i8, i64 1000000007
489  %b = getelementptr inbounds i8, i8* %a, i64 101
490  store volatile i8 3, i8* %a
491  %c = load volatile i8, i8* %a
492  ret i8 %c
493}
494
495attributes #0 = { "probe-stack"="inline-asm" }
496