1; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
2; RUN: -mcpu=pwr8 < %s | FileCheck %s
3
4%class.PB2 = type { [1 x i32], %class.PB1* }
5%class.PB1 = type { [1 x i32], i64, i64, i32 }
6
7; Function Attrs: norecurse nounwind readonly
8define zeroext i1 @test1(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 {
9entry:
10  %arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
11  %0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1
12  %and.i = and i32 %0, 8
13  %arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
14  %1 = load i32, i32* %arrayidx.i37, align 8, !tbaa !1
15  %and.i4 = and i32 %1, 8
16  %cmp.i5 = icmp ult i32 %and.i, %and.i4
17  ret i1 %cmp.i5
18
19; CHECK-LABEL: @test1
20; CHECK: rlwinm [[REG1:[0-9]*]]
21; CHECK-NEXT: rlwinm [[REG2:[0-9]*]]
22; CHECK-NEXT: sub [[REG3:[0-9]*]], [[REG1]], [[REG2]]
23; CHECK-NEXT: rldicl 3, [[REG3]]
24; CHECK: blr
25
26}
27
28; Function Attrs: norecurse nounwind readonly
29define zeroext i1 @test2(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 {
30entry:
31  %arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
32  %0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1
33  %and.i = and i32 %0, 8
34  %arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
35  %1 = load i32, i32* %arrayidx.i37, align 8, !tbaa !1
36  %and.i4 = and i32 %1, 8
37  %cmp.i5 = icmp ule i32 %and.i, %and.i4
38  ret i1 %cmp.i5
39
40; CHECK-LABEL: @test2
41; CHECK: rlwinm [[REG1:[0-9]*]]
42; CHECK-NEXT: rlwinm [[REG2:[0-9]*]]
43; CHECK-NEXT: sub [[REG3:[0-9]*]], [[REG2]], [[REG1]]
44; CHECK-NEXT: rldicl [[REG4:[0-9]*]], [[REG3]]
45; CHECK-NEXT: xori 3, [[REG4]], 1
46; CHECK: blr
47
48}
49
50; Function Attrs: norecurse nounwind readonly
51define zeroext i1 @test3(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 {
52entry:
53  %arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
54  %0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1
55  %and.i = and i32 %0, 8
56  %arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
57  %1 = load i32, i32* %arrayidx.i37, align 8, !tbaa !1
58  %and.i4 = and i32 %1, 8
59  %cmp.i5 = icmp ugt i32 %and.i, %and.i4
60  ret i1 %cmp.i5
61
62; CHECK-LABEL: @test3
63; CHECK: rlwinm [[REG1:[0-9]*]]
64; CHECK-NEXT: rlwinm [[REG2:[0-9]*]]
65; CHECK-NEXT: sub [[REG3:[0-9]*]], [[REG2]], [[REG1]]
66; CHECK-NEXT: rldicl 3, [[REG3]]
67; CHECK: blr
68
69}
70
71; Function Attrs: norecurse nounwind readonly
72define zeroext i1 @test4(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 {
73entry:
74  %arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
75  %0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1
76  %and.i = and i32 %0, 8
77  %arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
78  %1 = load i32, i32* %arrayidx.i37, align 8, !tbaa !1
79  %and.i4 = and i32 %1, 8
80  %cmp.i5 = icmp uge i32 %and.i, %and.i4
81  ret i1 %cmp.i5
82
83; CHECK-LABEL: @test4
84; CHECK: rlwinm [[REG1:[0-9]*]]
85; CHECK-NEXT: rlwinm [[REG2:[0-9]*]]
86; CHECK-NEXT: sub [[REG3:[0-9]*]], [[REG1]], [[REG2]]
87; CHECK-NEXT: rldicl [[REG4:[0-9]*]], [[REG3]]
88; CHECK-NEXT: xori 3, [[REG4]], 1
89; CHECK: blr
90
91}
92
93!1 = !{!2, !2, i64 0}
94!2 = !{!"int", !3, i64 0}
95!3 = !{!"omnipotent char", !4, i64 0}
96!4 = !{!"Simple C++ TBAA"}
97