1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-unknown %s -o - | FileCheck %s
3
4define i32 @xori64i32(i64 %a) {
5; CHECK-LABEL: xori64i32:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    sradi 3, 3, 63
8; CHECK-NEXT:    xori 3, 3, 65535
9; CHECK-NEXT:    xoris 3, 3, 32767
10; CHECK-NEXT:    blr
11  %shr4 = ashr i64 %a, 63
12  %conv5 = trunc i64 %shr4 to i32
13  %xor = xor i32 %conv5, 2147483647
14  ret i32 %xor
15}
16
17define i64 @selecti64i64(i64 %a) {
18; CHECK-LABEL: selecti64i64:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    sradi 3, 3, 63
21; CHECK-NEXT:    xori 3, 3, 65535
22; CHECK-NEXT:    xoris 3, 3, 32767
23; CHECK-NEXT:    blr
24  %c = icmp sgt i64 %a, -1
25  %s = select i1 %c, i64 2147483647, i64 -2147483648
26  ret i64 %s
27}
28
29define i32 @selecti64i32(i64 %a) {
30; CHECK-LABEL: selecti64i32:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    sradi 3, 3, 63
33; CHECK-NEXT:    xori 3, 3, 65535
34; CHECK-NEXT:    xoris 3, 3, 32767
35; CHECK-NEXT:    blr
36  %c = icmp sgt i64 %a, -1
37  %s = select i1 %c, i32 2147483647, i32 -2147483648
38  ret i32 %s
39}
40
41define i64 @selecti32i64(i32 %a) {
42; CHECK-LABEL: selecti32i64:
43; CHECK:       # %bb.0:
44; CHECK-NEXT:    srawi 3, 3, 31
45; CHECK-NEXT:    extsw 3, 3
46; CHECK-NEXT:    xori 3, 3, 65535
47; CHECK-NEXT:    xoris 3, 3, 32767
48; CHECK-NEXT:    blr
49  %c = icmp sgt i32 %a, -1
50  %s = select i1 %c, i64 2147483647, i64 -2147483648
51  ret i64 %s
52}
53
54
55
56define i8 @xori32i8(i32 %a) {
57; CHECK-LABEL: xori32i8:
58; CHECK:       # %bb.0:
59; CHECK-NEXT:    srawi 3, 3, 31
60; CHECK-NEXT:    xori 3, 3, 84
61; CHECK-NEXT:    blr
62  %shr4 = ashr i32 %a, 31
63  %conv5 = trunc i32 %shr4 to i8
64  %xor = xor i8 %conv5, 84
65  ret i8 %xor
66}
67
68define i32 @selecti32i32(i32 %a) {
69; CHECK-LABEL: selecti32i32:
70; CHECK:       # %bb.0:
71; CHECK-NEXT:    srawi 3, 3, 31
72; CHECK-NEXT:    extsw 3, 3
73; CHECK-NEXT:    xori 3, 3, 84
74; CHECK-NEXT:    blr
75  %c = icmp sgt i32 %a, -1
76  %s = select i1 %c, i32 84, i32 -85
77  ret i32 %s
78}
79
80define i8 @selecti32i8(i32 %a) {
81; CHECK-LABEL: selecti32i8:
82; CHECK:       # %bb.0:
83; CHECK-NEXT:    srawi 3, 3, 31
84; CHECK-NEXT:    extsw 3, 3
85; CHECK-NEXT:    xori 3, 3, 84
86; CHECK-NEXT:    blr
87  %c = icmp sgt i32 %a, -1
88  %s = select i1 %c, i8 84, i8 -85
89  ret i8 %s
90}
91
92define i32 @selecti8i32(i8 %a) {
93; CHECK-LABEL: selecti8i32:
94; CHECK:       # %bb.0:
95; CHECK-NEXT:    extsb 3, 3
96; CHECK-NEXT:    srawi 3, 3, 7
97; CHECK-NEXT:    extsw 3, 3
98; CHECK-NEXT:    xori 3, 3, 84
99; CHECK-NEXT:    blr
100  %c = icmp sgt i8 %a, -1
101  %s = select i1 %c, i32 84, i32 -85
102  ret i32 %s
103}
104
105define i32 @icmpasreq(i32 %input, i32 %a, i32 %b) {
106; CHECK-LABEL: icmpasreq:
107; CHECK:       # %bb.0:
108; CHECK-NEXT:    cmpwi 3, 0
109; CHECK-NEXT:    isellt 3, 4, 5
110; CHECK-NEXT:    blr
111  %sh = ashr i32 %input, 31
112  %c = icmp eq i32 %sh, -1
113  %s = select i1 %c, i32 %a, i32 %b
114  ret i32 %s
115}
116
117define i32 @icmpasrne(i32 %input, i32 %a, i32 %b) {
118; CHECK-LABEL: icmpasrne:
119; CHECK:       # %bb.0:
120; CHECK-NEXT:    cmpwi 3, -1
121; CHECK-NEXT:    iselgt 3, 4, 5
122; CHECK-NEXT:    blr
123  %sh = ashr i32 %input, 31
124  %c = icmp ne i32 %sh, -1
125  %s = select i1 %c, i32 %a, i32 %b
126  ret i32 %s
127}
128
129define i32 @oneusecmp(i32 %a, i32 %b, i32 %d) {
130; CHECK-LABEL: oneusecmp:
131; CHECK:       # %bb.0:
132; CHECK-NEXT:    srawi 6, 3, 31
133; CHECK-NEXT:    cmpwi 3, 0
134; CHECK-NEXT:    xori 3, 6, 127
135; CHECK-NEXT:    isellt 4, 5, 4
136; CHECK-NEXT:    add 3, 3, 4
137; CHECK-NEXT:    blr
138  %c = icmp sle i32 %a, -1
139  %s = select i1 %c, i32 -128, i32 127
140  %s2 = select i1 %c, i32 %d, i32 %b
141  %x = add i32 %s, %s2
142  ret i32 %x
143}
144