1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
3; RUN:    -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9LE
4; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
5; RUN:    -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9BE
6; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
7; RUN:    -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8LE
8; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
9; RUN:    -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8BE
10
11; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
12; RUN:    -mtriple=powerpc64-ibm-aix-xcoff< %s | FileCheck %s \
13; RUN:    --check-prefixes=AIX,P9-AIX,P9-AIX-64
14; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
15; RUN:    -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s \
16; RUN:    --check-prefixes=AIX,P9-AIX,P9-AIX-32
17; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
18; RUN:    -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck %s \
19; RUN:    --check-prefixes=AIX,P8-AIX-64
20; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
21; RUN:    -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s \
22; RUN:    --check-prefixes=AIX,P8-AIX-32
23
24; Function Attrs: norecurse nounwind readonly
25define <4 x i32> @s2v_test1(i32* nocapture readonly %int32, <4 x i32> %vec)  {
26; P9LE-LABEL: s2v_test1:
27; P9LE:       # %bb.0: # %entry
28; P9LE-NEXT:    lwz r3, 0(r3)
29; P9LE-NEXT:    mtfprwz f0, r3
30; P9LE-NEXT:    xxinsertw v2, vs0, 12
31; P9LE-NEXT:    blr
32;
33; P9BE-LABEL: s2v_test1:
34; P9BE:       # %bb.0: # %entry
35; P9BE-NEXT:    lwz r3, 0(r3)
36; P9BE-NEXT:    mtfprwz f0, r3
37; P9BE-NEXT:    xxinsertw v2, vs0, 0
38; P9BE-NEXT:    blr
39;
40; P8LE-LABEL: s2v_test1:
41; P8LE:       # %bb.0: # %entry
42; P8LE-NEXT:    addis r4, r2, .LCPI0_0@toc@ha
43; P8LE-NEXT:    lxsiwzx v4, 0, r3
44; P8LE-NEXT:    addi r4, r4, .LCPI0_0@toc@l
45; P8LE-NEXT:    lvx v3, 0, r4
46; P8LE-NEXT:    vperm v2, v2, v4, v3
47; P8LE-NEXT:    blr
48;
49; P8BE-LABEL: s2v_test1:
50; P8BE:       # %bb.0: # %entry
51; P8BE-NEXT:    addis r4, r2, .LCPI0_0@toc@ha
52; P8BE-NEXT:    lxsiwzx v4, 0, r3
53; P8BE-NEXT:    addi r4, r4, .LCPI0_0@toc@l
54; P8BE-NEXT:    lxvw4x v3, 0, r4
55; P8BE-NEXT:    vperm v2, v4, v2, v3
56; P8BE-NEXT:    blr
57;
58; P9-AIX-LABEL: s2v_test1:
59; P9-AIX:       # %bb.0: # %entry
60; P9-AIX-NEXT:    lwz r3, 0(r3)
61; P9-AIX-NEXT:    mtfprwz f0, r3
62; P9-AIX-NEXT:    xxinsertw v2, vs0, 0
63; P9-AIX-NEXT:    blr
64;
65; P8-AIX-64-LABEL: s2v_test1:
66; P8-AIX-64:       # %bb.0: # %entry
67; P8-AIX-64-NEXT:    ld r4, L..C0(r2) # %const.0
68; P8-AIX-64-NEXT:    lxsiwzx v3, 0, r3
69; P8-AIX-64-NEXT:    lxvw4x v4, 0, r4
70; P8-AIX-64-NEXT:    vperm v2, v3, v2, v4
71; P8-AIX-64-NEXT:    blr
72;
73; P8-AIX-32-LABEL: s2v_test1:
74; P8-AIX-32:       # %bb.0: # %entry
75; P8-AIX-32-NEXT:    lwz r3, 0(r3)
76; P8-AIX-32-NEXT:    lwz r4, L..C0(r2) # %const.0
77; P8-AIX-32-NEXT:    stw r3, -16(r1)
78; P8-AIX-32-NEXT:    addi r3, r1, -16
79; P8-AIX-32-NEXT:    lxvw4x v3, 0, r4
80; P8-AIX-32-NEXT:    lxvw4x v4, 0, r3
81; P8-AIX-32-NEXT:    vperm v2, v4, v2, v3
82; P8-AIX-32-NEXT:    blr
83entry:
84  %0 = load i32, i32* %int32, align 4
85  %vecins = insertelement <4 x i32> %vec, i32 %0, i32 0
86  ret <4 x i32> %vecins
87}
88
89; Function Attrs: norecurse nounwind readonly
90define <4 x i32> @s2v_test2(i32* nocapture readonly %int32, <4 x i32> %vec)  {
91; P9LE-LABEL: s2v_test2:
92; P9LE:       # %bb.0: # %entry
93; P9LE-NEXT:    lwz r3, 4(r3)
94; P9LE-NEXT:    mtfprwz f0, r3
95; P9LE-NEXT:    xxinsertw v2, vs0, 12
96; P9LE-NEXT:    blr
97;
98; P9BE-LABEL: s2v_test2:
99; P9BE:       # %bb.0: # %entry
100; P9BE-NEXT:    lwz r3, 4(r3)
101; P9BE-NEXT:    mtfprwz f0, r3
102; P9BE-NEXT:    xxinsertw v2, vs0, 0
103; P9BE-NEXT:    blr
104;
105; P8LE-LABEL: s2v_test2:
106; P8LE:       # %bb.0: # %entry
107; P8LE-NEXT:    addis r4, r2, .LCPI1_0@toc@ha
108; P8LE-NEXT:    addi r3, r3, 4
109; P8LE-NEXT:    addi r4, r4, .LCPI1_0@toc@l
110; P8LE-NEXT:    lxsiwzx v4, 0, r3
111; P8LE-NEXT:    lvx v3, 0, r4
112; P8LE-NEXT:    vperm v2, v2, v4, v3
113; P8LE-NEXT:    blr
114;
115; P8BE-LABEL: s2v_test2:
116; P8BE:       # %bb.0: # %entry
117; P8BE-NEXT:    addis r4, r2, .LCPI1_0@toc@ha
118; P8BE-NEXT:    addi r3, r3, 4
119; P8BE-NEXT:    addi r4, r4, .LCPI1_0@toc@l
120; P8BE-NEXT:    lxsiwzx v4, 0, r3
121; P8BE-NEXT:    lxvw4x v3, 0, r4
122; P8BE-NEXT:    vperm v2, v4, v2, v3
123; P8BE-NEXT:    blr
124;
125; P9-AIX-LABEL: s2v_test2:
126; P9-AIX:       # %bb.0: # %entry
127; P9-AIX-NEXT:    lwz r3, 4(r3)
128; P9-AIX-NEXT:    mtfprwz f0, r3
129; P9-AIX-NEXT:    xxinsertw v2, vs0, 0
130; P9-AIX-NEXT:    blr
131;
132; P8-AIX-64-LABEL: s2v_test2:
133; P8-AIX-64:       # %bb.0: # %entry
134; P8-AIX-64-NEXT:    ld r4, L..C1(r2) # %const.0
135; P8-AIX-64-NEXT:    addi r3, r3, 4
136; P8-AIX-64-NEXT:    lxsiwzx v3, 0, r3
137; P8-AIX-64-NEXT:    lxvw4x v4, 0, r4
138; P8-AIX-64-NEXT:    vperm v2, v3, v2, v4
139; P8-AIX-64-NEXT:    blr
140;
141; P8-AIX-32-LABEL: s2v_test2:
142; P8-AIX-32:       # %bb.0: # %entry
143; P8-AIX-32-NEXT:    lwz r3, 4(r3)
144; P8-AIX-32-NEXT:    lwz r4, L..C1(r2) # %const.0
145; P8-AIX-32-NEXT:    stw r3, -16(r1)
146; P8-AIX-32-NEXT:    addi r3, r1, -16
147; P8-AIX-32-NEXT:    lxvw4x v3, 0, r4
148; P8-AIX-32-NEXT:    lxvw4x v4, 0, r3
149; P8-AIX-32-NEXT:    vperm v2, v4, v2, v3
150; P8-AIX-32-NEXT:    blr
151entry:
152  %arrayidx = getelementptr inbounds i32, i32* %int32, i64 1
153  %0 = load i32, i32* %arrayidx, align 4
154  %vecins = insertelement <4 x i32> %vec, i32 %0, i32 0
155  ret <4 x i32> %vecins
156}
157
158; Function Attrs: norecurse nounwind readonly
159define <4 x i32> @s2v_test3(i32* nocapture readonly %int32, <4 x i32> %vec, i32 signext %Idx)  {
160; P9LE-LABEL: s2v_test3:
161; P9LE:       # %bb.0: # %entry
162; P9LE-NEXT:    sldi r4, r7, 2
163; P9LE-NEXT:    lwzx r3, r3, r4
164; P9LE-NEXT:    mtfprwz f0, r3
165; P9LE-NEXT:    xxinsertw v2, vs0, 12
166; P9LE-NEXT:    blr
167;
168; P9BE-LABEL: s2v_test3:
169; P9BE:       # %bb.0: # %entry
170; P9BE-NEXT:    sldi r4, r7, 2
171; P9BE-NEXT:    lwzx r3, r3, r4
172; P9BE-NEXT:    mtfprwz f0, r3
173; P9BE-NEXT:    xxinsertw v2, vs0, 0
174; P9BE-NEXT:    blr
175;
176; P8LE-LABEL: s2v_test3:
177; P8LE:       # %bb.0: # %entry
178; P8LE-NEXT:    addis r4, r2, .LCPI2_0@toc@ha
179; P8LE-NEXT:    sldi r5, r7, 2
180; P8LE-NEXT:    addi r4, r4, .LCPI2_0@toc@l
181; P8LE-NEXT:    lxsiwzx v3, r3, r5
182; P8LE-NEXT:    lvx v4, 0, r4
183; P8LE-NEXT:    vperm v2, v2, v3, v4
184; P8LE-NEXT:    blr
185;
186; P8BE-LABEL: s2v_test3:
187; P8BE:       # %bb.0: # %entry
188; P8BE-NEXT:    addis r4, r2, .LCPI2_0@toc@ha
189; P8BE-NEXT:    sldi r5, r7, 2
190; P8BE-NEXT:    addi r4, r4, .LCPI2_0@toc@l
191; P8BE-NEXT:    lxsiwzx v3, r3, r5
192; P8BE-NEXT:    lxvw4x v4, 0, r4
193; P8BE-NEXT:    vperm v2, v3, v2, v4
194; P8BE-NEXT:    blr
195;
196; P9-AIX-64-LABEL: s2v_test3:
197; P9-AIX-64:       # %bb.0: # %entry
198; P9-AIX-64-NEXT:    sldi r4, r4, 2
199; P9-AIX-64-NEXT:    lwzx r3, r3, r4
200; P9-AIX-64-NEXT:    mtfprwz f0, r3
201; P9-AIX-64-NEXT:    xxinsertw v2, vs0, 0
202; P9-AIX-64-NEXT:    blr
203;
204; P9-AIX-32-LABEL: s2v_test3:
205; P9-AIX-32:       # %bb.0: # %entry
206; P9-AIX-32-NEXT:    slwi r4, r4, 2
207; P9-AIX-32-NEXT:    lwzx r3, r3, r4
208; P9-AIX-32-NEXT:    mtfprwz f0, r3
209; P9-AIX-32-NEXT:    xxinsertw v2, vs0, 0
210; P9-AIX-32-NEXT:    blr
211;
212; P8-AIX-64-LABEL: s2v_test3:
213; P8-AIX-64:       # %bb.0: # %entry
214; P8-AIX-64-NEXT:    ld r5, L..C2(r2) # %const.0
215; P8-AIX-64-NEXT:    sldi r4, r4, 2
216; P8-AIX-64-NEXT:    lxsiwzx v3, r3, r4
217; P8-AIX-64-NEXT:    lxvw4x v4, 0, r5
218; P8-AIX-64-NEXT:    vperm v2, v3, v2, v4
219; P8-AIX-64-NEXT:    blr
220;
221; P8-AIX-32-LABEL: s2v_test3:
222; P8-AIX-32:       # %bb.0: # %entry
223; P8-AIX-32-NEXT:    slwi r4, r4, 2
224; P8-AIX-32-NEXT:    lwzx r3, r3, r4
225; P8-AIX-32-NEXT:    lwz r4, L..C2(r2) # %const.0
226; P8-AIX-32-NEXT:    stw r3, -16(r1)
227; P8-AIX-32-NEXT:    addi r3, r1, -16
228; P8-AIX-32-NEXT:    lxvw4x v3, 0, r4
229; P8-AIX-32-NEXT:    lxvw4x v4, 0, r3
230; P8-AIX-32-NEXT:    vperm v2, v4, v2, v3
231; P8-AIX-32-NEXT:    blr
232entry:
233  %idxprom = sext i32 %Idx to i64
234  %arrayidx = getelementptr inbounds i32, i32* %int32, i64 %idxprom
235  %0 = load i32, i32* %arrayidx, align 4
236  %vecins = insertelement <4 x i32> %vec, i32 %0, i32 0
237  ret <4 x i32> %vecins
238}
239
240; Function Attrs: norecurse nounwind readonly
241define <4 x i32> @s2v_test4(i32* nocapture readonly %int32, <4 x i32> %vec)  {
242; P9LE-LABEL: s2v_test4:
243; P9LE:       # %bb.0: # %entry
244; P9LE-NEXT:    lwz r3, 4(r3)
245; P9LE-NEXT:    mtfprwz f0, r3
246; P9LE-NEXT:    xxinsertw v2, vs0, 12
247; P9LE-NEXT:    blr
248;
249; P9BE-LABEL: s2v_test4:
250; P9BE:       # %bb.0: # %entry
251; P9BE-NEXT:    lwz r3, 4(r3)
252; P9BE-NEXT:    mtfprwz f0, r3
253; P9BE-NEXT:    xxinsertw v2, vs0, 0
254; P9BE-NEXT:    blr
255;
256; P8LE-LABEL: s2v_test4:
257; P8LE:       # %bb.0: # %entry
258; P8LE-NEXT:    addis r4, r2, .LCPI3_0@toc@ha
259; P8LE-NEXT:    addi r3, r3, 4
260; P8LE-NEXT:    addi r4, r4, .LCPI3_0@toc@l
261; P8LE-NEXT:    lxsiwzx v4, 0, r3
262; P8LE-NEXT:    lvx v3, 0, r4
263; P8LE-NEXT:    vperm v2, v2, v4, v3
264; P8LE-NEXT:    blr
265;
266; P8BE-LABEL: s2v_test4:
267; P8BE:       # %bb.0: # %entry
268; P8BE-NEXT:    addis r4, r2, .LCPI3_0@toc@ha
269; P8BE-NEXT:    addi r3, r3, 4
270; P8BE-NEXT:    addi r4, r4, .LCPI3_0@toc@l
271; P8BE-NEXT:    lxsiwzx v4, 0, r3
272; P8BE-NEXT:    lxvw4x v3, 0, r4
273; P8BE-NEXT:    vperm v2, v4, v2, v3
274; P8BE-NEXT:    blr
275;
276; P9-AIX-LABEL: s2v_test4:
277; P9-AIX:       # %bb.0: # %entry
278; P9-AIX-NEXT:    lwz r3, 4(r3)
279; P9-AIX-NEXT:    mtfprwz f0, r3
280; P9-AIX-NEXT:    xxinsertw v2, vs0, 0
281; P9-AIX-NEXT:    blr
282;
283; P8-AIX-64-LABEL: s2v_test4:
284; P8-AIX-64:       # %bb.0: # %entry
285; P8-AIX-64-NEXT:    ld r4, L..C3(r2) # %const.0
286; P8-AIX-64-NEXT:    addi r3, r3, 4
287; P8-AIX-64-NEXT:    lxsiwzx v3, 0, r3
288; P8-AIX-64-NEXT:    lxvw4x v4, 0, r4
289; P8-AIX-64-NEXT:    vperm v2, v3, v2, v4
290; P8-AIX-64-NEXT:    blr
291;
292; P8-AIX-32-LABEL: s2v_test4:
293; P8-AIX-32:       # %bb.0: # %entry
294; P8-AIX-32-NEXT:    lwz r3, 4(r3)
295; P8-AIX-32-NEXT:    lwz r4, L..C3(r2) # %const.0
296; P8-AIX-32-NEXT:    stw r3, -16(r1)
297; P8-AIX-32-NEXT:    addi r3, r1, -16
298; P8-AIX-32-NEXT:    lxvw4x v3, 0, r4
299; P8-AIX-32-NEXT:    lxvw4x v4, 0, r3
300; P8-AIX-32-NEXT:    vperm v2, v4, v2, v3
301; P8-AIX-32-NEXT:    blr
302entry:
303  %arrayidx = getelementptr inbounds i32, i32* %int32, i64 1
304  %0 = load i32, i32* %arrayidx, align 4
305  %vecins = insertelement <4 x i32> %vec, i32 %0, i32 0
306  ret <4 x i32> %vecins
307}
308
309; Function Attrs: norecurse nounwind readonly
310define <4 x i32> @s2v_test5(<4 x i32> %vec, i32* nocapture readonly %ptr1)  {
311; P9LE-LABEL: s2v_test5:
312; P9LE:       # %bb.0: # %entry
313; P9LE-NEXT:    lwz r3, 0(r5)
314; P9LE-NEXT:    mtfprwz f0, r3
315; P9LE-NEXT:    xxinsertw v2, vs0, 12
316; P9LE-NEXT:    blr
317;
318; P9BE-LABEL: s2v_test5:
319; P9BE:       # %bb.0: # %entry
320; P9BE-NEXT:    lwz r3, 0(r5)
321; P9BE-NEXT:    mtfprwz f0, r3
322; P9BE-NEXT:    xxinsertw v2, vs0, 0
323; P9BE-NEXT:    blr
324;
325; P8LE-LABEL: s2v_test5:
326; P8LE:       # %bb.0: # %entry
327; P8LE-NEXT:    addis r3, r2, .LCPI4_0@toc@ha
328; P8LE-NEXT:    lxsiwzx v4, 0, r5
329; P8LE-NEXT:    addi r3, r3, .LCPI4_0@toc@l
330; P8LE-NEXT:    lvx v3, 0, r3
331; P8LE-NEXT:    vperm v2, v2, v4, v3
332; P8LE-NEXT:    blr
333;
334; P8BE-LABEL: s2v_test5:
335; P8BE:       # %bb.0: # %entry
336; P8BE-NEXT:    addis r3, r2, .LCPI4_0@toc@ha
337; P8BE-NEXT:    lxsiwzx v4, 0, r5
338; P8BE-NEXT:    addi r3, r3, .LCPI4_0@toc@l
339; P8BE-NEXT:    lxvw4x v3, 0, r3
340; P8BE-NEXT:    vperm v2, v4, v2, v3
341; P8BE-NEXT:    blr
342;
343; P9-AIX-LABEL: s2v_test5:
344; P9-AIX:       # %bb.0: # %entry
345; P9-AIX-NEXT:    lwz r3, 0(r3)
346; P9-AIX-NEXT:    mtfprwz f0, r3
347; P9-AIX-NEXT:    xxinsertw v2, vs0, 0
348; P9-AIX-NEXT:    blr
349;
350; P8-AIX-64-LABEL: s2v_test5:
351; P8-AIX-64:       # %bb.0: # %entry
352; P8-AIX-64-NEXT:    ld r4, L..C4(r2) # %const.0
353; P8-AIX-64-NEXT:    lxsiwzx v3, 0, r3
354; P8-AIX-64-NEXT:    lxvw4x v4, 0, r4
355; P8-AIX-64-NEXT:    vperm v2, v3, v2, v4
356; P8-AIX-64-NEXT:    blr
357;
358; P8-AIX-32-LABEL: s2v_test5:
359; P8-AIX-32:       # %bb.0: # %entry
360; P8-AIX-32-NEXT:    lwz r3, 0(r3)
361; P8-AIX-32-NEXT:    lwz r4, L..C4(r2) # %const.0
362; P8-AIX-32-NEXT:    stw r3, -16(r1)
363; P8-AIX-32-NEXT:    addi r3, r1, -16
364; P8-AIX-32-NEXT:    lxvw4x v3, 0, r4
365; P8-AIX-32-NEXT:    lxvw4x v4, 0, r3
366; P8-AIX-32-NEXT:    vperm v2, v4, v2, v3
367; P8-AIX-32-NEXT:    blr
368entry:
369  %0 = load i32, i32* %ptr1, align 4
370  %vecins = insertelement <4 x i32> %vec, i32 %0, i32 0
371  ret <4 x i32> %vecins
372}
373
374; Function Attrs: norecurse nounwind readonly
375define <4 x float> @s2v_test_f1(float* nocapture readonly %f64, <4 x float> %vec)  {
376; P9LE-LABEL: s2v_test_f1:
377; P9LE:       # %bb.0: # %entry
378; P9LE-NEXT:    lwz r3, 0(r3)
379; P9LE-NEXT:    mtfprwz f0, r3
380; P9LE-NEXT:    xxinsertw v2, vs0, 12
381; P9LE-NEXT:    blr
382;
383; P9BE-LABEL: s2v_test_f1:
384; P9BE:       # %bb.0: # %entry
385; P9BE-NEXT:    lwz r3, 0(r3)
386; P9BE-NEXT:    mtfprwz f0, r3
387; P9BE-NEXT:    xxinsertw v2, vs0, 0
388; P9BE-NEXT:    blr
389;
390; P8LE-LABEL: s2v_test_f1:
391; P8LE:       # %bb.0: # %entry
392; P8LE-NEXT:    addis r4, r2, .LCPI5_0@toc@ha
393; P8LE-NEXT:    lxsiwzx v4, 0, r3
394; P8LE-NEXT:    addi r4, r4, .LCPI5_0@toc@l
395; P8LE-NEXT:    lvx v3, 0, r4
396; P8LE-NEXT:    vperm v2, v2, v4, v3
397; P8LE-NEXT:    blr
398;
399; P8BE-LABEL: s2v_test_f1:
400; P8BE:       # %bb.0: # %entry
401; P8BE-NEXT:    addis r4, r2, .LCPI5_0@toc@ha
402; P8BE-NEXT:    lxsiwzx v4, 0, r3
403; P8BE-NEXT:    addi r4, r4, .LCPI5_0@toc@l
404; P8BE-NEXT:    lxvw4x v3, 0, r4
405; P8BE-NEXT:    vperm v2, v4, v2, v3
406; P8BE-NEXT:    blr
407;
408; P9-AIX-LABEL: s2v_test_f1:
409; P9-AIX:       # %bb.0: # %entry
410; P9-AIX-NEXT:    lwz r3, 0(r3)
411; P9-AIX-NEXT:    mtfprwz f0, r3
412; P9-AIX-NEXT:    xxinsertw v2, vs0, 0
413; P9-AIX-NEXT:    blr
414;
415; P8-AIX-64-LABEL: s2v_test_f1:
416; P8-AIX-64:       # %bb.0: # %entry
417; P8-AIX-64-NEXT:    ld r4, L..C5(r2) # %const.0
418; P8-AIX-64-NEXT:    lxsiwzx v3, 0, r3
419; P8-AIX-64-NEXT:    lxvw4x v4, 0, r4
420; P8-AIX-64-NEXT:    vperm v2, v3, v2, v4
421; P8-AIX-64-NEXT:    blr
422;
423; P8-AIX-32-LABEL: s2v_test_f1:
424; P8-AIX-32:       # %bb.0: # %entry
425; P8-AIX-32-NEXT:    lwz r4, L..C5(r2) # %const.0
426; P8-AIX-32-NEXT:    lxsiwzx v3, 0, r3
427; P8-AIX-32-NEXT:    lxvw4x v4, 0, r4
428; P8-AIX-32-NEXT:    vperm v2, v3, v2, v4
429; P8-AIX-32-NEXT:    blr
430entry:
431  %0 = load float, float* %f64, align 4
432  %vecins = insertelement <4 x float> %vec, float %0, i32 0
433  ret <4 x float> %vecins
434}
435
436; Function Attrs: norecurse nounwind readonly
437define <2 x float> @s2v_test_f2(float* nocapture readonly %f64, <2 x float> %vec)  {
438; P9LE-LABEL: s2v_test_f2:
439; P9LE:       # %bb.0: # %entry
440; P9LE-NEXT:    addi r3, r3, 4
441; P9LE-NEXT:    xxmrglw vs1, v2, v2
442; P9LE-NEXT:    lfiwzx f0, 0, r3
443; P9LE-NEXT:    xxmrghw v2, vs1, vs0
444; P9LE-NEXT:    blr
445;
446; P9BE-LABEL: s2v_test_f2:
447; P9BE:       # %bb.0: # %entry
448; P9BE-NEXT:    addi r3, r3, 4
449; P9BE-NEXT:    lxsiwzx v3, 0, r3
450; P9BE-NEXT:    vmrgow v2, v3, v2
451; P9BE-NEXT:    blr
452;
453; P8LE-LABEL: s2v_test_f2:
454; P8LE:       # %bb.0: # %entry
455; P8LE-NEXT:    addi r3, r3, 4
456; P8LE-NEXT:    xxmrglw vs1, v2, v2
457; P8LE-NEXT:    lfiwzx f0, 0, r3
458; P8LE-NEXT:    xxmrghw v2, vs1, vs0
459; P8LE-NEXT:    blr
460;
461; P8BE-LABEL: s2v_test_f2:
462; P8BE:       # %bb.0: # %entry
463; P8BE-NEXT:    addi r3, r3, 4
464; P8BE-NEXT:    lxsiwzx v3, 0, r3
465; P8BE-NEXT:    vmrgow v2, v3, v2
466; P8BE-NEXT:    blr
467;
468; AIX-LABEL: s2v_test_f2:
469; AIX:       # %bb.0: # %entry
470; AIX-NEXT:    addi r3, r3, 4
471; AIX-NEXT:    lxsiwzx v3, 0, r3
472; AIX-NEXT:    vmrgow v2, v3, v2
473; AIX-NEXT:    blr
474entry:
475  %arrayidx = getelementptr inbounds float, float* %f64, i64 1
476  %0 = load float, float* %arrayidx, align 8
477  %vecins = insertelement <2 x float> %vec, float %0, i32 0
478  ret <2 x float> %vecins
479}
480
481; Function Attrs: norecurse nounwind readonly
482define <2 x float> @s2v_test_f3(float* nocapture readonly %f64, <2 x float> %vec, i32 signext %Idx)  {
483; P9LE-LABEL: s2v_test_f3:
484; P9LE:       # %bb.0: # %entry
485; P9LE-NEXT:    sldi r4, r7, 2
486; P9LE-NEXT:    xxmrglw vs1, v2, v2
487; P9LE-NEXT:    lfiwzx f0, r3, r4
488; P9LE-NEXT:    xxmrghw v2, vs1, vs0
489; P9LE-NEXT:    blr
490;
491; P9BE-LABEL: s2v_test_f3:
492; P9BE:       # %bb.0: # %entry
493; P9BE-NEXT:    sldi r4, r7, 2
494; P9BE-NEXT:    lxsiwzx v3, r3, r4
495; P9BE-NEXT:    vmrgow v2, v3, v2
496; P9BE-NEXT:    blr
497;
498; P8LE-LABEL: s2v_test_f3:
499; P8LE:       # %bb.0: # %entry
500; P8LE-NEXT:    sldi r4, r7, 2
501; P8LE-NEXT:    xxmrglw vs1, v2, v2
502; P8LE-NEXT:    lfiwzx f0, r3, r4
503; P8LE-NEXT:    xxmrghw v2, vs1, vs0
504; P8LE-NEXT:    blr
505;
506; P8BE-LABEL: s2v_test_f3:
507; P8BE:       # %bb.0: # %entry
508; P8BE-NEXT:    sldi r4, r7, 2
509; P8BE-NEXT:    lxsiwzx v3, r3, r4
510; P8BE-NEXT:    vmrgow v2, v3, v2
511; P8BE-NEXT:    blr
512;
513; P9-AIX-64-LABEL: s2v_test_f3:
514; P9-AIX-64:       # %bb.0: # %entry
515; P9-AIX-64-NEXT:    sldi r4, r4, 2
516; P9-AIX-64-NEXT:    lxsiwzx v3, r3, r4
517; P9-AIX-64-NEXT:    vmrgow v2, v3, v2
518; P9-AIX-64-NEXT:    blr
519;
520; P9-AIX-32-LABEL: s2v_test_f3:
521; P9-AIX-32:       # %bb.0: # %entry
522; P9-AIX-32-NEXT:    slwi r4, r4, 2
523; P9-AIX-32-NEXT:    lxsiwzx v3, r3, r4
524; P9-AIX-32-NEXT:    vmrgow v2, v3, v2
525; P9-AIX-32-NEXT:    blr
526;
527; P8-AIX-64-LABEL: s2v_test_f3:
528; P8-AIX-64:       # %bb.0: # %entry
529; P8-AIX-64-NEXT:    sldi r4, r4, 2
530; P8-AIX-64-NEXT:    lxsiwzx v3, r3, r4
531; P8-AIX-64-NEXT:    vmrgow v2, v3, v2
532; P8-AIX-64-NEXT:    blr
533;
534; P8-AIX-32-LABEL: s2v_test_f3:
535; P8-AIX-32:       # %bb.0: # %entry
536; P8-AIX-32-NEXT:    slwi r4, r4, 2
537; P8-AIX-32-NEXT:    lxsiwzx v3, r3, r4
538; P8-AIX-32-NEXT:    vmrgow v2, v3, v2
539; P8-AIX-32-NEXT:    blr
540entry:
541  %idxprom = sext i32 %Idx to i64
542  %arrayidx = getelementptr inbounds float, float* %f64, i64 %idxprom
543  %0 = load float, float* %arrayidx, align 8
544  %vecins = insertelement <2 x float> %vec, float %0, i32 0
545  ret <2 x float> %vecins
546}
547
548; Function Attrs: norecurse nounwind readonly
549define <2 x float> @s2v_test_f4(float* nocapture readonly %f64, <2 x float> %vec)  {
550; P9LE-LABEL: s2v_test_f4:
551; P9LE:       # %bb.0: # %entry
552; P9LE-NEXT:    addi r3, r3, 4
553; P9LE-NEXT:    xxmrglw vs1, v2, v2
554; P9LE-NEXT:    lfiwzx f0, 0, r3
555; P9LE-NEXT:    xxmrghw v2, vs1, vs0
556; P9LE-NEXT:    blr
557;
558; P9BE-LABEL: s2v_test_f4:
559; P9BE:       # %bb.0: # %entry
560; P9BE-NEXT:    addi r3, r3, 4
561; P9BE-NEXT:    lxsiwzx v3, 0, r3
562; P9BE-NEXT:    vmrgow v2, v3, v2
563; P9BE-NEXT:    blr
564;
565; P8LE-LABEL: s2v_test_f4:
566; P8LE:       # %bb.0: # %entry
567; P8LE-NEXT:    addi r3, r3, 4
568; P8LE-NEXT:    xxmrglw vs1, v2, v2
569; P8LE-NEXT:    lfiwzx f0, 0, r3
570; P8LE-NEXT:    xxmrghw v2, vs1, vs0
571; P8LE-NEXT:    blr
572;
573; P8BE-LABEL: s2v_test_f4:
574; P8BE:       # %bb.0: # %entry
575; P8BE-NEXT:    addi r3, r3, 4
576; P8BE-NEXT:    lxsiwzx v3, 0, r3
577; P8BE-NEXT:    vmrgow v2, v3, v2
578; P8BE-NEXT:    blr
579;
580; AIX-LABEL: s2v_test_f4:
581; AIX:       # %bb.0: # %entry
582; AIX-NEXT:    addi r3, r3, 4
583; AIX-NEXT:    lxsiwzx v3, 0, r3
584; AIX-NEXT:    vmrgow v2, v3, v2
585; AIX-NEXT:    blr
586entry:
587  %arrayidx = getelementptr inbounds float, float* %f64, i64 1
588  %0 = load float, float* %arrayidx, align 8
589  %vecins = insertelement <2 x float> %vec, float %0, i32 0
590  ret <2 x float> %vecins
591}
592
593; Function Attrs: norecurse nounwind readonly
594define <2 x float> @s2v_test_f5(<2 x float> %vec, float* nocapture readonly %ptr1)  {
595; P9LE-LABEL: s2v_test_f5:
596; P9LE:       # %bb.0: # %entry
597; P9LE-NEXT:    lfiwzx f0, 0, r5
598; P9LE-NEXT:    xxmrglw vs1, v2, v2
599; P9LE-NEXT:    xxmrghw v2, vs1, vs0
600; P9LE-NEXT:    blr
601;
602; P9BE-LABEL: s2v_test_f5:
603; P9BE:       # %bb.0: # %entry
604; P9BE-NEXT:    lxsiwzx v3, 0, r5
605; P9BE-NEXT:    vmrgow v2, v3, v2
606; P9BE-NEXT:    blr
607;
608; P8LE-LABEL: s2v_test_f5:
609; P8LE:       # %bb.0: # %entry
610; P8LE-NEXT:    lfiwzx f0, 0, r5
611; P8LE-NEXT:    xxmrglw vs1, v2, v2
612; P8LE-NEXT:    xxmrghw v2, vs1, vs0
613; P8LE-NEXT:    blr
614;
615; P8BE-LABEL: s2v_test_f5:
616; P8BE:       # %bb.0: # %entry
617; P8BE-NEXT:    lxsiwzx v3, 0, r5
618; P8BE-NEXT:    vmrgow v2, v3, v2
619; P8BE-NEXT:    blr
620;
621; AIX-LABEL: s2v_test_f5:
622; AIX:       # %bb.0: # %entry
623; AIX-NEXT:    lxsiwzx v3, 0, r3
624; AIX-NEXT:    vmrgow v2, v3, v2
625; AIX-NEXT:    blr
626entry:
627  %0 = load float, float* %ptr1, align 8
628  %vecins = insertelement <2 x float> %vec, float %0, i32 0
629  ret <2 x float> %vecins
630}
631
632