1; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
2; RUN:    -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9LE
3; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
4; RUN:    -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9BE
5; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
6; RUN:    -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8LE
7; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
8; RUN:    -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8BE
9
10; Function Attrs: norecurse nounwind readonly
11define <4 x i32> @s2v_test1(i32* nocapture readonly %int32, <4 x i32> %vec)  {
12; P8LE-LABEL: s2v_test1:
13; P8LE:       # %bb.0: # %entry
14; P8LE-NEXT:    addis r4, r2, .LCPI0_0@toc@ha
15; P8LE-NEXT:    lxsiwzx v4, 0, r3
16; P8LE-NEXT:    addi r4, r4, .LCPI0_0@toc@l
17; P8LE-NEXT:    lvx v3, 0, r4
18; P8LE-NEXT:    vperm v2, v2, v4, v3
19; P8LE-NEXT:    blr
20
21; P8BE-LABEL: s2v_test1:
22; P8BE:       # %bb.0: # %entry
23; P8BE:         lfiwzx f0, 0, r3
24; P8BE-NEXT:    xxsldwi vs0, f0, f0, 1
25; P8BE:         xxsldwi vs0, v2, vs0, 1
26; P8BE:         xxsldwi v2, vs0, vs0, 3
27; P8BE-NEXT:    blr
28entry:
29  %0 = load i32, i32* %int32, align 4
30  %vecins = insertelement <4 x i32> %vec, i32 %0, i32 0
31  ret <4 x i32> %vecins
32}
33
34; Function Attrs: norecurse nounwind readonly
35define <4 x i32> @s2v_test2(i32* nocapture readonly %int32, <4 x i32> %vec)  {
36; P8LE-LABEL: s2v_test2:
37; P8LE:       # %bb.0: # %entry
38; P8LE-NEXT:    addis r4, r2, .LCPI1_0@toc@ha
39; P8LE-NEXT:    addi r3, r3, 4
40; P8LE-NEXT:    addi r4, r4, .LCPI1_0@toc@l
41; P8LE-NEXT:    lxsiwzx v4, 0, r3
42; P8LE-NEXT:    lvx v3, 0, r4
43; P8LE-NEXT:    vperm v2, v2, v4, v3
44; P8LE-NEXT:    blr
45
46; P8BE-LABEL: s2v_test2:
47; P8BE:       # %bb.0: # %entry
48; P8BE:         addi r3, r3, 4
49; P8BE:         lfiwzx f0, 0, r3
50; P8BE-NEXT:    xxsldwi vs0, f0, f0, 1
51; P8BE:         xxsldwi vs0, v2, vs0, 1
52; P8BE:         xxsldwi v2, vs0, vs0, 3
53; P8BE-NEXT:    blr
54entry:
55  %arrayidx = getelementptr inbounds i32, i32* %int32, i64 1
56  %0 = load i32, i32* %arrayidx, align 4
57  %vecins = insertelement <4 x i32> %vec, i32 %0, i32 0
58  ret <4 x i32> %vecins
59}
60
61; Function Attrs: norecurse nounwind readonly
62define <4 x i32> @s2v_test3(i32* nocapture readonly %int32, <4 x i32> %vec, i32 signext %Idx)  {
63; P8LE-LABEL: s2v_test3:
64; P8LE:       # %bb.0: # %entry
65; P8LE-NEXT:    addis r4, r2, .LCPI2_0@toc@ha
66; P8LE-NEXT:    sldi r5, r7, 2
67; P8LE-NEXT:    addi r4, r4, .LCPI2_0@toc@l
68; P8LE-NEXT:    lxsiwzx v3, r3, r5
69; P8LE-NEXT:    lvx v4, 0, r4
70; P8LE-NEXT:    vperm v2, v2, v3, v4
71; P8LE-NEXT:    blr
72
73; P8BE-LABEL: s2v_test3:
74; P8BE:       # %bb.0: # %entry
75; P8BE:         sldi r4, r7, 2
76; P8BE:         lfiwzx f0, r3, r4
77; P8BE-NEXT:    xxsldwi vs0, f0, f0, 1
78; P8BE:         xxsldwi vs0, v2, vs0, 1
79; P8BE:         xxsldwi v2, vs0, vs0, 3
80; P8BE-NEXT:    blr
81entry:
82  %idxprom = sext i32 %Idx to i64
83  %arrayidx = getelementptr inbounds i32, i32* %int32, i64 %idxprom
84  %0 = load i32, i32* %arrayidx, align 4
85  %vecins = insertelement <4 x i32> %vec, i32 %0, i32 0
86  ret <4 x i32> %vecins
87}
88
89; Function Attrs: norecurse nounwind readonly
90define <4 x i32> @s2v_test4(i32* nocapture readonly %int32, <4 x i32> %vec)  {
91; P8LE-LABEL: s2v_test4:
92; P8LE:       # %bb.0: # %entry
93; P8LE-NEXT:    addis r4, r2, .LCPI3_0@toc@ha
94; P8LE-NEXT:    addi r3, r3, 4
95; P8LE-NEXT:    addi r4, r4, .LCPI3_0@toc@l
96; P8LE-NEXT:    lxsiwzx v4, 0, r3
97; P8LE-NEXT:    lvx v3, 0, r4
98; P8LE-NEXT:    vperm v2, v2, v4, v3
99; P8LE-NEXT:    blr
100
101; P8BE-LABEL: s2v_test4:
102; P8BE:       # %bb.0: # %entry
103; P8BE:         addi r3, r3, 4
104; P8BE:         lfiwzx f0, 0, r3
105; P8BE-NEXT:    xxsldwi vs0, f0, f0, 1
106; P8BE:         xxsldwi vs0, v2, vs0, 1
107; P8BE:         xxsldwi v2, vs0, vs0, 3
108; P8BE-NEXT:    blr
109entry:
110  %arrayidx = getelementptr inbounds i32, i32* %int32, i64 1
111  %0 = load i32, i32* %arrayidx, align 4
112  %vecins = insertelement <4 x i32> %vec, i32 %0, i32 0
113  ret <4 x i32> %vecins
114}
115
116; Function Attrs: norecurse nounwind readonly
117define <4 x i32> @s2v_test5(<4 x i32> %vec, i32* nocapture readonly %ptr1)  {
118; P8LE-LABEL: s2v_test5:
119; P8LE:       # %bb.0: # %entry
120; P8LE-NEXT:    addis r3, r2, .LCPI4_0@toc@ha
121; P8LE-NEXT:    lxsiwzx v4, 0, r5
122; P8LE-NEXT:    addi r3, r3, .LCPI4_0@toc@l
123; P8LE-NEXT:    lvx v3, 0, r3
124; P8LE-NEXT:    vperm v2, v2, v4, v3
125; P8LE-NEXT:    blr
126
127; P8BE-LABEL: s2v_test5:
128; P8BE:       # %bb.0: # %entry
129; P8BE:         lfiwzx f0, 0, r5
130; P8BE-NEXT:    xxsldwi vs0, f0, f0, 1
131; P8BE:         xxsldwi vs0, v2, vs0, 1
132; P8BE:         xxsldwi v2, vs0, vs0, 3
133; P8BE-NEXT:    blr
134entry:
135  %0 = load i32, i32* %ptr1, align 4
136  %vecins = insertelement <4 x i32> %vec, i32 %0, i32 0
137  ret <4 x i32> %vecins
138}
139
140; Function Attrs: norecurse nounwind readonly
141define <4 x float> @s2v_test_f1(float* nocapture readonly %f64, <4 x float> %vec)  {
142; P8LE-LABEL: s2v_test_f1:
143; P8LE:       # %bb.0: # %entry
144; P8LE-NEXT:    addis r4, r2, .LCPI5_0@toc@ha
145; P8LE-NEXT:    lxsiwzx v4, 0, r3
146; P8LE-NEXT:    addi r4, r4, .LCPI5_0@toc@l
147; P8LE-NEXT:    lvx v3, 0, r4
148; P8LE-NEXT:    vperm v2, v2, v4, v3
149; P8LE-NEXT:    blr
150
151; P8BE-LABEL: s2v_test_f1:
152; P8BE:       # %bb.0: # %entry
153; P8BE:         lfiwzx f0, 0, r3
154; P8BE-NEXT:    xxsldwi vs0, f0, f0, 1
155; P8BE:         xxsldwi vs0, v2, vs0, 1
156; P8BE:         xxsldwi v2, vs0, vs0, 3
157; P8BE-NEXT:    blr
158entry:
159  %0 = load float, float* %f64, align 4
160  %vecins = insertelement <4 x float> %vec, float %0, i32 0
161  ret <4 x float> %vecins
162}
163
164; Function Attrs: norecurse nounwind readonly
165define <2 x float> @s2v_test_f2(float* nocapture readonly %f64, <2 x float> %vec)  {
166; P9LE-LABEL: s2v_test_f2:
167; P9LE:       # %bb.0: # %entry
168; P9LE-NEXT:    addi r3, r3, 4
169; P9LE-NEXT:    lxsiwzx v3, 0, r3
170; P9LE-NEXT:    vmrglw v2, v2, v2
171; P9LE-NEXT:    vmrghw v2, v2, v3
172; P9LE-NEXT:    blr
173
174; P9BE-LABEL: s2v_test_f2:
175; P9BE:       # %bb.0: # %entry
176; P9BE:       addi r3, r3, 4
177; P9BE-DAG:   xxspltw v2, v2, 1
178; P9BE-DAG:   lfiwzx f0, 0, r3
179; P9BE-NEXT:  xxsldwi v3, f0, f0, 1
180; P9BE:       vmrghw v2, v3, v2
181; P9BE-NEXT:  blr
182
183; P8LE-LABEL: s2v_test_f2:
184; P8LE:       # %bb.0: # %entry
185; P8LE-NEXT:    vmrglw v2, v2, v2
186; P8LE-NEXT:    addi r3, r3, 4
187; P8LE-NEXT:    lxsiwzx v3, 0, r3
188; P8LE-NEXT:    vmrghw v2, v2, v3
189; P8LE-NEXT:    blr
190
191; P8BE-LABEL: s2v_test_f2:
192; P8BE:       # %bb.0: # %entry
193; P8BE-NEXT:    addi r3, r3, 4
194; P8BE-NEXT:    xxspltw v2, v2, 1
195; P8BE-NEXT:    lfiwzx f0, 0, r3
196; P8BE-NEXT:    xxsldwi v3, f0, f0, 1
197; P8BE-NEXT:    vmrghw v2, v3, v2
198; P8BE-NEXT:    blr
199entry:
200  %arrayidx = getelementptr inbounds float, float* %f64, i64 1
201  %0 = load float, float* %arrayidx, align 8
202  %vecins = insertelement <2 x float> %vec, float %0, i32 0
203  ret <2 x float> %vecins
204}
205
206; Function Attrs: norecurse nounwind readonly
207define <2 x float> @s2v_test_f3(float* nocapture readonly %f64, <2 x float> %vec, i32 signext %Idx)  {
208; P9LE-LABEL: s2v_test_f3:
209; P9LE:       # %bb.0: # %entry
210; P9LE-NEXT:    sldi r4, r7, 2
211; P9LE-NEXT:    lxsiwzx v3, r3, r4
212; P9LE-NEXT:    vmrglw v2, v2, v2
213; P9LE-NEXT:    vmrghw v2, v2, v3
214; P9LE-NEXT:    blr
215
216; P9BE-LABEL: s2v_test_f3:
217; P9BE:       # %bb.0: # %entry
218; P9BE:         sldi r4, r7, 2
219; P9BE:         lfiwzx f0, r3, r4
220; P9BE-DAG:     xxspltw v2, v2, 1
221; P9BE-DAG:     xxsldwi v3, f0, f0, 1
222; P9BE:         vmrghw v2, v3, v2
223; P9BE-NEXT:    blr
224
225; P8LE-LABEL: s2v_test_f3:
226; P8LE:       # %bb.0: # %entry
227; P8LE-NEXT:    vmrglw v2, v2, v2
228; P8LE-NEXT:    sldi r4, r7, 2
229; P8LE-NEXT:    lxsiwzx v3, r3, r4
230; P8LE-NEXT:    vmrghw v2, v2, v3
231; P8LE-NEXT:    blr
232
233; P8BE-LABEL: s2v_test_f3:
234; P8BE:       # %bb.0: # %entry
235; P8BE-NEXT:    sldi r4, r7, 2
236; P8BE-NEXT:    xxspltw v2, v2, 1
237; P8BE-NEXT:    lfiwzx f0, r3, r4
238; P8BE-NEXT:    xxsldwi v3, f0, f0, 1
239; P8BE-NEXT:    vmrghw v2, v3, v2
240; P8BE-NEXT:    blr
241entry:
242  %idxprom = sext i32 %Idx to i64
243  %arrayidx = getelementptr inbounds float, float* %f64, i64 %idxprom
244  %0 = load float, float* %arrayidx, align 8
245  %vecins = insertelement <2 x float> %vec, float %0, i32 0
246  ret <2 x float> %vecins
247}
248
249; Function Attrs: norecurse nounwind readonly
250define <2 x float> @s2v_test_f4(float* nocapture readonly %f64, <2 x float> %vec)  {
251; P9LE-LABEL: s2v_test_f4:
252; P9LE:       # %bb.0: # %entry
253; P9LE-NEXT:    addi r3, r3, 4
254; P9LE-NEXT:    lxsiwzx v3, 0, r3
255; P9LE-NEXT:    vmrglw v2, v2, v2
256; P9LE-NEXT:    vmrghw v2, v2, v3
257; P9LE-NEXT:    blr
258
259; P9BE-LABEL: s2v_test_f4:
260; P9BE:       # %bb.0: # %entry
261; P9BE:         addi r3, r3, 4
262; P9BE:         lfiwzx f0, 0, r3
263; P9BE-DAG:     xxspltw v2, v2, 1
264; P9BE-DAG:     xxsldwi v3, f0, f0, 1
265; P9BE:         vmrghw v2, v3, v2
266; P9BE-NEXT:    blr
267
268; P8LE-LABEL: s2v_test_f4:
269; P8LE:       # %bb.0: # %entry
270; P8LE-NEXT:    vmrglw v2, v2, v2
271; P8LE-NEXT:    addi r3, r3, 4
272; P8LE-NEXT:    lxsiwzx v3, 0, r3
273; P8LE-NEXT:    vmrghw v2, v2, v3
274; P8LE-NEXT:    blr
275
276; P8BE-LABEL: s2v_test_f4:
277; P8BE:       # %bb.0: # %entry
278; P8BE-NEXT:    addi r3, r3, 4
279; P8BE-NEXT:    xxspltw v2, v2, 1
280; P8BE-NEXT:    lfiwzx f0, 0, r3
281; P8BE-NEXT:    xxsldwi v3, f0, f0, 1
282; P8BE-NEXT:    vmrghw v2, v3, v2
283; P8BE-NEXT:    blr
284entry:
285  %arrayidx = getelementptr inbounds float, float* %f64, i64 1
286  %0 = load float, float* %arrayidx, align 8
287  %vecins = insertelement <2 x float> %vec, float %0, i32 0
288  ret <2 x float> %vecins
289}
290
291; Function Attrs: norecurse nounwind readonly
292define <2 x float> @s2v_test_f5(<2 x float> %vec, float* nocapture readonly %ptr1)  {
293; P9LE-LABEL: s2v_test_f5:
294; P9LE:       # %bb.0: # %entry
295; P9LE-NEXT:    lxsiwzx v3, 0, r5
296; P9LE-NEXT:    vmrglw v2, v2, v2
297; P9LE-NEXT:    vmrghw v2, v2, v3
298; P9LE-NEXT:    blr
299
300; P9BE-LABEL: s2v_test_f5:
301; P9BE:       # %bb.0: # %entry
302; P9BE:         lfiwzx f0, 0, r5
303; P9BE:         xxspltw v2, v2, 1
304; P9BE-NEXT:    xxsldwi v3, f0, f0, 1
305; P9BE:         vmrghw v2, v3, v2
306; P9BE-NEXT:    blr
307
308; P8LE-LABEL: s2v_test_f5:
309; P8LE:       # %bb.0: # %entry
310; P8LE-NEXT:    vmrglw v2, v2, v2
311; P8LE-NEXT:    lxsiwzx v3, 0, r5
312; P8LE-NEXT:    vmrghw v2, v2, v3
313; P8LE-NEXT:    blr
314
315; P8BE-LABEL: s2v_test_f5:
316; P8BE:       # %bb.0: # %entry
317; P8BE-NEXT:    lfiwzx f0, 0, r5
318; P8BE-NEXT:    xxspltw v2, v2, 1
319; P8BE-NEXT:    xxsldwi v3, f0, f0, 1
320; P8BE-NEXT:    vmrghw v2, v3, v2
321; P8BE-NEXT:    blr
322entry:
323  %0 = load float, float* %ptr1, align 8
324  %vecins = insertelement <2 x float> %vec, float %0, i32 0
325  ret <2 x float> %vecins
326}
327
328