1; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
2; RUN:    -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9LE
3; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
4; RUN:    -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9BE
5; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
6; RUN:    -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8LE
7; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
8; RUN:    -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8BE
9
10define void @test_liwzx1(<1 x float>* %A, <1 x float>* %B, <1 x float>* %C) {
11; P9LE-LABEL: test_liwzx1:
12; P9LE:       # %bb.0:
13; P9LE-NEXT:    lfiwzx f0, 0, r3
14; P9LE-NEXT:    lfiwzx f1, 0, r4
15; P9LE-NEXT:    xxpermdi vs0, f0, f0, 2
16; P9LE-NEXT:    xxpermdi vs1, f1, f1, 2
17; P9LE-NEXT:    xvaddsp vs0, vs0, vs1
18; P9LE-NEXT:    xxsldwi vs0, vs0, vs0, 3
19; P9LE-NEXT:    xscvspdpn f0, vs0
20; P9LE-NEXT:    stfs f0, 0(r5)
21; P9LE-NEXT:    blr
22
23; P9BE-LABEL: test_liwzx1:
24; P9BE:       # %bb.0:
25; P9BE-NEXT:    lfiwzx f0, 0, r3
26; P9BE-NEXT:    lfiwzx f1, 0, r4
27; P9BE-NEXT:    xxsldwi vs0, f0, f0, 1
28; P9BE-NEXT:    xxsldwi vs1, f1, f1, 1
29; P9BE-NEXT:    xvaddsp vs0, vs0, vs1
30; P9BE-NEXT:    xscvspdpn f0, vs0
31; P9BE-NEXT:    stfs f0, 0(r5)
32; P9BE-NEXT:    blr
33
34; P8LE-LABEL: test_liwzx1:
35; P8LE:       # %bb.0:
36; P8LE-NEXT:    lfiwzx f0, 0, r3
37; P8LE-NEXT:    lfiwzx f1, 0, r4
38; P8LE-NEXT:    xxpermdi vs0, f0, f0, 2
39; P8LE-NEXT:    xxpermdi vs1, f1, f1, 2
40; P8LE-NEXT:    xvaddsp vs0, vs0, vs1
41; P8LE-NEXT:    xxsldwi vs0, vs0, vs0, 3
42; P8LE-NEXT:    xscvspdpn f0, vs0
43; P8LE-NEXT:    stfsx f0, 0, r5
44; P8LE-NEXT:    blr
45
46; P8BE-LABEL: test_liwzx1:
47; P8BE:       # %bb.0:
48; P8BE-NEXT:    lfiwzx f0, 0, r3
49; P8BE-NEXT:    lfiwzx f1, 0, r4
50; P8BE-NEXT:    xxsldwi vs0, f0, f0, 1
51; P8BE-NEXT:    xxsldwi vs1, f1, f1, 1
52; P8BE-NEXT:    xvaddsp vs0, vs0, vs1
53; P8BE-NEXT:    xscvspdpn f0, vs0
54; P8BE-NEXT:    stfsx f0, 0, r5
55; P8BE-NEXT:    blr
56  %a = load <1 x float>, <1 x float>* %A
57  %b = load <1 x float>, <1 x float>* %B
58  %X = fadd <1 x float> %a, %b
59  store <1 x float> %X, <1 x float>* %C
60  ret void
61}
62
63define <1 x float>* @test_liwzx2(<1 x float>* %A, <1 x float>* %B, <1 x float>* %C) {
64; P9LE-LABEL: test_liwzx2:
65; P9LE:       # %bb.0:
66; P9LE-NEXT:    lfiwzx f0, 0, r3
67; P9LE-NEXT:    lfiwzx f1, 0, r4
68; P9LE-NEXT:    xxpermdi vs0, f0, f0, 2
69; P9LE-NEXT:    xxpermdi vs1, f1, f1, 2
70; P9LE-NEXT:    xvsubsp vs0, vs0, vs1
71; P9LE-NEXT:    xxsldwi vs0, vs0, vs0, 3
72; P9LE-NEXT:    xscvspdpn f0, vs0
73; P9LE-NEXT:    mr r3, r5
74; P9LE-NEXT:    stfs f0, 0(r5)
75; P9LE-NEXT:    blr
76
77; P9BE-LABEL: test_liwzx2:
78; P9BE:       # %bb.0:
79; P9BE-NEXT:    lfiwzx f0, 0, r3
80; P9BE-NEXT:    lfiwzx f1, 0, r4
81; P9BE-NEXT:    xxsldwi vs0, f0, f0, 1
82; P9BE-NEXT:    xxsldwi vs1, f1, f1, 1
83; P9BE-NEXT:    xvsubsp vs0, vs0, vs1
84; P9BE-NEXT:    xscvspdpn f0, vs0
85; P9BE-NEXT:    mr r3, r5
86; P9BE-NEXT:    stfs f0, 0(r5)
87; P9BE-NEXT:    blr
88
89; P8LE-LABEL: test_liwzx2:
90; P8LE:       # %bb.0:
91; P8LE-NEXT:    lfiwzx f0, 0, r3
92; P8LE-NEXT:    lfiwzx f1, 0, r4
93; P8LE-NEXT:    mr r3, r5
94; P8LE-NEXT:    xxpermdi vs0, f0, f0, 2
95; P8LE-NEXT:    xxpermdi vs1, f1, f1, 2
96; P8LE-NEXT:    xvsubsp vs0, vs0, vs1
97; P8LE-NEXT:    xxsldwi vs0, vs0, vs0, 3
98; P8LE-NEXT:    xscvspdpn f0, vs0
99; P8LE-NEXT:    stfsx f0, 0, r5
100; P8LE-NEXT:    blr
101
102; P8BE-LABEL: test_liwzx2:
103; P8BE:       # %bb.0:
104; P8BE-NEXT:    lfiwzx f0, 0, r3
105; P8BE-NEXT:    lfiwzx f1, 0, r4
106; P8BE-NEXT:    mr r3, r5
107; P8BE-NEXT:    xxsldwi vs0, f0, f0, 1
108; P8BE-NEXT:    xxsldwi vs1, f1, f1, 1
109; P8BE-NEXT:    xvsubsp vs0, vs0, vs1
110; P8BE-NEXT:    xscvspdpn f0, vs0
111; P8BE-NEXT:    stfsx f0, 0, r5
112; P8BE-NEXT:    blr
113  %a = load <1 x float>, <1 x float>* %A
114  %b = load <1 x float>, <1 x float>* %B
115  %X = fsub <1 x float> %a, %b
116  store <1 x float> %X, <1 x float>* %C
117  ret <1 x float>* %C
118}
119