1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
3; RUN:    -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9LE
4; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
5; RUN:    -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9BE
6; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
7; RUN:    -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8LE
8; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
9; RUN:    -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8BE
10
11define void @test_liwzx1(<1 x float>* %A, <1 x float>* %B, <1 x float>* %C) {
12; P9LE-LABEL: test_liwzx1:
13; P9LE:       # %bb.0:
14; P9LE-NEXT:    lfiwzx f0, 0, r3
15; P9LE-NEXT:    lfiwzx f1, 0, r4
16; P9LE-NEXT:    xxswapd vs0, f0
17; P9LE-NEXT:    xxswapd vs1, f1
18; P9LE-NEXT:    xvaddsp vs0, vs0, vs1
19; P9LE-NEXT:    xxsldwi vs0, vs0, vs0, 2
20; P9LE-NEXT:    stfiwx f0, 0, r5
21; P9LE-NEXT:    blr
22;
23; P9BE-LABEL: test_liwzx1:
24; P9BE:       # %bb.0:
25; P9BE-NEXT:    lfiwzx f0, 0, r3
26; P9BE-NEXT:    lfiwzx f1, 0, r4
27; P9BE-NEXT:    xxsldwi vs0, f0, f0, 1
28; P9BE-NEXT:    xxsldwi vs1, f1, f1, 1
29; P9BE-NEXT:    xvaddsp vs0, vs0, vs1
30; P9BE-NEXT:    xxsldwi vs0, vs0, vs0, 3
31; P9BE-NEXT:    stfiwx f0, 0, r5
32; P9BE-NEXT:    blr
33;
34; P8LE-LABEL: test_liwzx1:
35; P8LE:       # %bb.0:
36; P8LE-NEXT:    lfiwzx f0, 0, r3
37; P8LE-NEXT:    lfiwzx f1, 0, r4
38; P8LE-NEXT:    xxswapd vs0, f0
39; P8LE-NEXT:    xxswapd vs1, f1
40; P8LE-NEXT:    xvaddsp vs0, vs0, vs1
41; P8LE-NEXT:    xxsldwi vs0, vs0, vs0, 2
42; P8LE-NEXT:    stfiwx f0, 0, r5
43; P8LE-NEXT:    blr
44;
45; P8BE-LABEL: test_liwzx1:
46; P8BE:       # %bb.0:
47; P8BE-NEXT:    lfiwzx f0, 0, r3
48; P8BE-NEXT:    lfiwzx f1, 0, r4
49; P8BE-NEXT:    xxsldwi vs0, f0, f0, 1
50; P8BE-NEXT:    xxsldwi vs1, f1, f1, 1
51; P8BE-NEXT:    xvaddsp vs0, vs0, vs1
52; P8BE-NEXT:    xxsldwi vs0, vs0, vs0, 3
53; P8BE-NEXT:    stfiwx f0, 0, r5
54; P8BE-NEXT:    blr
55
56
57
58  %a = load <1 x float>, <1 x float>* %A
59  %b = load <1 x float>, <1 x float>* %B
60  %X = fadd <1 x float> %a, %b
61  store <1 x float> %X, <1 x float>* %C
62  ret void
63}
64
65define <1 x float>* @test_liwzx2(<1 x float>* %A, <1 x float>* %B, <1 x float>* %C) {
66; P9LE-LABEL: test_liwzx2:
67; P9LE:       # %bb.0:
68; P9LE-NEXT:    lfiwzx f0, 0, r3
69; P9LE-NEXT:    lfiwzx f1, 0, r4
70; P9LE-NEXT:    xxswapd vs0, f0
71; P9LE-NEXT:    xxswapd vs1, f1
72; P9LE-NEXT:    xvsubsp vs0, vs0, vs1
73; P9LE-NEXT:    xxsldwi vs0, vs0, vs0, 2
74; P9LE-NEXT:    mr r3, r5
75; P9LE-NEXT:    stfiwx f0, 0, r5
76; P9LE-NEXT:    blr
77;
78; P9BE-LABEL: test_liwzx2:
79; P9BE:       # %bb.0:
80; P9BE-NEXT:    lfiwzx f0, 0, r3
81; P9BE-NEXT:    lfiwzx f1, 0, r4
82; P9BE-NEXT:    xxsldwi vs0, f0, f0, 1
83; P9BE-NEXT:    xxsldwi vs1, f1, f1, 1
84; P9BE-NEXT:    xvsubsp vs0, vs0, vs1
85; P9BE-NEXT:    xxsldwi vs0, vs0, vs0, 3
86; P9BE-NEXT:    mr r3, r5
87; P9BE-NEXT:    stfiwx f0, 0, r5
88; P9BE-NEXT:    blr
89;
90; P8LE-LABEL: test_liwzx2:
91; P8LE:       # %bb.0:
92; P8LE-NEXT:    lfiwzx f0, 0, r3
93; P8LE-NEXT:    lfiwzx f1, 0, r4
94; P8LE-NEXT:    mr r3, r5
95; P8LE-NEXT:    xxswapd vs0, f0
96; P8LE-NEXT:    xxswapd vs1, f1
97; P8LE-NEXT:    xvsubsp vs0, vs0, vs1
98; P8LE-NEXT:    xxsldwi vs0, vs0, vs0, 2
99; P8LE-NEXT:    stfiwx f0, 0, r5
100; P8LE-NEXT:    blr
101;
102; P8BE-LABEL: test_liwzx2:
103; P8BE:       # %bb.0:
104; P8BE-NEXT:    lfiwzx f0, 0, r3
105; P8BE-NEXT:    lfiwzx f1, 0, r4
106; P8BE-NEXT:    mr r3, r5
107; P8BE-NEXT:    xxsldwi vs0, f0, f0, 1
108; P8BE-NEXT:    xxsldwi vs1, f1, f1, 1
109; P8BE-NEXT:    xvsubsp vs0, vs0, vs1
110; P8BE-NEXT:    xxsldwi vs0, vs0, vs0, 3
111; P8BE-NEXT:    stfiwx f0, 0, r5
112; P8BE-NEXT:    blr
113
114
115
116
117
118  %a = load <1 x float>, <1 x float>* %A
119  %b = load <1 x float>, <1 x float>* %B
120  %X = fsub <1 x float> %a, %b
121  store <1 x float> %X, <1 x float>* %C
122  ret <1 x float>* %C
123}
124