1; RUN: llc -mcpu=pwr9 -O3 -verify-machineinstrs -ppc-vsr-nums-as-vr \ 2; RUN: -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: < %s | FileCheck %s 4 5; RUN: llc -mcpu=pwr9 -O3 -verify-machineinstrs -ppc-vsr-nums-as-vr \ 6; RUN: -mtriple=powerpc64-unknown-linux-gnu \ 7; RUN: < %s | FileCheck %s --check-prefix=P9BE 8 9; RUN: llc -mcpu=pwr9 -O3 -verify-machineinstrs -ppc-vsr-nums-as-vr \ 10; RUN: -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi \ 11; RUN: < %s | FileCheck %s --check-prefix=P9BE 12 13define void @test64(i8* nocapture readonly %pix2, i32 signext %i_pix2) { 14; CHECK-LABEL: test64: 15; CHECK-NOT: ldux 16; CHECK-NOT: mtvsrd 17; CHECK: lxsdx [[REG:[0-9]+]] 18; CHECK: vperm {{[0-9]+}}, [[REG]] 19; P9BE-LABEL: test64: 20; P9BE-NOT: ldux 21; P9BE-NOT: mtvsrd 22; P9BE: lxsdx [[REG:[0-9]+]] 23; P9BE: vperm {{[0-9]+}}, {{[0-9]+}}, [[REG]] 24entry: 25 %idx.ext63 = sext i32 %i_pix2 to i64 26 %add.ptr64 = getelementptr inbounds i8, i8* %pix2, i64 %idx.ext63 27 %arrayidx5.1 = getelementptr inbounds i8, i8* %add.ptr64, i64 4 28 %0 = bitcast i8* %add.ptr64 to <4 x i16>* 29 %1 = load <4 x i16>, <4 x i16>* %0, align 1 30 %reorder_shuffle117 = shufflevector <4 x i16> %1, <4 x i16> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 31 %2 = zext <4 x i16> %reorder_shuffle117 to <4 x i32> 32 %3 = sub nsw <4 x i32> zeroinitializer, %2 33 %4 = bitcast i8* %arrayidx5.1 to <4 x i16>* 34 %5 = load <4 x i16>, <4 x i16>* %4, align 1 35 %reorder_shuffle115 = shufflevector <4 x i16> %5, <4 x i16> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 36 %6 = zext <4 x i16> %reorder_shuffle115 to <4 x i32> 37 %7 = sub nsw <4 x i32> zeroinitializer, %6 38 %8 = shl nsw <4 x i32> %7, <i32 16, i32 16, i32 16, i32 16> 39 %9 = add nsw <4 x i32> %8, %3 40 %10 = sub nsw <4 x i32> %9, zeroinitializer 41 %11 = shufflevector <4 x i32> undef, <4 x i32> %10, <4 x i32> <i32 2, i32 7, i32 0, i32 5> 42 %12 = add nsw <4 x i32> zeroinitializer, %11 43 %13 = shufflevector <4 x i32> %12, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 6, i32 7> 44 store <4 x i32> %13, <4 x i32>* undef, align 16 45 ret void 46} 47 48define void @test32(i8* nocapture readonly %pix2, i32 signext %i_pix2) { 49; CHECK-LABEL: test32: 50; CHECK-NOT: lwzux 51; CHECK-NOT: mtvsrwz 52; CHECK: lxsiwzx [[REG:[0-9]+]] 53; CHECK: vperm {{[0-9]+}}, [[REG]] 54; P9BE-LABEL: test32: 55; P9BE-NOT: lwzux 56; P9BE-NOT: mtvsrwz 57; P9BE: lxsiwzx [[REG:[0-9]+]] 58; P9BE: vperm {{[0-9]+}}, {{[0-9]+}}, [[REG]] 59entry: 60 %idx.ext63 = sext i32 %i_pix2 to i64 61 %add.ptr64 = getelementptr inbounds i8, i8* %pix2, i64 %idx.ext63 62 %arrayidx5.1 = getelementptr inbounds i8, i8* %add.ptr64, i64 4 63 %0 = bitcast i8* %add.ptr64 to <4 x i8>* 64 %1 = load <4 x i8>, <4 x i8>* %0, align 1 65 %reorder_shuffle117 = shufflevector <4 x i8> %1, <4 x i8> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 66 %2 = zext <4 x i8> %reorder_shuffle117 to <4 x i32> 67 %3 = sub nsw <4 x i32> zeroinitializer, %2 68 %4 = bitcast i8* %arrayidx5.1 to <4 x i8>* 69 %5 = load <4 x i8>, <4 x i8>* %4, align 1 70 %reorder_shuffle115 = shufflevector <4 x i8> %5, <4 x i8> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 71 %6 = zext <4 x i8> %reorder_shuffle115 to <4 x i32> 72 %7 = sub nsw <4 x i32> zeroinitializer, %6 73 %8 = shl nsw <4 x i32> %7, <i32 16, i32 16, i32 16, i32 16> 74 %9 = add nsw <4 x i32> %8, %3 75 %10 = sub nsw <4 x i32> %9, zeroinitializer 76 %11 = shufflevector <4 x i32> undef, <4 x i32> %10, <4 x i32> <i32 2, i32 7, i32 0, i32 5> 77 %12 = add nsw <4 x i32> zeroinitializer, %11 78 %13 = shufflevector <4 x i32> %12, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 6, i32 7> 79 store <4 x i32> %13, <4 x i32>* undef, align 16 80 ret void 81} 82 83define void @test16(i16* nocapture readonly %sums, i32 signext %delta, i32 signext %thresh) { 84; CHECK-LABEL: test16 85; CHECK-NOT: lhzux 86; CHECK: lxsihzx [[REG:[0-9]+]] 87; CHECK: vmrghh {{[0-9]+}}, {{[0-9]+}}, [[REG]] 88; P9BE-LABEL: test16 89; P9BE-NOT: lhzux 90; P9BE: lxsihzx [[REG:[0-9]+]] 91; P9BE: vperm {{[0-9]+}}, {{[0-9]+}}, [[REG]] 92entry: 93 %idxprom = sext i32 %delta to i64 94 %add14 = add nsw i32 %delta, 8 95 %idxprom15 = sext i32 %add14 to i64 96 br label %for.body 97 98for.body: ; preds = %entry 99 %arrayidx8 = getelementptr inbounds i16, i16* %sums, i64 %idxprom 100 %0 = load i16, i16* %arrayidx8, align 2 101 %arrayidx16 = getelementptr inbounds i16, i16* %sums, i64 %idxprom15 102 %1 = load i16, i16* %arrayidx16, align 2 103 %2 = insertelement <4 x i16> undef, i16 %0, i32 2 104 %3 = insertelement <4 x i16> %2, i16 %1, i32 3 105 %4 = zext <4 x i16> %3 to <4 x i32> 106 %5 = sub nsw <4 x i32> zeroinitializer, %4 107 %6 = sub nsw <4 x i32> zeroinitializer, %5 108 %7 = select <4 x i1> undef, <4 x i32> %6, <4 x i32> %5 109 %bin.rdx = add <4 x i32> %7, zeroinitializer 110 %rdx.shuf54 = shufflevector <4 x i32> %bin.rdx, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> 111 %bin.rdx55 = add <4 x i32> %bin.rdx, %rdx.shuf54 112 %8 = extractelement <4 x i32> %bin.rdx55, i32 0 113 %op.extra = add nuw i32 %8, 0 114 %cmp25 = icmp slt i32 %op.extra, %thresh 115 br i1 %cmp25, label %if.then, label %if.end 116 117if.then: ; preds = %for.body 118 unreachable 119 120if.end: ; preds = %for.body 121 ret void 122} 123 124define void @test8(i8* nocapture readonly %sums, i32 signext %delta, i32 signext %thresh) { 125; CHECK-LABEL: test8: 126; CHECK-NOT: lbzux 127; CHECK: lxsibzx [[REG:[0-9]+]] 128; CHECK: vmrghb {{[0-9]+}}, {{[0-9]+}}, [[REG]] 129; P9BE-LABEL: test8: 130; P9BE-NOT: lbzux 131; P9BE: lxsibzx [[REG:[0-9]+]] 132; P9BE: vperm {{[0-9]+}}, {{[0-9]+}}, [[REG]] 133entry: 134 %idxprom = sext i32 %delta to i64 135 %add14 = add nsw i32 %delta, 8 136 %idxprom15 = sext i32 %add14 to i64 137 br label %for.body 138 139for.body: ; preds = %entry 140 %arrayidx8 = getelementptr inbounds i8, i8* %sums, i64 %idxprom 141 %0 = load i8, i8* %arrayidx8, align 2 142 %arrayidx16 = getelementptr inbounds i8, i8* %sums, i64 %idxprom15 143 %1 = load i8, i8* %arrayidx16, align 2 144 %2 = insertelement <4 x i8> undef, i8 %0, i32 2 145 %3 = insertelement <4 x i8> %2, i8 %1, i32 3 146 %4 = zext <4 x i8> %3 to <4 x i32> 147 %5 = sub nsw <4 x i32> zeroinitializer, %4 148 %6 = sub nsw <4 x i32> zeroinitializer, %5 149 %7 = select <4 x i1> undef, <4 x i32> %6, <4 x i32> %5 150 %bin.rdx = add <4 x i32> %7, zeroinitializer 151 %rdx.shuf54 = shufflevector <4 x i32> %bin.rdx, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> 152 %bin.rdx55 = add <4 x i32> %bin.rdx, %rdx.shuf54 153 %8 = extractelement <4 x i32> %bin.rdx55, i32 0 154 %op.extra = add nuw i32 %8, 0 155 %cmp25 = icmp slt i32 %op.extra, %thresh 156 br i1 %cmp25, label %if.then, label %if.end 157 158if.then: ; preds = %for.body 159 unreachable 160 161if.end: ; preds = %for.body 162 ret void 163} 164