1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ 4; RUN: < %s | FileCheck %s 5 6; On future CPU with PC Relative addressing enabled, it is possible for the 7; linker to optimize GOT indirect accesses. In order for the linker to do this 8; the compiler needs to add a hint using the R_PPC64_PCREL_OPT relocation. 9; This test checks that the compiler adds the R_PPC64_PCREL_OPT relocation 10; correctly. 11 12@input8 = external local_unnamed_addr global i8, align 1 13@output8 = external local_unnamed_addr global i8, align 1 14@input16 = external local_unnamed_addr global i16, align 2 15@output16 = external local_unnamed_addr global i16, align 2 16@input32 = external global i32, align 4 17@output32 = external local_unnamed_addr global i32, align 4 18@input64 = external local_unnamed_addr global i64, align 8 19@output64 = external local_unnamed_addr global i64, align 8 20@input128 = external local_unnamed_addr global i128, align 16 21@output128 = external local_unnamed_addr global i128, align 16 22@inputf32 = external local_unnamed_addr global float, align 4 23@outputf32 = external local_unnamed_addr global float, align 4 24@inputf64 = external local_unnamed_addr global double, align 8 25@outputf64 = external local_unnamed_addr global double, align 8 26@inputVi32 = external local_unnamed_addr global <4 x i32>, align 16 27@outputVi32 = external local_unnamed_addr global <4 x i32>, align 16 28@inputVi64 = external local_unnamed_addr global <2 x i64>, align 16 29@outputVi64 = external local_unnamed_addr global <2 x i64>, align 16 30@ArrayIn = external global [10 x i32], align 4 31@ArrayOut = external local_unnamed_addr global [10 x i32], align 4 32@IntPtrIn = external local_unnamed_addr global i32*, align 8 33@IntPtrOut = external local_unnamed_addr global i32*, align 8 34@FuncPtrIn = external local_unnamed_addr global void (...)*, align 8 35@FuncPtrOut = external local_unnamed_addr global void (...)*, align 8 36 37define dso_local void @ReadWrite8() local_unnamed_addr #0 { 38; CHECK-LABEL: ReadWrite8: 39; CHECK: # %bb.0: # %entry 40; CHECK-NEXT: pld r3, input8@got@pcrel(0), 1 41; CHECK-NEXT: .Lpcrel0: 42; CHECK-NEXT: pld r4, output8@got@pcrel(0), 1 43; CHECK-NEXT: .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8) 44; CHECK-NEXT: lbz r3, 0(r3) 45; CHECK-NEXT: stb r3, 0(r4) 46; CHECK-NEXT: blr 47; In this test the stb r3, 0(r4) cannot be optimized because it 48; uses the register r3 and that register is defined by lbz r3, 0(r3) 49; which is defined between the pld and the stb. 50entry: 51 %0 = load i8, i8* @input8, align 1 52 store i8 %0, i8* @output8, align 1 53 ret void 54} 55 56define dso_local void @ReadWrite16() local_unnamed_addr #0 { 57; CHECK-LABEL: ReadWrite16: 58; CHECK: # %bb.0: # %entry 59; CHECK-NEXT: pld r3, input16@got@pcrel(0), 1 60; CHECK-NEXT: .Lpcrel1: 61; CHECK-NEXT: pld r4, output16@got@pcrel(0), 1 62; CHECK-NEXT: .reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8) 63; CHECK-NEXT: lhz r3, 0(r3) 64; CHECK-NEXT: sth r3, 0(r4) 65; CHECK-NEXT: blr 66; In this test the sth r3, 0(r4) cannot be optimized because it 67; uses the register r3 and that register is defined by lhz r3, 0(r3) 68; which is defined between the pld and the sth. 69entry: 70 %0 = load i16, i16* @input16, align 2 71 store i16 %0, i16* @output16, align 2 72 ret void 73} 74 75define dso_local void @ReadWrite32() local_unnamed_addr #0 { 76; CHECK-LABEL: ReadWrite32: 77; CHECK: # %bb.0: # %entry 78; CHECK-NEXT: pld r3, input32@got@pcrel(0), 1 79; CHECK-NEXT: .Lpcrel2: 80; CHECK-NEXT: pld r4, output32@got@pcrel(0), 1 81; CHECK-NEXT: .reloc .Lpcrel2-8,R_PPC64_PCREL_OPT,.-(.Lpcrel2-8) 82; CHECK-NEXT: lwz r3, 0(r3) 83; CHECK-NEXT: stw r3, 0(r4) 84; CHECK-NEXT: blr 85entry: 86 %0 = load i32, i32* @input32, align 4 87 store i32 %0, i32* @output32, align 4 88 ret void 89} 90 91define dso_local void @ReadWrite64() local_unnamed_addr #0 { 92; CHECK-LABEL: ReadWrite64: 93; CHECK: # %bb.0: # %entry 94; CHECK-NEXT: pld r3, input64@got@pcrel(0), 1 95; CHECK-NEXT: .Lpcrel3: 96; CHECK-NEXT: pld r4, output64@got@pcrel(0), 1 97; CHECK-NEXT: .reloc .Lpcrel3-8,R_PPC64_PCREL_OPT,.-(.Lpcrel3-8) 98; CHECK-NEXT: ld r3, 0(r3) 99; CHECK-NEXT: std r3, 0(r4) 100; CHECK-NEXT: blr 101entry: 102 %0 = load i64, i64* @input64, align 8 103 store i64 %0, i64* @output64, align 8 104 ret void 105} 106 107; FIXME: we should always convert X-Form instructions that use 108; PPC::ZERO[8] to the corresponding D-Form so we can perform this opt. 109define dso_local void @ReadWrite128() local_unnamed_addr #0 { 110; CHECK-LABEL: ReadWrite128: 111; CHECK: # %bb.0: # %entry 112; CHECK-NEXT: pld r3, input128@got@pcrel(0), 1 113; CHECK-NEXT: lxvx vs0, 0, r3 114; CHECK-NEXT: pld r3, output128@got@pcrel(0), 1 115; CHECK-NEXT: stxvx vs0, 0, r3 116; CHECK-NEXT: blr 117entry: 118 %0 = load i128, i128* @input128, align 16 119 store i128 %0, i128* @output128, align 16 120 ret void 121} 122 123define dso_local void @ReadWritef32() local_unnamed_addr #0 { 124; CHECK-LABEL: ReadWritef32: 125; CHECK: # %bb.0: # %entry 126; CHECK-NEXT: pld r3, inputf32@got@pcrel(0), 1 127; CHECK-NEXT: .Lpcrel4: 128; CHECK-NEXT: xxspltidp vs1, 1078103900 129; CHECK-NEXT: .reloc .Lpcrel4-8,R_PPC64_PCREL_OPT,.-(.Lpcrel4-8) 130; CHECK-NEXT: lfs f0, 0(r3) 131; CHECK-NEXT: pld r3, outputf32@got@pcrel(0), 1 132; CHECK-NEXT: xsaddsp f0, f0, f1 133; CHECK-NEXT: stfs f0, 0(r3) 134; CHECK-NEXT: blr 135entry: 136 %0 = load float, float* @inputf32, align 4 137 %add = fadd float %0, 0x400851EB80000000 138 store float %add, float* @outputf32, align 4 139 ret void 140} 141 142define dso_local void @ReadWritef64() local_unnamed_addr #0 { 143; CHECK-LABEL: ReadWritef64: 144; CHECK: # %bb.0: # %entry 145; CHECK-NEXT: pld r3, inputf64@got@pcrel(0), 1 146; CHECK-NEXT: .Lpcrel5: 147; CHECK-NEXT: plfd f1, .LCPI6_0@PCREL(0), 1 148; CHECK-NEXT: .reloc .Lpcrel5-8,R_PPC64_PCREL_OPT,.-(.Lpcrel5-8) 149; CHECK-NEXT: lfd f0, 0(r3) 150; CHECK-NEXT: pld r3, outputf64@got@pcrel(0), 1 151; CHECK-NEXT: xsadddp f0, f0, f1 152; CHECK-NEXT: stfd f0, 0(r3) 153; CHECK-NEXT: blr 154entry: 155 %0 = load double, double* @inputf64, align 8 156 %add = fadd double %0, 6.800000e+00 157 store double %add, double* @outputf64, align 8 158 ret void 159} 160 161; FIXME: we should always convert X-Form instructions that use 162; PPC::ZERO[8] to the corresponding D-Form so we can perform this opt. 163define dso_local void @ReadWriteVi32() local_unnamed_addr #0 { 164; CHECK-LABEL: ReadWriteVi32: 165; CHECK: # %bb.0: # %entry 166; CHECK-NEXT: pld r3, inputVi32@got@pcrel(0), 1 167; CHECK-NEXT: li r4, 45 168; CHECK-NEXT: lxvx v2, 0, r3 169; CHECK-NEXT: pld r3, outputVi32@got@pcrel(0), 1 170; CHECK-NEXT: vinsw v2, r4, 8 171; CHECK-NEXT: stxvx v2, 0, r3 172; CHECK-NEXT: blr 173entry: 174 %0 = load <4 x i32>, <4 x i32>* @inputVi32, align 16 175 %vecins = insertelement <4 x i32> %0, i32 45, i32 1 176 store <4 x i32> %vecins, <4 x i32>* @outputVi32, align 16 177 ret void 178} 179 180define dso_local void @ReadWriteVi64() local_unnamed_addr #0 { 181; CHECK-LABEL: ReadWriteVi64: 182; CHECK: # %bb.0: # %entry 183; CHECK-NEXT: pld r3, inputVi64@got@pcrel(0), 1 184; CHECK-NEXT: lxvx vs0, 0, r3 185; CHECK-NEXT: pld r3, outputVi64@got@pcrel(0), 1 186; CHECK-NEXT: stxvx vs0, 0, r3 187; CHECK-NEXT: blr 188entry: 189 %0 = load <2 x i64>, <2 x i64>* @inputVi64, align 16 190 store <2 x i64> %0, <2 x i64>* @outputVi64, align 16 191 ret void 192} 193 194define dso_local void @ReadWriteArray() local_unnamed_addr #0 { 195; CHECK-LABEL: ReadWriteArray: 196; CHECK: # %bb.0: # %entry 197; CHECK-NEXT: pld r3, ArrayIn@got@pcrel(0), 1 198; CHECK-NEXT: .Lpcrel6: 199; CHECK-NEXT: pld r4, ArrayOut@got@pcrel(0), 1 200; CHECK-NEXT: .reloc .Lpcrel6-8,R_PPC64_PCREL_OPT,.-(.Lpcrel6-8) 201; CHECK-NEXT: lwz r3, 28(r3) 202; CHECK-NEXT: addi r3, r3, 42 203; CHECK-NEXT: stw r3, 8(r4) 204; CHECK-NEXT: blr 205entry: 206 %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @ArrayIn, i64 0, i64 7), align 4 207 %add = add nsw i32 %0, 42 208 store i32 %add, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @ArrayOut, i64 0, i64 2), align 4 209 ret void 210} 211 212define dso_local void @ReadWriteSameArray() local_unnamed_addr #0 { 213; CHECK-LABEL: ReadWriteSameArray: 214; CHECK: # %bb.0: # %entry 215; CHECK-NEXT: pld r3, ArrayIn@got@pcrel(0), 1 216; CHECK-NEXT: lwz r4, 12(r3) 217; CHECK-NEXT: addi r4, r4, 8 218; CHECK-NEXT: stw r4, 24(r3) 219; CHECK-NEXT: blr 220entry: 221 %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @ArrayIn, i64 0, i64 3), align 4 222 %add = add nsw i32 %0, 8 223 store i32 %add, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @ArrayIn, i64 0, i64 6), align 4 224 ret void 225} 226 227define dso_local void @ReadWriteIntPtr() local_unnamed_addr #0 { 228; CHECK-LABEL: ReadWriteIntPtr: 229; CHECK: # %bb.0: # %entry 230; CHECK-NEXT: pld r3, IntPtrIn@got@pcrel(0), 1 231; CHECK-NEXT: .Lpcrel7: 232; CHECK-NEXT: pld r4, IntPtrOut@got@pcrel(0), 1 233; CHECK-NEXT: .Lpcrel8: 234; CHECK-NEXT: .reloc .Lpcrel7-8,R_PPC64_PCREL_OPT,.-(.Lpcrel7-8) 235; CHECK-NEXT: ld r3, 0(r3) 236; CHECK-NEXT: .reloc .Lpcrel8-8,R_PPC64_PCREL_OPT,.-(.Lpcrel8-8) 237; CHECK-NEXT: ld r4, 0(r4) 238; CHECK-NEXT: lwz r5, 216(r3) 239; CHECK-NEXT: lwz r3, 48(r3) 240; CHECK-NEXT: add r3, r3, r5 241; CHECK-NEXT: stw r3, 136(r4) 242; CHECK-NEXT: blr 243entry: 244 %0 = load i32*, i32** @IntPtrIn, align 8 245 %arrayidx = getelementptr inbounds i32, i32* %0, i64 54 246 %1 = load i32, i32* %arrayidx, align 4 247 %arrayidx1 = getelementptr inbounds i32, i32* %0, i64 12 248 %2 = load i32, i32* %arrayidx1, align 4 249 %add = add nsw i32 %2, %1 250 %3 = load i32*, i32** @IntPtrOut, align 8 251 %arrayidx2 = getelementptr inbounds i32, i32* %3, i64 34 252 store i32 %add, i32* %arrayidx2, align 4 253 ret void 254} 255 256define dso_local void @ReadWriteFuncPtr() local_unnamed_addr #0 { 257; CHECK-LABEL: ReadWriteFuncPtr: 258; CHECK: # %bb.0: # %entry 259; CHECK-NEXT: pld r3, FuncPtrIn@got@pcrel(0), 1 260; CHECK-NEXT: .Lpcrel9: 261; CHECK-NEXT: pld r4, FuncPtrOut@got@pcrel(0), 1 262; CHECK-NEXT: .reloc .Lpcrel9-8,R_PPC64_PCREL_OPT,.-(.Lpcrel9-8) 263; CHECK-NEXT: ld r3, 0(r3) 264; CHECK-NEXT: std r3, 0(r4) 265; CHECK-NEXT: blr 266entry: 267 %0 = load i64, i64* bitcast (void (...)** @FuncPtrIn to i64*), align 8 268 store i64 %0, i64* bitcast (void (...)** @FuncPtrOut to i64*), align 8 269 ret void 270} 271 272define dso_local void @FuncPtrCopy() local_unnamed_addr #0 { 273; CHECK-LABEL: FuncPtrCopy: 274; CHECK: # %bb.0: # %entry 275; CHECK-NEXT: pld r3, FuncPtrOut@got@pcrel(0), 1 276; CHECK-NEXT: pld r4, Callee@got@pcrel(0), 1 277; CHECK-NEXT: std r4, 0(r3) 278; CHECK-NEXT: blr 279entry: 280 store void (...)* @Callee, void (...)** @FuncPtrOut, align 8 281 ret void 282} 283 284declare void @Callee(...) 285 286define dso_local void @FuncPtrCall() local_unnamed_addr #0 { 287; CHECK-LABEL: FuncPtrCall: 288; CHECK: # %bb.0: # %entry 289; CHECK-NEXT: pld r3, FuncPtrIn@got@pcrel(0), 1 290; CHECK-NEXT: .Lpcrel10: 291; CHECK-NEXT: .reloc .Lpcrel10-8,R_PPC64_PCREL_OPT,.-(.Lpcrel10-8) 292; CHECK-NEXT: ld r12, 0(r3) 293; CHECK-NEXT: mtctr r12 294; CHECK-NEXT: bctr 295; CHECK-NEXT: #TC_RETURNr8 ctr 0 296entry: 297 %0 = load void ()*, void ()** bitcast (void (...)** @FuncPtrIn to void ()**), align 8 298 tail call void %0() 299 ret void 300} 301 302define dso_local signext i32 @ReadVecElement() local_unnamed_addr #0 { 303; CHECK-LABEL: ReadVecElement: 304; CHECK: # %bb.0: # %entry 305; CHECK-NEXT: pld r3, inputVi32@got@pcrel(0), 1 306; CHECK-NEXT: .Lpcrel11: 307; CHECK-NEXT: .reloc .Lpcrel11-8,R_PPC64_PCREL_OPT,.-(.Lpcrel11-8) 308; CHECK-NEXT: lwa r3, 4(r3) 309; CHECK-NEXT: blr 310entry: 311 %0 = load <4 x i32>, <4 x i32>* @inputVi32, align 16 312 %vecext = extractelement <4 x i32> %0, i32 1 313 ret i32 %vecext 314} 315 316define dso_local signext i32 @VecMultiUse() local_unnamed_addr #0 { 317; CHECK-LABEL: VecMultiUse: 318; CHECK: # %bb.0: # %entry 319; CHECK-NEXT: mflr r0 320; CHECK-NEXT: std r29, -24(r1) # 8-byte Folded Spill 321; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill 322; CHECK-NEXT: std r0, 16(r1) 323; CHECK-NEXT: stdu r1, -64(r1) 324; CHECK-NEXT: pld r30, inputVi32@got@pcrel(0), 1 325; CHECK-NEXT: lwz r29, 4(r30) 326; CHECK-NEXT: bl Callee@notoc 327; CHECK-NEXT: lwz r3, 8(r30) 328; CHECK-NEXT: add r29, r3, r29 329; CHECK-NEXT: bl Callee@notoc 330; CHECK-NEXT: lwz r3, 0(r30) 331; CHECK-NEXT: add r3, r29, r3 332; CHECK-NEXT: extsw r3, r3 333; CHECK-NEXT: addi r1, r1, 64 334; CHECK-NEXT: ld r0, 16(r1) 335; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload 336; CHECK-NEXT: ld r29, -24(r1) # 8-byte Folded Reload 337; CHECK-NEXT: mtlr r0 338; CHECK-NEXT: blr 339entry: 340 %0 = load <4 x i32>, <4 x i32>* @inputVi32, align 16 341 tail call void bitcast (void (...)* @Callee to void ()*)() 342 %1 = load <4 x i32>, <4 x i32>* @inputVi32, align 16 343 %2 = extractelement <4 x i32> %1, i32 2 344 %3 = extractelement <4 x i32> %0, i64 1 345 %4 = add nsw i32 %2, %3 346 tail call void bitcast (void (...)* @Callee to void ()*)() 347 %5 = load <4 x i32>, <4 x i32>* @inputVi32, align 16 348 %vecext2 = extractelement <4 x i32> %5, i32 0 349 %add3 = add nsw i32 %4, %vecext2 350 ret i32 %add3 351} 352 353define dso_local signext i32 @UseAddr(i32 signext %a) local_unnamed_addr #0 { 354; CHECK-LABEL: UseAddr: 355; CHECK: # %bb.0: # %entry 356; CHECK-NEXT: mflr r0 357; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill 358; CHECK-NEXT: std r0, 16(r1) 359; CHECK-NEXT: stdu r1, -48(r1) 360; CHECK-NEXT: pld r4, ArrayIn@got@pcrel(0), 1 361; CHECK-NEXT: lwz r5, 16(r4) 362; CHECK-NEXT: add r30, r5, r3 363; CHECK-NEXT: mr r3, r4 364; CHECK-NEXT: bl getAddr@notoc 365; CHECK-NEXT: add r3, r30, r3 366; CHECK-NEXT: extsw r3, r3 367; CHECK-NEXT: addi r1, r1, 48 368; CHECK-NEXT: ld r0, 16(r1) 369; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload 370; CHECK-NEXT: mtlr r0 371; CHECK-NEXT: blr 372entry: 373 %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @ArrayIn, i64 0, i64 4), align 4 374 %add = add nsw i32 %0, %a 375 %call = tail call signext i32 @getAddr(i32* getelementptr inbounds ([10 x i32], [10 x i32]* @ArrayIn, i64 0, i64 0)) 376 %add1 = add nsw i32 %add, %call 377 ret i32 %add1 378} 379 380declare signext i32 @getAddr(i32*) local_unnamed_addr 381 382define dso_local nonnull i32* @AddrTaken32() local_unnamed_addr #0 { 383; CHECK-LABEL: AddrTaken32: 384; CHECK: # %bb.0: # %entry 385; CHECK-NEXT: pld r3, input32@got@pcrel(0), 1 386; CHECK-NEXT: blr 387entry: 388 ret i32* @input32 389} 390 391attributes #0 = { nounwind } 392