1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O1 \
3; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4; RUN:   FileCheck %s -check-prefixes=CHECK-LE
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O1 \
6; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
7; RUN:   FileCheck %s -check-prefixes=CHECK-BE
8
9@GlobLd1 = dso_local local_unnamed_addr global [20 x i1] zeroinitializer, align 1
10@GlobSt1 = dso_local local_unnamed_addr global [20 x i1] zeroinitializer, align 1
11
12define i1 @i64_ExtLoad_i1() {
13; CHECK-LE-LABEL: i64_ExtLoad_i1:
14; CHECK-LE:       # %bb.0: # %entry
15; CHECK-LE-NEXT:    plbz r3, GlobLd1@PCREL(0), 1
16; CHECK-LE-NEXT:    blr
17;
18; CHECK-BE-LABEL: i64_ExtLoad_i1:
19; CHECK-BE:       # %bb.0: # %entry
20; CHECK-BE-NEXT:    addis r3, r2, GlobLd1@toc@ha
21; CHECK-BE-NEXT:    lbz r3, GlobLd1@toc@l(r3)
22; CHECK-BE-NEXT:    blr
23entry:
24  %0 = load i1, i1* getelementptr inbounds ([20 x i1], [20 x i1]* @GlobLd1, i64 0, i64 0), align 1
25  ret i1 %0
26}
27
28define zeroext i1 @i64_ZextLoad_i1() {
29; CHECK-LE-LABEL: i64_ZextLoad_i1:
30; CHECK-LE:       # %bb.0: # %entry
31; CHECK-LE-NEXT:    plbz r3, GlobLd1@PCREL(0), 1
32; CHECK-LE-NEXT:    blr
33;
34; CHECK-BE-LABEL: i64_ZextLoad_i1:
35; CHECK-BE:       # %bb.0: # %entry
36; CHECK-BE-NEXT:    addis r3, r2, GlobLd1@toc@ha
37; CHECK-BE-NEXT:    lbz r3, GlobLd1@toc@l(r3)
38; CHECK-BE-NEXT:    blr
39entry:
40  %0 = load i1, i1* getelementptr inbounds ([20 x i1], [20 x i1]* @GlobLd1, i64 0, i64 0), align 1
41  ret i1 %0
42}
43
44define void @i32_ZextLoad_i1() {
45; CHECK-LE-LABEL: i32_ZextLoad_i1:
46; CHECK-LE:       # %bb.0: # %entry
47; CHECK-LE-NEXT:    plbz r3, GlobLd1@PCREL(0), 1
48; CHECK-LE-NEXT:    pstb r3, GlobSt1@PCREL(0), 1
49; CHECK-LE-NEXT:    blr
50;
51; CHECK-BE-LABEL: i32_ZextLoad_i1:
52; CHECK-BE:       # %bb.0: # %entry
53; CHECK-BE-NEXT:    addis r3, r2, GlobLd1@toc@ha
54; CHECK-BE-NEXT:    addis r4, r2, GlobSt1@toc@ha
55; CHECK-BE-NEXT:    lbz r3, GlobLd1@toc@l(r3)
56; CHECK-BE-NEXT:    stb r3, GlobSt1@toc@l(r4)
57; CHECK-BE-NEXT:    blr
58entry:
59  %0 = load i1, i1* getelementptr inbounds ([20 x i1], [20 x i1]* @GlobLd1, i64 0, i64 0), align 1
60  store i1 %0, i1* getelementptr inbounds ([20 x i1], [20 x i1]* @GlobSt1, i64 0, i64 0), align 1
61  ret void
62}
63
64%1 = type { i64 }
65@Glob1 = external dso_local global %1, align 8
66@Glob2 = external dso_local unnamed_addr constant [11 x i8], align 1
67declare i32 @Decl(%1*, i8*) local_unnamed_addr #0
68
69define dso_local i1 @i32_ExtLoad_i1() local_unnamed_addr #0 {
70; CHECK-LE-LABEL: i32_ExtLoad_i1:
71; CHECK-LE:       # %bb.0: # %bb
72; CHECK-LE-NEXT:    mflr r0
73; CHECK-LE-NEXT:    std r0, 16(r1)
74; CHECK-LE-NEXT:    stdu r1, -32(r1)
75; CHECK-LE-NEXT:    .cfi_def_cfa_offset 32
76; CHECK-LE-NEXT:    .cfi_offset lr, 16
77; CHECK-LE-NEXT:    paddi r3, 0, Glob1@PCREL, 1
78; CHECK-LE-NEXT:    paddi r4, 0, Glob2@PCREL, 1
79; CHECK-LE-NEXT:    bl Decl@notoc
80; CHECK-LE-NEXT:    plbz r4, GlobLd1@PCREL(0), 1
81; CHECK-LE-NEXT:    cmplwi r3, 0
82; CHECK-LE-NEXT:    li r3, 1
83; CHECK-LE-NEXT:    iseleq r3, 0, r3
84; CHECK-LE-NEXT:    and r3, r3, r4
85; CHECK-LE-NEXT:    addi r1, r1, 32
86; CHECK-LE-NEXT:    ld r0, 16(r1)
87; CHECK-LE-NEXT:    mtlr r0
88; CHECK-LE-NEXT:    blr
89;
90; CHECK-BE-LABEL: i32_ExtLoad_i1:
91; CHECK-BE:       # %bb.0: # %bb
92; CHECK-BE-NEXT:    mflr r0
93; CHECK-BE-NEXT:    std r0, 16(r1)
94; CHECK-BE-NEXT:    stdu r1, -112(r1)
95; CHECK-BE-NEXT:    .cfi_def_cfa_offset 112
96; CHECK-BE-NEXT:    .cfi_offset lr, 16
97; CHECK-BE-NEXT:    addis r3, r2, Glob1@toc@ha
98; CHECK-BE-NEXT:    addis r4, r2, Glob2@toc@ha
99; CHECK-BE-NEXT:    addi r3, r3, Glob1@toc@l
100; CHECK-BE-NEXT:    addi r4, r4, Glob2@toc@l
101; CHECK-BE-NEXT:    bl Decl
102; CHECK-BE-NEXT:    nop
103; CHECK-BE-NEXT:    addis r4, r2, GlobLd1@toc@ha
104; CHECK-BE-NEXT:    cmplwi r3, 0
105; CHECK-BE-NEXT:    li r3, 1
106; CHECK-BE-NEXT:    lbz r4, GlobLd1@toc@l(r4)
107; CHECK-BE-NEXT:    iseleq r3, 0, r3
108; CHECK-BE-NEXT:    and r3, r3, r4
109; CHECK-BE-NEXT:    addi r1, r1, 112
110; CHECK-BE-NEXT:    ld r0, 16(r1)
111; CHECK-BE-NEXT:    mtlr r0
112; CHECK-BE-NEXT:    blr
113bb:
114  %i = call signext i32 @Decl(%1* nonnull dereferenceable(32) @Glob1, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @Glob2, i64 0, i64 0)) #1
115  %i1 = icmp eq i32 %i, 0
116  %i2 = load i1, i1* getelementptr inbounds ([20 x i1], [20 x i1]* @GlobLd1, i64 0, i64 0), align 1
117  %i3 = select i1 %i1, i1 false, i1 %i2
118  ret i1 %i3
119}
120