1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4; RUN:   FileCheck %s
5
6; These test cases aim to test the vector string isolate builtins on Power10.
7
8declare <16 x i8> @llvm.ppc.altivec.vclrlb(<16 x i8>, i32)
9declare <16 x i8> @llvm.ppc.altivec.vclrrb(<16 x i8>, i32)
10
11define <16 x i8> @test_vclrlb(<16 x i8> %a, i32 %n) {
12; CHECK-LABEL: test_vclrlb:
13; CHECK:       # %bb.0: # %entry
14; CHECK-NEXT:    vclrlb v2, v2, r5
15; CHECK-NEXT:    blr
16entry:
17  %tmp = tail call <16 x i8> @llvm.ppc.altivec.vclrlb(<16 x i8> %a, i32 %n)
18  ret <16 x i8> %tmp
19}
20
21define <16 x i8> @test_vclrrb(<16 x i8> %a, i32 %n) {
22; CHECK-LABEL: test_vclrrb:
23; CHECK:       # %bb.0: # %entry
24; CHECK-NEXT:    vclrrb v2, v2, r5
25; CHECK-NEXT:    blr
26entry:
27  %tmp = tail call <16 x i8> @llvm.ppc.altivec.vclrrb(<16 x i8> %a, i32 %n)
28  ret <16 x i8> %tmp
29}
30