1; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 2; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 3; RUN: FileCheck %s 4; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 5; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 6; RUN: FileCheck %s 7; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu \ 8; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 9; RUN: FileCheck %s --check-prefix=CHECK32 10 11; These test cases aim to test constant materialization using the pli instruction on Power10. 12 13define signext i32 @t_16BitsMinRequiring34Bits() { 14; CHECK-LABEL: t_16BitsMinRequiring34Bits: 15; CHECK: pli r3, 32768 16; CHECK-NEXT: blr 17; CHECK32-LABEL: t_16BitsMinRequiring34Bits: 18; CHECK32: pli r3, 32768 19; CHECK32-NEXT: blr 20 21entry: 22 ret i32 32768 23} 24 25define signext i32 @t_16Bits() { 26; CHECK-LABEL: t_16Bits: 27; CHECK: pli r3, 62004 28; CHECK-NEXT: blr 29; CHECK32-LABEL: t_16Bits: 30; CHECK32: pli r3, 62004 31; CHECK32-NEXT: blr 32 33entry: 34 ret i32 62004 35} 36 37define signext i32 @t_lt32gt16BitsNonShiftable() { 38; CHECK-LABEL: t_lt32gt16BitsNonShiftable: 39; CHECK: pli r3, 1193046 40; CHECK-NEXT: blr 41; CHECK32-LABEL: t_lt32gt16BitsNonShiftable: 42; CHECK32: pli r3, 1193046 43; CHECK32-NEXT: blr 44 45entry: 46 ret i32 1193046 47} 48 49define signext i32 @t_32Bits() { 50; CHECK-LABEL: t_32Bits: 51; CHECK: pli r3, -231451016 52; CHECK-NEXT: blr 53; CHECK32-LABEL: t_32Bits: 54; CHECK32: pli r3, -231451016 55; CHECK32-NEXT: blr 56 57entry: 58 ret i32 -231451016 59} 60 61define i64 @t_34BitsLargestPositive() { 62; CHECK-LABEL: t_34BitsLargestPositive: 63; CHECK: pli r3, 8589934591 64; CHECK-NEXT: blr 65; CHECK32-LABEL: t_34BitsLargestPositive: 66; CHECK32: li r3, 1 67; CHECK32-NEXT: li r4, -1 68; CHECK32-NEXT: blr 69 70entry: 71 ret i64 8589934591 72} 73 74define i64 @t_neg34Bits() { 75; CHECK-LABEL: t_neg34Bits: 76; CHECK: pli r3, -8284514696 77; CHECK-NEXT: blr 78; CHECK32-LABEL: t_neg34Bits: 79; CHECK32: li r3, -2 80; CHECK32-NEXT: pli r4, 305419896 81; CHECK32-NEXT: blr 82 83entry: 84 ret i64 -8284514696 85} 86 87define signext i32 @t_16BitsMinRequiring34BitsMinusOne() { 88; CHECK-LABEL: t_16BitsMinRequiring34BitsMinusOne: 89; CHECK: li r3, 32767 90; CHECK-NEXT: blr 91; CHECK32-LABEL: t_16BitsMinRequiring34BitsMinusOne: 92; CHECK32: li r3, 32767 93; CHECK32-NEXT: blr 94 95entry: 96 ret i32 32767 97} 98 99define signext i32 @t_lt16Bits() { 100; CHECK-LABEL: t_lt16Bits: 101; CHECK: li r3, 291 102; CHECK-NEXT: blr 103; CHECK32-LABEL: t_lt16Bits: 104; CHECK32: li r3, 291 105; CHECK32-NEXT: blr 106 107entry: 108 ret i32 291 109} 110 111define signext i32 @t_neglt16Bits() { 112; CHECK-LABEL: t_neglt16Bits: 113; CHECK: li r3, -3805 114; CHECK-NEXT: blr 115; CHECK32-LABEL: t_neglt16Bits: 116; CHECK32: li r3, -3805 117; CHECK32-NEXT: blr 118 119entry: 120 ret i32 -3805 121} 122 123define signext i32 @t_neg16Bits() { 124; CHECK-LABEL: t_neg16Bits: 125; CHECK: li r3, -32204 126; CHECK-NEXT: blr 127; CHECK32-LABEL: t_neg16Bits: 128; CHECK32: li r3, -32204 129; CHECK32-NEXT: blr 130 131entry: 132 ret i32 -32204 133} 134 135define signext i32 @t_lt32gt16BitsShiftable() { 136; CHECK-LABEL: t_lt32gt16BitsShiftable: 137; CHECK: lis r3, 18 138; CHECK-NEXT: blr 139; CHECK32-LABEL: t_lt32gt16BitsShiftable: 140; CHECK32: lis r3, 18 141; CHECK32-NEXT: blr 142 143entry: 144 ret i32 1179648 145} 146 147define signext i32 @t_32gt16BitsShiftable() { 148; CHECK-LABEL: t_32gt16BitsShiftable: 149; CHECK: lis r3, -3532 150; CHECK-NEXT: blr 151; CHECK32-LABEL: t_32gt16BitsShiftable: 152; CHECK32: lis r3, -3532 153; CHECK32-NEXT: blr 154 155entry: 156 ret i32 -231473152 157} 158 159define signext i32 @t_32BitsZero() { 160; CHECK-LABEL: t_32BitsZero: 161; CHECK: li r3, 0 162; CHECK-NEXT: blr 163; CHECK32-LABEL: t_32BitsZero: 164; CHECK32: li r3, 0 165; CHECK32-NEXT: blr 166 167entry: 168 ret i32 0 169} 170 171define signext i32 @t_32BitsAllOnes() { 172; CHECK-LABEL: t_32BitsAllOnes: 173; CHECK: li r3, -1 174; CHECK-NEXT: blr 175; CHECK32-LABEL: t_32BitsAllOnes: 176; CHECK32: li r3, -1 177; CHECK32-NEXT: blr 178 179entry: 180 ret i32 -1 181} 182 183define i64 @t_34BitsLargestPositivePlus() { 184; CHECK-LABEL: t_34BitsLargestPositivePlus: 185; CHECK: li r3, 1 186; CHECK-NEXT: rldic r3, r3, 33, 30 187; CHECK-NEXT: blr 188; CHECK32-LABEL: t_34BitsLargestPositivePlus: 189; CHECK32: li r3, 2 190; CHECK32-NEXT: li r4, 0 191; CHECK32-NEXT: blr 192 193entry: 194 ret i64 8589934592 195} 196 197define i64 @t_34Bits() { 198; CHECK-LABEL: t_34Bits: 199; CHECK: pli r3, 1648790223 200; CHECK-NEXT: rldic r3, r3, 3, 30 201; CHECK-NEXT: blr 202; CHECK32-LABEL: t_34Bits: 203; CHECK32: li r3, 3 204; CHECK32-NEXT: pli r4, 305419896 205; CHECK32-NEXT: blr 206 207entry: 208 ret i64 13190321784 209} 210 211define i64 @t_35Bits() { 212; CHECK-LABEL: t_35Bits: 213; CHECK: pli r3, 4266035919 214; CHECK-NEXT: rldic r3, r3, 3, 29 215; CHECK-NEXT: blr 216; CHECK32-LABEL: t_35Bits: 217; CHECK32: li r3, 7 218; CHECK32-NEXT: pli r4, -231451016 219; CHECK32-NEXT: blr 220 221entry: 222 ret i64 34128287352 223} 224 225; (Value >> Shift) can be expressed in 34 bits 226define i64 @t_Shift() { 227; CHECK-LABEL: t_Shift: 228; CHECK: pli r3, 8522759166 229; CHECK-NEXT: rotldi r3, r3, 48 230; CHECK-NEXT: blr 231 232entry: 233 ; 0xFBFE00000001FBFE 234 ret i64 18157950747604548606 235} 236 237; Leading Zeros + Following Ones + Trailing Zeros > 30 238define i64 @t_LZFOTZ() { 239; CHECK-LABEL: t_LZFOTZ: 240; CHECK: pli r3, -349233 241; CHECK-NEXT: rldic r3, r3, 4, 12 242; CHECK-NEXT: blr 243 244entry: 245 ; 0x000FFFFFFFAABCF0 246 ret i64 4503599621782768 247} 248 249; Leading Zeros + Trailing Ones > 30 250define i64 @t_LZTO() { 251; CHECK-LABEL: t_LZTO: 252; CHECK: pli r3, -2684406441 253; CHECK-NEXT: rldicl r3, r3, 11, 19 254; CHECK-NEXT: blr 255entry: 256 ; 0x00001AFFF9AABFFF 257 ret i64 29686707699711 258} 259 260; Leading Zeros + Trailing Ones + Following Zeros > 30 261define i64 @t_LZTOFO() { 262; CHECK-LABEL: t_LZTOFO: 263; CHECK: pli r3, -5720033968 264; CHECK-NEXT: rldicl r3, r3, 11, 12 265; CHECK-NEXT: blr 266entry: 267 ; 0x000FF55879AA87FF 268 ret i64 4491884997806079 269} 270 271; Requires full expansion 272define i64 @t_Full64Bits1() { 273; CHECK-LABEL: t_Full64Bits1: 274; CHECK: pli r4, 2146500607 275; CHECK-NEXT: pli r3, 4043305214 276; CHECK-NEXT: rldimi r3, r4, 32, 0 277; CHECK-NEXT: blr 278entry: 279 ; 0x7FF0FFFFF0FFF0FE 280 ret i64 9219149911952453886 281} 282 283; Requires full expansion 284define i64 @t_Ful64Bits2() { 285; CHECK-LABEL: t_Ful64Bits2: 286; CHECK: pli r4, 4042326015 287; CHECK-NEXT: pli r3, 4043305214 288; CHECK-NEXT: rldimi r3, r4, 32, 0 289; CHECK-NEXT: blr 290entry: 291 ; 0xF0F0FFFFF0FFF0FE 292 ret i64 17361658038238310654 293} 294 295; A splat of 32 bits: 32 Bits Low == 32 Bits High 296define i64 @t_Splat32Bits() { 297; CHECK-LABEL: t_Splat32Bits: 298; CHECK: pli r3, 262916796 299; CHECK-NEXT: rldimi r3, r3, 32, 0 300; CHECK-NEXT: blr 301entry: 302 ; 0x0FABCABC0FABCABC 303 ret i64 1129219040652020412 304} 305 306; The load immediates resulting from phi-nodes are needed to test whether 307; li/lis is preferred to pli by the instruction selector. 308define dso_local void @t_phiNode() { 309; CHECK-LABEL: t_phiNode: 310; CHECK: lis r6, 18 311; CHECK-NEXT: li r5, 291 312; CHECK-NEXT: li r4, 0 313; CHECK-NEXT: cmpwi r3, 1 314; CHECK-NEXT: li r3, -1 315; CHECK: pli r6, 2147483647 316; CHECK-NEXT: pli r5, 1193046 317; CHECK-NEXT: pli r4, 32768 318; CHECK-NEXT: pli r3, -231451016 319; CHECK32-LABEL: t_phiNode: 320; CHECK32: lis r6, 18 321; CHECK32-NEXT: li r5, 291 322; CHECK32-NEXT: li r4, 0 323; CHECK32-NEXT: cmpwi r3, 1 324; CHECK32-NEXT: li r3, -1 325; CHECK32: pli r6, 2147483647 326; CHECK32-NEXT: pli r5, 1193046 327; CHECK32-NEXT: pli r4, 32768 328; CHECK32-NEXT: pli r3, -231451016 329 330entry: 331 br label %while.body 332 333while.body: ; preds = %if.else.i, %entry 334 br label %while.body.i 335 336while.body.i: ; preds = %sw.epilog.i, %while.body 337 %a.1.i = phi i32 [ %a.2.i, %sw.epilog.i ], [ -1, %while.body ] 338 %b.1.i = phi i32 [ %b.2.i, %sw.epilog.i ], [ 0, %while.body ] 339 %c.1.i = phi i32 [ %c.2.i, %sw.epilog.i ], [ 291, %while.body ] 340 %d.1.i = phi i32 [ %d.2.i, %sw.epilog.i ], [ 1179648, %while.body ] 341 %0 = load i8, i8* null, align 1 342 %cmp1.i = icmp eq i8 %0, 1 343 br i1 %cmp1.i, label %if.then.i, label %if.else.i 344 345if.then.i: ; preds = %while.body.i 346 switch i8 undef, label %sw.default.i [ 347 i8 3, label %sw.epilog.i 348 i8 2, label %sw.bb1.i 349 ] 350 351sw.bb1.i: ; preds = %if.then.i 352 br label %sw.epilog.i 353 354sw.default.i: ; preds = %if.then.i 355 unreachable 356 357sw.epilog.i: ; preds = %sw.bb2.i, %sw.bb1.i, %if.then.i 358 %a.2.i = phi i32 [ -231451016, %sw.bb1.i ], [ %a.1.i, %if.then.i ] 359 %b.2.i = phi i32 [ 32768, %sw.bb1.i ], [ %b.1.i, %if.then.i ] 360 %c.2.i = phi i32 [ 1193046, %sw.bb1.i ], [ %c.1.i, %if.then.i ] 361 %d.2.i = phi i32 [ 2147483647, %sw.bb1.i ], [ %d.1.i, %if.then.i ] 362 br label %while.body.i 363 364if.else.i: ; preds = %while.body.i 365 call void @func2(i32 signext %a.1.i, i32 signext %b.1.i, i32 signext %c.1.i, i32 signext %d.1.i) 366 br label %while.body 367} 368 369declare void @func2(i32, i32, i32, i32) 370