1; XFAIL: *
2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -mattr=-crbits -disable-ppc-cmp-opt=0 | FileCheck %s
3; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -mattr=-crbits -disable-ppc-cmp-opt=0 -ppc-gen-isel=false | FileCheck --check-prefix=CHECK-NO-ISEL %s
4target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
5target triple = "powerpc64-unknown-linux-gnu"
6
7define signext i32 @foo(i32 signext %a, i32 signext %b, i32* nocapture %c) #0 {
8entry:
9  %sub = sub nsw i32 %a, %b
10  store i32 %sub, i32* %c, align 4
11  %cmp = icmp sgt i32 %a, %b
12  %cond = select i1 %cmp, i32 %a, i32 %b
13  ret i32 %cond
14
15; CHECK: @foo
16; CHECK-NOT: subf.
17}
18
19define signext i32 @foo2(i32 signext %a, i32 signext %b, i32* nocapture %c) #0 {
20entry:
21  %shl = shl i32 %a, %b
22  store i32 %shl, i32* %c, align 4
23  %cmp = icmp sgt i32 %shl, 0
24  %conv = zext i1 %cmp to i32
25  ret i32 %conv
26
27; CHECK: @foo2
28; CHECK-NOT: slw.
29}
30
31define i64 @fool(i64 %a, i64 %b, i64* nocapture %c) #0 {
32entry:
33  %sub = sub nsw i64 %a, %b
34  store i64 %sub, i64* %c, align 8
35  %cmp = icmp sgt i64 %a, %b
36  %cond = select i1 %cmp, i64 %a, i64 %b
37  ret i64 %cond
38
39; CHECK-LABEL: @fool
40; CHECK-NO-ISEL-LABEL: @fool
41; CHECK: subf. [[REG:[0-9]+]], 4, 3
42; CHECK: isel 3, 3, 4, 1
43; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]]
44; CHECK-NO-ISEL: ori 3, 4, 0
45; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]]
46
47; CHECK: std [[REG]], 0(5)
48}
49
50define i64 @foolb(i64 %a, i64 %b, i64* nocapture %c) #0 {
51entry:
52  %sub = sub nsw i64 %a, %b
53  store i64 %sub, i64* %c, align 8
54  %cmp = icmp sle i64 %a, %b
55  %cond = select i1 %cmp, i64 %a, i64 %b
56  ret i64 %cond
57
58; CHECK-LABEL: @foolb
59; CHECK-NO-ISEL-LABEL: @foolb
60; CHECK: subf. [[REG:[0-9]+]], 4, 3
61; CHECK: isel 3, 4, 3, 1
62; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]]
63; CHECK-NO-ISEL-NEXT: b .LBB
64; CHECK-NO-ISEL addi: 3, 4, 0
65; CHECK: std [[REG]], 0(5)
66}
67
68define i64 @foolc(i64 %a, i64 %b, i64* nocapture %c) #0 {
69entry:
70  %sub = sub nsw i64 %b, %a
71  store i64 %sub, i64* %c, align 8
72  %cmp = icmp sgt i64 %a, %b
73  %cond = select i1 %cmp, i64 %a, i64 %b
74  ret i64 %cond
75
76; CHECK-LABEL: @foolc
77; CHECK-NO-ISEL-LABEL: @foolc
78; CHECK: subf. [[REG:[0-9]+]], 3, 4
79; CHECK: isel 3, 3, 4, 0
80; CHECK-NO-ISEL: bc 12, 0, [[TRUE:.LBB[0-9]+]]
81; CHECK-NO-ISEL: ori 3, 4, 0
82; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]]
83; CHECK: std [[REG]], 0(5)
84}
85
86define i64 @foold(i64 %a, i64 %b, i64* nocapture %c) #0 {
87entry:
88  %sub = sub nsw i64 %b, %a
89  store i64 %sub, i64* %c, align 8
90  %cmp = icmp slt i64 %a, %b
91  %cond = select i1 %cmp, i64 %a, i64 %b
92  ret i64 %cond
93
94; CHECK-LABEL: @foold
95; CHECK-NO-ISEL-LABEL: @foold
96; CHECK: subf. [[REG:[0-9]+]], 3, 4
97; CHECK: isel 3, 3, 4, 1
98; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]]
99; CHECK-NO-ISEL: ori 3, 4, 0
100; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]]
101; CHECK: std [[REG]], 0(5)
102}
103
104define i64 @foold2(i64 %a, i64 %b, i64* nocapture %c) #0 {
105entry:
106  %sub = sub nsw i64 %a, %b
107  store i64 %sub, i64* %c, align 8
108  %cmp = icmp slt i64 %a, %b
109  %cond = select i1 %cmp, i64 %a, i64 %b
110  ret i64 %cond
111
112; CHECK-LABEL: @foold2
113; CHECK-NO-ISEL-LABEL: @foold2
114; CHECK: subf. [[REG:[0-9]+]], 4, 3
115; CHECK: isel 3, 3, 4, 0
116; CHECK-NO-ISEL: bc 12, 0, [[TRUE:.LBB[0-9]+]]
117; CHECK-NO-ISEL: ori 3, 4, 0
118; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]]
119; CHECK: std [[REG]], 0(5)
120}
121
122define i64 @foo2l(i64 %a, i64 %b, i64* nocapture %c) #0 {
123entry:
124  %shl = shl i64 %a, %b
125  store i64 %shl, i64* %c, align 8
126  %cmp = icmp sgt i64 %shl, 0
127  %conv1 = zext i1 %cmp to i64
128  ret i64 %conv1
129
130; CHECK: @foo2l
131; CHECK: sld 4, 3, 4
132; CHECK: std 4, 0(5)
133}
134
135define double @food(double %a, double %b, double* nocapture %c) #0 {
136entry:
137  %sub = fsub double %a, %b
138  store double %sub, double* %c, align 8
139  %cmp = fcmp ogt double %a, %b
140  %cond = select i1 %cmp, double %a, double %b
141  ret double %cond
142
143; CHECK: @food
144; CHECK-NOT: fsub. 0, 1, 2
145; CHECK: stfd 0, 0(5)
146}
147
148define float @foof(float %a, float %b, float* nocapture %c) #0 {
149entry:
150  %sub = fsub float %a, %b
151  store float %sub, float* %c, align 4
152  %cmp = fcmp ogt float %a, %b
153  %cond = select i1 %cmp, float %a, float %b
154  ret float %cond
155
156; CHECK: @foof
157; CHECK-NOT: fsubs. 0, 1, 2
158; CHECK: stfs 0, 0(5)
159}
160
161declare i64 @llvm.ctpop.i64(i64);
162
163define signext i64 @fooct(i64 signext %a, i64 signext %b, i64* nocapture %c) #0 {
164entry:
165  %sub = sub nsw i64 %a, %b
166  %subc = call i64 @llvm.ctpop.i64(i64 %sub)
167  store i64 %subc, i64* %c, align 4
168  %cmp = icmp sgt i64 %subc, 0
169  %cond = select i1 %cmp, i64 %a, i64 %b
170  ret i64 %cond
171
172; CHECK: @fooct
173; CHECK-NOT: popcntd.
174}
175
176