1; RUN: llc -o - -mtriple=powerpc64le-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s 2; RUN: llc -o - -mtriple=powerpc64-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s --check-prefix=CHECK-BE 3 4define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { 5entry: 6 ; CHECK-LABEL: @test1( 7 ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64* 8 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* 9 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]]) 10 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]]) 11 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]] 12 ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block 13 14 ; CHECK-LABEL: res_block:{{.*}} 15 ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64 16 ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 17 ; CHECK-NEXT: br label %endblock 18 19 ; CHECK-LABEL: loadbb1:{{.*}} 20 ; CHECK: [[GEP1:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1 21 ; CHECK-NEXT: [[GEP2:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1 22 ; CHECK-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[GEP1]] 23 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[GEP2]] 24 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]]) 25 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]]) 26 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]] 27 ; CHECK-NEXT: br i1 [[ICMP]], label %endblock, label %res_block 28 29 ; CHECK-BE-LABEL: @test1( 30 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64* 31 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* 32 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]] 33 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block 34 35 ; CHECK-BE-LABEL: res_block:{{.*}} 36 ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64 37 ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 38 ; CHECK-BE-NEXT: br label %endblock 39 40 ; CHECK-BE-LABEL: loadbb1:{{.*}} 41 ; CHECK-BE: [[GEP1:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1 42 ; CHECK-BE-NEXT: [[GEP2:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1 43 ; CHECK-BE-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[GEP1]] 44 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[GEP2]] 45 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]] 46 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %endblock, label %res_block 47 48 %0 = bitcast i32* %buffer1 to i8* 49 %1 = bitcast i32* %buffer2 to i8* 50 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 16) 51 ret i32 %call 52} 53 54declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1 55 56define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { 57 ; CHECK-LABEL: @test2( 58 ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32* 59 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* 60 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]]) 61 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]]) 62 ; CHECK-NEXT: [[CMP1:%[0-9]+]] = icmp ne i32 [[BSWAP1]], [[BSWAP2]] 63 ; CHECK-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[BSWAP1]], [[BSWAP2]] 64 ; CHECK-NEXT: [[SELECT1:%[0-9]+]] = select i1 [[CMP2]], i32 -1, i32 1 65 ; CHECK-NEXT: [[SELECT2:%[0-9]+]] = select i1 [[CMP1]], i32 [[SELECT1]], i32 0 66 ; CHECK-NEXT: ret i32 [[SELECT2]] 67 68 ; CHECK-BE-LABEL: @test2( 69 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32* 70 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* 71 ; CHECK-BE-NEXT: [[CMP1:%[0-9]+]] = icmp ne i32 [[LOAD1]], [[LOAD2]] 72 ; CHECK-BE-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[LOAD1]], [[LOAD2]] 73 ; CHECK-BE-NEXT: [[SELECT1:%[0-9]+]] = select i1 [[CMP2]], i32 -1, i32 1 74 ; CHECK-BE-NEXT: [[SELECT2:%[0-9]+]] = select i1 [[CMP1]], i32 [[SELECT1]], i32 0 75 ; CHECK-BE-NEXT: ret i32 [[SELECT2]] 76 77entry: 78 %0 = bitcast i32* %buffer1 to i8* 79 %1 = bitcast i32* %buffer2 to i8* 80 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4) 81 ret i32 %call 82} 83 84define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { 85 ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64* 86 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* 87 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]]) 88 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]]) 89 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]] 90 ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block 91 92 ; CHECK-LABEL: res_block:{{.*}} 93 ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64 94 ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 95 ; CHECK-NEXT: br label %endblock 96 97 ; CHECK-LABEL: loadbb1:{{.*}} 98 ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32* 99 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* 100 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]]) 101 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]]) 102 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[BSWAP1]] to i64 103 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[BSWAP2]] to i64 104 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] 105 ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb2, label %res_block 106 107 ; CHECK-LABEL: loadbb2:{{.*}} 108 ; CHECK: [[LOAD1:%[0-9]+]] = load i16, i16* 109 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16* 110 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD1]]) 111 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD2]]) 112 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[BSWAP1]] to i64 113 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[BSWAP2]] to i64 114 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] 115 ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb3, label %res_block 116 117 ; CHECK-LABEL: loadbb3:{{.*}} 118 ; CHECK: [[LOAD1:%[0-9]+]] = load i8, i8* 119 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8* 120 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32 121 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32 122 ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]] 123 ; CHECK-NEXT: br label %endblock 124 125 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64* 126 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* 127 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]] 128 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block 129 130 ; CHECK-BE-LABEL: res_block:{{.*}} 131 ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64 132 ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 133 ; CHECK-BE-NEXT: br label %endblock 134 135 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32* 136 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* 137 ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[LOAD1]] to i64 138 ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[LOAD2]] to i64 139 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] 140 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb2, label %res_block 141 142 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i16, i16* 143 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16* 144 ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[LOAD1]] to i64 145 ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[LOAD2]] to i64 146 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] 147 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb3, label %res_block 148 149 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i8, i8* 150 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8* 151 ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32 152 ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32 153 ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]] 154 ; CHECK-BE-NEXT: br label %endblock 155 156entry: 157 %0 = bitcast i32* %buffer1 to i8* 158 %1 = bitcast i32* %buffer2 to i8* 159 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 15) 160 ret i32 %call 161} 162 ; CHECK: call = tail call signext i32 @memcmp 163 ; CHECK-BE: call = tail call signext i32 @memcmp 164define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { 165 166entry: 167 %0 = bitcast i32* %buffer1 to i8* 168 %1 = bitcast i32* %buffer2 to i8* 169 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 65) 170 ret i32 %call 171} 172 173define signext i32 @test5(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2, i32 signext %SIZE) { 174 ; CHECK: call = tail call signext i32 @memcmp 175 ; CHECK-BE: call = tail call signext i32 @memcmp 176entry: 177 %0 = bitcast i32* %buffer1 to i8* 178 %1 = bitcast i32* %buffer2 to i8* 179 %conv = sext i32 %SIZE to i64 180 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 %conv) 181 ret i32 %call 182} 183