1; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s \
2; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names | FileCheck --check-prefix=CHECK-LE \
3; RUN:   -implicit-check-not vmrg -implicit-check-not=vperm %s
4; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu < %s \
5; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names | FileCheck \
6; RUN:   -implicit-check-not vmrg -implicit-check-not=vperm %s
7
8define <16 x i8> @test(i32* %s, i32* %t) {
9; CHECK-LE-LABEL: test:
10; CHECK-LE:       # %bb.0: # %entry
11; CHECK-LE-NEXT:    lfiwzx f0, 0, r3
12; CHECK-LE-NEXT:    xxswapd vs0, f0
13; CHECK-LE-NEXT:    xxspltw v2, vs0, 3
14; CHECK-LE-NEXT:    blr
15
16; CHECK-LABEL: test:
17; CHECK:       # %bb.0: # %entry
18; CHECK-NEXT:    lfiwzx f0, 0, r3
19; CHECK-NEXT:    xxsldwi vs0, f0, f0, 1
20; CHECK-NEXT:    xxspltw v2, vs0, 0
21; CHECK-NEXT:    blr
22entry:
23  %0 = bitcast i32* %s to <4 x i8>*
24  %1 = load <4 x i8>, <4 x i8>* %0, align 4
25  %2 = shufflevector <4 x i8> %1, <4 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
26  ret <16 x i8> %2
27}
28