1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
3; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s \
4; RUN:   -check-prefix=P9
5; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
6; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s \
7; RUN:   -check-prefix=P8
8; RUN: llc -mcpu=pwr7 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
9; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s \
10; RUN:   -check-prefix=P7
11; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
12; RUN:   -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s \
13; RUN:   -check-prefix=P9-AIX32
14; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
15; RUN:   -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s \
16; RUN:   -check-prefix=P8-AIX32
17; RUN: llc -mcpu=pwr7 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
18; RUN:   -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s \
19; RUN:   -check-prefix=P7-AIX32
20
21; v2f64
22define dso_local void @test(<2 x double>* nocapture %c, double* nocapture readonly %a) local_unnamed_addr {
23; P9-LABEL: test:
24; P9:       # %bb.0: # %entry
25; P9-NEXT:    addi r4, r4, 24
26; P9-NEXT:    lxvdsx vs0, 0, r4
27; P9-NEXT:    stxv vs0, 0(r3)
28; P9-NEXT:    blr
29;
30; P8-LABEL: test:
31; P8:       # %bb.0: # %entry
32; P8-NEXT:    addi r4, r4, 24
33; P8-NEXT:    lxvdsx vs0, 0, r4
34; P8-NEXT:    stxvd2x vs0, 0, r3
35; P8-NEXT:    blr
36;
37; P7-LABEL: test:
38; P7:       # %bb.0: # %entry
39; P7-NEXT:    addi r4, r4, 24
40; P7-NEXT:    lxvdsx vs0, 0, r4
41; P7-NEXT:    stxvd2x vs0, 0, r3
42; P7-NEXT:    blr
43;
44; P9-AIX32-LABEL: test:
45; P9-AIX32:       # %bb.0: # %entry
46; P9-AIX32-NEXT:    addi r4, r4, 24
47; P9-AIX32-NEXT:    lxvdsx vs0, 0, r4
48; P9-AIX32-NEXT:    stxv vs0, 0(r3)
49; P9-AIX32-NEXT:    blr
50;
51; P8-AIX32-LABEL: test:
52; P8-AIX32:       # %bb.0: # %entry
53; P8-AIX32-NEXT:    addi r4, r4, 24
54; P8-AIX32-NEXT:    lxvdsx vs0, 0, r4
55; P8-AIX32-NEXT:    stxvd2x vs0, 0, r3
56; P8-AIX32-NEXT:    blr
57;
58; P7-AIX32-LABEL: test:
59; P7-AIX32:       # %bb.0: # %entry
60; P7-AIX32-NEXT:    addi r4, r4, 24
61; P7-AIX32-NEXT:    lxvdsx vs0, 0, r4
62; P7-AIX32-NEXT:    stxvd2x vs0, 0, r3
63; P7-AIX32-NEXT:    blr
64entry:
65  %arrayidx = getelementptr inbounds double, double* %a, i64 3
66  %0 = load double, double* %arrayidx, align 8
67  %splat.splatinsert.i = insertelement <2 x double> undef, double %0, i32 0
68  %splat.splat.i = shufflevector <2 x double> %splat.splatinsert.i, <2 x double> undef, <2 x i32> zeroinitializer
69  store <2 x double> %splat.splat.i, <2 x double>* %c, align 16
70  ret void
71}
72
73; v4f32
74define dso_local void @test2(<4 x float>* nocapture %c, float* nocapture readonly %a) local_unnamed_addr {
75; P9-LABEL: test2:
76; P9:       # %bb.0: # %entry
77; P9-NEXT:    addi r4, r4, 12
78; P9-NEXT:    lxvwsx vs0, 0, r4
79; P9-NEXT:    stxv vs0, 0(r3)
80; P9-NEXT:    blr
81;
82; P8-LABEL: test2:
83; P8:       # %bb.0: # %entry
84; P8-NEXT:    addi r4, r4, 12
85; P8-NEXT:    lfiwzx f0, 0, r4
86; P8-NEXT:    xxspltw vs0, vs0, 1
87; P8-NEXT:    xxswapd vs0, vs0
88; P8-NEXT:    stxvd2x vs0, 0, r3
89; P8-NEXT:    blr
90;
91; P7-LABEL: test2:
92; P7:       # %bb.0: # %entry
93; P7-NEXT:    addi r4, r4, 12
94; P7-NEXT:    lfiwzx f0, 0, r4
95; P7-NEXT:    xxspltw vs0, vs0, 1
96; P7-NEXT:    stxvw4x vs0, 0, r3
97; P7-NEXT:    blr
98;
99; P9-AIX32-LABEL: test2:
100; P9-AIX32:       # %bb.0: # %entry
101; P9-AIX32-NEXT:    addi r4, r4, 12
102; P9-AIX32-NEXT:    lxvwsx vs0, 0, r4
103; P9-AIX32-NEXT:    stxv vs0, 0(r3)
104; P9-AIX32-NEXT:    blr
105;
106; P8-AIX32-LABEL: test2:
107; P8-AIX32:       # %bb.0: # %entry
108; P8-AIX32-NEXT:    addi r4, r4, 12
109; P8-AIX32-NEXT:    lfiwzx f0, 0, r4
110; P8-AIX32-NEXT:    xxspltw vs0, vs0, 1
111; P8-AIX32-NEXT:    stxvw4x vs0, 0, r3
112; P8-AIX32-NEXT:    blr
113;
114; P7-AIX32-LABEL: test2:
115; P7-AIX32:       # %bb.0: # %entry
116; P7-AIX32-NEXT:    addi r4, r4, 12
117; P7-AIX32-NEXT:    lfiwzx f0, 0, r4
118; P7-AIX32-NEXT:    xxspltw vs0, vs0, 1
119; P7-AIX32-NEXT:    stxvw4x vs0, 0, r3
120; P7-AIX32-NEXT:    blr
121entry:
122  %arrayidx = getelementptr inbounds float, float* %a, i64 3
123  %0 = load float, float* %arrayidx, align 4
124  %splat.splatinsert.i = insertelement <4 x float> undef, float %0, i32 0
125  %splat.splat.i = shufflevector <4 x float> %splat.splatinsert.i, <4 x float> undef, <4 x i32> zeroinitializer
126  store <4 x float> %splat.splat.i, <4 x float>* %c, align 16
127  ret void
128}
129
130; v4i32
131define dso_local void @test3(<4 x i32>* nocapture %c, i32* nocapture readonly %a) local_unnamed_addr {
132; P9-LABEL: test3:
133; P9:       # %bb.0: # %entry
134; P9-NEXT:    addi r4, r4, 12
135; P9-NEXT:    lxvwsx vs0, 0, r4
136; P9-NEXT:    stxv vs0, 0(r3)
137; P9-NEXT:    blr
138;
139; P8-LABEL: test3:
140; P8:       # %bb.0: # %entry
141; P8-NEXT:    addi r4, r4, 12
142; P8-NEXT:    lfiwzx f0, 0, r4
143; P8-NEXT:    xxspltw vs0, vs0, 1
144; P8-NEXT:    xxswapd vs0, vs0
145; P8-NEXT:    stxvd2x vs0, 0, r3
146; P8-NEXT:    blr
147;
148; P7-LABEL: test3:
149; P7:       # %bb.0: # %entry
150; P7-NEXT:    addi r4, r4, 12
151; P7-NEXT:    lfiwzx f0, 0, r4
152; P7-NEXT:    xxspltw vs0, vs0, 1
153; P7-NEXT:    stxvw4x vs0, 0, r3
154; P7-NEXT:    blr
155;
156; P9-AIX32-LABEL: test3:
157; P9-AIX32:       # %bb.0: # %entry
158; P9-AIX32-NEXT:    addi r4, r4, 12
159; P9-AIX32-NEXT:    lxvwsx vs0, 0, r4
160; P9-AIX32-NEXT:    stxv vs0, 0(r3)
161; P9-AIX32-NEXT:    blr
162;
163; P8-AIX32-LABEL: test3:
164; P8-AIX32:       # %bb.0: # %entry
165; P8-AIX32-NEXT:    addi r4, r4, 12
166; P8-AIX32-NEXT:    lfiwzx f0, 0, r4
167; P8-AIX32-NEXT:    xxspltw vs0, vs0, 1
168; P8-AIX32-NEXT:    stxvw4x vs0, 0, r3
169; P8-AIX32-NEXT:    blr
170;
171; P7-AIX32-LABEL: test3:
172; P7-AIX32:       # %bb.0: # %entry
173; P7-AIX32-NEXT:    addi r4, r4, 12
174; P7-AIX32-NEXT:    lfiwzx f0, 0, r4
175; P7-AIX32-NEXT:    xxspltw vs0, vs0, 1
176; P7-AIX32-NEXT:    stxvw4x vs0, 0, r3
177; P7-AIX32-NEXT:    blr
178entry:
179  %arrayidx = getelementptr inbounds i32, i32* %a, i64 3
180  %0 = load i32, i32* %arrayidx, align 4
181  %splat.splatinsert.i = insertelement <4 x i32> undef, i32 %0, i32 0
182  %splat.splat.i = shufflevector <4 x i32> %splat.splatinsert.i, <4 x i32> undef, <4 x i32> zeroinitializer
183  store <4 x i32> %splat.splat.i, <4 x i32>* %c, align 16
184  ret void
185}
186
187
188; v2i64
189define dso_local void @test4(<2 x i64>* nocapture %c, i64* nocapture readonly %a) local_unnamed_addr {
190; P9-LABEL: test4:
191; P9:       # %bb.0: # %entry
192; P9-NEXT:    addi r4, r4, 24
193; P9-NEXT:    lxvdsx vs0, 0, r4
194; P9-NEXT:    stxv vs0, 0(r3)
195; P9-NEXT:    blr
196;
197; P8-LABEL: test4:
198; P8:       # %bb.0: # %entry
199; P8-NEXT:    addi r4, r4, 24
200; P8-NEXT:    lxvdsx vs0, 0, r4
201; P8-NEXT:    stxvd2x vs0, 0, r3
202; P8-NEXT:    blr
203;
204; P7-LABEL: test4:
205; P7:       # %bb.0: # %entry
206; P7-NEXT:    addi r4, r4, 24
207; P7-NEXT:    lxvdsx vs0, 0, r4
208; P7-NEXT:    stxvd2x vs0, 0, r3
209; P7-NEXT:    blr
210;
211; P9-AIX32-LABEL: test4:
212; P9-AIX32:       # %bb.0: # %entry
213; P9-AIX32-NEXT:    lwz r5, 24(r4)
214; P9-AIX32-NEXT:    lwz r4, 28(r4)
215; P9-AIX32-NEXT:    stw r4, -16(r1)
216; P9-AIX32-NEXT:    lwz r4, L..C0(r2) # %const.0
217; P9-AIX32-NEXT:    stw r5, -32(r1)
218; P9-AIX32-NEXT:    lxv v3, -16(r1)
219; P9-AIX32-NEXT:    lxv v4, -32(r1)
220; P9-AIX32-NEXT:    lxv v2, 0(r4)
221; P9-AIX32-NEXT:    vperm v2, v4, v3, v2
222; P9-AIX32-NEXT:    stxv v2, 0(r3)
223; P9-AIX32-NEXT:    blr
224;
225; P8-AIX32-LABEL: test4:
226; P8-AIX32:       # %bb.0: # %entry
227; P8-AIX32-NEXT:    lwz r5, L..C0(r2) # %const.0
228; P8-AIX32-NEXT:    lwz r6, 28(r4)
229; P8-AIX32-NEXT:    lwz r4, 24(r4)
230; P8-AIX32-NEXT:    stw r6, -16(r1)
231; P8-AIX32-NEXT:    stw r4, -32(r1)
232; P8-AIX32-NEXT:    addi r4, r1, -16
233; P8-AIX32-NEXT:    lxvw4x v2, 0, r5
234; P8-AIX32-NEXT:    addi r5, r1, -32
235; P8-AIX32-NEXT:    lxvw4x v3, 0, r4
236; P8-AIX32-NEXT:    lxvw4x v4, 0, r5
237; P8-AIX32-NEXT:    vperm v2, v4, v3, v2
238; P8-AIX32-NEXT:    stxvw4x v2, 0, r3
239; P8-AIX32-NEXT:    blr
240;
241; P7-AIX32-LABEL: test4:
242; P7-AIX32:       # %bb.0: # %entry
243; P7-AIX32-NEXT:    lwz r5, L..C0(r2) # %const.0
244; P7-AIX32-NEXT:    lwz r6, 24(r4)
245; P7-AIX32-NEXT:    lwz r4, 28(r4)
246; P7-AIX32-NEXT:    stw r4, -16(r1)
247; P7-AIX32-NEXT:    stw r6, -32(r1)
248; P7-AIX32-NEXT:    lxvw4x v2, 0, r5
249; P7-AIX32-NEXT:    addi r4, r1, -16
250; P7-AIX32-NEXT:    addi r5, r1, -32
251; P7-AIX32-NEXT:    lxvw4x v3, 0, r4
252; P7-AIX32-NEXT:    lxvw4x v4, 0, r5
253; P7-AIX32-NEXT:    vperm v2, v4, v3, v2
254; P7-AIX32-NEXT:    stxvw4x v2, 0, r3
255; P7-AIX32-NEXT:    blr
256entry:
257  %arrayidx = getelementptr inbounds i64, i64* %a, i64 3
258  %0 = load i64, i64* %arrayidx, align 8
259  %splat.splatinsert.i = insertelement <2 x i64> undef, i64 %0, i32 0
260  %splat.splat.i = shufflevector <2 x i64> %splat.splatinsert.i, <2 x i64> undef, <2 x i32> zeroinitializer
261  store <2 x i64> %splat.splat.i, <2 x i64>* %c, align 16
262  ret void
263}
264
265; sext v2i64
266define void @test5(<2 x i64>* %a, i32* %in) {
267; P9-LABEL: test5:
268; P9:       # %bb.0: # %entry
269; P9-NEXT:    lfiwax f0, 0, r4
270; P9-NEXT:    xxspltd vs0, f0, 0
271; P9-NEXT:    stxv vs0, 0(r3)
272; P9-NEXT:    blr
273;
274; P8-LABEL: test5:
275; P8:       # %bb.0: # %entry
276; P8-NEXT:    lfiwax f0, 0, r4
277; P8-NEXT:    xxspltd vs0, f0, 0
278; P8-NEXT:    stxvd2x vs0, 0, r3
279; P8-NEXT:    blr
280;
281; P7-LABEL: test5:
282; P7:       # %bb.0: # %entry
283; P7-NEXT:    lfiwax f0, 0, r4
284; P7-NEXT:    xxspltd vs0, f0, 0
285; P7-NEXT:    stxvd2x vs0, 0, r3
286; P7-NEXT:    blr
287;
288; P9-AIX32-LABEL: test5:
289; P9-AIX32:       # %bb.0: # %entry
290; P9-AIX32-NEXT:    lwz r4, 0(r4)
291; P9-AIX32-NEXT:    srawi r5, r4, 31
292; P9-AIX32-NEXT:    stw r4, -16(r1)
293; P9-AIX32-NEXT:    lwz r4, L..C1(r2) # %const.0
294; P9-AIX32-NEXT:    lxv v3, -16(r1)
295; P9-AIX32-NEXT:    stw r5, -32(r1)
296; P9-AIX32-NEXT:    lxv v4, -32(r1)
297; P9-AIX32-NEXT:    lxv v2, 0(r4)
298; P9-AIX32-NEXT:    vperm v2, v4, v3, v2
299; P9-AIX32-NEXT:    stxv v2, 0(r3)
300; P9-AIX32-NEXT:    blr
301;
302; P8-AIX32-LABEL: test5:
303; P8-AIX32:       # %bb.0: # %entry
304; P8-AIX32-NEXT:    lwz r5, L..C1(r2) # %const.0
305; P8-AIX32-NEXT:    lwz r4, 0(r4)
306; P8-AIX32-NEXT:    stw r4, -16(r1)
307; P8-AIX32-NEXT:    srawi r4, r4, 31
308; P8-AIX32-NEXT:    stw r4, -32(r1)
309; P8-AIX32-NEXT:    lxvw4x v2, 0, r5
310; P8-AIX32-NEXT:    addi r4, r1, -16
311; P8-AIX32-NEXT:    addi r5, r1, -32
312; P8-AIX32-NEXT:    lxvw4x v3, 0, r4
313; P8-AIX32-NEXT:    lxvw4x v4, 0, r5
314; P8-AIX32-NEXT:    vperm v2, v4, v3, v2
315; P8-AIX32-NEXT:    stxvw4x v2, 0, r3
316; P8-AIX32-NEXT:    blr
317;
318; P7-AIX32-LABEL: test5:
319; P7-AIX32:       # %bb.0: # %entry
320; P7-AIX32-NEXT:    lwz r4, 0(r4)
321; P7-AIX32-NEXT:    lwz r5, L..C1(r2) # %const.0
322; P7-AIX32-NEXT:    srawi r6, r4, 31
323; P7-AIX32-NEXT:    stw r4, -16(r1)
324; P7-AIX32-NEXT:    addi r4, r1, -16
325; P7-AIX32-NEXT:    stw r6, -32(r1)
326; P7-AIX32-NEXT:    lxvw4x v2, 0, r5
327; P7-AIX32-NEXT:    addi r5, r1, -32
328; P7-AIX32-NEXT:    lxvw4x v3, 0, r4
329; P7-AIX32-NEXT:    lxvw4x v4, 0, r5
330; P7-AIX32-NEXT:    vperm v2, v4, v3, v2
331; P7-AIX32-NEXT:    stxvw4x v2, 0, r3
332; P7-AIX32-NEXT:    blr
333entry:
334  %0 = load i32, i32* %in, align 4
335  %conv = sext i32 %0 to i64
336  %splat.splatinsert.i = insertelement <2 x i64> poison, i64 %conv, i32 0
337  %splat.splat.i = shufflevector <2 x i64> %splat.splatinsert.i, <2 x i64> poison, <2 x i32> zeroinitializer
338  store <2 x i64> %splat.splat.i, <2 x i64>* %a, align 16
339  ret void
340}
341
342; zext v2i64
343define void @test6(<2 x i64>* %a, i32* %in) {
344; P9-LABEL: test6:
345; P9:       # %bb.0: # %entry
346; P9-NEXT:    lfiwzx f0, 0, r4
347; P9-NEXT:    xxspltd vs0, f0, 0
348; P9-NEXT:    stxv vs0, 0(r3)
349; P9-NEXT:    blr
350;
351; P8-LABEL: test6:
352; P8:       # %bb.0: # %entry
353; P8-NEXT:    lfiwzx f0, 0, r4
354; P8-NEXT:    xxspltd vs0, f0, 0
355; P8-NEXT:    stxvd2x vs0, 0, r3
356; P8-NEXT:    blr
357;
358; P7-LABEL: test6:
359; P7:       # %bb.0: # %entry
360; P7-NEXT:    lfiwzx f0, 0, r4
361; P7-NEXT:    xxspltd vs0, f0, 0
362; P7-NEXT:    stxvd2x vs0, 0, r3
363; P7-NEXT:    blr
364;
365; P9-AIX32-LABEL: test6:
366; P9-AIX32:       # %bb.0: # %entry
367; P9-AIX32-NEXT:    lwz r4, 0(r4)
368; P9-AIX32-NEXT:    li r5, 0
369; P9-AIX32-NEXT:    stw r5, -32(r1)
370; P9-AIX32-NEXT:    lxv v3, -32(r1)
371; P9-AIX32-NEXT:    stw r4, -16(r1)
372; P9-AIX32-NEXT:    lwz r4, L..C2(r2) # %const.0
373; P9-AIX32-NEXT:    lxv v4, -16(r1)
374; P9-AIX32-NEXT:    lxv v2, 0(r4)
375; P9-AIX32-NEXT:    vperm v2, v3, v4, v2
376; P9-AIX32-NEXT:    stxv v2, 0(r3)
377; P9-AIX32-NEXT:    blr
378;
379; P8-AIX32-LABEL: test6:
380; P8-AIX32:       # %bb.0: # %entry
381; P8-AIX32-NEXT:    lwz r6, L..C2(r2) # %const.0
382; P8-AIX32-NEXT:    lwz r4, 0(r4)
383; P8-AIX32-NEXT:    li r5, 0
384; P8-AIX32-NEXT:    stw r5, -32(r1)
385; P8-AIX32-NEXT:    addi r5, r1, -16
386; P8-AIX32-NEXT:    stw r4, -16(r1)
387; P8-AIX32-NEXT:    addi r4, r1, -32
388; P8-AIX32-NEXT:    lxvw4x v2, 0, r6
389; P8-AIX32-NEXT:    lxvw4x v3, 0, r4
390; P8-AIX32-NEXT:    lxvw4x v4, 0, r5
391; P8-AIX32-NEXT:    vperm v2, v3, v4, v2
392; P8-AIX32-NEXT:    stxvw4x v2, 0, r3
393; P8-AIX32-NEXT:    blr
394;
395; P7-AIX32-LABEL: test6:
396; P7-AIX32:       # %bb.0: # %entry
397; P7-AIX32-NEXT:    lwz r5, L..C2(r2) # %const.0
398; P7-AIX32-NEXT:    lwz r4, 0(r4)
399; P7-AIX32-NEXT:    li r6, 0
400; P7-AIX32-NEXT:    stw r6, -32(r1)
401; P7-AIX32-NEXT:    stw r4, -16(r1)
402; P7-AIX32-NEXT:    addi r4, r1, -32
403; P7-AIX32-NEXT:    lxvw4x v2, 0, r5
404; P7-AIX32-NEXT:    addi r5, r1, -16
405; P7-AIX32-NEXT:    lxvw4x v3, 0, r4
406; P7-AIX32-NEXT:    lxvw4x v4, 0, r5
407; P7-AIX32-NEXT:    vperm v2, v3, v4, v2
408; P7-AIX32-NEXT:    stxvw4x v2, 0, r3
409; P7-AIX32-NEXT:    blr
410entry:
411  %0 = load i32, i32* %in, align 4
412  %conv = zext i32 %0 to i64
413  %splat.splatinsert.i = insertelement <2 x i64> poison, i64 %conv, i32 0
414  %splat.splat.i = shufflevector <2 x i64> %splat.splatinsert.i, <2 x i64> poison, <2 x i32> zeroinitializer
415  store <2 x i64> %splat.splat.i, <2 x i64>* %a, align 16
416  ret void
417}
418
419; v8i16
420define void @test7(<8 x i16>* %a, i16* %in) {
421; P9-LABEL: test7:
422; P9:       # %bb.0: # %entry
423; P9-NEXT:    lxsihzx v2, 0, r4
424; P9-NEXT:    vsplth v2, v2, 3
425; P9-NEXT:    stxv v2, 0(r3)
426; P9-NEXT:    blr
427;
428; P8-LABEL: test7:
429; P8:       # %bb.0: # %entry
430; P8-NEXT:    lhzx r4, 0, r4
431; P8-NEXT:    mtvsrwz v2, r4
432; P8-NEXT:    vsplth v2, v2, 3
433; P8-NEXT:    xxswapd vs0, v2
434; P8-NEXT:    stxvd2x vs0, 0, r3
435; P8-NEXT:    blr
436;
437; P7-LABEL: test7:
438; P7:       # %bb.0: # %entry
439; P7-NEXT:    li r5, 1
440; P7-NEXT:    lvx v2, 0, r4
441; P7-NEXT:    lvsl v4, 0, r4
442; P7-NEXT:    lvx v3, r5, r4
443; P7-NEXT:    vperm v2, v2, v3, v4
444; P7-NEXT:    vsplth v2, v2, 0
445; P7-NEXT:    stxvw4x v2, 0, r3
446; P7-NEXT:    blr
447;
448; P9-AIX32-LABEL: test7:
449; P9-AIX32:       # %bb.0: # %entry
450; P9-AIX32-NEXT:    lxsihzx v2, 0, r4
451; P9-AIX32-NEXT:    vsplth v2, v2, 3
452; P9-AIX32-NEXT:    stxv v2, 0(r3)
453; P9-AIX32-NEXT:    blr
454;
455; P8-AIX32-LABEL: test7:
456; P8-AIX32:       # %bb.0: # %entry
457; P8-AIX32-NEXT:    lhzx r4, 0, r4
458; P8-AIX32-NEXT:    mtvsrwz v2, r4
459; P8-AIX32-NEXT:    vsplth v2, v2, 3
460; P8-AIX32-NEXT:    stxvw4x v2, 0, r3
461; P8-AIX32-NEXT:    blr
462;
463; P7-AIX32-LABEL: test7:
464; P7-AIX32:       # %bb.0: # %entry
465; P7-AIX32-NEXT:    li r5, 1
466; P7-AIX32-NEXT:    lvx v2, 0, r4
467; P7-AIX32-NEXT:    lvsl v4, 0, r4
468; P7-AIX32-NEXT:    lvx v3, r5, r4
469; P7-AIX32-NEXT:    vperm v2, v2, v3, v4
470; P7-AIX32-NEXT:    vsplth v2, v2, 0
471; P7-AIX32-NEXT:    stxvw4x v2, 0, r3
472; P7-AIX32-NEXT:    blr
473entry:
474  %0 = load i16, i16* %in, align 2
475  %splat.splatinsert.i = insertelement <8 x i16> poison, i16 %0, i32 0
476  %splat.splat.i = shufflevector <8 x i16> %splat.splatinsert.i, <8 x i16> poison, <8 x i32> zeroinitializer
477  store <8 x i16> %splat.splat.i, <8 x i16>* %a, align 16
478  ret void
479}
480
481; v16i8
482define void @test8(<16 x i8>* %a, i8* %in) {
483; P9-LABEL: test8:
484; P9:       # %bb.0: # %entry
485; P9-NEXT:    lxsibzx v2, 0, r4
486; P9-NEXT:    vspltb v2, v2, 7
487; P9-NEXT:    stxv v2, 0(r3)
488; P9-NEXT:    blr
489;
490; P8-LABEL: test8:
491; P8:       # %bb.0: # %entry
492; P8-NEXT:    lbzx r4, 0, r4
493; P8-NEXT:    mtvsrwz v2, r4
494; P8-NEXT:    vspltb v2, v2, 7
495; P8-NEXT:    xxswapd vs0, v2
496; P8-NEXT:    stxvd2x vs0, 0, r3
497; P8-NEXT:    blr
498;
499; P7-LABEL: test8:
500; P7:       # %bb.0: # %entry
501; P7-NEXT:    lvsl v2, 0, r4
502; P7-NEXT:    lvx v3, 0, r4
503; P7-NEXT:    vperm v2, v3, v3, v2
504; P7-NEXT:    vspltb v2, v2, 0
505; P7-NEXT:    stxvw4x v2, 0, r3
506; P7-NEXT:    blr
507;
508; P9-AIX32-LABEL: test8:
509; P9-AIX32:       # %bb.0: # %entry
510; P9-AIX32-NEXT:    lxsibzx v2, 0, r4
511; P9-AIX32-NEXT:    vspltb v2, v2, 7
512; P9-AIX32-NEXT:    stxv v2, 0(r3)
513; P9-AIX32-NEXT:    blr
514;
515; P8-AIX32-LABEL: test8:
516; P8-AIX32:       # %bb.0: # %entry
517; P8-AIX32-NEXT:    lbzx r4, 0, r4
518; P8-AIX32-NEXT:    mtvsrwz v2, r4
519; P8-AIX32-NEXT:    vspltb v2, v2, 7
520; P8-AIX32-NEXT:    stxvw4x v2, 0, r3
521; P8-AIX32-NEXT:    blr
522;
523; P7-AIX32-LABEL: test8:
524; P7-AIX32:       # %bb.0: # %entry
525; P7-AIX32-NEXT:    lvsl v2, 0, r4
526; P7-AIX32-NEXT:    lvx v3, 0, r4
527; P7-AIX32-NEXT:    vperm v2, v3, v3, v2
528; P7-AIX32-NEXT:    vspltb v2, v2, 0
529; P7-AIX32-NEXT:    stxvw4x v2, 0, r3
530; P7-AIX32-NEXT:    blr
531entry:
532  %0 = load i8, i8* %in, align 1
533  %splat.splatinsert.i = insertelement <16 x i8> poison, i8 %0, i32 0
534  %splat.splat.i = shufflevector <16 x i8> %splat.splatinsert.i, <16 x i8> poison, <16 x i32> zeroinitializer
535  store <16 x i8> %splat.splat.i, <16 x i8>* %a, align 16
536  ret void
537}
538
539define <16 x i8> @unadjusted_lxvwsx(i32* %s, i32* %t) {
540; P9-LABEL: unadjusted_lxvwsx:
541; P9:       # %bb.0: # %entry
542; P9-NEXT:    lxvwsx v2, 0, r3
543; P9-NEXT:    blr
544;
545; P8-LABEL: unadjusted_lxvwsx:
546; P8:       # %bb.0: # %entry
547; P8-NEXT:    lfiwzx f0, 0, r3
548; P8-NEXT:    xxspltw v2, vs0, 1
549; P8-NEXT:    blr
550;
551; P7-LABEL: unadjusted_lxvwsx:
552; P7:       # %bb.0: # %entry
553; P7-NEXT:    lfiwzx f0, 0, r3
554; P7-NEXT:    xxspltw v2, vs0, 1
555; P7-NEXT:    blr
556;
557; P9-AIX32-LABEL: unadjusted_lxvwsx:
558; P9-AIX32:       # %bb.0: # %entry
559; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
560; P9-AIX32-NEXT:    blr
561;
562; P8-AIX32-LABEL: unadjusted_lxvwsx:
563; P8-AIX32:       # %bb.0: # %entry
564; P8-AIX32-NEXT:    lfiwzx f0, 0, r3
565; P8-AIX32-NEXT:    xxspltw v2, vs0, 1
566; P8-AIX32-NEXT:    blr
567;
568; P7-AIX32-LABEL: unadjusted_lxvwsx:
569; P7-AIX32:       # %bb.0: # %entry
570; P7-AIX32-NEXT:    lfiwzx f0, 0, r3
571; P7-AIX32-NEXT:    xxspltw v2, vs0, 1
572; P7-AIX32-NEXT:    blr
573  entry:
574    %0 = bitcast i32* %s to <4 x i8>*
575    %1 = load <4 x i8>, <4 x i8>* %0, align 4
576    %2 = shufflevector <4 x i8> %1, <4 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
577    ret <16 x i8> %2
578}
579
580define <16 x i8> @adjusted_lxvwsx(i64* %s, i64* %t) {
581; P9-LABEL: adjusted_lxvwsx:
582; P9:       # %bb.0: # %entry
583; P9-NEXT:    addi r3, r3, 4
584; P9-NEXT:    lxvwsx v2, 0, r3
585; P9-NEXT:    blr
586;
587; P8-LABEL: adjusted_lxvwsx:
588; P8:       # %bb.0: # %entry
589; P8-NEXT:    lfdx f0, 0, r3
590; P8-NEXT:    xxspltw v2, vs0, 0
591; P8-NEXT:    blr
592;
593; P7-LABEL: adjusted_lxvwsx:
594; P7:       # %bb.0: # %entry
595; P7-NEXT:    ld r3, 0(r3)
596; P7-NEXT:    addi r4, r1, -16
597; P7-NEXT:    std r3, -16(r1)
598; P7-NEXT:    lxvw4x vs0, 0, r4
599; P7-NEXT:    xxspltw v2, vs0, 1
600; P7-NEXT:    blr
601;
602; P9-AIX32-LABEL: adjusted_lxvwsx:
603; P9-AIX32:       # %bb.0: # %entry
604; P9-AIX32-NEXT:    addi r3, r3, 4
605; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
606; P9-AIX32-NEXT:    blr
607;
608; P8-AIX32-LABEL: adjusted_lxvwsx:
609; P8-AIX32:       # %bb.0: # %entry
610; P8-AIX32-NEXT:    addi r3, r3, 4
611; P8-AIX32-NEXT:    lfiwzx f0, 0, r3
612; P8-AIX32-NEXT:    xxspltw v2, vs0, 1
613; P8-AIX32-NEXT:    blr
614;
615; P7-AIX32-LABEL: adjusted_lxvwsx:
616; P7-AIX32:       # %bb.0: # %entry
617; P7-AIX32-NEXT:    addi r3, r3, 4
618; P7-AIX32-NEXT:    lfiwzx f0, 0, r3
619; P7-AIX32-NEXT:    xxspltw v2, vs0, 1
620; P7-AIX32-NEXT:    blr
621  entry:
622    %0 = bitcast i64* %s to <8 x i8>*
623    %1 = load <8 x i8>, <8 x i8>* %0, align 8
624    %2 = shufflevector <8 x i8> %1, <8 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
625    ret <16 x i8> %2
626}
627
628define <16 x i8> @unadjusted_lxvwsx_v16i8(<16 x i8> *%s, <16 x i8> %t) {
629; P9-LABEL: unadjusted_lxvwsx_v16i8:
630; P9:       # %bb.0: # %entry
631; P9-NEXT:    lxvwsx v2, 0, r3
632; P9-NEXT:    blr
633;
634; P8-LABEL: unadjusted_lxvwsx_v16i8:
635; P8:       # %bb.0: # %entry
636; P8-NEXT:    lxvd2x vs0, 0, r3
637; P8-NEXT:    xxswapd v2, vs0
638; P8-NEXT:    xxspltw v2, v2, 3
639; P8-NEXT:    blr
640;
641; P7-LABEL: unadjusted_lxvwsx_v16i8:
642; P7:       # %bb.0: # %entry
643; P7-NEXT:    lxvw4x vs0, 0, r3
644; P7-NEXT:    xxspltw v2, vs0, 0
645; P7-NEXT:    blr
646;
647; P9-AIX32-LABEL: unadjusted_lxvwsx_v16i8:
648; P9-AIX32:       # %bb.0: # %entry
649; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
650; P9-AIX32-NEXT:    blr
651;
652; P8-AIX32-LABEL: unadjusted_lxvwsx_v16i8:
653; P8-AIX32:       # %bb.0: # %entry
654; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3
655; P8-AIX32-NEXT:    xxspltw v2, vs0, 0
656; P8-AIX32-NEXT:    blr
657;
658; P7-AIX32-LABEL: unadjusted_lxvwsx_v16i8:
659; P7-AIX32:       # %bb.0: # %entry
660; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3
661; P7-AIX32-NEXT:    xxspltw v2, vs0, 0
662; P7-AIX32-NEXT:    blr
663  entry:
664    %0 = load <16 x i8>, <16 x i8>* %s, align 16
665    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
666    ret <16 x i8> %1
667}
668
669define <16 x i8> @adjusted_lxvwsx_v16i8(<16 x i8> *%s, <16 x i8> %t) {
670; P9-LABEL: adjusted_lxvwsx_v16i8:
671; P9:       # %bb.0: # %entry
672; P9-NEXT:    addi r3, r3, 4
673; P9-NEXT:    lxvwsx v2, 0, r3
674; P9-NEXT:    blr
675;
676; P8-LABEL: adjusted_lxvwsx_v16i8:
677; P8:       # %bb.0: # %entry
678; P8-NEXT:    lxvd2x vs0, 0, r3
679; P8-NEXT:    xxswapd v2, vs0
680; P8-NEXT:    xxspltw v2, v2, 2
681; P8-NEXT:    blr
682;
683; P7-LABEL: adjusted_lxvwsx_v16i8:
684; P7:       # %bb.0: # %entry
685; P7-NEXT:    lxvw4x vs0, 0, r3
686; P7-NEXT:    xxspltw v2, vs0, 1
687; P7-NEXT:    blr
688;
689; P9-AIX32-LABEL: adjusted_lxvwsx_v16i8:
690; P9-AIX32:       # %bb.0: # %entry
691; P9-AIX32-NEXT:    addi r3, r3, 4
692; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
693; P9-AIX32-NEXT:    blr
694;
695; P8-AIX32-LABEL: adjusted_lxvwsx_v16i8:
696; P8-AIX32:       # %bb.0: # %entry
697; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3
698; P8-AIX32-NEXT:    xxspltw v2, vs0, 1
699; P8-AIX32-NEXT:    blr
700;
701; P7-AIX32-LABEL: adjusted_lxvwsx_v16i8:
702; P7-AIX32:       # %bb.0: # %entry
703; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3
704; P7-AIX32-NEXT:    xxspltw v2, vs0, 1
705; P7-AIX32-NEXT:    blr
706  entry:
707    %0 = load <16 x i8>, <16 x i8>* %s, align 16
708    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
709    ret <16 x i8> %1
710}
711
712define <16 x i8> @adjusted_lxvwsx_v16i8_2(<16 x i8> *%s, <16 x i8> %t) {
713; P9-LABEL: adjusted_lxvwsx_v16i8_2:
714; P9:       # %bb.0: # %entry
715; P9-NEXT:    addi r3, r3, 8
716; P9-NEXT:    lxvwsx v2, 0, r3
717; P9-NEXT:    blr
718;
719; P8-LABEL: adjusted_lxvwsx_v16i8_2:
720; P8:       # %bb.0: # %entry
721; P8-NEXT:    lxvd2x vs0, 0, r3
722; P8-NEXT:    xxswapd v2, vs0
723; P8-NEXT:    xxspltw v2, v2, 1
724; P8-NEXT:    blr
725;
726; P7-LABEL: adjusted_lxvwsx_v16i8_2:
727; P7:       # %bb.0: # %entry
728; P7-NEXT:    lxvw4x vs0, 0, r3
729; P7-NEXT:    xxspltw v2, vs0, 2
730; P7-NEXT:    blr
731;
732; P9-AIX32-LABEL: adjusted_lxvwsx_v16i8_2:
733; P9-AIX32:       # %bb.0: # %entry
734; P9-AIX32-NEXT:    addi r3, r3, 8
735; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
736; P9-AIX32-NEXT:    blr
737;
738; P8-AIX32-LABEL: adjusted_lxvwsx_v16i8_2:
739; P8-AIX32:       # %bb.0: # %entry
740; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3
741; P8-AIX32-NEXT:    xxspltw v2, vs0, 2
742; P8-AIX32-NEXT:    blr
743;
744; P7-AIX32-LABEL: adjusted_lxvwsx_v16i8_2:
745; P7-AIX32:       # %bb.0: # %entry
746; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3
747; P7-AIX32-NEXT:    xxspltw v2, vs0, 2
748; P7-AIX32-NEXT:    blr
749  entry:
750    %0 = load <16 x i8>, <16 x i8>* %s, align 16
751    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11>
752    ret <16 x i8> %1
753}
754
755define <16 x i8> @adjusted_lxvwsx_v16i8_3(<16 x i8> *%s, <16 x i8> %t) {
756; P9-LABEL: adjusted_lxvwsx_v16i8_3:
757; P9:       # %bb.0: # %entry
758; P9-NEXT:    addi r3, r3, 12
759; P9-NEXT:    lxvwsx v2, 0, r3
760; P9-NEXT:    blr
761;
762; P8-LABEL: adjusted_lxvwsx_v16i8_3:
763; P8:       # %bb.0: # %entry
764; P8-NEXT:    lxvd2x vs0, 0, r3
765; P8-NEXT:    xxswapd v2, vs0
766; P8-NEXT:    xxspltw v2, v2, 0
767; P8-NEXT:    blr
768;
769; P7-LABEL: adjusted_lxvwsx_v16i8_3:
770; P7:       # %bb.0: # %entry
771; P7-NEXT:    lxvw4x vs0, 0, r3
772; P7-NEXT:    xxspltw v2, vs0, 3
773; P7-NEXT:    blr
774;
775; P9-AIX32-LABEL: adjusted_lxvwsx_v16i8_3:
776; P9-AIX32:       # %bb.0: # %entry
777; P9-AIX32-NEXT:    addi r3, r3, 12
778; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
779; P9-AIX32-NEXT:    blr
780;
781; P8-AIX32-LABEL: adjusted_lxvwsx_v16i8_3:
782; P8-AIX32:       # %bb.0: # %entry
783; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3
784; P8-AIX32-NEXT:    xxspltw v2, vs0, 3
785; P8-AIX32-NEXT:    blr
786;
787; P7-AIX32-LABEL: adjusted_lxvwsx_v16i8_3:
788; P7-AIX32:       # %bb.0: # %entry
789; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3
790; P7-AIX32-NEXT:    xxspltw v2, vs0, 3
791; P7-AIX32-NEXT:    blr
792  entry:
793    %0 = load <16 x i8>, <16 x i8>* %s, align 16
794    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15>
795    ret <16 x i8> %1
796}
797
798define <16 x i8> @unadjusted_lxvdsx(i64* %s, i64* %t) {
799; P9-LABEL: unadjusted_lxvdsx:
800; P9:       # %bb.0: # %entry
801; P9-NEXT:    lxvdsx v2, 0, r3
802; P9-NEXT:    blr
803;
804; P8-LABEL: unadjusted_lxvdsx:
805; P8:       # %bb.0: # %entry
806; P8-NEXT:    lxvdsx v2, 0, r3
807; P8-NEXT:    blr
808;
809; P7-LABEL: unadjusted_lxvdsx:
810; P7:       # %bb.0: # %entry
811; P7-NEXT:    lxvdsx v2, 0, r3
812; P7-NEXT:    blr
813;
814; P9-AIX32-LABEL: unadjusted_lxvdsx:
815; P9-AIX32:       # %bb.0: # %entry
816; P9-AIX32-NEXT:    lwz r4, 4(r3)
817; P9-AIX32-NEXT:    stw r4, -16(r1)
818; P9-AIX32-NEXT:    lwz r3, 0(r3)
819; P9-AIX32-NEXT:    lxv vs0, -16(r1)
820; P9-AIX32-NEXT:    stw r3, -32(r1)
821; P9-AIX32-NEXT:    lxv vs1, -32(r1)
822; P9-AIX32-NEXT:    xxmrghw vs0, vs1, vs0
823; P9-AIX32-NEXT:    xxmrghd v2, vs0, vs0
824; P9-AIX32-NEXT:    blr
825;
826; P8-AIX32-LABEL: unadjusted_lxvdsx:
827; P8-AIX32:       # %bb.0: # %entry
828; P8-AIX32-NEXT:    lwz r4, 4(r3)
829; P8-AIX32-NEXT:    stw r4, -16(r1)
830; P8-AIX32-NEXT:    addi r4, r1, -32
831; P8-AIX32-NEXT:    lwz r3, 0(r3)
832; P8-AIX32-NEXT:    stw r3, -32(r1)
833; P8-AIX32-NEXT:    addi r3, r1, -16
834; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3
835; P8-AIX32-NEXT:    lxvw4x vs1, 0, r4
836; P8-AIX32-NEXT:    xxmrghw vs0, vs1, vs0
837; P8-AIX32-NEXT:    xxmrghd v2, vs0, vs0
838; P8-AIX32-NEXT:    blr
839;
840; P7-AIX32-LABEL: unadjusted_lxvdsx:
841; P7-AIX32:       # %bb.0: # %entry
842; P7-AIX32-NEXT:    lwz r5, 4(r3)
843; P7-AIX32-NEXT:    addi r4, r1, -16
844; P7-AIX32-NEXT:    stw r5, -16(r1)
845; P7-AIX32-NEXT:    lwz r3, 0(r3)
846; P7-AIX32-NEXT:    stw r3, -32(r1)
847; P7-AIX32-NEXT:    addi r3, r1, -32
848; P7-AIX32-NEXT:    lxvw4x vs0, 0, r4
849; P7-AIX32-NEXT:    lxvw4x vs1, 0, r3
850; P7-AIX32-NEXT:    xxmrghw vs0, vs1, vs0
851; P7-AIX32-NEXT:    xxmrghd v2, vs0, vs0
852; P7-AIX32-NEXT:    blr
853  entry:
854    %0 = bitcast i64* %s to <8 x i8>*
855    %1 = load <8 x i8>, <8 x i8>* %0, align 8
856    %2 = shufflevector <8 x i8> %1, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
857    ret <16 x i8> %2
858}
859
860define <16 x i8> @unadjusted_lxvdsx_v16i8(<16 x i8> *%s, <16 x i8> %t) {
861; P9-LABEL: unadjusted_lxvdsx_v16i8:
862; P9:       # %bb.0: # %entry
863; P9-NEXT:    lxvdsx v2, 0, r3
864; P9-NEXT:    blr
865;
866; P8-LABEL: unadjusted_lxvdsx_v16i8:
867; P8:       # %bb.0: # %entry
868; P8-NEXT:    lxvdsx v2, 0, r3
869; P8-NEXT:    blr
870;
871; P7-LABEL: unadjusted_lxvdsx_v16i8:
872; P7:       # %bb.0: # %entry
873; P7-NEXT:    lxvdsx v2, 0, r3
874; P7-NEXT:    blr
875;
876; P9-AIX32-LABEL: unadjusted_lxvdsx_v16i8:
877; P9-AIX32:       # %bb.0: # %entry
878; P9-AIX32-NEXT:    lxvdsx v2, 0, r3
879; P9-AIX32-NEXT:    blr
880;
881; P8-AIX32-LABEL: unadjusted_lxvdsx_v16i8:
882; P8-AIX32:       # %bb.0: # %entry
883; P8-AIX32-NEXT:    lxvdsx v2, 0, r3
884; P8-AIX32-NEXT:    blr
885;
886; P7-AIX32-LABEL: unadjusted_lxvdsx_v16i8:
887; P7-AIX32:       # %bb.0: # %entry
888; P7-AIX32-NEXT:    lxvdsx v2, 0, r3
889; P7-AIX32-NEXT:    blr
890  entry:
891    %0 = load <16 x i8>, <16 x i8>* %s, align 16
892    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
893    ret <16 x i8> %1
894}
895
896define <16 x i8> @adjusted_lxvdsx_v16i8(<16 x i8> *%s, <16 x i8> %t) {
897; P9-LABEL: adjusted_lxvdsx_v16i8:
898; P9:       # %bb.0: # %entry
899; P9-NEXT:    addi r3, r3, 8
900; P9-NEXT:    lxvdsx v2, 0, r3
901; P9-NEXT:    blr
902;
903; P8-LABEL: adjusted_lxvdsx_v16i8:
904; P8:       # %bb.0: # %entry
905; P8-NEXT:    addi r3, r3, 8
906; P8-NEXT:    lxvdsx v2, 0, r3
907; P8-NEXT:    blr
908;
909; P7-LABEL: adjusted_lxvdsx_v16i8:
910; P7:       # %bb.0: # %entry
911; P7-NEXT:    addi r3, r3, 8
912; P7-NEXT:    lxvdsx v2, 0, r3
913; P7-NEXT:    blr
914;
915; P9-AIX32-LABEL: adjusted_lxvdsx_v16i8:
916; P9-AIX32:       # %bb.0: # %entry
917; P9-AIX32-NEXT:    addi r3, r3, 8
918; P9-AIX32-NEXT:    lxvdsx v2, 0, r3
919; P9-AIX32-NEXT:    blr
920;
921; P8-AIX32-LABEL: adjusted_lxvdsx_v16i8:
922; P8-AIX32:       # %bb.0: # %entry
923; P8-AIX32-NEXT:    addi r3, r3, 8
924; P8-AIX32-NEXT:    lxvdsx v2, 0, r3
925; P8-AIX32-NEXT:    blr
926;
927; P7-AIX32-LABEL: adjusted_lxvdsx_v16i8:
928; P7-AIX32:       # %bb.0: # %entry
929; P7-AIX32-NEXT:    addi r3, r3, 8
930; P7-AIX32-NEXT:    lxvdsx v2, 0, r3
931; P7-AIX32-NEXT:    blr
932  entry:
933    %0 = load <16 x i8>, <16 x i8>* %s, align 16
934    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
935    ret <16 x i8> %1
936}
937
938define <8 x i16> @test_unaligned_v8i16(i16* %Ptr) {
939; P9-LABEL: test_unaligned_v8i16:
940; P9:       # %bb.0: # %entry
941; P9-NEXT:    addi r3, r3, 6
942; P9-NEXT:    lxsihzx v2, 0, r3
943; P9-NEXT:    vsplth v2, v2, 3
944; P9-NEXT:    blr
945;
946; P8-LABEL: test_unaligned_v8i16:
947; P8:       # %bb.0: # %entry
948; P8-NEXT:    lhz r3, 6(r3)
949; P8-NEXT:    mtvsrwz v2, r3
950; P8-NEXT:    vsplth v2, v2, 3
951; P8-NEXT:    blr
952;
953; P7-LABEL: test_unaligned_v8i16:
954; P7:       # %bb.0: # %entry
955; P7-NEXT:    li r4, 1
956; P7-NEXT:    addi r3, r3, 6
957; P7-NEXT:    lvx v2, 0, r3
958; P7-NEXT:    lvx v3, r4, r3
959; P7-NEXT:    lvsl v4, 0, r3
960; P7-NEXT:    vperm v2, v2, v3, v4
961; P7-NEXT:    vsplth v2, v2, 0
962; P7-NEXT:    blr
963;
964; P9-AIX32-LABEL: test_unaligned_v8i16:
965; P9-AIX32:       # %bb.0: # %entry
966; P9-AIX32-NEXT:    addi r3, r3, 6
967; P9-AIX32-NEXT:    lxsihzx v2, 0, r3
968; P9-AIX32-NEXT:    vsplth v2, v2, 3
969; P9-AIX32-NEXT:    blr
970;
971; P8-AIX32-LABEL: test_unaligned_v8i16:
972; P8-AIX32:       # %bb.0: # %entry
973; P8-AIX32-NEXT:    lhz r3, 6(r3)
974; P8-AIX32-NEXT:    mtvsrwz v2, r3
975; P8-AIX32-NEXT:    vsplth v2, v2, 3
976; P8-AIX32-NEXT:    blr
977;
978; P7-AIX32-LABEL: test_unaligned_v8i16:
979; P7-AIX32:       # %bb.0: # %entry
980; P7-AIX32-NEXT:    li r4, 1
981; P7-AIX32-NEXT:    addi r3, r3, 6
982; P7-AIX32-NEXT:    lvx v2, 0, r3
983; P7-AIX32-NEXT:    lvx v3, r4, r3
984; P7-AIX32-NEXT:    lvsl v4, 0, r3
985; P7-AIX32-NEXT:    vperm v2, v2, v3, v4
986; P7-AIX32-NEXT:    vsplth v2, v2, 0
987; P7-AIX32-NEXT:    blr
988entry:
989  %add.ptr = getelementptr inbounds i16, i16* %Ptr, i64 3
990  %0 = load i16, i16* %add.ptr, align 16
991  %splat.splatinsert = insertelement <8 x i16> poison, i16 %0, i32 0
992  %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> poison, <8 x i32> zeroinitializer
993  ret <8 x i16> %splat.splat
994}
995
996define <16 x i8> @test_unaligned_v16i8(i8* %Ptr) {
997; P9-LABEL: test_unaligned_v16i8:
998; P9:       # %bb.0: # %entry
999; P9-NEXT:    addi r3, r3, 3
1000; P9-NEXT:    lxsibzx v2, 0, r3
1001; P9-NEXT:    vspltb v2, v2, 7
1002; P9-NEXT:    blr
1003;
1004; P8-LABEL: test_unaligned_v16i8:
1005; P8:       # %bb.0: # %entry
1006; P8-NEXT:    lbz r3, 3(r3)
1007; P8-NEXT:    mtvsrwz v2, r3
1008; P8-NEXT:    vspltb v2, v2, 7
1009; P8-NEXT:    blr
1010;
1011; P7-LABEL: test_unaligned_v16i8:
1012; P7:       # %bb.0: # %entry
1013; P7-NEXT:    addi r3, r3, 3
1014; P7-NEXT:    lvsl v2, 0, r3
1015; P7-NEXT:    lvx v3, 0, r3
1016; P7-NEXT:    vperm v2, v3, v3, v2
1017; P7-NEXT:    vspltb v2, v2, 0
1018; P7-NEXT:    blr
1019;
1020; P9-AIX32-LABEL: test_unaligned_v16i8:
1021; P9-AIX32:       # %bb.0: # %entry
1022; P9-AIX32-NEXT:    addi r3, r3, 3
1023; P9-AIX32-NEXT:    lxsibzx v2, 0, r3
1024; P9-AIX32-NEXT:    vspltb v2, v2, 7
1025; P9-AIX32-NEXT:    blr
1026;
1027; P8-AIX32-LABEL: test_unaligned_v16i8:
1028; P8-AIX32:       # %bb.0: # %entry
1029; P8-AIX32-NEXT:    lbz r3, 3(r3)
1030; P8-AIX32-NEXT:    mtvsrwz v2, r3
1031; P8-AIX32-NEXT:    vspltb v2, v2, 7
1032; P8-AIX32-NEXT:    blr
1033;
1034; P7-AIX32-LABEL: test_unaligned_v16i8:
1035; P7-AIX32:       # %bb.0: # %entry
1036; P7-AIX32-NEXT:    addi r3, r3, 3
1037; P7-AIX32-NEXT:    lvsl v2, 0, r3
1038; P7-AIX32-NEXT:    lvx v3, 0, r3
1039; P7-AIX32-NEXT:    vperm v2, v3, v3, v2
1040; P7-AIX32-NEXT:    vspltb v2, v2, 0
1041; P7-AIX32-NEXT:    blr
1042entry:
1043  %add.ptr = getelementptr inbounds i8, i8* %Ptr, i64 3
1044  %0 = load i8, i8* %add.ptr, align 16
1045  %splat.splatinsert = insertelement <16 x i8> poison, i8 %0, i32 0
1046  %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> poison, <16 x i32> zeroinitializer
1047  ret <16 x i8> %splat.splat
1048}
1049
1050define <8 x i16> @test_aligned_v8i16_1(i16* %Ptr) {
1051; P9-LABEL: test_aligned_v8i16_1:
1052; P9:       # %bb.0: # %entry
1053; P9-NEXT:    lxsihzx v2, 0, r3
1054; P9-NEXT:    vsplth v2, v2, 3
1055; P9-NEXT:    blr
1056;
1057; P8-LABEL: test_aligned_v8i16_1:
1058; P8:       # %bb.0: # %entry
1059; P8-NEXT:    lvx v2, 0, r3
1060; P8-NEXT:    vsplth v2, v2, 7
1061; P8-NEXT:    blr
1062;
1063; P7-LABEL: test_aligned_v8i16_1:
1064; P7:       # %bb.0: # %entry
1065; P7-NEXT:    lvx v2, 0, r3
1066; P7-NEXT:    vsplth v2, v2, 0
1067; P7-NEXT:    blr
1068;
1069; P9-AIX32-LABEL: test_aligned_v8i16_1:
1070; P9-AIX32:       # %bb.0: # %entry
1071; P9-AIX32-NEXT:    lxsihzx v2, 0, r3
1072; P9-AIX32-NEXT:    vsplth v2, v2, 3
1073; P9-AIX32-NEXT:    blr
1074;
1075; P8-AIX32-LABEL: test_aligned_v8i16_1:
1076; P8-AIX32:       # %bb.0: # %entry
1077; P8-AIX32-NEXT:    lvx v2, 0, r3
1078; P8-AIX32-NEXT:    vsplth v2, v2, 0
1079; P8-AIX32-NEXT:    blr
1080;
1081; P7-AIX32-LABEL: test_aligned_v8i16_1:
1082; P7-AIX32:       # %bb.0: # %entry
1083; P7-AIX32-NEXT:    lvx v2, 0, r3
1084; P7-AIX32-NEXT:    vsplth v2, v2, 0
1085; P7-AIX32-NEXT:    blr
1086entry:
1087  %0 = load i16, i16* %Ptr, align 16
1088  %splat.splatinsert = insertelement <8 x i16> poison, i16 %0, i32 0
1089  %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> poison, <8 x i32> zeroinitializer
1090  ret <8 x i16> %splat.splat
1091}
1092
1093define <8 x i16> @test_aligned_v8i16_2(i16* %Ptr) {
1094; P9-LABEL: test_aligned_v8i16_2:
1095; P9:       # %bb.0: # %entry
1096; P9-NEXT:    addi r3, r3, 32
1097; P9-NEXT:    lxsihzx v2, 0, r3
1098; P9-NEXT:    vsplth v2, v2, 3
1099; P9-NEXT:    blr
1100;
1101; P8-LABEL: test_aligned_v8i16_2:
1102; P8:       # %bb.0: # %entry
1103; P8-NEXT:    addi r3, r3, 32
1104; P8-NEXT:    lvx v2, 0, r3
1105; P8-NEXT:    vsplth v2, v2, 7
1106; P8-NEXT:    blr
1107;
1108; P7-LABEL: test_aligned_v8i16_2:
1109; P7:       # %bb.0: # %entry
1110; P7-NEXT:    addi r3, r3, 32
1111; P7-NEXT:    lvx v2, 0, r3
1112; P7-NEXT:    vsplth v2, v2, 0
1113; P7-NEXT:    blr
1114;
1115; P9-AIX32-LABEL: test_aligned_v8i16_2:
1116; P9-AIX32:       # %bb.0: # %entry
1117; P9-AIX32-NEXT:    addi r3, r3, 32
1118; P9-AIX32-NEXT:    lxsihzx v2, 0, r3
1119; P9-AIX32-NEXT:    vsplth v2, v2, 3
1120; P9-AIX32-NEXT:    blr
1121;
1122; P8-AIX32-LABEL: test_aligned_v8i16_2:
1123; P8-AIX32:       # %bb.0: # %entry
1124; P8-AIX32-NEXT:    addi r3, r3, 32
1125; P8-AIX32-NEXT:    lvx v2, 0, r3
1126; P8-AIX32-NEXT:    vsplth v2, v2, 0
1127; P8-AIX32-NEXT:    blr
1128;
1129; P7-AIX32-LABEL: test_aligned_v8i16_2:
1130; P7-AIX32:       # %bb.0: # %entry
1131; P7-AIX32-NEXT:    addi r3, r3, 32
1132; P7-AIX32-NEXT:    lvx v2, 0, r3
1133; P7-AIX32-NEXT:    vsplth v2, v2, 0
1134; P7-AIX32-NEXT:    blr
1135entry:
1136  %add.ptr = getelementptr inbounds i16, i16* %Ptr, i64 16
1137  %0 = load i16, i16* %add.ptr, align 16
1138  %splat.splatinsert = insertelement <8 x i16> poison, i16 %0, i32 0
1139  %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> poison, <8 x i32> zeroinitializer
1140  ret <8 x i16> %splat.splat
1141}
1142
1143define <16 x i8> @test_aligned_v16i8_1(i8* %Ptr) {
1144; P9-LABEL: test_aligned_v16i8_1:
1145; P9:       # %bb.0: # %entry
1146; P9-NEXT:    lxsibzx v2, 0, r3
1147; P9-NEXT:    vspltb v2, v2, 7
1148; P9-NEXT:    blr
1149;
1150; P8-LABEL: test_aligned_v16i8_1:
1151; P8:       # %bb.0: # %entry
1152; P8-NEXT:    lvx v2, 0, r3
1153; P8-NEXT:    vspltb v2, v2, 15
1154; P8-NEXT:    blr
1155;
1156; P7-LABEL: test_aligned_v16i8_1:
1157; P7:       # %bb.0: # %entry
1158; P7-NEXT:    lvx v2, 0, r3
1159; P7-NEXT:    vspltb v2, v2, 0
1160; P7-NEXT:    blr
1161;
1162; P9-AIX32-LABEL: test_aligned_v16i8_1:
1163; P9-AIX32:       # %bb.0: # %entry
1164; P9-AIX32-NEXT:    lxsibzx v2, 0, r3
1165; P9-AIX32-NEXT:    vspltb v2, v2, 7
1166; P9-AIX32-NEXT:    blr
1167;
1168; P8-AIX32-LABEL: test_aligned_v16i8_1:
1169; P8-AIX32:       # %bb.0: # %entry
1170; P8-AIX32-NEXT:    lvx v2, 0, r3
1171; P8-AIX32-NEXT:    vspltb v2, v2, 0
1172; P8-AIX32-NEXT:    blr
1173;
1174; P7-AIX32-LABEL: test_aligned_v16i8_1:
1175; P7-AIX32:       # %bb.0: # %entry
1176; P7-AIX32-NEXT:    lvx v2, 0, r3
1177; P7-AIX32-NEXT:    vspltb v2, v2, 0
1178; P7-AIX32-NEXT:    blr
1179entry:
1180  %0 = load i8, i8* %Ptr, align 16
1181  %splat.splatinsert = insertelement <16 x i8> poison, i8 %0, i32 0
1182  %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> poison, <16 x i32> zeroinitializer
1183  ret <16 x i8> %splat.splat
1184}
1185
1186define <16 x i8> @test_aligned_v16i8_2(i8* %Ptr) {
1187; P9-LABEL: test_aligned_v16i8_2:
1188; P9:       # %bb.0: # %entry
1189; P9-NEXT:    addi r3, r3, 16
1190; P9-NEXT:    lxsibzx v2, 0, r3
1191; P9-NEXT:    vspltb v2, v2, 7
1192; P9-NEXT:    blr
1193;
1194; P8-LABEL: test_aligned_v16i8_2:
1195; P8:       # %bb.0: # %entry
1196; P8-NEXT:    addi r3, r3, 16
1197; P8-NEXT:    lvx v2, 0, r3
1198; P8-NEXT:    vspltb v2, v2, 15
1199; P8-NEXT:    blr
1200;
1201; P7-LABEL: test_aligned_v16i8_2:
1202; P7:       # %bb.0: # %entry
1203; P7-NEXT:    addi r3, r3, 16
1204; P7-NEXT:    lvx v2, 0, r3
1205; P7-NEXT:    vspltb v2, v2, 0
1206; P7-NEXT:    blr
1207;
1208; P9-AIX32-LABEL: test_aligned_v16i8_2:
1209; P9-AIX32:       # %bb.0: # %entry
1210; P9-AIX32-NEXT:    addi r3, r3, 16
1211; P9-AIX32-NEXT:    lxsibzx v2, 0, r3
1212; P9-AIX32-NEXT:    vspltb v2, v2, 7
1213; P9-AIX32-NEXT:    blr
1214;
1215; P8-AIX32-LABEL: test_aligned_v16i8_2:
1216; P8-AIX32:       # %bb.0: # %entry
1217; P8-AIX32-NEXT:    addi r3, r3, 16
1218; P8-AIX32-NEXT:    lvx v2, 0, r3
1219; P8-AIX32-NEXT:    vspltb v2, v2, 0
1220; P8-AIX32-NEXT:    blr
1221;
1222; P7-AIX32-LABEL: test_aligned_v16i8_2:
1223; P7-AIX32:       # %bb.0: # %entry
1224; P7-AIX32-NEXT:    addi r3, r3, 16
1225; P7-AIX32-NEXT:    lvx v2, 0, r3
1226; P7-AIX32-NEXT:    vspltb v2, v2, 0
1227; P7-AIX32-NEXT:    blr
1228entry:
1229  %add.ptr = getelementptr inbounds i8, i8* %Ptr, i64 16
1230  %0 = load i8, i8* %add.ptr, align 16
1231  %splat.splatinsert = insertelement <16 x i8> poison, i8 %0, i32 0
1232  %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> poison, <16 x i32> zeroinitializer
1233  ret <16 x i8> %splat.splat
1234}
1235
1236; The following test case should not produce a load and splat node,
1237; as we cannot handle extending loads (from f32 to f64), and this test
1238; shows that there are multiple uses of the extending load (other than
1239; a build vector node). `lxvdsx` should not be produced in this case.
1240define <2 x double> @test_v2f64_multiple_use(float* nocapture readonly %a, double* nocapture %b, double* nocapture %c) {
1241; P9-LABEL: test_v2f64_multiple_use:
1242; P9:       # %bb.0: # %entry
1243; P9-NEXT:    lfs f0, 0(r3)
1244; P9-NEXT:    xxspltd v2, vs0, 0
1245; P9-NEXT:    lfd f1, 0(r4)
1246; P9-NEXT:    xsadddp f1, f1, f0
1247; P9-NEXT:    stfd f1, 0(r4)
1248; P9-NEXT:    lfd f1, 0(r5)
1249; P9-NEXT:    xsadddp f1, f1, f0
1250; P9-NEXT:    stfd f1, 0(r5)
1251; P9-NEXT:    blr
1252;
1253; P8-LABEL: test_v2f64_multiple_use:
1254; P8:       # %bb.0: # %entry
1255; P8-NEXT:    lfs f0, 0(r3)
1256; P8-NEXT:    lfd f1, 0(r4)
1257; P8-NEXT:    xsadddp f1, f1, f0
1258; P8-NEXT:    xxspltd v2, vs0, 0
1259; P8-NEXT:    stfd f1, 0(r4)
1260; P8-NEXT:    lfd f1, 0(r5)
1261; P8-NEXT:    xsadddp f1, f1, f0
1262; P8-NEXT:    stfd f1, 0(r5)
1263; P8-NEXT:    blr
1264;
1265; P7-LABEL: test_v2f64_multiple_use:
1266; P7:       # %bb.0: # %entry
1267; P7-NEXT:    lfs f0, 0(r3)
1268; P7-NEXT:    lfd f1, 0(r4)
1269; P7-NEXT:    xsadddp f1, f1, f0
1270; P7-NEXT:    xxspltd v2, vs0, 0
1271; P7-NEXT:    stfd f1, 0(r4)
1272; P7-NEXT:    lfd f1, 0(r5)
1273; P7-NEXT:    xsadddp f1, f1, f0
1274; P7-NEXT:    stfd f1, 0(r5)
1275; P7-NEXT:    blr
1276;
1277; P9-AIX32-LABEL: test_v2f64_multiple_use:
1278; P9-AIX32:       # %bb.0: # %entry
1279; P9-AIX32-NEXT:    lfs f0, 0(r3)
1280; P9-AIX32-NEXT:    xxmrghd v2, vs0, vs0
1281; P9-AIX32-NEXT:    lfd f1, 0(r4)
1282; P9-AIX32-NEXT:    xsadddp f1, f1, f0
1283; P9-AIX32-NEXT:    stfd f1, 0(r4)
1284; P9-AIX32-NEXT:    lfd f1, 0(r5)
1285; P9-AIX32-NEXT:    xsadddp f1, f1, f0
1286; P9-AIX32-NEXT:    stfd f1, 0(r5)
1287; P9-AIX32-NEXT:    blr
1288;
1289; P8-AIX32-LABEL: test_v2f64_multiple_use:
1290; P8-AIX32:       # %bb.0: # %entry
1291; P8-AIX32-NEXT:    lfs f0, 0(r3)
1292; P8-AIX32-NEXT:    lfd f1, 0(r4)
1293; P8-AIX32-NEXT:    xsadddp f1, f1, f0
1294; P8-AIX32-NEXT:    xxmrghd v2, vs0, vs0
1295; P8-AIX32-NEXT:    stfd f1, 0(r4)
1296; P8-AIX32-NEXT:    lfd f1, 0(r5)
1297; P8-AIX32-NEXT:    xsadddp f1, f1, f0
1298; P8-AIX32-NEXT:    stfd f1, 0(r5)
1299; P8-AIX32-NEXT:    blr
1300;
1301; P7-AIX32-LABEL: test_v2f64_multiple_use:
1302; P7-AIX32:       # %bb.0: # %entry
1303; P7-AIX32-NEXT:    lfs f0, 0(r3)
1304; P7-AIX32-NEXT:    lfd f1, 0(r4)
1305; P7-AIX32-NEXT:    xsadddp f1, f1, f0
1306; P7-AIX32-NEXT:    xxmrghd v2, vs0, vs0
1307; P7-AIX32-NEXT:    stfd f1, 0(r4)
1308; P7-AIX32-NEXT:    lfd f1, 0(r5)
1309; P7-AIX32-NEXT:    xsadddp f1, f1, f0
1310; P7-AIX32-NEXT:    stfd f1, 0(r5)
1311; P7-AIX32-NEXT:    blr
1312entry:
1313  %0 = load float, float* %a, align 4
1314  %conv = fpext float %0 to double
1315  %1 = load double, double* %b, align 8
1316  %add = fadd double %1, %conv
1317  store double %add, double* %b, align 8
1318  %2 = load double, double* %c, align 8
1319  %add2 = fadd double %2, %conv
1320  store double %add2, double* %c, align 8
1321  %vecinit = insertelement <2 x double> undef, double %conv, i64 0
1322  %vecinit5 = shufflevector <2 x double> %vecinit, <2 x double> poison, <2 x i32> zeroinitializer
1323  ret <2 x double> %vecinit5
1324}
1325
1326define <4 x i32> @test_splatW(<8 x i16>* %ptr) {
1327; P9-LABEL: test_splatW:
1328; P9:       # %bb.0: # %entry
1329; P9-NEXT:    lxvwsx v2, 0, r3
1330; P9-NEXT:    blr
1331;
1332; P8-LABEL: test_splatW:
1333; P8:       # %bb.0: # %entry
1334; P8-NEXT:    lxvd2x vs0, 0, r3
1335; P8-NEXT:    xxswapd v2, vs0
1336; P8-NEXT:    xxspltw v2, v2, 3
1337; P8-NEXT:    blr
1338;
1339; P7-LABEL: test_splatW:
1340; P7:       # %bb.0: # %entry
1341; P7-NEXT:    lxvw4x vs0, 0, r3
1342; P7-NEXT:    xxspltw v2, vs0, 0
1343; P7-NEXT:    blr
1344;
1345; P9-AIX32-LABEL: test_splatW:
1346; P9-AIX32:       # %bb.0: # %entry
1347; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
1348; P9-AIX32-NEXT:    blr
1349;
1350; P8-AIX32-LABEL: test_splatW:
1351; P8-AIX32:       # %bb.0: # %entry
1352; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3
1353; P8-AIX32-NEXT:    xxspltw v2, vs0, 0
1354; P8-AIX32-NEXT:    blr
1355;
1356; P7-AIX32-LABEL: test_splatW:
1357; P7-AIX32:       # %bb.0: # %entry
1358; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3
1359; P7-AIX32-NEXT:    xxspltw v2, vs0, 0
1360; P7-AIX32-NEXT:    blr
1361entry:
1362  %0 = load <8 x i16>, <8 x i16>* %ptr, align 16
1363  %1 = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
1364  %2 = bitcast<8 x i16> %1 to <4 x i32>
1365  ret <4 x i32> %2
1366}
1367
1368define <4 x i32> @test_splatD(<8 x i16>* %ptr) {
1369; P9-LABEL: test_splatD:
1370; P9:       # %bb.0: # %entry
1371; P9-NEXT:    lxvdsx v2, 0, r3
1372; P9-NEXT:    blr
1373;
1374; P8-LABEL: test_splatD:
1375; P8:       # %bb.0: # %entry
1376; P8-NEXT:    lxvdsx v2, 0, r3
1377; P8-NEXT:    blr
1378;
1379; P7-LABEL: test_splatD:
1380; P7:       # %bb.0: # %entry
1381; P7-NEXT:    lxvdsx v2, 0, r3
1382; P7-NEXT:    blr
1383;
1384; P9-AIX32-LABEL: test_splatD:
1385; P9-AIX32:       # %bb.0: # %entry
1386; P9-AIX32-NEXT:    lxvdsx v2, 0, r3
1387; P9-AIX32-NEXT:    blr
1388;
1389; P8-AIX32-LABEL: test_splatD:
1390; P8-AIX32:       # %bb.0: # %entry
1391; P8-AIX32-NEXT:    lxvdsx v2, 0, r3
1392; P8-AIX32-NEXT:    blr
1393;
1394; P7-AIX32-LABEL: test_splatD:
1395; P7-AIX32:       # %bb.0: # %entry
1396; P7-AIX32-NEXT:    lxvdsx v2, 0, r3
1397; P7-AIX32-NEXT:    blr
1398entry:
1399  %0 = load <8 x i16>, <8 x i16>* %ptr, align 16
1400  %1 = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
1401  %2 = bitcast<8 x i16> %1 to <4 x i32>
1402  ret <4 x i32> %2
1403}
1404